From f3df3a41161973c0468bf879b447e39b4d238935 Mon Sep 17 00:00:00 2001 From: "Jonas K." Date: Mon, 6 May 2024 15:19:14 +0200 Subject: [PATCH] Build FABulous package with setuptools Update pyproject.toml to build FABulous package with setuptools. Use setuptools-scm for autoamtic project version generation. Add FABulous as package script to make it callable directlty from shell. Add bit_gen as package script and add main function to it. Update "fabric_gen" github workflow: - Use new FABulous structure - Update external actions Update import statements in all python modules to absolue imports of FABulous modules and and remove unused imports. Update gitignore. Signed-off-by: Jonas K. --- .github/workflows/fabric_gen.yml | 19 ++--- .gitignore | 1 + FABulous/FABulous.py | 41 +++++----- FABulous/FABulous_API.py | 18 ++--- FABulous/fabric_cad/__init__.py | 0 FABulous/fabric_cad/bit_gen.py | 81 ++++++++++--------- .../fabric_generator/code_generation_VHDL.py | 9 +-- .../code_generation_Verilog.py | 6 +- FABulous/fabric_generator/code_generator.py | 3 +- FABulous/fabric_generator/fabric.py | 6 +- FABulous/fabric_generator/fabric_gen.py | 32 +++++--- FABulous/fabric_generator/file_parser.py | 19 ++++- .../fabric_generator/model_generation_npnr.py | 7 +- .../fabric_generator/model_generation_vpr.py | 15 ++-- FABulous/geometry_generator/bel_geometry.py | 7 +- .../geometry_generator/fabric_geometry.py | 9 ++- FABulous/geometry_generator/geometry_gen.py | 4 +- FABulous/geometry_generator/port_geometry.py | 3 +- FABulous/geometry_generator/sm_geometry.py | 13 +-- FABulous/geometry_generator/tile_geometry.py | 15 ++-- FABulous/geometry_generator/wire_geometry.py | 7 +- pyproject.toml | 44 +++++++++- 22 files changed, 214 insertions(+), 145 deletions(-) create mode 100644 FABulous/fabric_cad/__init__.py diff --git a/.github/workflows/fabric_gen.yml b/.github/workflows/fabric_gen.yml index 2394e4b3..df1647de 100644 --- a/.github/workflows/fabric_gen.yml +++ b/.github/workflows/fabric_gen.yml @@ -11,15 +11,15 @@ jobs: runs-on: ubuntu-latest steps: - - uses: actions/checkout@v2 + - uses: actions/checkout@v4 with: submodules: recursive - name: Set up Python 3.9 - uses: actions/setup-python@v2 + uses: actions/setup-python@v4 with: python-version: 3.9 - name: Set up OSS CAD suite - uses: YosysHQ/setup-oss-cad-suite@v1 + uses: YosysHQ/setup-oss-cad-suite@v2 - name: Install dependencies run: | python3 -m pip install --upgrade pip @@ -31,15 +31,16 @@ jobs: - name: Lint with flake8 run: | # stop the build if there are Python syntax errors or undefined names - flake8 FABulous/fabric_generator/ --count --select=E9,F63,F7,F82 --show-source --statistics + flake8 FABulous/**/*.py --count --select=E9,F63,F7,F82 --show-source --statistics # exit-zero treats all errors as warnings. The GitHub editor is 127 chars wide - flake8 FABulous/fabric_generator --count --exit-zero --max-complexity=10 --max-line-length=127 --statistics + flake8 FABulous/**/*.py --count --exit-zero --max-complexity=10 --max-line-length=127 --statistics + - name: Install FABulous + run: | + pip3 install -e . - name: Run fabric generator flow run: | - export FAB_ROOT=. - python3.9 FABulous/FABulous.py -c demo - python3.9 FABulous/FABulous.py demo --script ./demo/FABulous.tcl - + FABulous -c demo + FABulous demo --script ./demo/FABulous.tcl - name: Run simulation smoketest run: | cd ./demo/Test diff --git a/.gitignore b/.gitignore index bd2f4374..0b8559fd 100755 --- a/.gitignore +++ b/.gitignore @@ -1,2 +1,3 @@ demo/ **/__pycache__ +*.egg-info/ diff --git a/FABulous/FABulous.py b/FABulous/FABulous.py index bfb03302..6dd7bb3d 100644 --- a/FABulous/FABulous.py +++ b/FABulous/FABulous.py @@ -16,30 +16,31 @@ # # SPDX-License-Identifier: Apache-2.0 -from contextlib import redirect_stdout -from fabric_generator.utilities import genFabricObject, GetFabric -import fabric_generator.model_generation_npnr as model_gen_npnr -from fabric_generator.code_generation_VHDL import VHDLWriter -from fabric_generator.code_generation_Verilog import VerilogWriter -from FABulous_API import FABulous +import argparse +import cmd import csv -from glob import glob +import logging import os -import argparse import pickle +import platform import re -import sys -import subprocess as sp -import shutil -from typing import List, Literal -import docker -import cmd import readline -import logging +import shutil +import subprocess as sp +import sys import tkinter as tk -from pathlib import PurePosixPath, PureWindowsPath -import platform import traceback +from contextlib import redirect_stdout +from glob import glob +from pathlib import PurePosixPath, PureWindowsPath +from typing import List, Literal + +import docker +import FABulous.fabric_generator.model_generation_npnr as model_gen_npnr +from FABulous.fabric_generator.code_generation_Verilog import VerilogWriter +from FABulous.fabric_generator.code_generation_VHDL import VHDLWriter +from FABulous.fabric_generator.utilities import GetFabric, genFabricObject +from FABulous.FABulous_API import FABulous readline.set_completer_delims(" \t\n") histfile = "" @@ -62,7 +63,8 @@ else: if not os.path.exists(fabulousRoot): logger.error( - f"FAB_ROOT environment variable set to {fabulousRoot} but the directory does not exist") + f"FAB_ROOT environment variable set to {fabulousRoot} but the directory does not exist" + ) sys.exit() else: if os.path.exists(f"{fabulousRoot}/FABulous"): @@ -244,7 +246,8 @@ def inter(*args, **varargs): if fun.startswith("do_"): name = fun.strip("do_") tcl.createcommand( - name, wrap_with_except_handling(getattr(self, fun))) + name, wrap_with_except_handling(getattr(self, fun)) + ) # os.chdir(args.project_dir) tcl.eval(script) diff --git a/FABulous/FABulous_API.py b/FABulous/FABulous_API.py index 6171107c..066a0eb5 100644 --- a/FABulous/FABulous_API.py +++ b/FABulous/FABulous_API.py @@ -1,14 +1,14 @@ -import fabric_generator.model_generation_vpr as model_gen_vpr -import fabric_generator.model_generation_npnr as model_gen_npnr -from fabric_generator.code_generation_VHDL import VHDLWriter -import fabric_generator.code_generator as codeGen -import fabric_generator.file_parser as fileParser -from fabric_generator.fabric import Fabric, Tile -from fabric_generator.fabric_gen import FabricGenerator -from geometry_generator.geometry_gen import GeometryGenerator - import logging +import FABulous.fabric_generator.code_generator as codeGen +import FABulous.fabric_generator.file_parser as fileParser +import FABulous.fabric_generator.model_generation_npnr as model_gen_npnr +import FABulous.fabric_generator.model_generation_vpr as model_gen_vpr +from FABulous.fabric_generator.code_generation_VHDL import VHDLWriter +from FABulous.fabric_generator.fabric import Fabric, Tile +from FABulous.fabric_generator.fabric_gen import FabricGenerator +from FABulous.geometry_generator.geometry_gen import GeometryGenerator + logger = logging.getLogger(__name__) logging.basicConfig( format="[%(levelname)s]-%(asctime)s - %(message)s", level=logging.INFO diff --git a/FABulous/fabric_cad/__init__.py b/FABulous/fabric_cad/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/FABulous/fabric_cad/bit_gen.py b/FABulous/fabric_cad/bit_gen.py index d5dda196..a76a63c6 100644 --- a/FABulous/fabric_cad/bit_gen.py +++ b/FABulous/fabric_cad/bit_gen.py @@ -1,14 +1,16 @@ -# Python 3 -from array import array +#!/usr/bin/env python + +import csv +import math +import os +import pickle import re import sys +from array import array from contextlib import redirect_stdout from io import StringIO -import math -import os + import numpy -import pickle -import csv from fasm import * # Remove this line if you do not have the fasm library installed and will not be generating a bitstream @@ -260,39 +262,40 @@ def getTileAndWireByWireDest(self, loc: str, dest: str, jumps: bool = True): ##################################################################################### # Main ##################################################################################### - -# Strip arguments -caseProcessedArguments = list(map(lambda x: x.strip(), sys.argv)) -processedArguments = list(map(lambda x: x.lower(), caseProcessedArguments)) -flagRE = re.compile("-\S*") - -if "-genBitstream".lower() in str(sys.argv).lower(): - argIndex = processedArguments.index("-genBitstream".lower()) - - if len(processedArguments) <= argIndex + 3: - raise ValueError( - "\nError: -genBitstream expect three file names - the fasm file, the spec file and the output file" - ) - elif ( - flagRE.match(caseProcessedArguments[argIndex + 1]) - or flagRE.match(caseProcessedArguments[argIndex + 2]) - or flagRE.match(caseProcessedArguments[argIndex + 3]) - ): - raise ValueError( - "\nError: -genBitstream expect three file names, but found a flag in the arguments:" - f" {caseProcessedArguments[argIndex + 1]}, {caseProcessedArguments[argIndex + 2]}, {caseProcessedArguments[argIndex + 3]}\n" +def bit_gen(): + # Strip arguments + caseProcessedArguments = list(map(lambda x: x.strip(), sys.argv)) + processedArguments = list(map(lambda x: x.lower(), caseProcessedArguments)) + flagRE = re.compile("-\S*") + if "-genBitstream".lower() in str(sys.argv).lower(): + argIndex = processedArguments.index("-genBitstream".lower()) + if len(processedArguments) <= argIndex + 3: + raise ValueError( + "\nError: -genBitstream expect three file names - the fasm file, the spec file and the output file" + ) + elif ( + flagRE.match(caseProcessedArguments[argIndex + 1]) + or flagRE.match(caseProcessedArguments[argIndex + 2]) + or flagRE.match(caseProcessedArguments[argIndex + 3]) + ): + raise ValueError( + "\nError: -genBitstream expect three file names, but found a flag in the arguments:" + f" {caseProcessedArguments[argIndex + 1]}, {caseProcessedArguments[argIndex + 2]}, {caseProcessedArguments[argIndex + 3]}\n" + ) + + FasmFileName = caseProcessedArguments[argIndex + 1] + SpecFileName = caseProcessedArguments[argIndex + 2] + OutFileName = caseProcessedArguments[argIndex + 3] + + genBitstream(FasmFileName, SpecFileName, OutFileName) + + if ("-help".lower() in str(sys.argv).lower()) or ("-h" in str(sys.argv).lower()): + print("") + print("Options/Switches") + print( + " -genBitstream foo.fasm spec.txt bitstream.txt - generates a bitstream - the first file is the fasm file, the second is the bitstream spec and the third is the fasm file to write to" ) - FasmFileName = caseProcessedArguments[argIndex + 1] - SpecFileName = caseProcessedArguments[argIndex + 2] - OutFileName = caseProcessedArguments[argIndex + 3] - - genBitstream(FasmFileName, SpecFileName, OutFileName) - -if ("-help".lower() in str(sys.argv).lower()) or ("-h" in str(sys.argv).lower()): - print("") - print("Options/Switches") - print( - " -genBitstream foo.fasm spec.txt bitstream.txt - generates a bitstream - the first file is the fasm file, the second is the bitstream spec and the third is the fasm file to write to" - ) +if __name__ == "__main__": + bit_gen() diff --git a/FABulous/fabric_generator/code_generation_VHDL.py b/FABulous/fabric_generator/code_generation_VHDL.py index 6cad3c1f..f28450fa 100644 --- a/FABulous/fabric_generator/code_generation_VHDL.py +++ b/FABulous/fabric_generator/code_generation_VHDL.py @@ -1,11 +1,10 @@ -from typing import Literal, Tuple -import os import math +import os import re +from typing import Literal, Tuple -from fabric_generator.fabric import Fabric, Tile, Port, Bel, IO -from fabric_generator.code_generator import codeGenerator -from fabric_generator.fabric import ConfigBitMode +from FABulous.fabric_generator.code_generator import codeGenerator +from FABulous.fabric_generator.fabric import IO, Bel, ConfigBitMode, Fabric, Port, Tile class VHDLWriter(codeGenerator): diff --git a/FABulous/fabric_generator/code_generation_Verilog.py b/FABulous/fabric_generator/code_generation_Verilog.py index 5f465f6e..cb696393 100644 --- a/FABulous/fabric_generator/code_generation_Verilog.py +++ b/FABulous/fabric_generator/code_generation_Verilog.py @@ -1,9 +1,9 @@ -from typing import Literal import math import re +from typing import Literal -from fabric_generator.fabric import Tile, Bel, ConfigBitMode, IO -from fabric_generator.code_generator import codeGenerator +from FABulous.fabric_generator.code_generator import codeGenerator +from FABulous.fabric_generator.fabric import IO, Bel, ConfigBitMode, Tile class VerilogWriter(codeGenerator): diff --git a/FABulous/fabric_generator/code_generator.py b/FABulous/fabric_generator/code_generator.py index 3f4dcc8e..88e2b0c1 100644 --- a/FABulous/fabric_generator/code_generator.py +++ b/FABulous/fabric_generator/code_generator.py @@ -1,6 +1,7 @@ import abc from typing import List, Tuple -from fabric_generator.fabric import Bel, IO, ConfigBitMode + +from FABulous.fabric_generator.fabric import IO, Bel, ConfigBitMode class codeGenerator(abc.ABC): diff --git a/FABulous/fabric_generator/fabric.py b/FABulous/fabric_generator/fabric.py index dda545a2..a63aa725 100644 --- a/FABulous/fabric_generator/fabric.py +++ b/FABulous/fabric_generator/fabric.py @@ -1,8 +1,8 @@ -from dataclasses import dataclass, field -from typing import Any, Literal, List, Dict, Tuple import math -from enum import Enum import os +from dataclasses import dataclass, field +from enum import Enum +from typing import Any, Dict, List, Literal, Tuple class IO(Enum): diff --git a/FABulous/fabric_generator/fabric_gen.py b/FABulous/fabric_generator/fabric_gen.py index f2e72b95..80dce0ef 100644 --- a/FABulous/fabric_generator/fabric_gen.py +++ b/FABulous/fabric_generator/fabric_gen.py @@ -16,26 +16,32 @@ # SPDX-License-Identifier: Apache-2.0 -import re +import csv +import logging import math import os +import re import string -import csv -from typing import Dict, List, Tuple -import logging from pathlib import Path +from typing import Dict, List, Tuple - +from FABulous.fabric_generator.code_generation_Verilog import VerilogWriter +from FABulous.fabric_generator.code_generation_VHDL import VHDLWriter +from FABulous.fabric_generator.code_generator import codeGenerator +from FABulous.fabric_generator.fabric import ( + IO, + ConfigBitMode, + ConfigMem, + Direction, + Fabric, + MultiplexerStyle, + Port, + SuperTile, + Tile, +) +from FABulous.fabric_generator.file_parser import parseConfigMem, parseList, parseMatrix from fasm import * # Remove this line if you do not have the fasm library installed and will not be generating a bitstream - -from fabric_generator.file_parser import parseMatrix, parseConfigMem, parseList -from fabric_generator.fabric import IO, Direction, MultiplexerStyle, ConfigBitMode -from fabric_generator.fabric import Fabric, Tile, Port, SuperTile, ConfigMem -from fabric_generator.code_generation_VHDL import VHDLWriter -from fabric_generator.code_generation_Verilog import VerilogWriter -from fabric_generator.code_generator import codeGenerator - SWITCH_MATRIX_DEBUG_SIGNAL = True logger = logging.getLogger(__name__) diff --git a/FABulous/fabric_generator/file_parser.py b/FABulous/fabric_generator/file_parser.py index 04f891c7..63ce002b 100644 --- a/FABulous/fabric_generator/file_parser.py +++ b/FABulous/fabric_generator/file_parser.py @@ -1,11 +1,22 @@ +import csv +import os import re from copy import deepcopy from typing import Dict, List, Literal, Tuple, Union, overload -import csv -import os -from fabric_generator.fabric import Fabric, Port, Bel, Tile, SuperTile, ConfigMem -from fabric_generator.fabric import IO, Direction, Side, MultiplexerStyle, ConfigBitMode +from FABulous.fabric_generator.fabric import ( + IO, + Bel, + ConfigBitMode, + ConfigMem, + Direction, + Fabric, + MultiplexerStyle, + Port, + Side, + SuperTile, + Tile, +) # from fabric import Fabric, Port, Bel, Tile, SuperTile, ConfigMem # from fabric import IO, Direction, Side, MultiplexerStyle, ConfigBitMode diff --git a/FABulous/fabric_generator/model_generation_npnr.py b/FABulous/fabric_generator/model_generation_npnr.py index 61102d79..57d015a4 100644 --- a/FABulous/fabric_generator/model_generation_npnr.py +++ b/FABulous/fabric_generator/model_generation_npnr.py @@ -1,8 +1,9 @@ import string from typing import Tuple -from fabric_generator.utilities import * -from fabric_generator.fabric import Fabric, Tile -from fabric_generator.file_parser import parseMatrix, parseList + +from FABulous.fabric_generator.fabric import Fabric, Tile +from FABulous.fabric_generator.file_parser import parseList, parseMatrix +from FABulous.fabric_generator.utilities import * def genNextpnrModel(fabric: Fabric): diff --git a/FABulous/fabric_generator/model_generation_vpr.py b/FABulous/fabric_generator/model_generation_vpr.py index ea24e6f9..c091bd59 100644 --- a/FABulous/fabric_generator/model_generation_vpr.py +++ b/FABulous/fabric_generator/model_generation_vpr.py @@ -1,14 +1,15 @@ +import logging +import os import string +import xml.etree.ElementTree as ET from sys import prefix from typing import List -from fabric_generator.fabric_gen import FabricGenerator -from fabric_generator.utilities import * -from fabric_generator.fabric import IO, Bel, Fabric -import xml.etree.ElementTree as ET -import os from xml.dom import minidom -from fabric_generator.file_parser import parseMatrix, parseList -import logging + +from FABulous.fabric_generator.fabric import IO, Bel, Fabric +from FABulous.fabric_generator.fabric_gen import FabricGenerator +from FABulous.fabric_generator.file_parser import parseList, parseMatrix +from FABulous.fabric_generator.utilities import * logger = logging.getLogger(__name__) diff --git a/FABulous/geometry_generator/bel_geometry.py b/FABulous/geometry_generator/bel_geometry.py index 32c2ba33..986e35de 100644 --- a/FABulous/geometry_generator/bel_geometry.py +++ b/FABulous/geometry_generator/bel_geometry.py @@ -1,7 +1,8 @@ -from typing import List -from fabric_generator.fabric import Bel, IO -from geometry_generator.port_geometry import PortGeometry, PortType from csv import writer as csvWriter +from typing import List + +from FABulous.fabric_generator.fabric import IO, Bel +from FABulous.geometry_generator.port_geometry import PortGeometry, PortType class BelGeometry: diff --git a/FABulous/geometry_generator/fabric_geometry.py b/FABulous/geometry_generator/fabric_geometry.py index ec3b0d04..e62bc09a 100644 --- a/FABulous/geometry_generator/fabric_geometry.py +++ b/FABulous/geometry_generator/fabric_geometry.py @@ -1,9 +1,10 @@ -from typing import List, Dict, Set import logging from csv import writer as csvWriter -from fabric_generator.fabric import Fabric -from geometry_generator.geometry_obj import Location, Border -from geometry_generator.tile_geometry import TileGeometry +from typing import Dict, List, Set + +from FABulous.fabric_generator.fabric import Fabric +from FABulous.geometry_generator.geometry_obj import Border, Location +from FABulous.geometry_generator.tile_geometry import TileGeometry logger = logging.getLogger(__name__) diff --git a/FABulous/geometry_generator/geometry_gen.py b/FABulous/geometry_generator/geometry_gen.py index 24a2ab32..4ddd6e0e 100644 --- a/FABulous/geometry_generator/geometry_gen.py +++ b/FABulous/geometry_generator/geometry_gen.py @@ -15,8 +15,8 @@ # SPDX-License-Identifier: Apache-2.0 -from fabric_generator.fabric import Fabric -from geometry_generator.fabric_geometry import FabricGeometry +from FABulous.fabric_generator.fabric import Fabric +from FABulous.geometry_generator.fabric_geometry import FabricGeometry class GeometryGenerator: diff --git a/FABulous/geometry_generator/port_geometry.py b/FABulous/geometry_generator/port_geometry.py index 2429f802..a61e47b5 100644 --- a/FABulous/geometry_generator/port_geometry.py +++ b/FABulous/geometry_generator/port_geometry.py @@ -1,7 +1,8 @@ from csv import writer as csvWriter -from fabric_generator.fabric import Side, IO from enum import Enum +from FABulous.fabric_generator.fabric import IO, Side + class PortType(Enum): SWITCH_MATRIX = "PORT" diff --git a/FABulous/geometry_generator/sm_geometry.py b/FABulous/geometry_generator/sm_geometry.py index 9b83ebd8..49d8340f 100644 --- a/FABulous/geometry_generator/sm_geometry.py +++ b/FABulous/geometry_generator/sm_geometry.py @@ -1,10 +1,11 @@ -from typing import List -from fabric_generator.fabric import Port, Tile, Direction, Side, IO -from geometry_generator.geometry_obj import Border -from geometry_generator.bel_geometry import BelGeometry -from geometry_generator.port_geometry import PortGeometry, PortType -from csv import writer as csvWriter import logging +from csv import writer as csvWriter +from typing import List + +from FABulous.fabric_generator.fabric import IO, Direction, Port, Side, Tile +from FABulous.geometry_generator.bel_geometry import BelGeometry +from FABulous.geometry_generator.geometry_obj import Border +from FABulous.geometry_generator.port_geometry import PortGeometry, PortType logger = logging.getLogger(__name__) diff --git a/FABulous/geometry_generator/tile_geometry.py b/FABulous/geometry_generator/tile_geometry.py index 118e5231..726ac675 100644 --- a/FABulous/geometry_generator/tile_geometry.py +++ b/FABulous/geometry_generator/tile_geometry.py @@ -1,11 +1,12 @@ -from typing import List -from fabric_generator.fabric import Tile, Side, Direction -from geometry_generator.geometry_obj import Border, Location -from geometry_generator.sm_geometry import SmGeometry -from geometry_generator.bel_geometry import BelGeometry -from geometry_generator.wire_geometry import WireGeometry, StairWires -from geometry_generator.port_geometry import PortGeometry from csv import writer as csvWriter +from typing import List + +from FABulous.fabric_generator.fabric import Direction, Side, Tile +from FABulous.geometry_generator.bel_geometry import BelGeometry +from FABulous.geometry_generator.geometry_obj import Border, Location +from FABulous.geometry_generator.port_geometry import PortGeometry +from FABulous.geometry_generator.sm_geometry import SmGeometry +from FABulous.geometry_generator.wire_geometry import StairWires, WireGeometry class TileGeometry: diff --git a/FABulous/geometry_generator/wire_geometry.py b/FABulous/geometry_generator/wire_geometry.py index ae366d7c..9cc14724 100644 --- a/FABulous/geometry_generator/wire_geometry.py +++ b/FABulous/geometry_generator/wire_geometry.py @@ -1,7 +1,8 @@ -from typing import List -from fabric_generator.fabric import Direction -from geometry_generator.geometry_obj import Location from csv import writer as csvWriter +from typing import List + +from FABulous.fabric_generator.fabric import Direction +from FABulous.geometry_generator.geometry_obj import Location class WireGeometry: diff --git a/pyproject.toml b/pyproject.toml index b4f1b18b..272d830b 100644 --- a/pyproject.toml +++ b/pyproject.toml @@ -1,8 +1,44 @@ [build-system] -requires = ["flit_core >=3.2,<4"] -build-backend = "flit_core.buildapi" +requires = ["setuptools>=45", "setuptools_scm[toml]>=6.2"] +build-backend = "setuptools.build_meta" [project] -name = "FABulous Documentation" +name = "FABulous-FPGA" authors = [{name = "Jing, Nguyen, Bea, Bardia, Dirk", email = "dirk.koch@manchester.ac.uk"}] -dynamic = ["version", "description"] +description = "FABulous FPGA Fabric generator" +readme = "README.md" +requires-python = ">=3.9" +dynamic = ["version"] + +classifiers = [ + "Programming Language :: Python :: 3", + "License :: OSI Approved :: Apache Software License", + "Operating System :: OS Independent", +] + + +dependencies = [ + 'numpy', + 'fasm', + 'docker', +] + +[project.urls] +"Homepage" = "https://github.com/FPGA-Research-Manchester/FABulous" +"Bug Tracker" = "https://github.com/FPGA-Research-Manchester/FABulous/issues" + + +[project.scripts] +FABulous = "FABulous.FABulous:main" +bit_gen = "FABulous.fabric_cad.bit_gen:bit_gen" + +[tool.setuptools_scm] +version_scheme = "post-release" +local_scheme = "dirty-tag" + + +[tool.setuptools.packages.find] +exclude = ["docs, demo"] # exclude packages matching these glob patterns (empty by default) + +[tool.setuptools.package-data] +mypkg = ["FABulous/**/*"]