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Add in different shared memory and register tile size options #4

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maddyscientist opened this issue Jan 10, 2014 · 0 comments
Open

Add in different shared memory and register tile size options #4

maddyscientist opened this issue Jan 10, 2014 · 0 comments

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@maddyscientist
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The current code is hard-coded to use 2x2 register tiling and 8x8 shared memory tiling. More variants should be included to allow for the possibility of better performance on different architectures.
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@maddyscientist