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constraints.xdc
22 lines (20 loc) · 1.04 KB
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constraints.xdc
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set_property PACKAGE_PIN U5 [get_ports {refclk[0]}]
set_property PACKAGE_PIN V5 [get_ports {refclk[1]}]
set_property PACKAGE_PIN AA3 [get_ports {tx[0]}]
set_property PACKAGE_PIN AB3 [get_ports {tx[1]}]
set_property PACKAGE_PIN W2 [get_ports {tx[2]}]
set_property PACKAGE_PIN Y2 [get_ports {tx[3]}]
set_property PACKAGE_PIN AB18 [get_ports auxp]
set_property PACKAGE_PIN AB19 [get_ports auxn]
set_property IOSTANDARD BLVDS_25 [get_ports auxp]
set_property IOSTANDARD BLVDS_25 [get_ports auxn]
set_property PACKAGE_PIN D3 [get_ports debug]
set_property IOSTANDARD LVCMOS33 [get_ports debug]
set_property PACKAGE_PIN D2 [get_ports debug2]
set_property IOSTANDARD LVCMOS33 [get_ports debug2]
create_clock -name FCLK -period 10.000 [get_pins {PS7_0/FCLKCLK[0]}]
create_clock -name DPCLK -period 7.4 [get_nets dpclk]
set_false_path -from [get_clocks FCLK] -to [get_clocks DPCLK]
set_false_path -from [get_clocks DPCLK] -to [get_clocks FCLK]
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design]