From 43c6ae1ca9faf268f30c7ef489f1428fc30a8b23 Mon Sep 17 00:00:00 2001 From: Laszlo Nagy Date: Tue, 11 May 2021 11:55:11 +0100 Subject: [PATCH] adrv9001/zcu102: Enable independent TX mode in CMOS For CMOS case, lane rates are so low that reference clock of the source synchronous interface can be routed on non-clock routes. The delays on the clock line are adjusted by the digital interface tuning controlled through software. Lock down clock buffers on Rx and Tx interfaces, this avoids suboptimal placement which causes large skew between clocks at the serdes pins. --- projects/adrv9001/zcu102/cmos_constr.xdc | 14 ++++++++++++++ projects/adrv9001/zcu102/system_bd.tcl | 2 +- 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/projects/adrv9001/zcu102/cmos_constr.xdc b/projects/adrv9001/zcu102/cmos_constr.xdc index 84825bb745..ede4d0140b 100644 --- a/projects/adrv9001/zcu102/cmos_constr.xdc +++ b/projects/adrv9001/zcu102/cmos_constr.xdc @@ -53,4 +53,18 @@ set_clock_latency -source -early -0.25 [get_clocks rx2_dclk_out] set_clock_latency -source -late 0.25 [get_clocks rx1_dclk_out] set_clock_latency -source -late 0.25 [get_clocks rx2_dclk_out] +create_pblock SSI_REGION +add_cells_to_pblock [get_pblocks SSI_REGION] [get_cells -quiet [list \ + i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_rx_1_phy/i_clk_buf_fast \ + i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_rx_1_phy/i_div_clk_buf \ + i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_rx_2_phy/i_clk_buf_fast \ + i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_rx_2_phy/i_div_clk_buf \ + i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_tx_1_phy/i_dac_clk_in_gbuf \ + i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_tx_1_phy/i_dac_div_clk_rbuf \ + i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_tx_2_phy/i_dac_clk_in_gbuf \ + i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_tx_2_phy/i_dac_div_clk_rbuf \ + ]] +resize_pblock SSI_REGION -add CLOCKREGION_X3Y2:CLOCKREGION_X3Y3 +set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_tx_1_phy/i_dac_clk_in_ibuf/O] +set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets i_system_wrapper/system_i/axi_adrv9001/inst/i_if/i_tx_2_phy/i_dac_clk_in_ibuf/O] diff --git a/projects/adrv9001/zcu102/system_bd.tcl b/projects/adrv9001/zcu102/system_bd.tcl index 0d34f3183a..5b675c3b86 100644 --- a/projects/adrv9001/zcu102/system_bd.tcl +++ b/projects/adrv9001/zcu102/system_bd.tcl @@ -2,7 +2,7 @@ source $ad_hdl_dir/projects/common/zcu102/zcu102_system_bd.tcl source ../common/adrv9001_bd.tcl -ad_ip_parameter axi_adrv9001 CONFIG.USE_RX_CLK_FOR_TX 1 +ad_ip_parameter axi_adrv9001 CONFIG.USE_RX_CLK_FOR_TX [expr $ad_project_params(CMOS_LVDS_N) == 0] #system ID ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9