diff --git a/.gitmodules b/.gitmodules index 29bcca32..ef93f6dd 100644 --- a/.gitmodules +++ b/.gitmodules @@ -3,4 +3,7 @@ url = git@github.com:chipsalliance/rocket-pcblib.git [submodule "pmod_microsd/library"] path = pmod_microsd/library - url = git@github.com:chipsalliance/rocket-pcblib.git \ No newline at end of file + url = git@github.com:chipsalliance/rocket-pcblib.git +[submodule "fmc_sdram/library"] + path = fmc_sdram/library + url = git@github.com:chipsalliance/rocket-pcblib.git diff --git a/fmc_sdram/.gitignore b/fmc_sdram/.gitignore new file mode 100644 index 00000000..4546dead --- /dev/null +++ b/fmc_sdram/.gitignore @@ -0,0 +1,4 @@ +.venv/ +bom/ +build/ +production/ \ No newline at end of file diff --git a/fmc_sdram/CMakeLists.txt b/fmc_sdram/CMakeLists.txt new file mode 100644 index 00000000..eb88bc9b --- /dev/null +++ b/fmc_sdram/CMakeLists.txt @@ -0,0 +1,166 @@ +cmake_minimum_required(VERSION 3.5) + +project(fmc_sdram + VERSION 1.0.0 + DESCRIPTION "FPGA mezzanine board with SDRAM and basic peripherals" +) + +find_program(FRUGY_PROGRAM "frugy") +if(NOT FRUGY_PROGRAM) + message(FATAL_ERROR "frugy not found, please run `pip install frugy`") +endif() + +find_program(KICADCLI_PROGRAM "kicad-cli") +if(NOT KICADCLI_PROGRAM) + message(FATAL_ERROR "kicad-cli not found, please install kicad8") +endif() + +file(GLOB_RECURSE PROJECT_SCH_FILES ${CMAKE_CURRENT_LIST_DIR} "*.kicad_sch") +file(GLOB_RECURSE PROJECT_PCB_FILES ${CMAKE_CURRENT_LIST_DIR} "*.kicad_pcb") + +set (PROJECT_PRODUCTION_FILES + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}_positions.csv" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}-B_Cu.gbl" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}-B_Mask.gbs" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}-B_Paste.gbp" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}-B_Silkscreen.gbo" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}-Edge_Cuts.gm1" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}-F_Cu.gtl" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}-F_Mask.gts" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}-F_Paste.gtp" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}-F_Silkscreen.gto" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}-In1_Cu.g2" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}-In2_Cu.g3" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}-NPTH.drl" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}-PTH.drl" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}-job.gbrjob" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}_bom.xml" +) + +add_custom_target(eeprom + ALL + DEPENDS + "${CMAKE_CURRENT_BINARY_DIR}/fmc_fru_eeprom.bin" +) + +add_custom_command( + OUTPUT + "${CMAKE_CURRENT_BINARY_DIR}/fmc_fru_eeprom.bin" + COMMENT + "Generate the FRU eeprom data using frugy" + COMMAND + ${FRUGY_PROGRAM} + "${CMAKE_CURRENT_SOURCE_DIR}/data/fmc_fru_eeprom.yml" + -o "${CMAKE_CURRENT_BINARY_DIR}/fmc_fru_eeprom.bin" + -e 2048 + DEPENDS + "${CMAKE_CURRENT_SOURCE_DIR}/data/fmc_fru_eeprom.yml" +) + +add_custom_target(production + ALL + DEPENDS + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber.zip" + ${PROJECT_PRODUCTION_FILES} +) + +add_custom_command( + OUTPUT + ${PROJECT_PRODUCTION_FILES} + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber.zip" + COMMENT + "Generate the production files" + COMMAND + ${CMAKE_COMMAND} -E make_directory "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber" + COMMAND + ${KICADCLI_PROGRAM} pcb export gerbers + --disable-aperture-macros + --no-x2 + -o "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/" + -l "B.Cu,B.Mask,B.Paste,B.SilkS,Edge.Cuts,F.Cu,F.Mask,F.Paste,F.SilkS,In1.Cu,In2.Cu,User.Drawings" + "${CMAKE_CURRENT_SOURCE_DIR}/${CMAKE_PROJECT_NAME}.kicad_pcb" + COMMAND + ${KICADCLI_PROGRAM} pcb export drill + --excellon-separate-th + --generate-map + --excellon-units mm + --excellon-zeros-format suppressleading + -o "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/" + "${CMAKE_CURRENT_SOURCE_DIR}/${CMAKE_PROJECT_NAME}.kicad_pcb" + COMMAND + ${KICADCLI_PROGRAM} pcb export pos + --format csv --units mm --use-drill-file-origin --bottom-negate-x + -o "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}_positions.csv" + "${CMAKE_CURRENT_SOURCE_DIR}/${CMAKE_PROJECT_NAME}.kicad_pcb" + COMMAND + ${KICADCLI_PROGRAM} sch export bom + --preset "Grouped By Value" + -o "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/${CMAKE_PROJECT_NAME}_bom.csv" + "${CMAKE_CURRENT_SOURCE_DIR}/${CMAKE_PROJECT_NAME}.kicad_sch" + COMMAND + ${CMAKE_COMMAND} -E tar "cfv" "${CMAKE_PROJECT_NAME}_gerber.zip" --format=zip + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_gerber/" + DEPENDS + ${PROJECT_PCB_FILES} +) + +add_custom_target(pdf + ALL + DEPENDS + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_sch.pdf" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_pcb.pdf" +) + +add_custom_command( + OUTPUT + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_sch.pdf" + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_pcb.pdf" + COMMAND + ${KICADCLI_PROGRAM} sch export pdf + --no-background-color + -o "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_sch.pdf" + "${CMAKE_CURRENT_SOURCE_DIR}/${CMAKE_PROJECT_NAME}.kicad_sch" + COMMAND + ${KICADCLI_PROGRAM} pcb export pdf + --ibt + -l "B.Cu,B.Mask,B.Paste,B.SilkS,Edge.Cuts,F.Cu,F.Mask,F.Paste,F.SilkS,In1.Cu,In2.Cu,User.Drawings,*" + -o "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_pcb.pdf" + "${CMAKE_CURRENT_SOURCE_DIR}/${CMAKE_PROJECT_NAME}.kicad_pcb" + DEPENDS + ${PROJECT_SCH_FILES} +) + +add_custom_target(erc + ALL + DEPENDS + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_erc.rpt" +) + +add_custom_command( + OUTPUT + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_erc.rpt" + COMMAND + ${KICADCLI_PROGRAM} sch erc + --severity-error + --exit-code-violations + -o "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_erc.rpt" + "${CMAKE_CURRENT_SOURCE_DIR}/${CMAKE_PROJECT_NAME}.kicad_sch" +) + +add_custom_target(drc + ALL + DEPENDS + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_drc.rpt" +) + +add_custom_command( + OUTPUT + "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_drc.rpt" + COMMAND + ${KICADCLI_PROGRAM} pcb drc + --severity-error + --exit-code-violations + -o "${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_PROJECT_NAME}_drc.rpt" + "${CMAKE_CURRENT_SOURCE_DIR}/${CMAKE_PROJECT_NAME}.kicad_pcb" +) diff --git a/fmc_sdram/README.md b/fmc_sdram/README.md new file mode 100644 index 00000000..eec1e432 --- /dev/null +++ b/fmc_sdram/README.md @@ -0,0 +1,43 @@ +# FMC_SDRAM + +FMC mezannine card with dual MT48LC16M16A2 SDRAM, organized as 16Mx32bit, with level shifters for VADJ. +Also includes USB to UART bridge, JTAG level shifter with ARM 20-pin JTAG header. + +![3D VIEW TOP](./image/fmc_sdram_3d_top.png) + +![3D VIEW BOTTOM](./image/fmc_sdram_3d_bot.png) + +## Preparation + +Install kicad 8, cmake, ninja, frugy. + +## Precautions + +When using it for the first time, it is necessary to program the IPMI FRU data +for the EEPROM so that the development board can identify the power supply +of the FMC. + +## Build + +```bash +cmake -G Ninja -B build +cmake --build build +``` + +If you only need to build the eeprom binary, + +```bash +cmake --build build --target eeprom +``` + +If you only need to generate a pdf of the schematic or pcb, + +```bash +cmake --build build --target pdf +``` + +If you need to generate complete production data, + +```bash +cmake --build build --target production +``` diff --git a/fmc_sdram/fmc.kicad_sch b/fmc_sdram/fmc.kicad_sch new file mode 100644 index 00000000..7f2b2cc0 --- /dev/null +++ b/fmc_sdram/fmc.kicad_sch @@ -0,0 +1,20401 @@ +(kicad_sch + (version 20231120) + (generator "eeschema") + (generator_version "8.0") + (uuid "4c3b2057-4941-4abb-8cf4-2002c921a383") + (paper "A4") + (title_block + (title "FMC") + (date "2024-05-26") + (rev "1.0.0") + (company "CHIPS Alliance") + (comment 1 "Yichuan Gao (2024-05-21)") + (comment 2 "Yichuan Gao (2024-05-21)") + (comment 4 "Yichuan Gao (2024-05-26)") + ) + (lib_symbols + (symbol "CHIPSAlliance_Connector:Samtec_ASP-134604-01" + (pin_names + (offset 1.016) hide) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (property "Reference" "J" + (at 0 1.27 0) + (effects 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"GND" + (at 170.18 27.94 90) + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + ) + (property "Footprint" "" + (at 173.99 27.94 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Datasheet" "" + (at 173.99 27.94 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "Description" "" + (at 173.99 27.94 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (pin "1" + (uuid "e6ba1e9a-6ceb-452f-b818-a0009f15d128") + ) + (instances + (project "fmc_sdram" + (path "/387bfcf1-ae49-4b85-be89-3bb02ce2e960/4338fda8-0ea2-4bf2-b1c2-c685ef11d6a0" + (reference "#PWR020") + (unit 1) + ) + ) + ) + ) +) diff --git a/fmc_sdram/fmc_sdram.kicad_dru b/fmc_sdram/fmc_sdram.kicad_dru new file mode 100644 index 00000000..ab1b756d --- /dev/null +++ b/fmc_sdram/fmc_sdram.kicad_dru @@ -0,0 +1,84 @@ +(version 1) +(rule "BGA neckdown U25" + (constraint track_width (min 5mil) (opt 10mil)) + (constraint clearance (min 5mil) (opt 6mil)) + (condition "A.intersectsBackCourtyard('U25')")) +(rule "BGA neckdown J1" + (constraint track_width (min 5mil) (opt 10mil)) + (constraint clearance (min 5mil) (opt 6mil)) + (condition "A.intersectsBackCourtyard('J1')")) +(rule "SDRAM neckdown U7" + (constraint track_width (min 5mil) (opt 6mil)) + (constraint clearance (min 5mil) (opt 6mil)) + (condition "A.intersectsFrontCourtyard('U7')")) +(rule "SDRAM neckdown U8" + (constraint track_width (min 5mil) (opt 6mil)) + (constraint clearance (min 5mil) (opt 6mil)) + (condition "A.intersectsFrontCourtyard('U8')")) +(rule "SOIC neckdown U9" + (constraint track_width (min 5mil) (opt 6mil)) + (constraint clearance (min 5mil) (opt 6mil)) + (condition "A.intersectsBackCourtyard('U9')")) +(rule "SOIC neckdown U10" + (constraint track_width (min 5mil) (opt 6mil)) + (constraint clearance (min 5mil) (opt 6mil)) + (condition "A.intersectsBackCourtyard('U10')")) +(rule "SOIC neckdown U11" + (constraint track_width (min 5mil) (opt 6mil)) + (constraint clearance (min 5mil) (opt 6mil)) + (condition "A.intersectsFrontCourtyard('U11')")) +(rule "SOIC neckdown U12" + (constraint track_width (min 5mil) (opt 6mil)) + (constraint clearance (min 5mil) (opt 6mil)) + (condition "A.intersectsFrontCourtyard('U12')")) +(rule "SOIC neckdown U13" + (constraint track_width (min 5mil) (opt 6mil)) + (constraint clearance (min 5mil) (opt 6mil)) + (condition "A.intersectsBackCourtyard('U13')")) +(rule "SOIC neckdown U14" + (constraint track_width (min 5mil) (opt 6mil)) + (constraint clearance (min 5mil) (opt 6mil)) + (condition "A.intersectsBackCourtyard('U14')")) +(rule "USB neckdown J3" + (constraint track_width (min 5mil) (opt 10mil)) + (constraint clearance (min 5mil) (opt 6mil)) + (constraint annular_width (min 0.1mm) (opt 0.15mm)) + (condition "A.intersectsBackCourtyard('J3')")) +(rule "USB neckdown J4" + (constraint track_width (min 5mil) (opt 10mil)) + (constraint clearance (min 5mil) (opt 6mil)) + (constraint annular_width (min 0.1mm) (opt 0.15mm)) + (condition "A.intersectsBackCourtyard('J4')")) +(rule "USB neckdown Diff" + (constraint track_width (min 5mil) (opt 10mil)) + (constraint clearance (min 5mil) (opt 6mil)) + (constraint annular_width (min 0.1mm) (opt 0.15mm)) + (condition "A.NetClass == 'Diff")) +(rule "QFN neckdown U2" + (constraint track_width (min 5mil) (opt 10mil)) + (constraint clearance (min 5mil) (opt 6mil)) + (condition "A.intersectsBackCourtyard('U2')")) +(rule "Mounting holes H1" + (constraint edge_clearance (min 0mil)) + (condition "A.intersectsCourtyard('H1')")) +(rule "Mounting holes H2" + (constraint edge_clearance (min 0mil)) + (condition "A.intersectsCourtyard('H2')")) +(rule "Mounting holes H3" + (constraint edge_clearance (min 0mil)) + (condition "A.intersectsCourtyard('H3')")) +(rule "Mounting holes H4" + (constraint edge_clearance (min 0mil)) + (condition "A.intersectsCourtyard('H4')")) +(rule "Filled zone VADJ" + (constraint edge_clearance (min 50mil)) + (condition "A.Name == 'VADJ_L2' ")) +(rule "Filled zone 3P3V" + (constraint edge_clearance (min 50mil)) + (condition "A.Name == '3P3V_L2' ")) +(rule "Filled zone GND" + (constraint edge_clearance (min 30mil)) + (condition "A.Name == 'GND_*' ")) +(rule "Allow via on Mounting Holes" + (constraint hole_clearance (min 0mil)) + (condition "A.intersectsCourtyard('H1') || A.intersectsCourtyard('H2')")) diff --git a/fmc_sdram/fmc_sdram.kicad_pcb b/fmc_sdram/fmc_sdram.kicad_pcb new file mode 100644 index 00000000..b61df552 --- /dev/null +++ b/fmc_sdram/fmc_sdram.kicad_pcb @@ -0,0 +1,85657 @@ +(kicad_pcb + (version 20240108) + (generator "pcbnew") + (generator_version "8.0") + (general + (thickness 1.5842) + (legacy_teardrops no) + ) + (paper "A4") + (title_block + (title "FMC of Basic Peripherals for rocket chips") + (date "2024-05-25") + (rev "1.0.0") + (company "CHIPS Alliance") + (comment 1 "Yichuan Gao (2023-05-25)") + (comment 2 "Yichuan Gao (2023-05-25)") + (comment 4 "Yichuan Gao (2023-05-25)") + ) + (layers + (0 "F.Cu" signal) + (1 "In1.Cu" signal) + (2 "In2.Cu" signal) + (31 "B.Cu" signal) + (32 "B.Adhes" user "B.Adhesive") + (33 "F.Adhes" user "F.Adhesive") + (34 "B.Paste" user) + (35 "F.Paste" user) + (36 "B.SilkS" user "B.Silkscreen") + (37 "F.SilkS" user "F.Silkscreen") + (38 "B.Mask" user) + (39 "F.Mask" user) + (40 "Dwgs.User" user "User.Drawings") + (41 "Cmts.User" user "User.Comments") + (42 "Eco1.User" user "User.Eco1") + (43 "Eco2.User" user "User.Eco2") + (44 "Edge.Cuts" user) + (45 "Margin" user) + (46 "B.CrtYd" user "B.Courtyard") + (47 "F.CrtYd" user "F.Courtyard") + (48 "B.Fab" user) + (49 "F.Fab" user) + (50 "User.1" user) + (51 "User.2" user) + (52 "User.3" user) + (53 "User.4" user) + (54 "User.5" user) + (55 "User.6" user) + (56 "User.7" user) + (57 "User.8" user) + (58 "User.9" user) + ) + (setup + (stackup + (layer "F.SilkS" + (type "Top Silk Screen") + (color "White") + ) + (layer "F.Paste" + (type "Top Solder Paste") + ) + (layer "F.Mask" + (type "Top Solder Mask") + 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) + (gr_text "0.0152 mm" + (at 203.179418 101.249968 0) + (layer "Dwgs.User") + (uuid "1f67f048-2102-422c-b672-68ee85d998c5") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "0" + (at 252.593706 94.037968 0) + (layer "Dwgs.User") + (uuid "21d2eb7e-7063-4ce1-8d9b-9a77d294b805") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "No" + (at 102.286565 188.520968 0) + (layer "Dwgs.User") + (uuid "226c9b3e-7d51-4cdf-9c86-0ecc76756545") + (effects + (font + (size 1.5 1.5) + (thickness 0.2) + ) + (justify left top) + ) + ) + (gr_text "Black" + (at 223.20799 112.067968 0) + (layer "Dwgs.User") + (uuid "22cc6274-3d35-4ec2-b1f6-ca2b9a14f6be") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "1" + (at 239.707991 115.673968 0) + (layer "Dwgs.User") + (uuid "23b6bf0e-2573-4566-aae5-51ff7face77b") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + 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(size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "Not specified" + (at 223.20799 104.855968 0) + (layer "Dwgs.User") + (uuid "382e9e30-42f4-4c72-a2f5-6e8435364305") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "Not specified" + (at 186.679417 76.007968 0) + (layer "Dwgs.User") + (uuid "383e1139-ea63-4474-b703-c78c6b77c1f5") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "Thickness (mm)" + (at 203.179418 71.699968 0) + (layer "Dwgs.User") + (uuid "393f0118-efa3-495a-8c17-ef5383921b7b") + (effects + (font + (size 1.5 1.5) + (thickness 0.3) + ) + (justify left top) + ) + ) + (gr_text "Board Thickness: " + (at 136.443703 172.692968 0) + (layer "Dwgs.User") + (uuid "39730780-95d5-47cd-ade0-ca5aefb4c103") + (effects + (font + (size 1.5 1.5) + (thickness 0.2) + ) + (justify left top) + ) + ) + (gr_text "Castellated pads: " + (at 69.629422 188.520968 0) + (layer "Dwgs.User") + (uuid "3c751fe7-b870-465a-be3f-b3c3620fea33") + (effects + (font + (size 1.5 1.5) + (thickness 0.2) + ) + (justify left top) + ) + ) + (gr_text "0.02" + (at 252.593706 97.643968 0) + (layer "Dwgs.User") + (uuid "3ca4ca8a-1b00-40a8-80ad-116dfba14e31") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "0.3000 mm" + (at 161.38656 180.606968 0) + (layer "Dwgs.User") + (uuid "3d9ae158-9586-454a-bbb7-0a69c00d8a29") + (effects + (font + (size 1.5 1.5) + (thickness 0.2) + ) + (justify left top) + ) + ) + (gr_text "0.01 mm" + (at 203.179418 83.219968 0) + (layer "Dwgs.User") + (uuid "41c2926b-dfb3-4138-8e70-e7984a110e68") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "0.0152 mm" + (at 203.179418 94.037968 0) + (layer "Dwgs.User") + (uuid "42437be7-a57c-49fa-8069-f4bfaf9dd155") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "3.3" + (at 239.707991 83.219968 0) + (layer "Dwgs.User") + (uuid "4567c327-d308-4a17-b356-42156b3d6aaa") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "" + (at 186.679417 101.249968 0) + (layer "Dwgs.User") + (uuid "47af530f-5584-4b2e-b410-a8c4a847adfe") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "Not specified" + (at 186.679417 112.067968 0) + (layer "Dwgs.User") + (uuid "47fefce0-4981-47ab-9a39-aab3b547b4d8") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "F.Mask" + (at 142.393703 83.219968 0) + (layer "Dwgs.User") + (uuid "489bb268-5881-47b9-8165-fd8f5f01aae6") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "2313" + (at 186.679417 104.855968 0) + (layer "Dwgs.User") + (uuid "49d0a566-0794-4875-9490-10671f138ce3") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify 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1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "4.05" + (at 239.707991 104.855968 0) + (layer "Dwgs.User") + (uuid "5718174f-0705-4c2a-b967-26d7f0208140") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "4" + (at 102.286565 172.692968 0) + (layer "Dwgs.User") + (uuid "5b518083-a11c-4a15-bbb6-d82a26d5c5f2") + (effects + (font + (size 1.5 1.5) + (thickness 0.2) + ) + (justify left top) + ) + ) + (gr_text "" + (at 223.20799 101.249968 0) + (layer "Dwgs.User") + (uuid "5c154439-71bc-4839-aaef-2f75a48b5a1f") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "Epsilon R" + (at 239.707991 71.699968 0) + (layer "Dwgs.User") + (uuid "5d5f6a80-a788-46b7-bcc9-b56ef85af79b") + (effects + (font + (size 1.5 1.5) + (thickness 0.3) + ) + (justify left top) + ) + ) + (gr_text "0 mm" + (at 203.179418 79.613968 0) + (layer "Dwgs.User") + (uuid "5f97d65a-5ea1-4f6d-9229-79de69dbf450") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "0" + (at 252.593706 79.613968 0) + (layer "Dwgs.User") + (uuid "60a2a617-054d-4d2c-9b16-0ca633c8b190") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "0" + (at 252.593706 86.825968 0) + (layer "Dwgs.User") + (uuid "610d9b63-3fee-4894-9731-7a0ffbbf5116") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "None" + (at 102.286565 184.563968 0) + (layer "Dwgs.User") + (uuid "612c7312-b896-4099-bace-952196827b4b") + (effects + (font + (size 1.5 1.5) + (thickness 0.2) + ) + (justify left top) + ) + ) + (gr_text "Black" + (at 223.20799 83.219968 0) + (layer "Dwgs.User") + (uuid "613edd71-c431-4ea5-9b9f-dd8a21d76c45") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "Loss Tangent" + (at 252.593706 71.699968 0) + (layer "Dwgs.User") + (uuid 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"Color" + (at 223.20799 71.699968 0) + (layer "Dwgs.User") + (uuid "68eb1f44-c799-40c9-aa3a-afa6082f715a") + (effects + (font + (size 1.5 1.5) + (thickness 0.3) + ) + (justify left top) + ) + ) + (gr_text "1" + (at 239.707991 101.249968 0) + (layer "Dwgs.User") + (uuid "6c74cc37-89a8-4444-ac55-be553a823cbf") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "Bottom Solder Mask" + (at 161.607989 112.067968 0) + (layer "Dwgs.User") + (uuid "6cc3aa38-5055-4ef3-bdce-5ad9ec6bbd77") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "" + (at 223.20799 115.673968 0) + (layer "Dwgs.User") + (uuid "73c924f3-3adc-4c20-8767-08623419ce5a") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "0 mm" + (at 203.179418 76.007968 0) + (layer "Dwgs.User") + (uuid "74b04ec6-3924-4126-a7b0-b2cafdf0e4cd") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "4.05" + (at 239.707991 90.431968 0) + (layer "Dwgs.User") + (uuid "761b1939-ae86-465d-a988-2dc9b14d2671") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "0.0994 mm" + (at 203.179418 104.855968 0) + (layer "Dwgs.User") + (uuid "7a9003f1-09d1-4029-a98b-89d511dbdd48") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "F.Cu" + (at 142.393703 86.825968 0) + (layer "Dwgs.User") + (uuid "7ceebc12-2045-4606-98ee-7d685326968d") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "BOARD CHARACTERISTICS" + (at 68.879422 167.198968 0) + (layer "Dwgs.User") + (uuid "7d3c9900-f7cd-4b57-92e9-2ffe11d83f82") + (effects + (font + (size 2 2) + (thickness 0.4) + ) + (justify left top) + ) + ) + (gr_text "B.Paste" + (at 142.393703 115.673968 0) + (layer "Dwgs.User") + (uuid "803cb4b8-a429-4897-85b3-39f50e8f2bce") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "No" + (at 161.38656 184.563968 0) + (layer "Dwgs.User") + (uuid "82116460-3179-4a17-8246-fa17c0f0da04") + (effects + (font + (size 1.5 1.5) + (thickness 0.2) + ) + (justify left top) + ) + ) + (gr_text "0.02" + (at 252.593706 90.431968 0) + (layer "Dwgs.User") + (uuid "82467e86-a680-4cbf-a3e8-7695fb99a22d") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "" + (at 223.20799 86.825968 0) + (layer "Dwgs.User") + (uuid "834cd235-1aea-43ce-8858-8bfa93fe4bec") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "" + (at 186.679417 94.037968 0) + (layer "Dwgs.User") + (uuid "851e0457-a641-462b-84f7-420c0d9ea61f") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "F.Paste" + (at 142.393703 79.613968 0) + (layer "Dwgs.User") + (uuid "88477e42-9921-44a6-839f-6a79e2de65ba") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "0" + (at 252.593706 112.067968 0) + (layer "Dwgs.User") + (uuid "88da9c0c-c9bc-42d0-9397-40e261f567e9") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "Edge card connectors: " + (at 69.629422 192.477968 0) + (layer "Dwgs.User") + (uuid "88e3a0d6-2c0c-4263-92b6-ebbb5b56b69e") + (effects + (font + (size 1.5 1.5) + (thickness 0.2) + ) + (justify left top) + ) + ) + (gr_text "0.035 mm" + (at 203.179418 108.461968 0) + (layer "Dwgs.User") + (uuid "896b8236-493f-4b05-9d4f-13fe7eee7893") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "0" + (at 252.593706 101.249968 0) + (layer "Dwgs.User") + (uuid "8a9faf90-c61a-421f-a0c5-b77117324717") + (effects + (font + (size 1.5 1.5) + (thickness 0.1) + ) + (justify left top) + ) + ) + (gr_text "Plated Board Edge: " + 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(size 1.27 1.27) + ) + (justify right) + ) + (uuid "df130d27-0479-4692-890f-6aefb44f9cdc") + ) + (instances + (project "fmc_sdram" + (path "/387bfcf1-ae49-4b85-be89-3bb02ce2e960" + (page "5") + ) + ) + ) + ) + (sheet + (at 128.27 83.82) + (size 17.78 25.4) + (fields_autoplaced yes) + (stroke + (width 0.1524) + (type solid) + ) + (fill + (color 0 0 0 0.0000) + ) + (uuid "050a965f-1566-4fd5-8eeb-6ab96a9baeba") + (property "Sheetname" "UART" + (at 127.5584 109.22 90) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + ) + (property "Sheetfile" "uart.kicad_sch" + (at 146.6346 109.22 90) + (effects + (font + (size 1.27 1.27) + ) + (justify left top) + ) + ) + (pin "UART{UART}" tri_state + (at 137.16 83.82 90) + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + (uuid "19e60786-600d-48fe-9314-544272f5acce") + ) + (instances + (project "fmc_sdram" + (path "/387bfcf1-ae49-4b85-be89-3bb02ce2e960" + (page "4") + ) + ) + ) + ) + (sheet + (at 93.98 36.83) + (size 92.71 35.56) + (fields_autoplaced yes) + (stroke + (width 0.1524) + (type solid) + ) + (fill + (color 0 0 0 0.0000) + ) + (uuid "4338fda8-0ea2-4bf2-b1c2-c685ef11d6a0") + (property "Sheetname" "FMC" + (at 93.2684 72.39 90) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + ) + (property "Sheetfile" "fmc.kicad_sch" + (at 187.2746 72.39 90) + (effects + (font + (size 1.27 1.27) + ) + (justify left top) + ) + ) + (pin "UART{UART}" tri_state + (at 137.16 72.39 270) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + (uuid "b5d972c9-0ed8-45db-a41c-c47748132c55") + ) + (pin "JTAG{JTAG}" bidirectional + (at 111.76 72.39 270) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + (uuid "8fd31d01-36b7-4b10-8a42-1c3c99fbe473") + ) + (pin "SDRAM{SDRAM}" bidirectional + (at 171.45 72.39 270) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + (uuid "2ba5a56d-20ba-4172-a86b-a47040b7642d") + ) + (pin "SDRAM_DQ_DIR" output + (at 168.91 72.39 270) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + (uuid "a18cbbfe-bed6-4cd1-a964-b66ecdf0530e") + ) + (instances + (project "fmc_sdram" + (path "/387bfcf1-ae49-4b85-be89-3bb02ce2e960" + (page "2") + ) + ) + ) + ) + (sheet + (at 102.87 83.82) + (size 17.78 25.4) + (fields_autoplaced yes) + (stroke + (width 0.1524) + (type solid) + ) + (fill + (color 0 0 0 0.0000) + ) + (uuid "82dd16e5-ea53-4288-95e9-d311496c7627") + (property "Sheetname" "JTAG" + (at 102.1584 109.22 90) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + ) + (property "Sheetfile" "jtag.kicad_sch" + (at 121.2346 109.22 90) + (effects + (font + (size 1.27 1.27) + ) + (justify left top) + ) + ) + (pin "JTAG{JTAG}" bidirectional + (at 111.76 83.82 90) + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + (uuid "9df0827a-0551-4b08-ad7f-b62234393c0a") + ) + (instances + (project "fmc_sdram" + (path "/387bfcf1-ae49-4b85-be89-3bb02ce2e960" + (page "3") + ) + ) + ) + ) + (sheet + (at 154.94 83.82) + (size 20.32 25.4) + (stroke + (width 0.1524) + (type solid) + (color 132 0 132 1) + ) + (fill + (color 255 255 255 0.0000) + ) + (uuid "9efd9746-c346-49d8-a9dc-32927ca6bbf4") + (property "Sheetname" "Level Shifter" + (at 154.94 83.1084 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + ) + (property "Sheetfile" "level_shifter.kicad_sch" + (at 176.022 109.22 90) + (effects + (font + (size 1.27 1.27) + ) + (justify left top) + ) + ) + (pin "HV{SDRAM}" bidirectional + (at 163.83 109.22 270) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + (uuid "d593acbd-94c2-47c3-8b2e-44edc56581e2") + ) + (pin "SDRAM_DQ_DIR" input + (at 168.91 83.82 90) + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + (uuid "fe803f3f-01cf-4b7d-b3c0-15efe002e3a9") + ) + (pin "SDRAM{SDRAM}" bidirectional + (at 171.45 83.82 90) + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + (uuid "13b5ecb5-7748-45c2-a849-e68e27307d1b") + ) + (instances + (project "fmc_sdram" + (path "/387bfcf1-ae49-4b85-be89-3bb02ce2e960" + (page "6") + ) + ) + ) + ) + (sheet_instances + (path "/" + (page "1") + ) + ) +) diff --git a/fmc_sdram/fp-lib-table b/fmc_sdram/fp-lib-table new file mode 100644 index 00000000..67c8d286 --- /dev/null +++ b/fmc_sdram/fp-lib-table @@ -0,0 +1,11 @@ +(fp_lib_table + (version 7) + (lib (name "CHIPSAlliance_Connector")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_Connector.pretty")(options "")(descr "")) + (lib (name "CHIPSAlliance_Interface")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_Interface.pretty")(options "")(descr "")) + (lib (name "CHIPSAlliance_Sensor")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_Sensor.pretty")(options "")(descr "")) + (lib (name "CHIPSAlliance_Package_DFN_QFN")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_Package_DFN_QFN.pretty")(options "")(descr "")) + (lib (name "CHIPSAlliance_LED")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_LED.pretty")(options "")(descr "")) + (lib (name "CHIPSAlliance_MountingHole")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_MountingHole.pretty")(options "")(descr "")) + (lib (name "CHIPSAlliance_Package_TO_SOT_SMD")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_Package_TO_SOT_SMD.pretty")(options "")(descr "")) + (lib (name "CHIPSAlliance_Package_SO")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_Package_SO.pretty")(options "")(descr "")) +) diff --git a/fmc_sdram/image/chipsalliance.svg b/fmc_sdram/image/chipsalliance.svg new file mode 100644 index 00000000..7063afce --- /dev/null +++ b/fmc_sdram/image/chipsalliance.svg @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/fmc_sdram/image/fmc_sdram_3d_bot.png b/fmc_sdram/image/fmc_sdram_3d_bot.png new file mode 100644 index 00000000..4357be51 Binary files /dev/null and b/fmc_sdram/image/fmc_sdram_3d_bot.png differ diff --git a/fmc_sdram/image/fmc_sdram_3d_top.png b/fmc_sdram/image/fmc_sdram_3d_top.png new file mode 100644 index 00000000..3d0de692 Binary files /dev/null and b/fmc_sdram/image/fmc_sdram_3d_top.png differ diff --git a/fmc_sdram/jtag.kicad_sch b/fmc_sdram/jtag.kicad_sch new file mode 100644 index 00000000..1825609d --- /dev/null +++ b/fmc_sdram/jtag.kicad_sch @@ -0,0 +1,4680 @@ +(kicad_sch + (version 20231120) + (generator "eeschema") + (generator_version "8.0") + (uuid "45ac7395-2be2-454a-b8c4-afb5ce7faf52") + (paper "A4") + (title_block + (title "JTAG") + (date "2024-05-26") + (rev "1.0.0") + (company "CHIPS Alliance") + (comment 1 "Yichuan Gao (2024-05-21)") + (comment 2 "Yichuan Gao (2024-05-21)") + (comment 4 "Yichuan Gao (2024-05-26)") + ) + (lib_symbols + (symbol "CHIPSAlliance_Connector:Conn_JTAG_20" + (pin_names + (offset 1.016) + ) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (property "Reference" "J" + (at 0 1.27 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + ) + ) + (property "Value" "Conn_JTAG_20" + (at 0 -38.1 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + ) + (property "Footprint" "Connector_IDC:IDC-Header_2x10_P2.54mm_Vertical" + (at 0 -39.37 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left top) + (hide yes) + ) + ) + (property "Datasheet" "https://www.segger.com/products/debug-probes/j-link/technology/interface-description" + (at 0 -43.18 0) + (effects + (font + (size 1.27 1.27) + ) + (justify left) + (hide yes) + ) + ) + (property "Description" "Standard IDC20 Pinheader Connector, ARM legacy JTAG and SWD interface" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "ki_keywords" "IDC20 Pinheader Pins Connector ARM JTAG SWD" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (property "ki_fp_filters" "IDC*Header*P2.54mm* PinHeader*2x10*P2.54mm*" + (at 0 0 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + ) + ) + (symbol "Conn_JTAG_20_0_1" + (rectangle + (start 0 0) + (end 25.4 -35.56) + (stroke + (width 0.254) + (type default) + ) + (fill + (type background) + ) + ) + (rectangle + (start 2.54 -24.13) + (end 10.16 -26.67) + (stroke + (width 0) + (type default) + ) + (fill + (type none) + ) + ) + (rectangle + (start 2.54 -13.97) + (end 10.16 -24.13) + (stroke + (width 0) + (type default) + ) + (fill + (type none) + ) + ) + (rectangle + (start 9.906 -34.544) + (end 10.414 -35.56) + (stroke + (width 0) + (type default) + ) + (fill + (type none) + ) + ) + (rectangle + (start 9.906 0) + (end 10.414 -1.016) + (stroke + (width 0) + (type default) + ) + (fill + (type none) + ) + ) + (rectangle + (start 10.16 -24.13) + (end 17.78 -26.67) + (stroke + (width 0) + (type default) + ) + (fill + (type none) + ) + ) + (rectangle + (start 10.16 -13.97) + (end 17.78 -24.13) + (stroke + (width 0) + (type default) + ) + (fill + (type none) + ) + ) + (rectangle + (start 12.446 0) + (end 12.954 -1.016) + (stroke + (width 0) + (type default) + ) + (fill + (type none) + ) + ) + (rectangle + (start 14.986 0) + (end 15.494 -1.016) + (stroke + (width 0) + (type default) + ) + (fill + (type none) + ) + ) + (rectangle + (start 17.78 -24.13) + (end 25.4 -26.67) + (stroke + (width 0) + (type default) + ) + (fill + (type none) + ) + ) + (rectangle + (start 17.78 -13.97) + (end 25.4 -24.13) + (stroke + (width 0) + (type default) + ) + (fill + (type none) + ) + ) + (rectangle + (start 24.384 -15.494) + (end 25.4 -14.986) + (stroke + (width 0) + (type default) + ) + (fill + (type none) + ) + ) + (rectangle + (start 25.4 -30.226) + (end 24.384 -30.734) + (stroke + (width 0) + (type default) + ) + (fill + (type none) + ) + ) + (rectangle + (start 25.4 -20.574) + (end 24.384 -20.066) + (stroke + (width 0) + (type default) + ) + (fill + (type none) + ) + ) + (rectangle + (start 25.4 -18.034) + (end 24.384 -17.526) + (stroke + (width 0) + (type default) + ) + (fill + (type none) + ) + ) + (rectangle + (start 25.4 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(text "TCKC" + (at 16.51 -15.24 0) + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + ) + (text "TMSC\n" + (at 16.51 -17.78 0) + (effects + (font + (size 1.27 1.27) + ) + (justify right) + ) + ) + ) + (symbol "Conn_JTAG_20_1_1" + (rectangle + (start 24.384 -23.114) + (end 25.4 -22.606) + (stroke + (width 0) + (type default) + ) + (fill + (type none) + ) + ) + (pin power_in line + (at 10.16 2.54 270) + (length 2.54) + (name "VTREF" + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (number "1" + (effects + (font + (size 1.27 1.27) + ) + ) + ) + ) + (pin power_in line + (at 10.16 -38.1 90) + (length 2.54) hide + (name "GND" + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (number "10" + (effects + (font + (size 1.27 1.27) + ) + ) + ) + ) + (pin input line + (at 27.94 -12.7 180) + (length 2.54) + (name "RTCK" + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (number "11" + (effects + (font + (size 1.27 1.27) + ) + ) + ) + ) + (pin power_in line + (at 10.16 -38.1 90) + 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diff --git a/fmc_sdram/library b/fmc_sdram/library new file mode 160000 index 00000000..8011d17e --- /dev/null +++ b/fmc_sdram/library @@ -0,0 +1 @@ +Subproject commit 8011d17ea9737a5dc385c2943b58a5dbed84fbeb diff --git a/fmc_sdram/sdram.kicad_sch b/fmc_sdram/sdram.kicad_sch new file mode 100644 index 00000000..4f58b738 --- /dev/null +++ b/fmc_sdram/sdram.kicad_sch @@ -0,0 +1,8599 @@ +(kicad_sch + (version 20231120) + (generator "eeschema") + (generator_version "8.0") + (uuid "c598ca1e-4575-441b-bf3f-897bca6e98d4") + (paper "A4") + (title_block + (title "SDRAM") + (date "2024-05-26") + (company "CHIPS Alliance") + (comment 1 "Yichuan Gao (2024-05-21)") + (comment 2 "Yichuan Gao (2024-05-21)") + (comment 4 "Yichuan Gao (2024-05-26)") + ) + (lib_symbols + (symbol "CHIPSAlliance_Power:3P3V" + (power) + (pin_names + (offset 0) + ) + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (property "Reference" "#PWR" + (at 0 -3.81 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) + 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yes) + ) + ) + (pin "1" + (uuid "9d34cee8-242d-4de4-b950-a9e79a6253b1") + ) + (instances + (project "fmc_sdram" + (path "/387bfcf1-ae49-4b85-be89-3bb02ce2e960/03412e19-f3ba-4ea4-b7ea-5b2a46ed3275" + (reference "#PWR085") + (unit 1) + ) + ) + ) + ) +) diff --git a/fmc_sdram/sym-lib-table b/fmc_sdram/sym-lib-table new file mode 100644 index 00000000..77857c89 --- /dev/null +++ b/fmc_sdram/sym-lib-table @@ -0,0 +1,13 @@ +(sym_lib_table + (version 7) + (lib (name "CHIPSAlliance_Connector")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_Connector.kicad_sym")(options "")(descr "")) + (lib (name "CHIPSAlliance_Interface")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_Interface.kicad_sym")(options "")(descr "")) + (lib (name "CHIPSAlliance_Sensor")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_Sensor.kicad_sym")(options "")(descr "")) + (lib (name "CHIPSAlliance_Comparator")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_Comparator.kicad_sym")(options "")(descr "")) + (lib (name "CHIPSAlliance_Logic")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_Logic.kicad_sym")(options "")(descr "")) + (lib (name "CHIPSAlliance_Regulator_Switching")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_Regulator_Switching.kicad_sym")(options "")(descr "")) + (lib (name "CHIPSAlliance_Operational_Amplifier")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_Operational_Amplifier.kicad_sym")(options "")(descr "")) + (lib (name "CHIPSAlliance_Mechanical")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_Mechanical.kicad_sym")(options "")(descr "")) + (lib (name "CHIPSAlliance_Power")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_Power.kicad_sym")(options "")(descr "")) + (lib (name "CHIPSAlliance_LED")(type "KiCad")(uri "${KIPRJMOD}/library/CHIPSAlliance_LED.kicad_sym")(options "")(descr "")) +) diff --git a/fmc_sdram/template/chipsalliance.kicad_wks b/fmc_sdram/template/chipsalliance.kicad_wks new file mode 100644 index 00000000..c01b18bd --- /dev/null +++ b/fmc_sdram/template/chipsalliance.kicad_wks @@ -0,0 +1,386 @@ +(kicad_wks (version 20220228) (generator pl_editor) + (setup (textsize 1.5 1.5)(linewidth 0.15)(textlinewidth 0.15) + (left_margin 10)(right_margin 10)(top_margin 10)(bottom_margin 10)) + (rect (name "") (start 110 34) (end 2 2) (comment "rect around the title block") +) + (rect (name "") (start 0 0 ltcorner) (end 0 0) (repeat 2) (incrx 2) (incry 2)) + (line (name "") (start 50 2 ltcorner) (end 50 0 ltcorner) (repeat 30) (incrx 50)) + (tbtext "1" (name "") (pos 25 1 ltcorner) (font (size 1.3 1.3)) (repeat 100) (incrx 50)) + (line (name "") (start 50 2 lbcorner) (end 50 0 lbcorner) (repeat 30) (incrx 50)) + (tbtext "1" (name "") (pos 25 1 lbcorner) (font (size 1.3 1.3)) (repeat 100) (incrx 50)) + (line (name "") (start 0 50 ltcorner) (end 2 50 ltcorner) (repeat 30) (incry 50)) + (tbtext "A" (name "") (pos 1 25 ltcorner) (font (size 1.3 1.3)) (justify center) (repeat 100) (incry 50)) + (line (name "") (start 0 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(name "") (pos 68.989 23.002)) + (tbtext "ORG." (name "") (pos 68.989 20.002)) +) diff --git a/fmc_sdram/uart.kicad_sch b/fmc_sdram/uart.kicad_sch new file mode 100644 index 00000000..9b55cf4c --- /dev/null +++ b/fmc_sdram/uart.kicad_sch @@ -0,0 +1,5608 @@ +(kicad_sch + (version 20231120) + (generator "eeschema") + (generator_version "8.0") + (uuid "bb3d183d-071b-4997-a7b9-98c347c6bca9") + (paper "A4") + (title_block + (title "UART") + (date "2024-05-26") + (rev "1.0.0") + (company "CHIPS Alliance") + (comment 1 "Yichuan Gao (2024-05-21)") + (comment 2 "Yichuan Gao (2024-05-21)") + (comment 4 "Yichuan Gao (2024-05-26)") + ) + (lib_symbols + (symbol "CHIPSAlliance_Interface:CH343P" + (exclude_from_sim no) + (in_bom yes) + (on_board yes) + (property "Reference" "U" + (at -8.89 14.605 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Value" "CH343P" + (at 8.255 14.605 0) + (effects + (font + (size 1.27 1.27) + ) + ) + ) + (property "Footprint" "" + (at 5.08 17.78 0) + (effects + (font + (size 1.27 1.27) + ) + (hide yes) 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