diff --git a/pyverilog/ast_code_generator/codegen.py b/pyverilog/ast_code_generator/codegen.py
index 9b87569..7ae05b1 100644
--- a/pyverilog/ast_code_generator/codegen.py
+++ b/pyverilog/ast_code_generator/codegen.py
@@ -455,6 +455,18 @@ def visit_Partselect(self, node):
         rslt = template.render(template_dict)
         return rslt
 
+    def visit_IndexedPartselect(self, node):
+        filename = getfilename(node)
+        template = self.get_template(filename)
+        template_dict = {
+            'var': self.visit(node.var),
+            'base': del_space(del_paren(self.visit(node.base))),
+            'stride': del_space(del_paren(self.visit(node.stride))),
+            'sign': '+' if node.is_plus else '-',
+        }
+        rslt = template.render(template_dict)
+        return rslt
+
     def visit_Pointer(self, node):
         filename = getfilename(node)
         template = self.get_template(filename)
diff --git a/pyverilog/ast_code_generator/template/indexedpartselect.txt b/pyverilog/ast_code_generator/template/indexedpartselect.txt
new file mode 100644
index 0000000..abd3f96
--- /dev/null
+++ b/pyverilog/ast_code_generator/template/indexedpartselect.txt
@@ -0,0 +1 @@
+{{ var }}[{{ base }} {{ sign }}: {{ stride }}]
\ No newline at end of file
diff --git a/pyverilog/vparser/parser.py b/pyverilog/vparser/parser.py
index 14e1f7b..1f88e20 100644
--- a/pyverilog/vparser/parser.py
+++ b/pyverilog/vparser/parser.py
@@ -2631,7 +2631,7 @@ def _raise_error(self, p):
         raise ParseError("%s: %s" % (coord, msg))
 
     def _coord(self, lineno, column=None):
-        ret = [self.lexer.lexer.filename, 'line:%s' % lineno]
+        ret = [self.lexer.filename, 'line:%s' % lineno]
         if column is not None:
             ret.append('column:%s' % column)
         return ' '.join(ret)