diff --git a/pyverilog/__init__.py b/pyverilog/__init__.py index 3b4e375..9ae7004 100644 --- a/pyverilog/__init__.py +++ b/pyverilog/__init__.py @@ -3,4 +3,5 @@ import os -__version__ = open(os.path.join(os.path.dirname(__file__), "VERSION")).read().splitlines()[0] +with open(os.path.join(os.path.dirname(__file__), "VERSION")) as f: + __version__ = f.read().splitlines()[0] diff --git a/pyverilog/vparser/lexer.py b/pyverilog/vparser/lexer.py index 8fe6628..7f6eb5c 100644 --- a/pyverilog/vparser/lexer.py +++ b/pyverilog/vparser/lexer.py @@ -16,12 +16,245 @@ from __future__ import absolute_import from __future__ import print_function -import sys -import os -import re - from ply.lex import * +################################################# +# Lexer Definition +################################################# + +keywords = ( + 'MODULE', 'ENDMODULE', 'BEGIN', 'END', 'GENERATE', 'ENDGENERATE', 'GENVAR', + 'FUNCTION', 'ENDFUNCTION', 'TASK', 'ENDTASK', + 'INPUT', 'INOUT', 'OUTPUT', 'TRI', 'REG', 'LOGIC', 'WIRE', 'INTEGER', 'REAL', 'SIGNED', + 'PARAMETER', 'LOCALPARAM', 'SUPPLY0', 'SUPPLY1', + 'ASSIGN', 'ALWAYS', 'ALWAYS_FF', 'ALWAYS_COMB', 'ALWAYS_LATCH', 'SENS_OR', 'POSEDGE', 'NEGEDGE', 'INITIAL', + 'IF', 'ELSE', 'FOR', 'WHILE', 'CASE', 'CASEX', 'CASEZ', 'UNIQUE', 'ENDCASE', 'DEFAULT', + 'WAIT', 'FOREVER', 'DISABLE', 'FORK', 'JOIN', +) + +reserved = {} +for keyword in keywords: + if keyword == 'SENS_OR': + reserved['or'] = keyword + else: + reserved[keyword.lower()] = keyword + +operators = ( + 'PLUS', 'MINUS', 'POWER', 'TIMES', 'DIVIDE', 'MOD', + 'NOT', 'OR', 'NOR', 'AND', 'NAND', 'XOR', 'XNOR', + 'LOR', 'LAND', 'LNOT', + 'LSHIFTA', 'RSHIFTA', 'LSHIFT', 'RSHIFT', + 'LT', 'GT', 'LE', 'GE', 'EQ', 'NE', 'EQL', 'NEL', + 'COND', # ? + 'EQUALS', +) + +tokens = keywords + operators + ( + 'ID', + 'AT', 'COMMA', 'COLON', 'SEMICOLON', 'DOT', + 'PLUSCOLON', 'MINUSCOLON', + 'FLOATNUMBER', 'STRING_LITERAL', + 'INTNUMBER_DEC', 'SIGNED_INTNUMBER_DEC', + 'INTNUMBER_HEX', 'SIGNED_INTNUMBER_HEX', + 'INTNUMBER_OCT', 'SIGNED_INTNUMBER_OCT', + 'INTNUMBER_BIN', 'SIGNED_INTNUMBER_BIN', + 'LPAREN', 'RPAREN', 'LBRACKET', 'RBRACKET', 'LBRACE', 'RBRACE', + 'DELAY', 'DOLLER', +) + +skipped = ( + 'COMMENTOUT', 'LINECOMMENT', 'DIRECTIVE', +) + +# Ignore +t_ignore = ' \t' + +# Directive +directive = r"""\`.*?\n""" + + +@TOKEN(directive) +def t_DIRECTIVE(t): + t.lexer.directives.append((t.lexer.lineno, t.value)) + t.lexer.lineno += t.value.count("\n") + m = re.match(r"^`default_nettype\s+(.+)\n", t.value) + if m: + t.lexer.default_nettype = m.group(1) + pass + + +# Comment +linecomment = r"""//.*?\n""" +commentout = r"""/\*(.|\n)*?\*/""" + + +@TOKEN(linecomment) +def t_LINECOMMENT(t): + t.lexer.lineno += t.value.count("\n") + pass + + +@TOKEN(commentout) +def t_COMMENTOUT(t): + t.lexer.lineno += t.value.count("\n") + pass + + +# Operator +t_LOR = r'\|\|' +t_LAND = r'\&\&' + +t_NOR = r'~\|' +t_NAND = r'~\&' +t_XNOR = r'~\^' +t_OR = r'\|' +t_AND = r'\&' +t_XOR = r'\^' +t_LNOT = r'!' +t_NOT = r'~' + +t_LSHIFTA = r'<<<' +t_RSHIFTA = r'>>>' +t_LSHIFT = r'<<' +t_RSHIFT = r'>>' + +t_EQL = r'===' +t_NEL = r'!==' +t_EQ = r'==' +t_NE = r'!=' + +t_LE = r'<=' +t_GE = r'>=' +t_LT = r'<' +t_GT = r'>' + +t_POWER = r'\*\*' +t_PLUS = r'\+' +t_MINUS = r'-' +t_TIMES = r'\*' +t_DIVIDE = r'/' +t_MOD = r'%' + +t_COND = r'\?' +t_EQUALS = r'=' + +t_PLUSCOLON = r'\+:' +t_MINUSCOLON = r'-:' + +t_AT = r'@' +t_COMMA = r',' +t_SEMICOLON = r';' +t_COLON = r':' +t_DOT = r'\.' + +t_LPAREN = r'\(' +t_RPAREN = r'\)' +t_LBRACKET = r'\[' +t_RBRACKET = r'\]' +t_LBRACE = r'\{' +t_RBRACE = r'\}' + +t_DELAY = r'\#' +t_DOLLER = r'\$' + +bin_number = '[0-9]*\'[bB][0-1xXzZ?][0-1xXzZ?_]*' +signed_bin_number = '[0-9]*\'[sS][bB][0-1xZzZ?][0-1xXzZ?_]*' +octal_number = '[0-9]*\'[oO][0-7xXzZ?][0-7xXzZ?_]*' +signed_octal_number = '[0-9]*\'[sS][oO][0-7xXzZ?][0-7xXzZ?_]*' +hex_number = '[0-9]*\'[hH][0-9a-fA-FxXzZ?][0-9a-fA-FxXzZ?_]*' +signed_hex_number = '[0-9]*\'[sS][hH][0-9a-fA-FxXzZ?][0-9a-fA-FxXzZ?_]*' + +decimal_number = '([0-9]*\'[dD][0-9xXzZ?][0-9xXzZ?_]*)|([0-9][0-9_]*)' +signed_decimal_number = '[0-9]*\'[sS][dD][0-9xXzZ?][0-9xXzZ?_]*' + +exponent_part = r"""([eE][-+]?[0-9]+)""" +fractional_constant = r"""([0-9]*\.[0-9]+)|([0-9]+\.)""" +float_number = '((((' + fractional_constant + ')' + \ + exponent_part + '?)|([0-9]+' + exponent_part + ')))' + +simple_escape = r"""([a-zA-Z\\?'"])""" +octal_escape = r"""([0-7]{1,3})""" +hex_escape = r"""(x[0-9a-fA-F]+)""" +escape_sequence = r"""(\\(""" + simple_escape + '|' + octal_escape + '|' + hex_escape + '))' +string_char = r"""([^"\\\n]|""" + escape_sequence + ')' +string_literal = '"' + string_char + '*"' + +identifier = r"""(([a-zA-Z_])([a-zA-Z_0-9$])*)|((\\\S)(\S)*)""" + + +@TOKEN(string_literal) +def t_STRING_LITERAL(t): + return t + + +@TOKEN(float_number) +def t_FLOATNUMBER(t): + return t + + +@TOKEN(signed_bin_number) +def t_SIGNED_INTNUMBER_BIN(t): + return t + + +@TOKEN(bin_number) +def t_INTNUMBER_BIN(t): + return t + + +@TOKEN(signed_octal_number) +def t_SIGNED_INTNUMBER_OCT(t): + return t + + +@TOKEN(octal_number) +def t_INTNUMBER_OCT(t): + return t + + +@TOKEN(signed_hex_number) +def t_SIGNED_INTNUMBER_HEX(t): + return t + + +@TOKEN(hex_number) +def t_INTNUMBER_HEX(t): + return t + + +@TOKEN(signed_decimal_number) +def t_SIGNED_INTNUMBER_DEC(t): + return t + + +@TOKEN(decimal_number) +def t_INTNUMBER_DEC(t): + return t + + +@TOKEN(identifier) +def t_ID(t): + t.type = reserved.get(t.value, 'ID') + return t + + +def t_NEWLINE(t): + r'\n+' + t.lexer.lineno += t.value.count("\n") + pass + + +def t_error(t): + msg = 'Illegal character %s' % repr(t.value[0]) + t._error_foo(msg, t) + +# create one prototypical lexer instance +_lexer = lex(optimize=1, lextab="verilog_lexer") + + +################################################# +# Lexer Class +################################################# class VerilogLexer(object): """ Verilog HDL Lexical Analayzer """ @@ -31,9 +264,9 @@ def __init__(self, error_func): self.error_func = error_func self.directives = [] self.default_nettype = 'wire' - - def build(self, **kwargs): - self.lexer = lex(object=self, **kwargs) + self.lexer = _lexer.clone() + self.lexer._error_foo = self._error + self.tokens = tokens def input(self, data): self.lexer.input(data) @@ -50,214 +283,6 @@ def get_default_nettype(self): def token(self): return self.lexer.token() - keywords = ( - 'MODULE', 'ENDMODULE', 'BEGIN', 'END', 'GENERATE', 'ENDGENERATE', 'GENVAR', - 'FUNCTION', 'ENDFUNCTION', 'TASK', 'ENDTASK', - 'INPUT', 'INOUT', 'OUTPUT', 'TRI', 'REG', 'LOGIC', 'WIRE', 'INTEGER', 'REAL', 'SIGNED', - 'PARAMETER', 'LOCALPARAM', 'SUPPLY0', 'SUPPLY1', - 'ASSIGN', 'ALWAYS', 'ALWAYS_FF', 'ALWAYS_COMB', 'ALWAYS_LATCH', 'SENS_OR', 'POSEDGE', 'NEGEDGE', 'INITIAL', - 'IF', 'ELSE', 'FOR', 'WHILE', 'CASE', 'CASEX', 'CASEZ', 'UNIQUE', 'ENDCASE', 'DEFAULT', - 'WAIT', 'FOREVER', 'DISABLE', 'FORK', 'JOIN', - ) - - reserved = {} - for keyword in keywords: - if keyword == 'SENS_OR': - reserved['or'] = keyword - else: - reserved[keyword.lower()] = keyword - - operators = ( - 'PLUS', 'MINUS', 'POWER', 'TIMES', 'DIVIDE', 'MOD', - 'NOT', 'OR', 'NOR', 'AND', 'NAND', 'XOR', 'XNOR', - 'LOR', 'LAND', 'LNOT', - 'LSHIFTA', 'RSHIFTA', 'LSHIFT', 'RSHIFT', - 'LT', 'GT', 'LE', 'GE', 'EQ', 'NE', 'EQL', 'NEL', - 'COND', # ? - 'EQUALS', - ) - - tokens = keywords + operators + ( - 'ID', - 'AT', 'COMMA', 'COLON', 'SEMICOLON', 'DOT', - 'PLUSCOLON', 'MINUSCOLON', - 'FLOATNUMBER', 'STRING_LITERAL', - 'INTNUMBER_DEC', 'SIGNED_INTNUMBER_DEC', - 'INTNUMBER_HEX', 'SIGNED_INTNUMBER_HEX', - 'INTNUMBER_OCT', 'SIGNED_INTNUMBER_OCT', - 'INTNUMBER_BIN', 'SIGNED_INTNUMBER_BIN', - 'LPAREN', 'RPAREN', 'LBRACKET', 'RBRACKET', 'LBRACE', 'RBRACE', - 'DELAY', 'DOLLER', - ) - - skipped = ( - 'COMMENTOUT', 'LINECOMMENT', 'DIRECTIVE', - ) - - # Ignore - t_ignore = ' \t' - - # Directive - directive = r"""\`.*?\n""" - - @TOKEN(directive) - def t_DIRECTIVE(self, t): - self.directives.append((self.lexer.lineno, t.value)) - t.lexer.lineno += t.value.count("\n") - m = re.match("^`default_nettype\s+(.+)\n", t.value) - if m: - self.default_nettype = m.group(1) - pass - - # Comment - linecomment = r"""//.*?\n""" - commentout = r"""/\*(.|\n)*?\*/""" - - @TOKEN(linecomment) - def t_LINECOMMENT(self, t): - t.lexer.lineno += t.value.count("\n") - pass - - @TOKEN(commentout) - def t_COMMENTOUT(self, t): - t.lexer.lineno += t.value.count("\n") - pass - - # Operator - t_LOR = r'\|\|' - t_LAND = r'\&\&' - - t_NOR = r'~\|' - t_NAND = r'~\&' - t_XNOR = r'~\^' - t_OR = r'\|' - t_AND = r'\&' - t_XOR = r'\^' - t_LNOT = r'!' - t_NOT = r'~' - - t_LSHIFTA = r'<<<' - t_RSHIFTA = r'>>>' - t_LSHIFT = r'<<' - t_RSHIFT = r'>>' - - t_EQL = r'===' - t_NEL = r'!==' - t_EQ = r'==' - t_NE = r'!=' - - t_LE = r'<=' - t_GE = r'>=' - t_LT = r'<' - t_GT = r'>' - - t_POWER = r'\*\*' - t_PLUS = r'\+' - t_MINUS = r'-' - t_TIMES = r'\*' - t_DIVIDE = r'/' - t_MOD = r'%' - - t_COND = r'\?' - t_EQUALS = r'=' - - t_PLUSCOLON = r'\+:' - t_MINUSCOLON = r'-:' - - t_AT = r'@' - t_COMMA = r',' - t_SEMICOLON = r';' - t_COLON = r':' - t_DOT = r'\.' - - t_LPAREN = r'\(' - t_RPAREN = r'\)' - t_LBRACKET = r'\[' - t_RBRACKET = r'\]' - t_LBRACE = r'\{' - t_RBRACE = r'\}' - - t_DELAY = r'\#' - t_DOLLER = r'\$' - - bin_number = '[0-9]*\'[bB][0-1xXzZ?][0-1xXzZ?_]*' - signed_bin_number = '[0-9]*\'[sS][bB][0-1xZzZ?][0-1xXzZ?_]*' - octal_number = '[0-9]*\'[oO][0-7xXzZ?][0-7xXzZ?_]*' - signed_octal_number = '[0-9]*\'[sS][oO][0-7xXzZ?][0-7xXzZ?_]*' - hex_number = '[0-9]*\'[hH][0-9a-fA-FxXzZ?][0-9a-fA-FxXzZ?_]*' - signed_hex_number = '[0-9]*\'[sS][hH][0-9a-fA-FxXzZ?][0-9a-fA-FxXzZ?_]*' - - decimal_number = '([0-9]*\'[dD][0-9xXzZ?][0-9xXzZ?_]*)|([0-9][0-9_]*)' - signed_decimal_number = '[0-9]*\'[sS][dD][0-9xXzZ?][0-9xXzZ?_]*' - - exponent_part = r"""([eE][-+]?[0-9]+)""" - fractional_constant = r"""([0-9]*\.[0-9]+)|([0-9]+\.)""" - float_number = '((((' + fractional_constant + ')' + \ - exponent_part + '?)|([0-9]+' + exponent_part + ')))' - - simple_escape = r"""([a-zA-Z\\?'"])""" - octal_escape = r"""([0-7]{1,3})""" - hex_escape = r"""(x[0-9a-fA-F]+)""" - escape_sequence = r"""(\\(""" + simple_escape + '|' + octal_escape + '|' + hex_escape + '))' - string_char = r"""([^"\\\n]|""" + escape_sequence + ')' - string_literal = '"' + string_char + '*"' - - identifier = r"""(([a-zA-Z_])([a-zA-Z_0-9$])*)|((\\\S)(\S)*)""" - - @TOKEN(string_literal) - def t_STRING_LITERAL(self, t): - return t - - @TOKEN(float_number) - def t_FLOATNUMBER(self, t): - return t - - @TOKEN(signed_bin_number) - def t_SIGNED_INTNUMBER_BIN(self, t): - return t - - @TOKEN(bin_number) - def t_INTNUMBER_BIN(self, t): - return t - - @TOKEN(signed_octal_number) - def t_SIGNED_INTNUMBER_OCT(self, t): - return t - - @TOKEN(octal_number) - def t_INTNUMBER_OCT(self, t): - return t - - @TOKEN(signed_hex_number) - def t_SIGNED_INTNUMBER_HEX(self, t): - return t - - @TOKEN(hex_number) - def t_INTNUMBER_HEX(self, t): - return t - - @TOKEN(signed_decimal_number) - def t_SIGNED_INTNUMBER_DEC(self, t): - return t - - @TOKEN(decimal_number) - def t_INTNUMBER_DEC(self, t): - return t - - @TOKEN(identifier) - def t_ID(self, t): - t.type = self.reserved.get(t.value, 'ID') - return t - - def t_NEWLINE(self, t): - r'\n+' - t.lexer.lineno += t.value.count("\n") - pass - - def t_error(self, t): - msg = 'Illegal character %s' % repr(t.value[0]) - self._error(msg, t) - def _error(self, msg, token): location = self._make_tok_location(token) self.error_func(msg, location[0], location[1]) @@ -272,7 +297,7 @@ def _find_tok_column(self, token): return (token.lexpos - i) + 1 def _make_tok_location(self, token): - return (token.lineno, self._find_tok_column(token)) + return token.lineno, self._find_tok_column(token) def dump_tokens(text): @@ -281,7 +306,6 @@ def my_error_func(msg, a, b): sys.exit() lexer = VerilogLexer(error_func=my_error_func) - lexer.build() lexer.input(text) ret = [] diff --git a/pyverilog/vparser/parser.py b/pyverilog/vparser/parser.py index 8f8a13e..093753b 100644 --- a/pyverilog/vparser/parser.py +++ b/pyverilog/vparser/parser.py @@ -51,7 +51,6 @@ class VerilogParser(object): def __init__(self, outputdir=".", debug=True): self.lexer = VerilogLexer(error_func=self._lexer_error_func) - self.lexer.build() self.tokens = self.lexer.tokens pathlib.Path(outputdir).mkdir(parents=True, exist_ok=True) diff --git a/pyverilog/vparser/verilog_lexer.py b/pyverilog/vparser/verilog_lexer.py new file mode 100644 index 0000000..3e1d8d5 --- /dev/null +++ b/pyverilog/vparser/verilog_lexer.py @@ -0,0 +1,10 @@ +# verilog_lexer.py. This file automatically created by PLY (version 3.11). Don't edit! +_tabversion = '3.10' +_lextokens = set(('ALWAYS', 'ALWAYS_COMB', 'ALWAYS_FF', 'ALWAYS_LATCH', 'AND', 'ASSIGN', 'AT', 'BEGIN', 'CASE', 'CASEX', 'CASEZ', 'COLON', 'COMMA', 'COND', 'DEFAULT', 'DELAY', 'DISABLE', 'DIVIDE', 'DOLLER', 'DOT', 'ELSE', 'END', 'ENDCASE', 'ENDFUNCTION', 'ENDGENERATE', 'ENDMODULE', 'ENDTASK', 'EQ', 'EQL', 'EQUALS', 'FLOATNUMBER', 'FOR', 'FOREVER', 'FORK', 'FUNCTION', 'GE', 'GENERATE', 'GENVAR', 'GT', 'ID', 'IF', 'INITIAL', 'INOUT', 'INPUT', 'INTEGER', 'INTNUMBER_BIN', 'INTNUMBER_DEC', 'INTNUMBER_HEX', 'INTNUMBER_OCT', 'JOIN', 'LAND', 'LBRACE', 'LBRACKET', 'LE', 'LNOT', 'LOCALPARAM', 'LOGIC', 'LOR', 'LPAREN', 'LSHIFT', 'LSHIFTA', 'LT', 'MINUS', 'MINUSCOLON', 'MOD', 'MODULE', 'NAND', 'NE', 'NEGEDGE', 'NEL', 'NOR', 'NOT', 'OR', 'OUTPUT', 'PARAMETER', 'PLUS', 'PLUSCOLON', 'POSEDGE', 'POWER', 'RBRACE', 'RBRACKET', 'REAL', 'REG', 'RPAREN', 'RSHIFT', 'RSHIFTA', 'SEMICOLON', 'SENS_OR', 'SIGNED', 'SIGNED_INTNUMBER_BIN', 'SIGNED_INTNUMBER_DEC', 'SIGNED_INTNUMBER_HEX', 'SIGNED_INTNUMBER_OCT', 'STRING_LITERAL', 'SUPPLY0', 'SUPPLY1', 'TASK', 'TIMES', 'TRI', 'UNIQUE', 'WAIT', 'WHILE', 'WIRE', 'XNOR', 'XOR')) +_lexreflags = 64 +_lexliterals = '' +_lexstateinfo = {'INITIAL': 'inclusive'} +_lexstatere = {'INITIAL': [('(?P\\`.*?\\n)|(?P//.*?\\n)|(?P/\\*(.|\\n)*?\\*/)|(?P"([^"\\\\\\n]|(\\\\(([a-zA-Z\\\\?\'"])|([0-7]{1,3})|(x[0-9a-fA-F]+))))*")|(?P((((([0-9]*\\.[0-9]+)|([0-9]+\\.))([eE][-+]?[0-9]+)?)|([0-9]+([eE][-+]?[0-9]+)))))|(?P[0-9]*\'[sS][bB][0-1xZzZ?][0-1xXzZ?_]*)|(?P[0-9]*\'[bB][0-1xXzZ?][0-1xXzZ?_]*)|(?P[0-9]*\'[sS][oO][0-7xXzZ?][0-7xXzZ?_]*)|(?P[0-9]*\'[oO][0-7xXzZ?][0-7xXzZ?_]*)|(?P[0-9]*\'[sS][hH][0-9a-fA-FxXzZ?][0-9a-fA-FxXzZ?_]*)|(?P[0-9]*\'[hH][0-9a-fA-FxXzZ?][0-9a-fA-FxXzZ?_]*)|(?P[0-9]*\'[sS][dD][0-9xXzZ?][0-9xXzZ?_]*)|(?P([0-9]*\'[dD][0-9xXzZ?][0-9xXzZ?_]*)|([0-9][0-9_]*))|(?P(([a-zA-Z_])([a-zA-Z_0-9$])*)|((\\\\\\S)(\\S)*))|(?P\\n+)|(?P\\|\\|)|(?P\\&\\&)|(?P\\*\\*)|(?P~\\|)|(?P~\\&)|(?P~\\^)|(?P<<<)|(?P>>>)|(?P===)|(?P!==)|(?P\\+:)|(?P\\|)|(?P\\&)|(?P\\^)|(?P<<)|(?P>>)|(?P==)|(?P!=)|(?P<=)|(?P>=)|(?P\\+)|(?P\\*)|(?P\\?)|(?P-:)|(?P\\.)|(?P\\()|(?P\\))|(?P\\[)|(?P\\])|(?P\\{)|(?P\\})|(?P\\#)|(?P\\$)|(?P!)|(?P~)|(?P<)|(?P>)|(?P-)|(?P/)|(?P%)|(?P=)|(?P@)|(?P,)|(?P;)|(?P:)', [None, ('t_DIRECTIVE', 'DIRECTIVE'), ('t_LINECOMMENT', 'LINECOMMENT'), ('t_COMMENTOUT', 'COMMENTOUT'), None, ('t_STRING_LITERAL', 'STRING_LITERAL'), None, None, None, None, None, None, ('t_FLOATNUMBER', 'FLOATNUMBER'), None, None, None, None, None, None, None, None, None, ('t_SIGNED_INTNUMBER_BIN', 'SIGNED_INTNUMBER_BIN'), ('t_INTNUMBER_BIN', 'INTNUMBER_BIN'), ('t_SIGNED_INTNUMBER_OCT', 'SIGNED_INTNUMBER_OCT'), ('t_INTNUMBER_OCT', 'INTNUMBER_OCT'), ('t_SIGNED_INTNUMBER_HEX', 'SIGNED_INTNUMBER_HEX'), ('t_INTNUMBER_HEX', 'INTNUMBER_HEX'), ('t_SIGNED_INTNUMBER_DEC', 'SIGNED_INTNUMBER_DEC'), ('t_INTNUMBER_DEC', 'INTNUMBER_DEC'), None, None, ('t_ID', 'ID'), None, None, None, None, None, None, ('t_NEWLINE', 'NEWLINE'), (None, 'LOR'), (None, 'LAND'), (None, 'POWER'), (None, 'NOR'), (None, 'NAND'), (None, 'XNOR'), (None, 'LSHIFTA'), (None, 'RSHIFTA'), (None, 'EQL'), (None, 'NEL'), (None, 'PLUSCOLON'), (None, 'OR'), (None, 'AND'), (None, 'XOR'), (None, 'LSHIFT'), (None, 'RSHIFT'), (None, 'EQ'), (None, 'NE'), (None, 'LE'), (None, 'GE'), (None, 'PLUS'), (None, 'TIMES'), (None, 'COND'), (None, 'MINUSCOLON'), (None, 'DOT'), (None, 'LPAREN'), (None, 'RPAREN'), (None, 'LBRACKET'), (None, 'RBRACKET'), (None, 'LBRACE'), (None, 'RBRACE'), (None, 'DELAY'), (None, 'DOLLER'), (None, 'LNOT'), (None, 'NOT'), (None, 'LT'), (None, 'GT'), (None, 'MINUS'), (None, 'DIVIDE'), (None, 'MOD'), (None, 'EQUALS'), (None, 'AT'), (None, 'COMMA'), (None, 'SEMICOLON'), (None, 'COLON')])]} +_lexstateignore = {'INITIAL': ' \t'} +_lexstateerrorf = {'INITIAL': 't_error'} +_lexstateeoff = {} diff --git a/requirements.txt b/requirements.txt index 0deff52..c157edc 100644 --- a/requirements.txt +++ b/requirements.txt @@ -1,7 +1,7 @@ Jinja2==3.1.2 MarkupSafe==2.1.1 pip==21.3.1 -ply==3.4 +ply==3.11 # pyverilog is included as (modified) source #pyverilog==1.3.0 setuptools==60.2.0