DPC++ daily 2022-01-21

sycl-nightly/20220121

[SYCL] Make sure [AMDGPU|NVPTX]CodeGen links in lower SYCL IR passes …

DPC++ daily 2022-01-20

[SYCL][MATRIX][CUDA] Add support for bf16, (u)int8, and half.  (#5009)

Implementation of Nvidia MMA's using bf16, mixed precision int ((u)int8/int32), and mixed precision float (half/float).

Signed-off-by: jack.kirk <[email protected]>

DPC++ daily 2022-01-19

[ESIMD] Enable esimd emulator build by default (#5058)

* Enabled ESIMD_EMU support build by default
* Replaced ESIMD_EMU with ESIMDCPU for legacy CM_EMU
* Updated PI Device info
* Removed command line option for esimd_cpu_emulation
* Reduced overhead on command creation for ESIMD_EMULATOR BE
* ESIMD_EMULATOR plug-in update for bringing-up intel/llvm-test-suite
* CM-EMU Device version info composition
* Changes to suppress warning messages
* Single-point-of-return for EnqueueKernel
* Added command line option for disabling ESIMD_EMULATOR build

DPC++ daily 2022-01-18

[SYCL][CUDA] Disable by default the Image support (#5256)

due to the fact that its actual CUDA implementation is partial.
It is possible to re-enable it by setting PI_CUDA_ENABLE_IMAGE_SUPPORT
environment variable at runtime.

DPC++ daily 2022-01-17

[SYCL] Fix module changes detection in LowerWGScope pass (#5292)

Also explicitly updated tests, which fail without pipeline adjustments to get
better test coverage.

Signed-off-by: Mikhail Lychkov <[email protected]>
Co-authored-by: Alexey Sachkov <[email protected]>

DPC++ daily 2022-01-15

[SYCL] Test compiler diagnostics for unsupported printf usages (#5306)

Additionally, fix the diagnostic output for cases with an incorrect
wrapper name and unify the punctuation style of the existing
diagnostics.

Signed-off-by: Artem Gindinson <[email protected]>

DPC++ daily 2022-01-14

[SYCL] Allow batching for wait with a barrier commands (#5307)

Signed-off-by: Sergey V Maslov <[email protected]>

DPC++ daily 2022-01-13

[SYCL][HIP][libclc] Add group collective functions for HIP (#5202)

Adds group collective functions (reduce, scans, broadcast) for HIP.

DPC++ daily 2022-01-12

[SYCL] Change matrix type (#5221)

Previously we relied on the structure type (which represented matrix
type) mangling to obtain its layout. Now, when DPCPP mangling scheme is
aligned with C++, thus the structure lost their usual mangling. Yet we
want to preserve the desired information within the matrix type, coming
from DPCPP headers. To achive this the 'Matrix structure' was changed
form:
template <typename T, int R, int C, int L, int S>
struct __spirv_JointMatrixINTEL;
to
template <typename T, int R, int C, int L, int S>
struct __spirv_JointMatrixINTEL {
T (*Value)[R][C][L + 1][S + 1];
};

so it's no longer an opaque structure and now it look like this in LLVM
IR:
%struct.__spirv_JointMatrixINTEL = type { [42 x [6 x [2 x [1 x i32]]]]* }

Here we encode the number of Rows, Cols, Layout and Scope as sizes of an
array (which element type is the same as the base matrix's type), which
is a bit odd, but it's probably the best way we can preserve the
information now without having the matrix type itself in LLVM.

Signed-off-by: Dmitry Sidorov <[email protected]>

DPC++ daily 2022-01-11

sycl-nightly/20220111

[SYCL][Driver] Enable SPV_KHR_linkonce_odr extension (#4683)