From 910bd3561cd84e077fd37c039b2d6aec4953507f Mon Sep 17 00:00:00 2001 From: Clo91eaf Date: Fri, 13 Dec 2024 01:08:34 +0800 Subject: [PATCH] [FIRRTL] Use PRINTF_FD macro instead of 0x80000002 as printf fd updates the FIRRTLToHW conversion to use the `PRINTF_FD` macro for specifying the file descriptor, allowing the fd to be obtained externally. This change enhances flexibility by enabling the file descriptor to be defined outside the conversion logic. Signed-off-by: Clo91eaf --- lib/Conversion/FIRRTLToHW/LowerToHW.cpp | 26 ++++++++++++++----- .../FIRRTLToHW/lower-to-hw-module.mlir | 6 ++--- test/Conversion/FIRRTLToHW/lower-to-hw.mlir | 14 +++++----- test/firtool/lower-layers.fir | 2 +- test/firtool/print.fir | 3 ++- 5 files changed, 33 insertions(+), 18 deletions(-) diff --git a/lib/Conversion/FIRRTLToHW/LowerToHW.cpp b/lib/Conversion/FIRRTLToHW/LowerToHW.cpp index ecfb5d9c72c4..ddba37428032 100644 --- a/lib/Conversion/FIRRTLToHW/LowerToHW.cpp +++ b/lib/Conversion/FIRRTLToHW/LowerToHW.cpp @@ -209,7 +209,7 @@ struct FIRRTLModuleLowering; /// This is state shared across the parallel module lowering logic. struct CircuitLoweringState { // Flags indicating whether the circuit uses certain header fragments. - std::atomic usedPrintfCond{false}; + std::atomic usedPrintf{false}; std::atomic usedAssertVerboseCond{false}; std::atomic usedStopCond{false}; @@ -809,7 +809,19 @@ void FIRRTLModuleLowering::lowerFileHeader(CircuitOp op, guard, []() {}, body); }; - if (state.usedPrintfCond) { + if (state.usedPrintf) { + b.create("PRINTF_FD"); + b.create("PRINTF_FD_"); + b.create("PRINTF_FD_FRAGMENT", [&] { + b.create( + "\n// Users can define 'PRINTF_FD' to add a specified fd to " + "prints."); + emitGuard("PRINTF_FD_", [&]() { + emitGuardedDefine("PRINTF_FD", "PRINTF_FD_", "(`PRINTF_FD)", + "32'h80000002"); + }); + }); + b.create("PRINTF_COND"); b.create("PRINTF_COND_"); b.create("PRINTF_COND_FRAGMENT", [&] { @@ -4416,7 +4428,8 @@ LogicalResult FIRRTLLowering::visitStmt(PrintFOp op) { circuitState.addMacroDecl(builder.getStringAttr("SYNTHESIS")); addToIfDefBlock("SYNTHESIS", std::function(), [&]() { addToAlwaysBlock(clock, [&]() { - circuitState.usedPrintfCond = true; + circuitState.usedPrintf = true; + circuitState.addFragment(theModule, "PRINTF_FD_FRAGMENT"); circuitState.addFragment(theModule, "PRINTF_COND_FRAGMENT"); // Emit an "sv.if '`PRINTF_COND_ & cond' into the #ifndef. @@ -4425,9 +4438,10 @@ LogicalResult FIRRTLLowering::visitStmt(PrintFOp op) { ifCond = builder.createOrFold(ifCond, cond, true); addIfProceduralBlock(ifCond, [&]() { - // Emit the sv.fwrite, writing to stderr by default. - Value fdStderr = builder.create(APInt(32, 0x80000002)); - builder.create(fdStderr, op.getFormatString(), operands); + // Emit the sv.fwrite, writing to fd specified by `PRINTF_FD. + Value fd = + builder.create(builder.getIntegerType(32), "PRINTF_FD_"); + builder.create(fd, op.getFormatString(), operands); }); }); }); diff --git a/test/Conversion/FIRRTLToHW/lower-to-hw-module.mlir b/test/Conversion/FIRRTLToHW/lower-to-hw-module.mlir index 2e996313813a..39b47f6d6315 100644 --- a/test/Conversion/FIRRTLToHW/lower-to-hw-module.mlir +++ b/test/Conversion/FIRRTLToHW/lower-to-hw-module.mlir @@ -71,9 +71,9 @@ firrtl.circuit "Simple" { // CHECK: %myext.out = hw.instance "myext" @MyParameterizedExtModule(in: %reset: i1) -> (out: i8) %myext:2 = firrtl.instance myext @MyParameterizedExtModule(in in: !firrtl.uint<1>, out out: !firrtl.uint<8>) - // CHECK: [[FD:%.*]] = hw.constant -2147483646 : i32 - // CHECK: sv.fwrite [[FD]], "%x"(%xyz.out4) : i4 - // CHECK: sv.fwrite [[FD]], "Something interesting! %x"(%myext.out) : i8 + // CHECK: %PRINTF_FD_ = sv.macro.ref.expr @PRINTF_FD_() : () -> i32 + // CHECK: sv.fwrite %PRINTF_FD_, "%x"(%xyz.out4) : i4 + // CHECK: sv.fwrite %PRINTF_FD_, "Something interesting! %x"(%myext.out) : i8 firrtl.connect %myext#0, %reset : !firrtl.uint<1>, !firrtl.uint<1> diff --git a/test/Conversion/FIRRTLToHW/lower-to-hw.mlir b/test/Conversion/FIRRTLToHW/lower-to-hw.mlir index 442902dc54f5..f58a8af0222a 100644 --- a/test/Conversion/FIRRTLToHW/lower-to-hw.mlir +++ b/test/Conversion/FIRRTLToHW/lower-to-hw.mlir @@ -330,7 +330,7 @@ firrtl.circuit "Simple" attributes {annotations = [{class = // printf(clock, reset, "Hi signed %d %d\n", add(c, c), d) // CHECK-LABEL: hw.module private @Print - // CHECK-SAME: attributes {emit.fragments = [@PRINTF_COND_FRAGMENT]} + // CHECK-SAME: attributes {emit.fragments = [@PRINTF_FD_FRAGMENT, @PRINTF_COND_FRAGMENT]} firrtl.module private @Print(in %clock: !firrtl.clock, in %reset: !firrtl.uint<1>, in %a: !firrtl.uint<4>, in %b: !firrtl.uint<4>, in %c: !firrtl.sint<4>, in %d: !firrtl.sint<4>) { @@ -347,20 +347,20 @@ firrtl.circuit "Simple" attributes {annotations = [{class = // CHECK-NEXT: %PRINTF_COND_ = sv.macro.ref.expr @PRINTF_COND_() : () -> i1 // CHECK-NEXT: [[AND:%.+]] = comb.and bin %PRINTF_COND_, %reset // CHECK-NEXT: sv.if [[AND]] { - // CHECK-NEXT: [[FD:%.+]] = hw.constant -2147483646 : i32 - // CHECK-NEXT: sv.fwrite [[FD]], "No operands!\0A" + // CHECK-NEXT: %PRINTF_FD_ = sv.macro.ref.expr @PRINTF_FD_() : () -> i32 + // CHECK-NEXT: sv.fwrite %PRINTF_FD_, "No operands!\0A" // CHECK-NEXT: } // CHECK-NEXT: %PRINTF_COND__0 = sv.macro.ref.expr @PRINTF_COND_() : () -> i1 // CHECK-NEXT: [[AND:%.+]] = comb.and bin %PRINTF_COND__0, %reset : i1 // CHECK-NEXT: sv.if [[AND]] { - // CHECK-NEXT: [[FD:%.+]] = hw.constant -2147483646 : i32 - // CHECK-NEXT: sv.fwrite [[FD]], "Hi %x %x\0A"([[ADD]], %b) : i5, i4 + // CHECK-NEXT: %PRINTF_FD_ = sv.macro.ref.expr @PRINTF_FD_() : () -> i32 + // CHECK-NEXT: sv.fwrite %PRINTF_FD_, "Hi %x %x\0A"([[ADD]], %b) : i5, i4 // CHECK-NEXT: } // CHECK-NEXT: %PRINTF_COND__1 = sv.macro.ref.expr @PRINTF_COND_() : () -> i1 // CHECK-NEXT: [[AND:%.+]] = comb.and bin %PRINTF_COND__1, %reset : i1 // CHECK-NEXT: sv.if [[AND]] { - // CHECK-NEXT: [[FD:%.+]] = hw.constant -2147483646 : i32 - // CHECK-NEXT: sv.fwrite [[FD]], "Hi signed %d %d\0A"([[SUMSIGNED]], [[DSIGNED]]) : i5, i4 + // CHECK-NEXT: %PRINTF_FD_ = sv.macro.ref.expr @PRINTF_FD_() : () -> i32 + // CHECK-NEXT: sv.fwrite %PRINTF_FD_, "Hi signed %d %d\0A"([[SUMSIGNED]], [[DSIGNED]]) : i5, i4 // CHECK-NEXT: } // CHECK-NEXT: } // CHECK-NEXT: } diff --git a/test/firtool/lower-layers.fir b/test/firtool/lower-layers.fir index aa2d5c0fd639..ffac876a7803 100644 --- a/test/firtool/lower-layers.fir +++ b/test/firtool/lower-layers.fir @@ -132,7 +132,7 @@ circuit TestHarness: ; CHECK: `ifndef SYNTHESIS ; CHECK: always @(posedge clock) begin ; CHECK: if ((`PRINTF_COND_) & reset) - ; CHECK: $fwrite(32'h80000002, "The last PC was: %x", dut_trace); + ; CHECK: $fwrite(`PRINTF_FD_, "The last PC was: %x", dut_trace); ; CHECK: end // always @(posedge) ; CHECK: `endif // not def SYNTHESIS ; CHECK: endmodule diff --git a/test/firtool/print.fir b/test/firtool/print.fir index 222dda8ed1ad..dea02b48b8e0 100644 --- a/test/firtool/print.fir +++ b/test/firtool/print.fir @@ -15,7 +15,8 @@ circuit PrintTest: ; CHECK-NEXT: [[PRINTF_COND:%.+]] = sv.macro.ref.expr @PRINTF_COND_() : () -> i1 ; CHECK-NEXT: [[COND:%.+]] = comb.and bin [[PRINTF_COND]], %cond : i1 ; CHECK-NEXT: sv.if [[COND]] { - ; CHECK-NEXT: sv.fwrite %c-2147483646_i32, "test %d\0A"(%var) : i32 + ; CHECK-NEXT: [[PRINTF_FD:%.+]] = sv.macro.ref.expr @PRINTF_FD_() : () -> i32 + ; CHECK-NEXT: sv.fwrite [[PRINTF_FD]], "test %d\0A"(%var) : i32 ; CHECK-NEXT: } ; CHECK-NEXT: } ; CHECK-NEXT: }