diff --git a/sw/legacy/common/rv_plic.c b/sw/legacy/common/rv_plic.c
index ffc02af3a..4d303e89e 100644
--- a/sw/legacy/common/rv_plic.c
+++ b/sw/legacy/common/rv_plic.c
@@ -7,7 +7,9 @@
 #include "dev_access.h"
 #include "sonata_system.h"
 
-#define NUM_IRQS 182
+#define NUM_IRQS 32
+
+#define I2C0_INTERRUPT 16
 
 #define RV_PLIC_IRQ_PRIO_BASE_REG 0x000000
 #define RV_PLIC_IRQ_PENDING_BASE_REG 0x001000
@@ -43,8 +45,8 @@ void rv_plic_init(void) {
   // Set priority threshold to 0 so IRQs can trigger with any non-zero priority.
   DEV_WRITE(RV_PLIC_BASE + RV_PLIC_CTX_THRESHOLD_REG, 0);
 
-  install_exception_handler(11, rv_plic_handler);
-  enable_interrupts(1 << 11);
+  install_exception_handler(I2C0_INTERRUPT, rv_plic_handler);
+  enable_interrupts(1 << I2C0_INTERRUPT);
   arch_local_irq_enable();
 }
 
diff --git a/sw/legacy/demo/ethernet/ksz8851.c b/sw/legacy/demo/ethernet/ksz8851.c
index 6046871d1..3f82996ad 100644
--- a/sw/legacy/demo/ethernet/ksz8851.c
+++ b/sw/legacy/demo/ethernet/ksz8851.c
@@ -13,12 +13,11 @@
 #include "spi.h"
 #include "timer.h"
 
-enum {
-  // IRQ
-  EthIntrIrq = 47,
+#define ETHERNET_INTERRUPT_INDEX 2
 
-  // GPIO Output
-  EthRstPin = 14,
+enum {
+  // CS line 1 on SPI controler.
+  EthRstPin = 1,
 
   // CS line 0 on SPI controller.
   EthCsLine = 0,
@@ -303,9 +302,9 @@ err_t ksz8851_init(struct netif *netif) {
   if (!spi) return ERR_ARG;
 
   // Reset chip
-  set_output_bit(GPIO_OUT, EthRstPin, 0);
+  spi_set_cs(spi, EthRstPin, 0);
   timer_delay(150);
-  set_output_bit(GPIO_OUT, EthRstPin, 0x1);
+  spi_set_cs(spi, EthRstPin, 1);
 
   uint16_t cider = ksz8851_reg_read(spi, ETH_CIDER);
   putstr("KSZ8851: Chip ID is ");
@@ -380,8 +379,8 @@ err_t ksz8851_init(struct netif *netif) {
 
   // Initialize IRQ
   eth_netif = netif;
-  rv_plic_register_irq(EthIntrIrq, ksz8851_irq_handler);
-  rv_plic_enable(EthIntrIrq);
+  rv_plic_register_irq(ETHERNET_INTERRUPT_INDEX, ksz8851_irq_handler);
+  rv_plic_enable(ETHERNET_INTERRUPT_INDEX);
 
   puts("KSZ8851: Initialized");
   return ERR_OK;