TODO.org

Next steps

Hide global variables using message passing

Use hdf5 to save all data

• develop the hdf5 file format
  • trace/dataset?

(<dataset>
 #:attributes (list (<time> timestamp)
                    (<assoc list> 
                            input data
                            names of variables
                            addresses in memory
                            etc))
 #:data
 (<string> leakage source 0)
 (<array> (<uint32> clock cycle)
          (<uint64> leakage value)))

Save individual leakage sources

• The leakage sources are based on the hd/hw model.
• I want to know which one contributes to the leakage.
• I want to know which part of the CPU is responsible for the leakage at what time.
• The mish-mash of all leakage sources erases the most important advantage of using the simulator: insight (speed stays intact).

Put everything in its right place

• Instructions
• CPU state manipulation
• Increase the current clock cycle based on the table
• Reading the hex-file

Add missing functions

Assume installed objdump, don’t require user to provide the symbol table

Generalize individual debugging info: don’t use fprintf

Load using “require”

Only leak individual bits of the status register once

Add tests for each assembly instruction

FINISHED

Keep track of number of passed clock cycles

Work out the file-format for saved data

Make a Racket module with nice abstractions instead of one huge file

Add a comfortable testsuite: assembly + Racket tests

Separate fetching and execution

• fetch: analyzes the instruction and extracts its arguments
• execute: takes the arguments and executes the instruction

-> we can look at the code without executing it! -> the code might look less messy

Add Hamming distance to the leakage tracker

DEFERRED

Opcode analysis: what is the Hamming weight of each opcode?