files.qip

set_global_assignment -name QIP_FILE rtl/amber/amber.qip
set_global_assignment -name QIP_FILE rtl/vidc/vidc.qip
set_global_assignment -name QIP_FILE rtl/fdc/fdc.qip
set_global_assignment -name VERILOG_FILE rtl/sdram.v
set_global_assignment -name VHDL_FILE rtl/bram.vhd
set_global_assignment -name SYSTEMVERILOG_FILE rtl/EEPROM_24C0x.sv
set_global_assignment -name SYSTEMVERILOG_FILE rtl/podule_ide.sv
set_global_assignment -name VERILOG_FILE rtl/ide.v
set_global_assignment -name VERILOG_FILE rtl/latches.v
set_global_assignment -name VERILOG_FILE rtl/ioc_irq.v
set_global_assignment -name VERILOG_FILE rtl/ioc.v
set_global_assignment -name VERILOG_FILE rtl/memc_translator.v
set_global_assignment -name VERILOG_FILE rtl/memc.v
set_global_assignment -name VERILOG_FILE rtl/archimedes_top.v
set_global_assignment -name VERILOG_FILE rtl/hps_ext.v
set_global_assignment -name SDC_FILE Archie.sdc
set_global_assignment -name SYSTEMVERILOG_FILE Archie.sv