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I have a backward jump of -2048 = 0x800. I expect RISC-V GCC would produce c.j -2048 (0xB001). Instead, it gives an uncompressed jump by -2048 (0x801ff06f).
Is this the intended behavior, or is there a code generation bug?
This can be reproduced with the following code. The unexpected uncompressed instruction is at 11804:
0000000000011800 <forward2048>:
11800: 003100b3 add ra,sp,gp
11804: 801ff06f j 11004 <back2048>
------ code
# cj.S
# Test case to illustrate GCC not generating compresed backward branches by -2048
# compile with
# riscv64-unknown-elf-gcc -march=rv64gc cj.S -o cj.elf
# riscv64-unknown-elf-objdump -D cj.elf > cj.elf.objdump
.global main
main:
j forward2048
.align 2
back2048:
j done
.align 11
forward2048: # address 80000800
add x1, x2, x3 # dummy 4-byte instruction
# j back2048 is a backward branch by a distance -2048
# I expect this should assemble into c.j -2048 (0xB001)
# Instead, GCC gives 11804: 801ff06f j 11004 <back2048>
j back2048
done:
add x4, x5, x6
self_loop:
j self_loop
The text was updated successfully, but these errors were encountered:
I have a backward jump of -2048 = 0x800. I expect RISC-V GCC would produce c.j -2048 (0xB001). Instead, it gives an uncompressed jump by -2048 (0x801ff06f).
Is this the intended behavior, or is there a code generation bug?
This can be reproduced with the following code. The unexpected uncompressed instruction is at 11804:
The text was updated successfully, but these errors were encountered: