From 5e5af05d95810c7a252f69d4d6317cea0dad2f9f Mon Sep 17 00:00:00 2001 From: rmsyn Date: Tue, 19 Dec 2023 02:16:16 +0000 Subject: [PATCH] fixup: stg_syscon: more naming changes Further naming simplification for `stg_syscon` peripheral registers. --- cmsis-svd-generator | 2 +- .../jh7110-starfive-visionfive-2-v1.2a.svd | 1488 ++++++++--------- .../src/stg_syscon/stg_syscfg_0.rs | 318 ++-- .../src/stg_syscon/stg_syscfg_1.rs | 246 ++- .../src/stg_syscon/stg_syscfg_10.rs | 10 +- .../src/stg_syscon/stg_syscfg_100.rs | 10 +- .../src/stg_syscon/stg_syscfg_101.rs | 10 +- .../src/stg_syscon/stg_syscfg_102.rs | 10 +- .../src/stg_syscon/stg_syscfg_103.rs | 10 +- .../src/stg_syscon/stg_syscfg_104.rs | 10 +- .../src/stg_syscon/stg_syscfg_105.rs | 10 +- .../src/stg_syscon/stg_syscfg_106.rs | 10 +- .../src/stg_syscon/stg_syscfg_107.rs | 10 +- .../src/stg_syscon/stg_syscfg_108.rs | 10 +- .../src/stg_syscon/stg_syscfg_109.rs | 10 +- .../src/stg_syscon/stg_syscfg_110.rs | 10 +- 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.../src/stg_syscon/stg_syscfg_214.rs | 22 +- .../src/stg_syscon/stg_syscfg_215.rs | 10 +- .../src/stg_syscon/stg_syscfg_216.rs | 10 +- .../src/stg_syscon/stg_syscfg_217.rs | 10 +- .../src/stg_syscon/stg_syscfg_218.rs | 10 +- .../src/stg_syscon/stg_syscfg_219.rs | 10 +- .../src/stg_syscon/stg_syscfg_22.rs | 12 +- .../src/stg_syscon/stg_syscfg_220.rs | 10 +- .../src/stg_syscon/stg_syscfg_221.rs | 10 +- .../src/stg_syscon/stg_syscfg_222.rs | 10 +- .../src/stg_syscon/stg_syscfg_223.rs | 10 +- .../src/stg_syscon/stg_syscfg_224.rs | 10 +- .../src/stg_syscon/stg_syscfg_225.rs | 10 +- .../src/stg_syscon/stg_syscfg_226.rs | 10 +- .../src/stg_syscon/stg_syscfg_227.rs | 10 +- .../src/stg_syscon/stg_syscfg_228.rs | 10 +- .../src/stg_syscon/stg_syscfg_229.rs | 10 +- .../src/stg_syscon/stg_syscfg_23.rs | 12 +- .../src/stg_syscon/stg_syscfg_230.rs | 10 +- .../src/stg_syscon/stg_syscfg_231.rs | 42 +- .../src/stg_syscon/stg_syscfg_232.rs | 32 +- .../src/stg_syscon/stg_syscfg_233.rs | 146 +- .../src/stg_syscon/stg_syscfg_24.rs | 12 +- .../src/stg_syscon/stg_syscfg_25.rs | 12 +- .../src/stg_syscon/stg_syscfg_26.rs | 32 +- .../src/stg_syscon/stg_syscfg_27.rs | 10 +- .../src/stg_syscon/stg_syscfg_28.rs | 10 +- .../src/stg_syscon/stg_syscfg_29.rs | 20 +- .../src/stg_syscon/stg_syscfg_3.rs | 296 ++-- .../src/stg_syscon/stg_syscfg_30.rs | 10 +- .../src/stg_syscon/stg_syscfg_31.rs | 32 +- .../src/stg_syscon/stg_syscfg_32.rs | 22 +- .../src/stg_syscon/stg_syscfg_33.rs | 10 +- .../src/stg_syscon/stg_syscfg_34.rs | 22 +- .../src/stg_syscon/stg_syscfg_35.rs | 22 +- .../src/stg_syscon/stg_syscfg_36.rs | 22 +- .../src/stg_syscon/stg_syscfg_37.rs | 24 +- .../src/stg_syscon/stg_syscfg_38.rs | 24 +- .../src/stg_syscon/stg_syscfg_39.rs | 24 +- .../src/stg_syscon/stg_syscfg_4.rs | 10 +- .../src/stg_syscon/stg_syscfg_40.rs | 24 +- .../src/stg_syscon/stg_syscfg_41.rs | 24 +- .../src/stg_syscon/stg_syscfg_42.rs | 68 +- .../src/stg_syscon/stg_syscfg_43.rs | 22 +- .../src/stg_syscon/stg_syscfg_44.rs | 66 +- .../src/stg_syscon/stg_syscfg_45.rs | 22 +- .../src/stg_syscon/stg_syscfg_46.rs | 32 +- .../src/stg_syscon/stg_syscfg_47.rs | 10 +- .../src/stg_syscon/stg_syscfg_48.rs | 32 +- .../src/stg_syscon/stg_syscfg_49.rs | 112 +- .../src/stg_syscon/stg_syscfg_5.rs | 10 +- .../src/stg_syscon/stg_syscfg_50.rs | 22 +- .../src/stg_syscon/stg_syscfg_51.rs | 22 +- .../src/stg_syscon/stg_syscfg_52.rs | 22 +- .../src/stg_syscon/stg_syscfg_53.rs | 22 +- .../src/stg_syscon/stg_syscfg_54.rs | 22 +- .../src/stg_syscon/stg_syscfg_55.rs | 22 +- .../src/stg_syscon/stg_syscfg_56.rs | 22 +- .../src/stg_syscon/stg_syscfg_57.rs | 22 +- .../src/stg_syscon/stg_syscfg_58.rs | 22 +- .../src/stg_syscon/stg_syscfg_59.rs | 22 +- .../src/stg_syscon/stg_syscfg_6.rs | 208 ++- .../src/stg_syscon/stg_syscfg_60.rs | 22 +- .../src/stg_syscon/stg_syscfg_61.rs | 22 +- .../src/stg_syscon/stg_syscfg_62.rs | 22 +- .../src/stg_syscon/stg_syscfg_63.rs | 22 +- .../src/stg_syscon/stg_syscfg_64.rs | 22 +- .../src/stg_syscon/stg_syscfg_65.rs | 22 +- .../src/stg_syscon/stg_syscfg_66.rs | 22 +- .../src/stg_syscon/stg_syscfg_67.rs | 22 +- .../src/stg_syscon/stg_syscfg_68.rs | 22 +- .../src/stg_syscon/stg_syscfg_69.rs | 22 +- .../src/stg_syscon/stg_syscfg_7.rs | 25 +- .../src/stg_syscon/stg_syscfg_70.rs | 22 +- .../src/stg_syscon/stg_syscfg_71.rs | 22 +- .../src/stg_syscon/stg_syscfg_72.rs | 22 +- .../src/stg_syscon/stg_syscfg_73.rs | 22 +- .../src/stg_syscon/stg_syscfg_74.rs | 22 +- .../src/stg_syscon/stg_syscfg_75.rs | 22 +- .../src/stg_syscon/stg_syscfg_76.rs | 72 +- .../src/stg_syscon/stg_syscfg_77.rs | 22 +- .../src/stg_syscon/stg_syscfg_78.rs | 130 +- .../src/stg_syscon/stg_syscfg_79.rs | 20 +- .../src/stg_syscon/stg_syscfg_8.rs | 25 +- .../src/stg_syscon/stg_syscfg_80.rs | 20 +- .../src/stg_syscon/stg_syscfg_81.rs | 20 +- .../src/stg_syscon/stg_syscfg_82.rs | 92 +- .../src/stg_syscon/stg_syscfg_83.rs | 10 +- .../src/stg_syscon/stg_syscfg_84.rs | 10 +- .../src/stg_syscon/stg_syscfg_85.rs | 10 +- .../src/stg_syscon/stg_syscfg_86.rs | 10 +- .../src/stg_syscon/stg_syscfg_87.rs | 10 +- .../src/stg_syscon/stg_syscfg_88.rs | 40 +- .../src/stg_syscon/stg_syscfg_89.rs | 20 +- .../src/stg_syscon/stg_syscfg_9.rs | 22 +- .../src/stg_syscon/stg_syscfg_90.rs | 22 +- .../src/stg_syscon/stg_syscfg_91.rs | 10 +- .../src/stg_syscon/stg_syscfg_92.rs | 10 +- .../src/stg_syscon/stg_syscfg_93.rs | 10 +- .../src/stg_syscon/stg_syscfg_94.rs | 10 +- .../src/stg_syscon/stg_syscfg_95.rs | 10 +- .../src/stg_syscon/stg_syscfg_96.rs | 10 +- .../src/stg_syscon/stg_syscfg_97.rs | 10 +- .../src/stg_syscon/stg_syscfg_98.rs | 10 +- .../src/stg_syscon/stg_syscfg_99.rs | 10 +- 407 files changed, 7421 insertions(+), 7741 deletions(-) diff --git a/cmsis-svd-generator b/cmsis-svd-generator index 9bbf046..a2ecfd3 160000 --- a/cmsis-svd-generator +++ b/cmsis-svd-generator @@ -1 +1 @@ -Subproject commit 9bbf0461780a39ddf4aa18fbbf5159f75d6a587f +Subproject commit a2ecfd383a6d0a0ad2cb094f1f54c650b4ce8563 diff --git a/jh7110-vf2-12a-pac/jh7110-starfive-visionfive-2-v1.2a.svd b/jh7110-vf2-12a-pac/jh7110-starfive-visionfive-2-v1.2a.svd index 6bbb3a3..a2ee422 100644 --- a/jh7110-vf2-12a-pac/jh7110-starfive-visionfive-2-v1.2a.svd +++ b/jh7110-vf2-12a-pac/jh7110-starfive-visionfive-2-v1.2a.svd @@ -12216,134 +12216,134 @@ read-write - u0_cdn_usb_adp_en - u0_cdn_usb_adp_en + u0_usb_adp_en + u0_usb_adp_en [8:8] read-only - u0_cdn_usb_adp_probe_ana - u0_cdn_usb_adp_probe_ana + u0_usb_adp_probe_ana + u0_usb_adp_probe_ana [9:9] read-write - u0_cdn_usb_adp_probe_en - u0_cdn_usb_adp_probe_en + u0_usb_adp_probe_en + u0_usb_adp_probe_en [10:10] read-only - u0_cdn_usb_adp_sense_ana - u0_cdn_usb_adp_sense_ana + u0_usb_adp_sense_ana + u0_usb_adp_sense_ana [11:11] read-write - u0_cdn_usb_adp_sense_en - u0_cdn_usb_adp_sense_en + u0_usb_adp_sense_en + u0_usb_adp_sense_en [12:12] read-only - u0_cdn_usb_adp_sink_current_en - u0_cdn_usb_adp_sink_current_en + u0_usb_adp_sink_current_en + u0_usb_adp_sink_current_en [13:13] read-only - u0_cdn_usb_adp_source_current_en - u0_cdn_usb_adp_source_current_en + u0_usb_adp_source_current_en + u0_usb_adp_source_current_en [14:14] read-only - u0_cdn_usb_bc_en - u0_cdn_usb_bc_en + u0_usb_bc_en + u0_usb_bc_en [15:15] read-only - u0_cdn_usb_chrg_vbus - u0_cdn_usb_chrg_vbus + u0_usb_chrg_vbus + u0_usb_chrg_vbus [16:16] read-write - u0_cdn_usb_dcd_comp_sts - u0_cdn_usb_dcd_comp_sts + u0_usb_dcd_comp_sts + u0_usb_dcd_comp_sts [17:17] read-write - u0_cdn_usb_dischrg_vbus - u0_cdn_usb_dischrg_vbus + u0_usb_dischrg_vbus + u0_usb_dischrg_vbus [18:18] read-write - u0_cdn_usb_dm_vdat_ref_comp_en - u0_cdn_usb_dm_vdat_ref_comp_en + u0_usb_dm_vdat_ref_comp_en + u0_usb_dm_vdat_ref_comp_en [19:19] read-only - u0_cdn_usb_dm_vdat_ref_comp_sts - u0_cdn_usb_dm_vdat_ref_comp_sts + u0_usb_dm_vdat_ref_comp_sts + u0_usb_dm_vdat_ref_comp_sts [20:20] read-write - u0_cdn_usb_dm_vlgc_comp_en - u0_cdn_usb_dm_vlgc_comp_en + u0_usb_dm_vlgc_comp_en + u0_usb_dm_vlgc_comp_en [21:21] read-only - u0_cdn_usb_dm_vlgc_comp_sts - u0_cdn_usb_dm_vlgc_comp_sts + u0_usb_dm_vlgc_comp_sts + u0_usb_dm_vlgc_comp_sts [22:22] read-write - u0_cdn_usb_dp_vdat_ref_comp_en - u0_cdn_usb_dp_vdat_ref_comp_en + u0_usb_dp_vdat_ref_comp_en + u0_usb_dp_vdat_ref_comp_en [23:23] read-only - u0_cdn_usb_dp_vdat_ref_comp_sts - u0_cdn_usb_dp_vdat_ref_comp_sts + u0_usb_dp_vdat_ref_comp_sts + u0_usb_dp_vdat_ref_comp_sts [24:24] read-write - u0_cdn_usb_host_system_err - u0_cdn_usb_host_system_err + u0_usb_host_system_err + u0_usb_host_system_err [25:25] read-write - u0_cdn_usb_hsystem_err_ext - u0_cdn_usb_hsystem_err_ext + u0_usb_hsystem_err_ext + u0_usb_hsystem_err_ext [26:26] read-only - u0_cdn_usb_idm_sink_en - u0_cdn_usb_idm_sink_en + u0_usb_idm_sink_en + u0_usb_idm_sink_en [27:27] read-only - u0_cdn_usb_idp_sink_en - u0_cdn_usb_idp_sink_en + u0_usb_idp_sink_en + u0_usb_idp_sink_en [28:28] read-only - u0_cdn_usb_idp_src_en - u0_cdn_usb_idp_src_en + u0_usb_idp_src_en + u0_usb_idp_src_en [29:29] read-only @@ -12357,68 +12357,68 @@ 0 - u0_cdn_usb_lowest_belt + u0_usb_lowest_belt LTM interface to software [11:0] read-only - u0_cdn_usb_ltm_host_req + u0_usb_ltm_host_req LTM interface to software [12:12] read-only - u0_cdn_usb_ltm_host_req_halt + u0_usb_ltm_host_req_halt LTM interface to software [13:13] read-write - u0_cdn_usb_mdctrl_clk_sel - u0_cdn_usb_mdctrl_clk_sel + u0_usb_mdctrl_clk_sel + u0_usb_mdctrl_clk_sel [14:14] read-write - u0_cdn_usb_mdctrl_clk_status - u0_cdn_usb_mdctrl_clk_status + u0_usb_mdctrl_clk_status + u0_usb_mdctrl_clk_status [15:15] read-only - u0_cdn_usb_mode_strap + u0_usb_mode_strap Can onlly be changed when pwrup_rst_n is low [18:16] read-write - u0_cdn_usb_otg_suspendm - u0_cdn_usb_otg_suspendm + u0_usb_otg_suspendm + u0_usb_otg_suspendm [19:19] read-write - u0_cdn_usb_otg_suspendm_byps - u0_cdn_usb_otg_suspendm_byps + u0_usb_otg_suspendm_byps + u0_usb_otg_suspendm_byps [20:20] read-write - u0_cdn_usb_phy_bvalid - u0_cdn_usb_phy_bvalid + u0_usb_phy_bvalid + u0_usb_phy_bvalid [21:21] read-only - u0_cdn_usb_pll_en - u0_cdn_usb_pll_en + u0_usb_pll_en + u0_usb_pll_en [22:22] read-write - u0_cdn_usb_refclk_mode - u0_cdn_usb_refclk_mode + u0_usb_refclk_mode + u0_usb_refclk_mode [23:23] read-write @@ -12441,32 +12441,32 @@ read-write - u0_cdn_usb_rid_float_comp_en - u0_cdn_usb_rid_float_comp_en + u0_usb_rid_float_comp_en + u0_usb_rid_float_comp_en [27:27] read-only - u0_cdn_usb_rid_float_comp_sts - u0_cdn_usb_rid_float_comp_sts + u0_usb_rid_float_comp_sts + u0_usb_rid_float_comp_sts [28:28] read-write - u0_cdn_usb_rid_gnd_comp_sts - u0_cdn_usb_rid_gnd_comp_sts + u0_usb_rid_gnd_comp_sts + u0_usb_rid_gnd_comp_sts [29:29] read-write - u0_cdn_usb_rid_nonfloat_comp_en - u0_cdn_usb_rid_nonfloat_comp_en + u0_usb_rid_nonfloat_comp_en + u0_usb_rid_nonfloat_comp_en [30:30] read-only - u0_cdn_usb_rx_dm - u0_cdn_usb_rx_dm + u0_usb_rx_dm + u0_usb_rx_dm [31:31] read-only @@ -12480,182 +12480,182 @@ 0 - u0_cdn_usb_rx_dp - u0_cdn_usb_rx_dp + u0_usb_rx_dp + u0_usb_rx_dp [0:0] read-only - u0_cdn_usb_rx_rcv - u0_cdn_usb_rx_rcv + u0_usb_rx_rcv + u0_usb_rx_rcv [1:1] read-only - u0_cdn_usb_self_test + u0_usb_self_test For software bist_test [2:2] read-write - u0_cdn_usb_sessend - u0_cdn_usb_sessend + u0_usb_sessend + u0_usb_sessend [3:3] read-only - u0_cdn_usb_sessvalid - u0_cdn_usb_sessvalid + u0_usb_sessvalid + u0_usb_sessvalid [4:4] read-only - u0_cdn_usb_sof - u0_cdn_usb_sof + u0_usb_sof + u0_usb_sof [5:5] read-only - u0_cdn_usb_test_bist + u0_usb_test_bist For software bist_test [6:6] read-only - u0_cdn_usb_usbdev_main_power_off_ack - u0_cdn_usb_usbdev_main_power_off_ack + u0_usb_usbdev_main_power_off_ack + u0_usb_usbdev_main_power_off_ack [7:7] read-only - u0_cdn_usb_usbdev_main_power_off_ready - u0_cdn_usb_usbdev_main_power_off_ready + u0_usb_usbdev_main_power_off_ready + u0_usb_usbdev_main_power_off_ready [8:8] read-only - u0_cdn_usb_usbdev_main_power_off_req - u0_cdn_usb_usbdev_main_power_off_req + u0_usb_usbdev_main_power_off_req + u0_usb_usbdev_main_power_off_req [9:9] read-write - u0_cdn_usb_usbdev_main_power_on_ready - u0_cdn_usb_usbdev_main_power_on_ready + u0_usb_usbdev_main_power_on_ready + u0_usb_usbdev_main_power_on_ready [10:10] read-only - u0_cdn_usb_usbdev_main_power_on_req - u0_cdn_usb_usbdev_main_power_on_req + u0_usb_usbdev_main_power_on_req + u0_usb_usbdev_main_power_on_req [11:11] read-only - u0_cdn_usb_usbdev_main_power_on_valid - u0_cdn_usb_usbdev_main_power_on_valid + u0_usb_usbdev_main_power_on_valid + u0_usb_usbdev_main_power_on_valid [12:12] read-write - u0_cdn_usb_usbdev_power_off_ack - u0_cdn_usb_usbdev_power_off_ack + u0_usb_usbdev_power_off_ack + u0_usb_usbdev_power_off_ack [13:13] read-only - u0_cdn_usb_usbdev_power_off_ready - u0_cdn_usb_usbdev_power_off_ready + u0_usb_usbdev_power_off_ready + u0_usb_usbdev_power_off_ready [14:14] read-only - u0_cdn_usb_usbdev_power_off_req - u0_cdn_usb_usbdev_power_off_req + u0_usb_usbdev_power_off_req + u0_usb_usbdev_power_off_req [15:15] read-write - u0_cdn_usb_usbdev_power_on_ready - u0_cdn_usb_usbdev_power_on_ready + u0_usb_usbdev_power_on_ready + u0_usb_usbdev_power_on_ready [16:16] read-only - u0_cdn_usb_usbdev_power_on_req - u0_cdn_usb_usbdev_power_on_req + u0_usb_usbdev_power_on_req + u0_usb_usbdev_power_on_req [17:17] read-only - u0_cdn_usb_usbdev_power_on_valid - u0_cdn_usb_usbdev_power_on_valid + u0_usb_usbdev_power_on_valid + u0_usb_usbdev_power_on_valid [18:18] read-write - u0_cdn_usb_utmi_dmpulldown_sit - u0_cdn_usb_utmi_dmpulldown_sit + u0_usb_utmi_dmpulldown_sit + u0_usb_utmi_dmpulldown_sit [19:19] read-write - u0_cdn_usb_utmi_dppulldown_sit - u0_cdn_usb_utmi_dppulldown_sit + u0_usb_utmi_dppulldown_sit + u0_usb_utmi_dppulldown_sit [20:20] read-write - u0_cdn_usb_utmi_fslsserialmode_sit - u0_cdn_usb_utmi_fslsserialmode_sit + u0_usb_utmi_fslsserialmode_sit + u0_usb_utmi_fslsserialmode_sit [21:21] read-write - u0_cdn_usb_utmi_hostdisconnect_sit - u0_cdn_usb_utmi_hostdisconnect_sit + u0_usb_utmi_hostdisconnect_sit + u0_usb_utmi_hostdisconnect_sit [22:22] read-only - u0_cdn_usb_utmi_iddig_sit - u0_cdn_usb_utmi_iddig_sit + u0_usb_utmi_iddig_sit + u0_usb_utmi_iddig_sit [23:23] read-only - u0_cdn_usb_utmi_idpullup_sit - u0_cdn_usb_utmi_idpullup_sit + u0_usb_utmi_idpullup_sit + u0_usb_utmi_idpullup_sit [24:24] read-write - u0_cdn_usb_utmi_linestate_sit - u0_cdn_usb_utmi_linestate_sit + u0_usb_utmi_linestate_sit + u0_usb_utmi_linestate_sit [26:25] read-only - u0_cdn_usb_utmi_opmode_sit - u0_cdn_usb_utmi_opmode_sit + u0_usb_utmi_opmode_sit + u0_usb_utmi_opmode_sit [28:27] read-write - u0_cdn_usb_utmi_rxactive_sit - u0_cdn_usb_utmi_rxactive_sit + u0_usb_utmi_rxactive_sit + u0_usb_utmi_rxactive_sit [29:29] read-only - u0_cdn_usb_utmi_rxerror_sit - u0_cdn_usb_utmi_rxerror_sit + u0_usb_utmi_rxerror_sit + u0_usb_utmi_rxerror_sit [30:30] read-only - u0_cdn_usb_utmi_rxvalid_sit - u0_cdn_usb_utmi_rxvalid_sit + u0_usb_utmi_rxvalid_sit + u0_usb_utmi_rxvalid_sit [31:31] read-only @@ -12669,104 +12669,104 @@ 0 - u0_cdn_usb_utmi_rxvalidh_sit - u0_cdn_usb_utmi_rxvalidh_sit + u0_usb_utmi_rxvalidh_sit + u0_usb_utmi_rxvalidh_sit [0:0] read-only - u0_cdn_usb_utmi_sessvld - u0_cdn_usb_utmi_sessvld + u0_usb_utmi_sessvld + u0_usb_utmi_sessvld [1:1] read-write - u0_cdn_usb_utmi_termselect_sit - u0_cdn_usb_utmi_termselect_sit + u0_usb_utmi_termselect_sit + u0_usb_utmi_termselect_sit [2:2] read-write - u0_cdn_usb_utmi_tx_dat_sit - u0_cdn_usb_utmi_tx_dat_sit + u0_usb_utmi_tx_dat_sit + u0_usb_utmi_tx_dat_sit [3:3] read-write - u0_cdn_usb_utmi_tx_enable_n_sit - u0_cdn_usb_utmi_tx_enable_n_sit + u0_usb_utmi_tx_enable_n_sit + u0_usb_utmi_tx_enable_n_sit [4:4] read-write - u0_cdn_usb_utmi_tx_se0_sit - u0_cdn_usb_utmi_tx_se0_sit + u0_usb_utmi_tx_se0_sit + u0_usb_utmi_tx_se0_sit [5:5] read-write - u0_cdn_usb_utmi_txbitstuffenable_sit - u0_cdn_usb_utmi_txbitstuffenable_sit + u0_usb_utmi_txbitstuffenable_sit + u0_usb_utmi_txbitstuffenable_sit [6:6] read-write - u0_cdn_usb_utmi_txready_sit - u0_cdn_usb_utmi_txready_sit + u0_usb_utmi_txready_sit + u0_usb_utmi_txready_sit [7:7] read-only - u0_cdn_usb_utmi_txvalid_sit - u0_cdn_usb_utmi_txvalid_sit + u0_usb_utmi_txvalid_sit + u0_usb_utmi_txvalid_sit [8:8] read-write - u0_cdn_usb_utmi_txvalidh_sit - u0_cdn_usb_utmi_txvalidh_sit + u0_usb_utmi_txvalidh_sit + u0_usb_utmi_txvalidh_sit [9:9] read-write - u0_cdn_usb_utmi_vbusvalid_sit - u0_cdn_usb_utmi_vbusvalid_sit + u0_usb_utmi_vbusvalid_sit + u0_usb_utmi_vbusvalid_sit [10:10] read-only - u0_cdn_usb_utmi_xcvrselect_sit - u0_cdn_usb_utmi_xcvrselect_sit + u0_usb_utmi_xcvrselect_sit + u0_usb_utmi_xcvrselect_sit [12:11] read-write - u0_cdn_usb_utmi_vdm_src_en - u0_cdn_usb_utmi_vdm_src_en + u0_usb_utmi_vdm_src_en + u0_usb_utmi_vdm_src_en [13:13] read-only - u0_cdn_usb_utmi_vdp_src_en - u0_cdn_usb_utmi_vdp_src_en + u0_usb_utmi_vdp_src_en + u0_usb_utmi_vdp_src_en [14:14] read-only - u0_cdn_usb_wakeup - u0_cdn_usb_wakeup + u0_usb_wakeup + u0_usb_wakeup [15:15] read-write - u0_cdn_usb_xhc_d0_ack - u0_cdn_usb_xhc_d0_ack + u0_usb_xhc_d0_ack + u0_usb_xhc_d0_ack [16:16] read-only - u0_cdn_usb_xhc_d0_req - u0_cdn_usb_xhc_d0_req + u0_usb_xhc_d0_req + u0_usb_xhc_d0_req [17:17] read-write @@ -12780,8 +12780,8 @@ 0 - u0_cdn_usb_xhci_debug_bus - u0_cdn_usb_xhci_debug_bus + u0_usb_xhci_debug_bus + u0_usb_xhci_debug_bus [31:0] read-only @@ -12795,8 +12795,8 @@ 0 - u0_cdn_usb_xhci_debug_link_state - u0_cdn_usb_xhci_debug_link_state + u0_usb_xhci_debug_link_state + u0_usb_xhci_debug_link_state [30:0] read-only @@ -12810,92 +12810,92 @@ 0 - u0_cdn_usb_xhci_debug_sel - u0_cdn_usb_xhci_debug_sel + u0_usb_xhci_debug_sel + u0_usb_xhci_debug_sel [4:0] read-write - u0_cdn_usb_xhci_main_power_off_ack - u0_cdn_usb_xhci_main_power_off_ack + u0_usb_xhci_main_power_off_ack + u0_usb_xhci_main_power_off_ack [5:5] read-only - u0_cdn_usb_xhci_main_power_off_req - u0_cdn_usb_xhci_main_power_off_req + u0_usb_xhci_main_power_off_req + u0_usb_xhci_main_power_off_req [6:6] read-only - u0_cdn_usb_xhci_main_power_on_ready - u0_cdn_usb_xhci_main_power_on_ready + u0_usb_xhci_main_power_on_ready + u0_usb_xhci_main_power_on_ready [7:7] read-write - u0_cdn_usb_xhci_main_power_on_req - u0_cdn_usb_xhci_main_power_on_req + u0_usb_xhci_main_power_on_req + u0_usb_xhci_main_power_on_req [8:8] read-only - u0_cdn_usb_xhci_main_power_on_valid - u0_cdn_usb_xhci_main_power_on_valid + u0_usb_xhci_main_power_on_valid + u0_usb_xhci_main_power_on_valid [9:9] read-write - u0_cdn_usb_xhci_power_off_ack - u0_cdn_usb_xhci_power_off_ack + u0_usb_xhci_power_off_ack + u0_usb_xhci_power_off_ack [10:10] read-only - u0_cdn_usb_xhci_power_off_ready - u0_cdn_usb_xhci_power_off_ready + u0_usb_xhci_power_off_ready + u0_usb_xhci_power_off_ready [11:11] read-only - u0_cdn_usb_xhci_power_off_req - u0_cdn_usb_xhci_power_off_req + u0_usb_xhci_power_off_req + u0_usb_xhci_power_off_req [12:12] read-write - u0_cdn_usb_xhci_power_on_ready - u0_cdn_usb_xhci_power_on_ready + u0_usb_xhci_power_on_ready + u0_usb_xhci_power_on_ready [13:13] read-only - u0_cdn_usb_xhci_power_on_req - u0_cdn_usb_xhci_power_on_req + u0_usb_xhci_power_on_req + u0_usb_xhci_power_on_req [14:14] read-only - u0_cdn_usb_xhci_power_on_valid - u0_cdn_usb_xhci_power_on_valid + u0_usb_xhci_power_on_valid + u0_usb_xhci_power_on_valid [15:15] read-write - u0_e2_sft7110_cease_from_tile_0 - u0_e2_sft7110_cease_from_tile_0 + u0_e2_cease_from_tile_0 + u0_e2_cease_from_tile_0 [16:16] read-only - u0_e2_sft7110_debug_from_tile_0 - u0_e2_sft7110_debug_from_tile_0 + u0_e2_debug_from_tile_0 + u0_e2_debug_from_tile_0 [17:17] read-only - u0_e2_sft7110_halt_from_tile_0 - u0_e2_sft7110_halt_from_tile_0 + u0_e2_halt_from_tile_0 + u0_e2_halt_from_tile_0 [18:18] read-only @@ -12909,8 +12909,8 @@ 0 - u0_e2_sft7110_nmi_0_rnmi_exception_vector - u0_e2_sft7110_nmi_0_rnmi_exception_vector + u0_e2_nmi_exception_vector + u0_e2_nmi_exception_vector [31:0] read-write @@ -12924,8 +12924,8 @@ 0 - u0_e2_sft7110_nmi_0_rnmi_interrupt_vector - u0_e2_sft7110_nmi_0_rnmi_interrupt_vector + u0_e2_nmi_interrupt_vector + u0_e2_nmi_interrupt_vector [31:0] read-write @@ -12939,8 +12939,8 @@ 0 - u0_e2_sft7110_reset_vector_0 - u0_e2_sft7110_reset_vector_0 + u0_e2_reset_vector_0 + u0_e2_reset_vector_0 [31:0] read-write @@ -12954,8 +12954,8 @@ 0 - u0_e2_sft7110_wfi_from_tile_0 - u0_e2_sft7110_wfi_from_tile_0 + u0_e2_wfi_from_tile_0 + u0_e2_wfi_from_tile_0 [0:0] read-only @@ -13209,8 +13209,8 @@ read-only - u0_plda_pcie_align_detect - u0_plda_pcie_align_detect + u0_pcie_align_detect + u0_pcie_align_detect [16:16] read-only @@ -13224,8 +13224,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_31_0 - u0_plda_pcie_axi4_mst0_aratomop_31_0 + u0_pcie_axi4_mst0_aratomop_31_0 + u0_pcie_axi4_mst0_aratomop_31_0 [31:0] read-only @@ -13239,8 +13239,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_63_32 - u0_plda_pcie_axi4_mst0_aratomop_63_32 + u0_pcie_axi4_mst0_aratomop_63_32 + u0_pcie_axi4_mst0_aratomop_63_32 [31:0] read-only @@ -13254,8 +13254,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_95_64 - u0_plda_pcie_axi4_mst0_aratomop_95_64 + u0_pcie_axi4_mst0_aratomop_95_64 + u0_pcie_axi4_mst0_aratomop_95_64 [31:0] read-only @@ -13269,8 +13269,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_127_96 - u0_plda_pcie_axi4_mst0_aratomop_127_96 + u0_pcie_axi4_mst0_aratomop_127_96 + u0_pcie_axi4_mst0_aratomop_127_96 [31:0] read-only @@ -13284,8 +13284,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_159_128 - u0_plda_pcie_axi4_mst0_aratomop_159_128 + u0_pcie_axi4_mst0_aratomop_159_128 + u0_pcie_axi4_mst0_aratomop_159_128 [31:0] read-only @@ -13299,8 +13299,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_191_160 - u0_plda_pcie_axi4_mst0_aratomop_191_160 + u0_pcie_axi4_mst0_aratomop_191_160 + u0_pcie_axi4_mst0_aratomop_191_160 [31:0] read-only @@ -13314,8 +13314,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_223_192 - u0_plda_pcie_axi4_mst0_aratomop_223_192 + u0_pcie_axi4_mst0_aratomop_223_192 + u0_pcie_axi4_mst0_aratomop_223_192 [31:0] read-only @@ -13329,8 +13329,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_255_224 - u0_plda_pcie_axi4_mst0_aratomop_255_224 + u0_pcie_axi4_mst0_aratomop_255_224 + u0_pcie_axi4_mst0_aratomop_255_224 [31:0] read-only @@ -13344,20 +13344,20 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_257_256 - u0_plda_pcie_axi4_mst0_aratomop_257_256 + u0_pcie_axi4_mst0_aratomop_257_256 + u0_pcie_axi4_mst0_aratomop_257_256 [1:0] read-only - u0_plda_pcie_axi4_mst0_arfunc - u0_plda_pcie_axi4_mst0_arfunc + u0_pcie_axi4_mst0_arfunc + u0_pcie_axi4_mst0_arfunc [16:2] read-only - u0_plda_pcie_axi4_mst0_arregion - u0_plda_pcie_axi4_mst0_arregion + u0_pcie_axi4_mst0_arregion + u0_pcie_axi4_mst0_arregion [20:17] read-only @@ -13371,8 +13371,8 @@ 0 - u0_plda_pcie_axi4_mst0_aruser_31_0 - u0_plda_pcie_axi4_mst0_aruser_31_0 + u0_pcie_axi4_mst0_aruser_31_0 + u0_pcie_axi4_mst0_aruser_31_0 [31:0] read-only @@ -13386,8 +13386,8 @@ 0 - u0_plda_pcie_axi4_mst0_aruser_63_32 - u0_plda_pcie_axi4_mst0_aruser_63_32 + u0_pcie_axi4_mst0_aruser_63_32 + u0_pcie_axi4_mst0_aruser_63_32 [31:0] read-only @@ -13401,14 +13401,14 @@ 0 - u0_plda_pcie_axi4_mst0_awfunc - u0_plda_pcie_axi4_mst0_awfunc + u0_pcie_axi4_mst0_awfunc + u0_pcie_axi4_mst0_awfunc [14:0] read-only - u0_plda_pcie_axi4_mst0_awregion - u0_plda_pcie_axi4_mst0_awregion + u0_pcie_axi4_mst0_awregion + u0_pcie_axi4_mst0_awregion [18:15] read-only @@ -13422,8 +13422,8 @@ 0 - u0_plda_pcie_axi4_mst0_a2user_31_0 - u0_plda_pcie_axi4_mst0_a2user_31_0 + u0_pcie_axi4_mst0_a2user_31_0 + u0_pcie_axi4_mst0_a2user_31_0 [31:0] read-only @@ -13437,14 +13437,14 @@ 0 - u0_plda_pcie_axi4_mst0_awuser_42_32 - u0_plda_pcie_axi4_mst0_awuser_42_32 + u0_pcie_axi4_mst0_awuser_42_32 + u0_pcie_axi4_mst0_awuser_42_32 [10:0] read-only - u0_plda_pcie_axi4_mst0_rderr - u0_plda_pcie_axi4_mst0_rderr + u0_pcie_axi4_mst0_rderr + u0_pcie_axi4_mst0_rderr [18:11] read-write @@ -13458,8 +13458,8 @@ 0 - u0_plda_pcie_axi4_mst0_ruser - u0_plda_pcie_axi4_mst0_ruser + u0_pcie_axi4_mst0_ruser + u0_pcie_axi4_mst0_ruser [31:0] read-write @@ -13473,8 +13473,8 @@ 0 - u0_plda_pcie_axi4_mst0_wderr - u0_plda_pcie_axi4_mst0_wderr + u0_pcie_axi4_mst0_wderr + u0_pcie_axi4_mst0_wderr [7:0] read-only @@ -13488,8 +13488,8 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_31_0 - u0_plda_pcie_axi4_slv0_aratomop_31_0 + u0_pcie_axi4_slv0_aratomop_31_0 + u0_pcie_axi4_slv0_aratomop_31_0 [31:0] read-write @@ -13503,8 +13503,8 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_63_32 - u0_plda_pcie_axi4_slv0_aratomop_63_32 + u0_pcie_axi4_slv0_aratomop_63_32 + u0_pcie_axi4_slv0_aratomop_63_32 [31:0] read-write @@ -13518,8 +13518,8 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_95_64 - u0_plda_pcie_axi4_slv0_aratomop_95_64 + u0_pcie_axi4_slv0_aratomop_95_64 + u0_pcie_axi4_slv0_aratomop_95_64 [31:0] read-write @@ -13533,8 +13533,8 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_127_96 - u0_plda_pcie_axi4_slv0_aratomop_127_96 + u0_pcie_axi4_slv0_aratomop_127_96 + u0_pcie_axi4_slv0_aratomop_127_96 [31:0] read-write @@ -13548,8 +13548,8 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_159_128 - u0_plda_pcie_axi4_slv0_aratomop_159_128 + u0_pcie_axi4_slv0_aratomop_159_128 + u0_pcie_axi4_slv0_aratomop_159_128 [31:0] read-write @@ -13563,8 +13563,8 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_191_160 - u0_plda_pcie_axi4_slv0_aratomop_191_160 + u0_pcie_axi4_slv0_aratomop_191_160 + u0_pcie_axi4_slv0_aratomop_191_160 [31:0] read-write @@ -13578,8 +13578,8 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_223_192 - u0_plda_pcie_axi4_slv0_aratomop_223_192 + u0_pcie_axi4_slv0_aratomop_223_192 + u0_pcie_axi4_slv0_aratomop_223_192 [31:0] read-write @@ -13593,8 +13593,8 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_255_224 - u0_plda_pcie_axi4_slv0_aratomop_255_224 + u0_pcie_axi4_slv0_aratomop_255_224 + u0_pcie_axi4_slv0_aratomop_255_224 [31:0] read-write @@ -13608,20 +13608,20 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_257_256 - u0_plda_pcie_axi4_slv0_aratomop_257_256 + u0_pcie_axi4_slv0_aratomop_257_256 + u0_pcie_axi4_slv0_aratomop_257_256 [1:0] read-write - u0_plda_pcie_axi4_slv0_arfunc - u0_plda_pcie_axi4_slv0_arfunc + u0_pcie_axi4_slv0_arfunc + u0_pcie_axi4_slv0_arfunc [16:2] read-write - u0_plda_pcie_axi4_slv0_arregion - u0_plda_pcie_axi4_slv0_arregion + u0_pcie_axi4_slv0_arregion + u0_pcie_axi4_slv0_arregion [20:17] read-write @@ -13635,8 +13635,8 @@ 0 - u0_plda_pcie_axi4_slv0_aruser_31_0 - u0_plda_pcie_axi4_slv0_aruser_31_0 + u0_pcie_axi4_slv0_aruser_31_0 + u0_pcie_axi4_slv0_aruser_31_0 [31:0] read-write @@ -13650,20 +13650,20 @@ 0 - u0_plda_pcie_axi4_slv0_aruser_40_32 - u0_plda_pcie_axi4_slv0_aruser_40_32 + u0_pcie_axi4_slv0_aruser_40_32 + u0_pcie_axi4_slv0_aruser_40_32 [8:0] read-write - u0_plda_pcie_axi4_slv0_awfunc - u0_plda_pcie_axi4_slv0_awfunc + u0_pcie_axi4_slv0_awfunc + u0_pcie_axi4_slv0_awfunc [23:9] read-write - u0_plda_pcie_axi4_slv0_awregion - u0_plda_pcie_axi4_slv0_awregion + u0_pcie_axi4_slv0_awregion + u0_pcie_axi4_slv0_awregion [27:24] read-write @@ -13677,8 +13677,8 @@ 0 - u0_plda_pcie_axi4_slv0_awuser_31_0 - u0_plda_pcie_axi4_slv0_awuser_31_0 + u0_pcie_axi4_slv0_awuser_31_0 + u0_pcie_axi4_slv0_awuser_31_0 [31:0] read-write @@ -13692,14 +13692,14 @@ 0 - u0_plda_pcie_axi4_slv0_awuser_40_32 - u0_plda_pcie_axi4_slv0_awuser_40_32 + u0_pcie_axi4_slv0_awuser_40_32 + u0_pcie_axi4_slv0_awuser_40_32 [8:0] read-write - u0_plda_pcie_axi4_slv0_rderr - u0_plda_pcie_axi4_slv0_rderr + u0_pcie_axi4_slv0_rderr + u0_pcie_axi4_slv0_rderr [16:9] read-only @@ -13713,8 +13713,8 @@ 0 - u0_plda_pcie_axi4_slv0_ruser - u0_plda_pcie_axi4_slv0_ruser + u0_pcie_axi4_slv0_ruser + u0_pcie_axi4_slv0_ruser [31:0] read-only @@ -13728,14 +13728,14 @@ 0 - u0_plda_pcie_axi4_slv0_wderr - u0_plda_pcie_axi4_slv0_wderr + u0_pcie_axi4_slv0_wderr + u0_pcie_axi4_slv0_wderr [7:0] read-write - u0_plda_pcie_axi4_slvl_arfunc - u0_plda_pcie_axi4_slvl_arfunc + u0_pcie_axi4_slvl_arfunc + u0_pcie_axi4_slvl_arfunc [22:8] read-only @@ -13749,38 +13749,38 @@ 0 - u0_plda_pcie_axi4_slvl_awfunc - u0_plda_pcie_axi4_slvl_awfunc + u0_pcie_axi4_slvl_awfunc + u0_pcie_axi4_slvl_awfunc [14:0] read-write - u0_plda_pcie_bus_width_o - u0_plda_pcie_bus_width_o + u0_pcie_bus_width_o + u0_pcie_bus_width_o [16:15] read-only - u0_plda_pcie_bypass_codec - u0_plda_pcie_bypass_codec + u0_pcie_bypass_codec + u0_pcie_bypass_codec [17:17] read-write - u0_plda_pcie_ckref_src - u0_plda_pcie_ckref_src + u0_pcie_ckref_src + u0_pcie_ckref_src [19:18] read-write - u0_plda_pcie_clk_sel - u0_plda_pcie_clk_sel + u0_pcie_clk_sel + u0_pcie_clk_sel [21:20] read-write - u0_plda_pcie_clkreq - u0_plda_pcie_clkreq + u0_pcie_clkreq + u0_pcie_clkreq [22:22] read-write @@ -13794,8 +13794,8 @@ 0 - u0_plda_pcie_k_phyparam_31_0 - u0_plda_pcie_k_phyparam_31_0 + u0_pcie_k_phyparam_31_0 + u0_pcie_k_phyparam_31_0 [31:0] read-write @@ -13809,8 +13809,8 @@ 0 - u0_plda_pcie_k_phyparam_63_32 - u0_plda_pcie_k_phyparam_63_32 + u0_pcie_k_phyparam_63_32 + u0_pcie_k_phyparam_63_32 [31:0] read-write @@ -13824,8 +13824,8 @@ 0 - u0_plda_pcie_k_phyparam_95_64 - u0_plda_pcie_k_phyparam_95_64 + u0_pcie_k_phyparam_95_64 + u0_pcie_k_phyparam_95_64 [31:0] read-write @@ -13839,8 +13839,8 @@ 0 - u0_plda_pcie_k_phyparam_127_96 - u0_plda_pcie_k_phyparam_127_96 + u0_pcie_k_phyparam_127_96 + u0_pcie_k_phyparam_127_96 [31:0] read-write @@ -13854,8 +13854,8 @@ 0 - u0_plda_pcie_k_phyparam_159_128 - u0_plda_pcie_k_phyparam_159_128 + u0_pcie_k_phyparam_159_128 + u0_pcie_k_phyparam_159_128 [31:0] read-write @@ -13869,8 +13869,8 @@ 0 - u0_plda_pcie_k_phyparam_191_160 - u0_plda_pcie_k_phyparam_191_160 + u0_pcie_k_phyparam_191_160 + u0_pcie_k_phyparam_191_160 [31:0] read-write @@ -13884,8 +13884,8 @@ 0 - u0_plda_pcie_k_phyparam_223_192 - u0_plda_pcie_k_phyparam_223_192 + u0_pcie_k_phyparam_223_192 + u0_pcie_k_phyparam_223_192 [31:0] read-write @@ -13899,8 +13899,8 @@ 0 - u0_plda_pcie_k_phyparam_255_224 - u0_plda_pcie_k_phyparam_255_224 + u0_pcie_k_phyparam_255_224 + u0_pcie_k_phyparam_255_224 [31:0] read-write @@ -13914,8 +13914,8 @@ 0 - u0_plda_pcie_k_phyparam_287_256 - u0_plda_pcie_k_phyparam_287_256 + u0_pcie_k_phyparam_287_256 + u0_pcie_k_phyparam_287_256 [31:0] read-write @@ -13929,8 +13929,8 @@ 0 - u0_plda_pcie_k_phyparam_319_288 - u0_plda_pcie_k_phyparam_319_288 + u0_pcie_k_phyparam_319_288 + u0_pcie_k_phyparam_319_288 [31:0] read-write @@ -13944,8 +13944,8 @@ 0 - u0_plda_pcie_k_phyparam_351_320 - u0_plda_pcie_k_phyparam_351_320 + u0_pcie_k_phyparam_351_320 + u0_pcie_k_phyparam_351_320 [31:0] read-write @@ -13959,8 +13959,8 @@ 0 - u0_plda_pcie_k_phyparam_383_352 - u0_plda_pcie_k_phyparam_383_352 + u0_pcie_k_phyparam_383_352 + u0_pcie_k_phyparam_383_352 [31:0] read-write @@ -13974,8 +13974,8 @@ 0 - u0_plda_pcie_k_phyparam_415_384 - u0_plda_pcie_k_phyparam_415_384 + u0_pcie_k_phyparam_415_384 + u0_pcie_k_phyparam_415_384 [31:0] read-write @@ -13989,8 +13989,8 @@ 0 - u0_plda_pcie_k_phyparam_447_416 - u0_plda_pcie_k_phyparam_447_416 + u0_pcie_k_phyparam_447_416 + u0_pcie_k_phyparam_447_416 [31:0] read-write @@ -14004,8 +14004,8 @@ 0 - u0_plda_pcie_k_phyparam_479_448 - u0_plda_pcie_k_phyparam_479_448 + u0_pcie_k_phyparam_479_448 + u0_pcie_k_phyparam_479_448 [31:0] read-write @@ -14019,8 +14019,8 @@ 0 - u0_plda_pcie_k_phyparam_511_480 - u0_plda_pcie_k_phyparam_511_480 + u0_pcie_k_phyparam_511_480 + u0_pcie_k_phyparam_511_480 [31:0] read-write @@ -14034,8 +14034,8 @@ 0 - u0_plda_pcie_k_phyparam_543_512 - u0_plda_pcie_k_phyparam_543_512 + u0_pcie_k_phyparam_543_512 + u0_pcie_k_phyparam_543_512 [31:0] read-write @@ -14049,8 +14049,8 @@ 0 - u0_plda_pcie_k_phyparam_575_544 - u0_plda_pcie_k_phyparam_575_544 + u0_pcie_k_phyparam_575_544 + u0_pcie_k_phyparam_575_544 [31:0] read-write @@ -14064,8 +14064,8 @@ 0 - u0_plda_pcie_k_phyparam_607_576 - u0_plda_pcie_k_phyparam_607_576 + u0_pcie_k_phyparam_607_576 + u0_pcie_k_phyparam_607_576 [31:0] read-write @@ -14079,8 +14079,8 @@ 0 - u0_plda_pcie_k_phyparam_639_608 - u0_plda_pcie_k_phyparam_639_608 + u0_pcie_k_phyparam_639_608 + u0_pcie_k_phyparam_639_608 [31:0] read-write @@ -14094,8 +14094,8 @@ 0 - u0_plda_pcie_k_phyparam_671_640 - u0_plda_pcie_k_phyparam_671_640 + u0_pcie_k_phyparam_671_640 + u0_pcie_k_phyparam_671_640 [31:0] read-write @@ -14109,8 +14109,8 @@ 0 - u0_plda_pcie_k_phyparam_703_672 - u0_plda_pcie_k_phyparam_703_672 + u0_pcie_k_phyparam_703_672 + u0_pcie_k_phyparam_703_672 [31:0] read-write @@ -14124,8 +14124,8 @@ 0 - u0_plda_pcie_k_phyparam_735_704 - u0_plda_pcie_k_phyparam_735_704 + u0_pcie_k_phyparam_735_704 + u0_pcie_k_phyparam_735_704 [31:0] read-write @@ -14139,8 +14139,8 @@ 0 - u0_plda_pcie_k_phyparam_767_736 - u0_plda_pcie_k_phyparam_767_736 + u0_pcie_k_phyparam_767_736 + u0_pcie_k_phyparam_767_736 [31:0] read-write @@ -14154,8 +14154,8 @@ 0 - u0_plda_pcie_k_phyparam_799_768 - u0_plda_pcie_k_phyparam_799_768 + u0_pcie_k_phyparam_799_768 + u0_pcie_k_phyparam_799_768 [31:0] read-write @@ -14169,8 +14169,8 @@ 0 - u0_plda_pcie_k_phyparam_831_800 - u0_plda_pcie_k_phyparam_831_800 + u0_pcie_k_phyparam_831_800 + u0_pcie_k_phyparam_831_800 [31:0] read-write @@ -14184,26 +14184,26 @@ 0 - u0_plda_pcie_k_phyparam_839_832 - u0_plda_pcie_k_phyparam_839_832 + u0_pcie_k_phyparam_839_832 + u0_pcie_k_phyparam_839_832 [7:0] read-write - u0_plda_pcie_k_rp_nep - u0_plda_pcie_k_rp_nep + u0_pcie_k_rp_nep + u0_pcie_k_rp_nep [8:8] read-write - u0_plda_pcie_l1sub_entack - u0_plda_pcie_l1sub_entack + u0_pcie_l1sub_entack + u0_pcie_l1sub_entack [9:9] read-only - u0_plda_pcie_l1sub_entreq - u0_plda_pcie_l1sub_entreq + u0_pcie_l1sub_entreq + u0_pcie_l1sub_entreq [10:10] read-write @@ -14217,8 +14217,8 @@ 0 - u0_plda_pcie_local_interrupt_in - u0_plda_pcie_local_interrupt_in + u0_pcie_local_interrupt_in + u0_pcie_local_interrupt_in [31:0] read-write @@ -14232,38 +14232,38 @@ 0 - u0_plda_pcie_mperstn - u0_plda_pcie_mperstn + u0_pcie_mperstn + u0_pcie_mperstn [0:0] read-write - u0_plda_pcie_pcie_ebuf_mode - u0_plda_pcie_pcie_ebuf_mode + u0_pcie_pcie_ebuf_mode + u0_pcie_pcie_ebuf_mode [1:1] read-write - u0_plda_pcie_pcie_phy_test_cfg - u0_plda_pcie_pcie_phy_test_cfg + u0_pcie_pcie_phy_test_cfg + u0_pcie_pcie_phy_test_cfg [24:2] read-write - u0_plda_pcie_pcie_rx_eq_training - u0_plda_pcie_pcie_rx_eq_training + u0_pcie_pcie_rx_eq_training + u0_pcie_pcie_rx_eq_training [25:25] read-write - u0_plda_pcie_pcie_rxterm_en - u0_plda_pcie_pcie_rxterm_en + u0_pcie_pcie_rxterm_en + u0_pcie_pcie_rxterm_en [26:26] read-write - u0_plda_pcie_pcie_tx_onezeros - u0_plda_pcie_pcie_tx_onezeros + u0_pcie_pcie_tx_onezeros + u0_pcie_pcie_tx_onezeros [27:27] read-write @@ -14277,8 +14277,8 @@ 0 - u0_plda_pcie_pf0_offset - u0_plda_pcie_pf0_offset + u0_pcie_pf0_offset + u0_pcie_pf0_offset [19:0] read-write @@ -14292,8 +14292,8 @@ 0 - u0_plda_pcie_pf1_offset - u0_plda_pcie_pf1_offset + u0_pcie_pf1_offset + u0_pcie_pf1_offset [19:0] read-write @@ -14307,8 +14307,8 @@ 0 - u0_plda_pcie_pf2_offset - u0_plda_pcie_pf2_offset + u0_pcie_pf2_offset + u0_pcie_pf2_offset [19:0] read-write @@ -14322,38 +14322,38 @@ 0 - u0_plda_pcie_pf3_offset - u0_plda_pcie_pf3_offset + u0_pcie_pf3_offset + u0_pcie_pf3_offset [19:0] read-write - u0_plda_pcie_phy_mode - u0_plda_pcie_phy_mode + u0_pcie_phy_mode + u0_pcie_phy_mode [21:20] read-write - u0_plda_pcie_pl_clkrem_allow - u0_plda_pcie_pl_clkrem_allow + u0_pcie_pl_clkrem_allow + u0_pcie_pl_clkrem_allow [22:22] read-write - u0_plda_pcie_pl_clkreq_oen - u0_plda_pcie_pl_clkreq_oen + u0_pcie_pl_clkreq_oen + u0_pcie_pl_clkreq_oen [23:23] read-only - u0_plda_pcie_pl_equ_phase - u0_plda_pcie_pl_equ_phase + u0_pcie_pl_equ_phase + u0_pcie_pl_equ_phase [25:24] read-only - u0_plda_pcie_pl_ltssm - u0_plda_pcie_pl_ltssm + u0_pcie_pl_ltssm + u0_pcie_pl_ltssm [30:26] read-only @@ -14367,8 +14367,8 @@ 0 - u0_plda_pcie_pl_pclk_rate - u0_plda_pcie_pl_pclk_rate + u0_pcie_pl_pclk_rate + u0_pcie_pl_pclk_rate [4:0] read-only @@ -14382,8 +14382,8 @@ 0 - u0_plda_pcie_pl_sideband_in_31_0 - u0_plda_pcie_pl_sideband_in_31_0 + u0_pcie_pl_sideband_in_31_0 + u0_pcie_pl_sideband_in_31_0 [31:0] read-only @@ -14397,8 +14397,8 @@ 0 - u0_plda_pcie_pl_sideband_in_63_32 - u0_plda_pcie_pl_sideband_in_63_32 + u0_pcie_pl_sideband_in_63_32 + u0_pcie_pl_sideband_in_63_32 [31:0] read-only @@ -14412,8 +14412,8 @@ 0 - u0_plda_pcie_pl_sideband_out_31_0 - u0_plda_pcie_pl_sideband_out_31_0 + u0_pcie_pl_sideband_out_31_0 + u0_pcie_pl_sideband_out_31_0 [31:0] read-only @@ -14427,8 +14427,8 @@ 0 - u0_plda_pcie_pl_sideband_out_63_32 - u0_plda_pcie_pl_sideband_out_63_32 + u0_pcie_pl_sideband_out_63_32 + u0_pcie_pl_sideband_out_63_32 [31:0] read-only @@ -14442,20 +14442,20 @@ 0 - u0_plda_pcie_pl_wake_in - u0_plda_pcie_pl_wake_in + u0_pcie_pl_wake_in + u0_pcie_pl_wake_in [0:0] read-write - u0_plda_pcie_pl_wake_oen - u0_plda_pcie_pl_wake_oen + u0_pcie_pl_wake_oen + u0_pcie_pl_wake_oen [1:1] read-only - u0_plda_pcie_rx_standby_0 - u0_plda_pcie_rx_standby_0 + u0_pcie_rx_standby_0 + u0_pcie_rx_standby_0 [2:2] read-only @@ -14469,8 +14469,8 @@ 0 - u0_plda_pcie_test_in_31_0 - u0_plda_pcie_test_in_31_0 + u0_pcie_test_in_31_0 + u0_pcie_test_in_31_0 [31:0] read-write @@ -14484,8 +14484,8 @@ 0 - u0_plda_pcie_test_in_63_32 - u0_plda_pcie_test_in_63_32 + u0_pcie_test_in_63_32 + u0_pcie_test_in_63_32 [31:0] read-write @@ -14499,8 +14499,8 @@ 0 - u0_plda_pcie_test_out_bridge_31_0 - u0_plda_pcie_test_out_bridge_31_0 + u0_pcie_test_out_bridge_31_0 + u0_pcie_test_out_bridge_31_0 [31:0] read-only @@ -14514,8 +14514,8 @@ 0 - u0_plda_pcie_test_out_bridge_63_32 - u0_plda_pcie_test_out_bridge_63_32 + u0_pcie_test_out_bridge_63_32 + u0_pcie_test_out_bridge_63_32 [31:0] read-only @@ -14529,8 +14529,8 @@ 0 - u0_plda_pcie_test_out_bridge_95_64 - u0_plda_pcie_test_out_bridge_95_64 + u0_pcie_test_out_bridge_95_64 + u0_pcie_test_out_bridge_95_64 [31:0] read-only @@ -14544,8 +14544,8 @@ 0 - u0_plda_pcie_test_out_bridge_127_96 - u0_plda_pcie_test_out_bridge_127_96 + u0_pcie_test_out_bridge_127_96 + u0_pcie_test_out_bridge_127_96 [31:0] read-only @@ -14559,8 +14559,8 @@ 0 - u0_plda_pcie_test_out_bridge_159_128 - u0_plda_pcie_test_out_bridge_159_128 + u0_pcie_test_out_bridge_159_128 + u0_pcie_test_out_bridge_159_128 [31:0] read-only @@ -14574,8 +14574,8 @@ 0 - u0_plda_pcie_test_out_bridge_191_160 - u0_plda_pcie_test_out_bridge_191_160 + u0_pcie_test_out_bridge_191_160 + u0_pcie_test_out_bridge_191_160 [31:0] read-only @@ -14589,8 +14589,8 @@ 0 - u0_plda_pcie_test_out_bridge_223_192 - u0_plda_pcie_test_out_bridge_223_192 + u0_pcie_test_out_bridge_223_192 + u0_pcie_test_out_bridge_223_192 [31:0] read-only @@ -14604,8 +14604,8 @@ 0 - u0_plda_pcie_test_out_bridge_255_224 - u0_plda_pcie_test_out_bridge_255_224 + u0_pcie_test_out_bridge_255_224 + u0_pcie_test_out_bridge_255_224 [31:0] read-only @@ -14619,8 +14619,8 @@ 0 - u0_plda_pcie_test_out_bridge_287_256 - u0_plda_pcie_test_out_bridge_287_256 + u0_pcie_test_out_bridge_287_256 + u0_pcie_test_out_bridge_287_256 [31:0] read-only @@ -14634,8 +14634,8 @@ 0 - u0_plda_pcie_test_out_bridge_319_288 - u0_plda_pcie_test_out_bridge_319_288 + u0_pcie_test_out_bridge_319_288 + u0_pcie_test_out_bridge_319_288 [31:0] read-only @@ -14649,8 +14649,8 @@ 0 - u0_plda_pcie_test_out_bridge_351_320 - u0_plda_pcie_test_out_bridge_351_320 + u0_pcie_test_out_bridge_351_320 + u0_pcie_test_out_bridge_351_320 [31:0] read-only @@ -14664,8 +14664,8 @@ 0 - u0_plda_pcie_test_out_bridge_383_352 - u0_plda_pcie_test_out_bridge_383_352 + u0_pcie_test_out_bridge_383_352 + u0_pcie_test_out_bridge_383_352 [31:0] read-only @@ -14679,8 +14679,8 @@ 0 - u0_plda_pcie_test_out_bridge_415_384 - u0_plda_pcie_test_out_bridge_415_384 + u0_pcie_test_out_bridge_415_384 + u0_pcie_test_out_bridge_415_384 [31:0] read-only @@ -14694,8 +14694,8 @@ 0 - u0_plda_pcie_test_out_bridge_447_416 - u0_plda_pcie_test_out_bridge_447_416 + u0_pcie_test_out_bridge_447_416 + u0_pcie_test_out_bridge_447_416 [31:0] read-only @@ -14709,8 +14709,8 @@ 0 - u0_plda_pcie_test_out_bridge_479_448 - u0_plda_pcie_test_out_bridge_479_448 + u0_pcie_test_out_bridge_479_448 + u0_pcie_test_out_bridge_479_448 [31:0] read-only @@ -14724,8 +14724,8 @@ 0 - u0_plda_pcie_test_out_bridge_511_480 - u0_plda_pcie_test_out_bridge_511_480 + u0_pcie_test_out_bridge_511_480 + u0_pcie_test_out_bridge_511_480 [31:0] read-only @@ -14739,8 +14739,8 @@ 0 - u0_plda_pcie_test_out_pcie_31_0 - u0_plda_pcie_test_out_pcie_31_0 + u0_pcie_test_out_pcie_31_0 + u0_pcie_test_out_pcie_31_0 [31:0] read-only @@ -14754,8 +14754,8 @@ 0 - u0_plda_pcie_test_out_pcie_63_32 - u0_plda_pcie_test_out_pcie_63_32 + u0_pcie_test_out_pcie_63_32 + u0_pcie_test_out_pcie_63_32 [31:0] read-only @@ -14769,8 +14769,8 @@ 0 - u0_plda_pcie_test_out_pcie_95_64 - u0_plda_pcie_test_out_pcie_95_64 + u0_pcie_test_out_pcie_95_64 + u0_pcie_test_out_pcie_95_64 [31:0] read-only @@ -14784,8 +14784,8 @@ 0 - u0_plda_pcie_test_out_pcie_127_96 - u0_plda_pcie_test_out_pcie_127_96 + u0_pcie_test_out_pcie_127_96 + u0_pcie_test_out_pcie_127_96 [31:0] read-only @@ -14799,8 +14799,8 @@ 0 - u0_plda_pcie_test_out_pcie_159_128 - u0_plda_pcie_test_out_pcie_159_128 + u0_pcie_test_out_pcie_159_128 + u0_pcie_test_out_pcie_159_128 [31:0] read-only @@ -14814,8 +14814,8 @@ 0 - u0_plda_pcie_test_out_pcie_191_160 - u0_plda_pcie_test_out_pcie_191_160 + u0_pcie_test_out_pcie_191_160 + u0_pcie_test_out_pcie_191_160 [31:0] read-only @@ -14829,8 +14829,8 @@ 0 - u0_plda_pcie_test_out_pcie_223_192 - u0_plda_pcie_test_out_pcie_223_192 + u0_pcie_test_out_pcie_223_192 + u0_pcie_test_out_pcie_223_192 [31:0] read-only @@ -14844,8 +14844,8 @@ 0 - u0_plda_pcie_test_out_pcie_255_224 - u0_plda_pcie_test_out_pcie_255_224 + u0_pcie_test_out_pcie_255_224 + u0_pcie_test_out_pcie_255_224 [31:0] read-only @@ -14859,8 +14859,8 @@ 0 - u0_plda_pcie_test_out_pcie_287_256 - u0_plda_pcie_test_out_pcie_287_256 + u0_pcie_test_out_pcie_287_256 + u0_pcie_test_out_pcie_287_256 [31:0] read-only @@ -14874,8 +14874,8 @@ 0 - u0_plda_pcie_test_out_pcie_319_288 - u0_plda_pcie_test_out_pcie_319_288 + u0_pcie_test_out_pcie_319_288 + u0_pcie_test_out_pcie_319_288 [31:0] read-only @@ -14889,8 +14889,8 @@ 0 - u0_plda_pcie_test_out_pcie_351_320 - u0_plda_pcie_test_out_pcie_351_320 + u0_pcie_test_out_pcie_351_320 + u0_pcie_test_out_pcie_351_320 [31:0] read-only @@ -14904,8 +14904,8 @@ 0 - u0_plda_pcie_test_out_pcie_383_352 - u0_plda_pcie_test_out_pcie_383_352 + u0_pcie_test_out_pcie_383_352 + u0_pcie_test_out_pcie_383_352 [31:0] read-only @@ -14919,8 +14919,8 @@ 0 - u0_plda_pcie_test_out_pcie_415_384 - u0_plda_pcie_test_out_pcie_415_384 + u0_pcie_test_out_pcie_415_384 + u0_pcie_test_out_pcie_415_384 [31:0] read-only @@ -14934,8 +14934,8 @@ 0 - u0_plda_pcie_test_out_pcie_447_416 - u0_plda_pcie_test_out_pcie_447_416 + u0_pcie_test_out_pcie_447_416 + u0_pcie_test_out_pcie_447_416 [31:0] read-only @@ -14949,8 +14949,8 @@ 0 - u0_plda_pcie_test_out_pcie_479_448 - u0_plda_pcie_test_out_pcie_479_448 + u0_pcie_test_out_pcie_479_448 + u0_pcie_test_out_pcie_479_448 [31:0] read-only @@ -14964,8 +14964,8 @@ 0 - u0_plda_pcie_test_out_pcie_511_480 - u0_plda_pcie_test_out_pcie_511_480 + u0_pcie_test_out_pcie_511_480 + u0_pcie_test_out_pcie_511_480 [31:0] read-only @@ -14979,14 +14979,14 @@ 0 - u0_plda_pcie_test_sel - u0_plda_pcie_test_sel + u0_pcie_test_sel + u0_pcie_test_sel [3:0] read-write - u0_plda_pcie_tl_clock_freq - u0_plda_pcie_tl_clock_freq + u0_pcie_tl_clock_freq + u0_pcie_tl_clock_freq [25:4] read-write @@ -15000,14 +15000,14 @@ 0 - u0_plda_pcie_tl_ctrl_hotplug - u0_plda_pcie_tl_ctrl_hotplug + u0_pcie_tl_ctrl_hotplug + u0_pcie_tl_ctrl_hotplug [15:0] read-only - u0_plda_pcie_tl_report_hotplug - u0_plda_pcie_tl_report_hotplug + u0_pcie_tl_report_hotplug + u0_pcie_tl_report_hotplug [31:16] read-write @@ -15021,50 +15021,50 @@ 0 - u0_plda_pcie_tx_pattern - u0_plda_pcie_tx_pattern + u0_pcie_tx_pattern + u0_pcie_tx_pattern [1:0] read-write - u0_plda_pcie_usb3_bus_width - u0_plda_pcie_usb3_bus_width + u0_pcie_usb3_bus_width + u0_pcie_usb3_bus_width [3:2] read-write - u0_plda_pcie_usb3_phy_enable - u0_plda_pcie_usb3_phy_enable + u0_pcie_usb3_phy_enable + u0_pcie_usb3_phy_enable [4:4] read-write - u0_plda_pcie_usb3_rate - u0_plda_pcie_usb3_rate + u0_pcie_usb3_rate + u0_pcie_usb3_rate [6:5] read-write - u0_plda_pcie_usb3_rx_standby - u0_plda_pcie_usb3_rx_standby + u0_pcie_usb3_rx_standby + u0_pcie_usb3_rx_standby [7:7] read-write - u0_plda_pcie_xwdecerr - u0_plda_pcie_xwdecerr + u0_pcie_xwdecerr + u0_pcie_xwdecerr [8:8] read-only - u0_plda_pcie_xwerrclr - u0_plda_pcie_xwerrclr + u0_pcie_xwerrclr + u0_pcie_xwerrclr [9:9] read-write - u0_plda_pcie_xwslverr - u0_plda_pcie_xwslverr + u0_pcie_xwslverr + u0_pcie_xwslverr [10:10] read-only @@ -15132,8 +15132,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_31_0 - u0_plda_pcie_axi4_mst0_aratomop_31_0 + u0_pcie_axi4_mst0_aratomop_31_0 + u0_pcie_axi4_mst0_aratomop_31_0 [31:0] read-only @@ -15147,8 +15147,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_63_32 - u0_plda_pcie_axi4_mst0_aratomop_63_32 + u0_pcie_axi4_mst0_aratomop_63_32 + u0_pcie_axi4_mst0_aratomop_63_32 [31:0] read-only @@ -15162,8 +15162,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_95_64 - u0_plda_pcie_axi4_mst0_aratomop_95_64 + u0_pcie_axi4_mst0_aratomop_95_64 + u0_pcie_axi4_mst0_aratomop_95_64 [31:0] read-only @@ -15177,8 +15177,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_127_96 - u0_plda_pcie_axi4_mst0_aratomop_127_96 + u0_pcie_axi4_mst0_aratomop_127_96 + u0_pcie_axi4_mst0_aratomop_127_96 [31:0] read-only @@ -15192,8 +15192,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_159_128 - u0_plda_pcie_axi4_mst0_aratomop_159_128 + u0_pcie_axi4_mst0_aratomop_159_128 + u0_pcie_axi4_mst0_aratomop_159_128 [31:0] read-only @@ -15207,8 +15207,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_191_160 - u0_plda_pcie_axi4_mst0_aratomop_191_160 + u0_pcie_axi4_mst0_aratomop_191_160 + u0_pcie_axi4_mst0_aratomop_191_160 [31:0] read-only @@ -15222,8 +15222,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_223_192 - u0_plda_pcie_axi4_mst0_aratomop_223_192 + u0_pcie_axi4_mst0_aratomop_223_192 + u0_pcie_axi4_mst0_aratomop_223_192 [31:0] read-only @@ -15237,8 +15237,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_255_224 - u0_plda_pcie_axi4_mst0_aratomop_255_224 + u0_pcie_axi4_mst0_aratomop_255_224 + u0_pcie_axi4_mst0_aratomop_255_224 [31:0] read-only @@ -15252,20 +15252,20 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_257_256 - u0_plda_pcie_axi4_mst0_aratomop_257_256 + u0_pcie_axi4_mst0_aratomop_257_256 + u0_pcie_axi4_mst0_aratomop_257_256 [1:0] read-only - u0_plda_pcie_axi4_mst0_arfunc - u0_plda_pcie_axi4_mst0_arfunc + u0_pcie_axi4_mst0_arfunc + u0_pcie_axi4_mst0_arfunc [16:2] read-only - u0_plda_pcie_axi4_mst0_arregion - u0_plda_pcie_axi4_mst0_arregion + u0_pcie_axi4_mst0_arregion + u0_pcie_axi4_mst0_arregion [20:17] read-only @@ -15279,8 +15279,8 @@ 0 - u1_plda_pcie_axi4_mst0_aruser_31_0 - u1_plda_pcie_axi4_mst0_aruser_31_0 + u1_pcie_axi4_mst0_aruser_31_0 + u1_pcie_axi4_mst0_aruser_31_0 [31:0] read-only @@ -15294,8 +15294,8 @@ 0 - u1_plda_pcie_axi4_mst0_aruser_52_32 - u1_plda_pcie_axi4_mst0_aruser_52_32 + u1_pcie_axi4_mst0_aruser_52_32 + u1_pcie_axi4_mst0_aruser_52_32 [20:0] read-only @@ -15309,14 +15309,14 @@ 0 - u1_plda_pcie_axi4_mst0_awfunc - u1_plda_pcie_axi4_mst0_awfunc + u1_pcie_axi4_mst0_awfunc + u1_pcie_axi4_mst0_awfunc [14:0] read-only - u1_plda_pcie_axi4_mst0_awregion - u1_plda_pcie_axi4_mst0_awregion + u1_pcie_axi4_mst0_awregion + u1_pcie_axi4_mst0_awregion [18:15] read-only @@ -15330,8 +15330,8 @@ 0 - u1_plda_pcie_axi4_mst0_awuser_31_0 - u1_plda_pcie_axi4_mst0_awuser_31_0 + u1_pcie_axi4_mst0_awuser_31_0 + u1_pcie_axi4_mst0_awuser_31_0 [31:0] read-only @@ -15345,14 +15345,14 @@ 0 - u1_plda_pcie_axi4_mst0_awuser_42_32 - u1_plda_pcie_axi4_mst0_awuser_42_32 + u1_pcie_axi4_mst0_awuser_42_32 + u1_pcie_axi4_mst0_awuser_42_32 [10:0] read-only - u1_plda_pcie_axi4_mst0_rderr - u1_plda_pcie_axi4_mst0_rderr + u1_pcie_axi4_mst0_rderr + u1_pcie_axi4_mst0_rderr [18:11] read-write @@ -15366,8 +15366,8 @@ 0 - u1_plda_pcie_axi4_mst0_ruser - u1_plda_pcie_axi4_mst0_ruser + u1_pcie_axi4_mst0_ruser + u1_pcie_axi4_mst0_ruser [31:0] read-write @@ -15381,8 +15381,8 @@ 0 - u1_plda_pcie_axi4_mst0_wderr - u1_plda_pcie_axi4_mst0_wderr + u1_pcie_axi4_mst0_wderr + u1_pcie_axi4_mst0_wderr [7:0] read-only @@ -15396,8 +15396,8 @@ 0 - u1_plda_pcie_axi4_slv0_aratomop_31_0 - u1_plda_pcie_axi4_slv0_aratomop_31_0 + u1_pcie_axi4_slv0_aratomop_31_0 + u1_pcie_axi4_slv0_aratomop_31_0 [31:0] read-write @@ -15411,8 +15411,8 @@ 0 - u1_plda_pcie_axi4_slv0_aratomop_63_32 - u1_plda_pcie_axi4_slv0_aratomop_63_32 + u1_pcie_axi4_slv0_aratomop_63_32 + u1_pcie_axi4_slv0_aratomop_63_32 [31:0] read-write @@ -15426,8 +15426,8 @@ 0 - u1_plda_pcie_axi4_slv0_aratomop_95_64 - u1_plda_pcie_axi4_slv0_aratomop_95_64 + u1_pcie_axi4_slv0_aratomop_95_64 + u1_pcie_axi4_slv0_aratomop_95_64 [31:0] read-write @@ -15441,8 +15441,8 @@ 0 - u1_plda_pcie_axi4_slv0_aratomop_127_96 - u1_plda_pcie_axi4_slv0_aratomop_127_96 + u1_pcie_axi4_slv0_aratomop_127_96 + u1_pcie_axi4_slv0_aratomop_127_96 [31:0] read-write @@ -15456,8 +15456,8 @@ 0 - u1_plda_pcie_axi4_slv0_aratomop_159_128 - u1_plda_pcie_axi4_slv0_aratomop_159_128 + u1_pcie_axi4_slv0_aratomop_159_128 + u1_pcie_axi4_slv0_aratomop_159_128 [31:0] read-write @@ -15471,8 +15471,8 @@ 0 - u1_plda_pcie_axi4_slv0_aratomop_191_160 - u1_plda_pcie_axi4_slv0_aratomop_191_160 + u1_pcie_axi4_slv0_aratomop_191_160 + u1_pcie_axi4_slv0_aratomop_191_160 [31:0] read-write @@ -15486,8 +15486,8 @@ 0 - u1_plda_pcie_axi4_slv0_aratomop_223_192 - u1_plda_pcie_axi4_slv0_aratomop_223_192 + u1_pcie_axi4_slv0_aratomop_223_192 + u1_pcie_axi4_slv0_aratomop_223_192 [31:0] read-write @@ -15501,8 +15501,8 @@ 0 - u1_plda_pcie_axi4_slv0_aratomop_255_224 - u1_plda_pcie_axi4_slv0_aratomop_255_224 + u1_pcie_axi4_slv0_aratomop_255_224 + u1_pcie_axi4_slv0_aratomop_255_224 [31:0] read-write @@ -15516,20 +15516,20 @@ 0 - u1_plda_pcie_axi4_mst0_aratomop_257_256 - u1_plda_pcie_axi4_mst0_aratomop_257_256 + u1_pcie_axi4_mst0_aratomop_257_256 + u1_pcie_axi4_mst0_aratomop_257_256 [1:0] read-write - u1_plda_pcie_axi4_slv0_arfunc - u1_plda_pcie_axi4_slv0_arfunc + u1_pcie_axi4_slv0_arfunc + u1_pcie_axi4_slv0_arfunc [16:2] read-write - u1_plda_pcie_axi4_slv0_arregion - u1_plda_pcie_axi4_slv0_arregion + u1_pcie_axi4_slv0_arregion + u1_pcie_axi4_slv0_arregion [20:17] read-write @@ -15543,8 +15543,8 @@ 0 - u1_plda_pcie_axi4_slv0_aruser_31_0 - u1_plda_pcie_axi4_slv0_aruser_31_0 + u1_pcie_axi4_slv0_aruser_31_0 + u1_pcie_axi4_slv0_aruser_31_0 [31:0] read-write @@ -15558,20 +15558,20 @@ 0 - u1_plda_pcie_axi4_slv0_aruser_40_32 - u1_plda_pcie_axi4_slv0_aruser_40_32 + u1_pcie_axi4_slv0_aruser_40_32 + u1_pcie_axi4_slv0_aruser_40_32 [8:0] read-write - u1_plda_pcie_axi4_slv0_awfunc - u1_plda_pcie_axi4_slv0_awfunc + u1_pcie_axi4_slv0_awfunc + u1_pcie_axi4_slv0_awfunc [23:9] read-write - u1_plda_pcie_axi4_slv0_awregion - u1_plda_pcie_axi4_slv0_awregion + u1_pcie_axi4_slv0_awregion + u1_pcie_axi4_slv0_awregion [27:24] read-write @@ -15585,8 +15585,8 @@ 0 - u1_plda_pcie_axi4_slv0_awuser_31_0 - u1_plda_pcie_axi4_slv0_awuser_31_0 + u1_pcie_axi4_slv0_awuser_31_0 + u1_pcie_axi4_slv0_awuser_31_0 [31:0] read-write @@ -15600,14 +15600,14 @@ 0 - u1_plda_pcie_axi4_slv0_awuser_40_32 - u1_plda_pcie_axi4_slv0_awuser_40_32 + u1_pcie_axi4_slv0_awuser_40_32 + u1_pcie_axi4_slv0_awuser_40_32 [8:0] read-write - u1_plda_pcie_axi4_slv0_rderr - u1_plda_pcie_axi4_slv0_rderr + u1_pcie_axi4_slv0_rderr + u1_pcie_axi4_slv0_rderr [16:9] read-only @@ -15621,8 +15621,8 @@ 0 - u1_plda_pcie_axi4_slv0_ruser - u1_plda_pcie_axi4_slv0_ruser + u1_pcie_axi4_slv0_ruser + u1_pcie_axi4_slv0_ruser [31:0] read-only @@ -15636,14 +15636,14 @@ 0 - u1_plda_pcie_axi4_slv0_wderr - u1_plda_pcie_axi4_slv0_wderr + u1_pcie_axi4_slv0_wderr + u1_pcie_axi4_slv0_wderr [7:0] read-write - u1_plda_pcie_axi4_slvl_arfunc - u1_plda_pcie_axi4_slvl_arfunc + u1_pcie_axi4_slvl_arfunc + u1_pcie_axi4_slvl_arfunc [22:8] read-write @@ -15657,38 +15657,38 @@ 0 - u1_plda_pcie_axi4_slvl_awfunc - u1_plda_pcie_axi4_slvl_awfunc + u1_pcie_axi4_slvl_awfunc + u1_pcie_axi4_slvl_awfunc [14:0] read-write - u1_plda_pcie_bus_width_o - u1_plda_pcie_bus_width_o + u1_pcie_bus_width_o + u1_pcie_bus_width_o [16:15] read-only - u1_plda_pcie_bypass_codec - u1_plda_pcie_bypass_codec + u1_pcie_bypass_codec + u1_pcie_bypass_codec [17:17] read-write - u1_plda_pcie_ckref_src - u1_plda_pcie_ckref_src + u1_pcie_ckref_src + u1_pcie_ckref_src [19:18] read-write - u1_plda_pcie_clk_sel - u1_plda_pcie_clk_sel + u1_pcie_clk_sel + u1_pcie_clk_sel [21:20] read-write - u1_plda_pcie_clkreq - u1_plda_pcie_clkreq + u1_pcie_clkreq + u1_pcie_clkreq [22:22] read-write @@ -16092,26 +16092,26 @@ 0 - u1_plda_pcie_k_phyparam_839_832 - u1_plda_pcie_k_phyparam_839_832 + u1_pcie_k_phyparam_839_832 + u1_pcie_k_phyparam_839_832 [7:0] read-write - u1_plda_pcie_k_rp_nep - u1_plda_pcie_k_rp_nep + u1_pcie_k_rp_nep + u1_pcie_k_rp_nep [8:8] read-write - u1_plda_pcie_l1sub_entack - u1_plda_pcie_l1sub_entack + u1_pcie_l1sub_entack + u1_pcie_l1sub_entack [9:9] read-only - u1_plda_pcie_l1sub_entreq - u1_plda_pcie_l1sub_entreq + u1_pcie_l1sub_entreq + u1_pcie_l1sub_entreq [10:10] read-write @@ -16125,8 +16125,8 @@ 0 - u1_plda_pcie_local_interrupt_in - u1_plda_pcie_local_interrupt_in + u1_pcie_local_interrupt_in + u1_pcie_local_interrupt_in [31:0] read-write @@ -16140,38 +16140,38 @@ 0 - u1_plda_pcie_mperstn - u1_plda_pcie_mperstn + u1_pcie_mperstn + u1_pcie_mperstn [0:0] read-write - u1_plda_pcie_pcie_ebuf_mode - u1_plda_pcie_pcie_ebuf_mode + u1_pcie_pcie_ebuf_mode + u1_pcie_pcie_ebuf_mode [1:1] read-write - u1_plda_pcie_pcie_phy_test_cfg - u1_plda_pcie_pcie_phy_test_cfg + u1_pcie_pcie_phy_test_cfg + u1_pcie_pcie_phy_test_cfg [24:2] read-write - u1_plda_pcie_pcie_rx_eq_training - u1_plda_pcie_pcie_rx_eq_training + u1_pcie_pcie_rx_eq_training + u1_pcie_pcie_rx_eq_training [25:25] read-write - u1_plda_pcie_pcie_rxterm_en - u1_plda_pcie_pcie_rxterm_en + u1_pcie_pcie_rxterm_en + u1_pcie_pcie_rxterm_en [26:26] read-write - u1_plda_pcie_pcie_tx_oneszeros - u1_plda_pcie_pcie_tx_oneszeros + u1_pcie_pcie_tx_oneszeros + u1_pcie_pcie_tx_oneszeros [27:27] read-write @@ -16185,8 +16185,8 @@ 0 - u1_plda_pcie_pf0_offset - u1_plda_pcie_pf0_offset + u1_pcie_pf0_offset + u1_pcie_pf0_offset [19:0] read-write @@ -16200,8 +16200,8 @@ 0 - u1_plda_pcie_pf1_offset - u1_plda_pcie_pf1_offset + u1_pcie_pf1_offset + u1_pcie_pf1_offset [19:0] read-write @@ -16215,8 +16215,8 @@ 0 - u1_plda_pcie_pf2_offset - u1_plda_pcie_pf2_offset + u1_pcie_pf2_offset + u1_pcie_pf2_offset [19:0] read-write @@ -16230,38 +16230,38 @@ 0 - u1_plda_pcie_pf3_offset - u1_plda_pcie_pf3_offset + u1_pcie_pf3_offset + u1_pcie_pf3_offset [19:0] read-write - u1_plda_pcie_phy_mode - u1_plda_pcie_phy_mode + u1_pcie_phy_mode + u1_pcie_phy_mode [21:20] read-write - u1_plda_pcie_pl_clkrem_allow - u1_plda_pcie_pl_clkrem_allow + u1_pcie_pl_clkrem_allow + u1_pcie_pl_clkrem_allow [22:22] read-write - u1_plda_pcie_pl_clkreq_oen - u1_plda_pcie_pl_clkreq_oen + u1_pcie_pl_clkreq_oen + u1_pcie_pl_clkreq_oen [23:23] read-only - u1_plda_pcie_pl_equ_phase - u1_plda_pcie_pl_equ_phase + u1_pcie_pl_equ_phase + u1_pcie_pl_equ_phase [25:24] read-only - u1_plda_pcie_pl_ltssm - u1_plda_pcie_pl_ltssm + u1_pcie_pl_ltssm + u1_pcie_pl_ltssm [30:26] read-only @@ -16275,8 +16275,8 @@ 0 - u1_plda_pcie_pl_pclk_rate - u1_plda_pcie_pl_pclk_rate + u1_pcie_pl_pclk_rate + u1_pcie_pl_pclk_rate [4:0] read-only @@ -16290,8 +16290,8 @@ 0 - u1_plda_pcie_pl_sideband_in_31_0 - u1_plda_pcie_pl_sideband_in_31_0 + u1_pcie_pl_sideband_in_31_0 + u1_pcie_pl_sideband_in_31_0 [31:0] read-write @@ -16305,8 +16305,8 @@ 0 - u1_plda_pcie_pl_sideband_in_63_32 - u1_plda_pcie_pl_sideband_in_63_32 + u1_pcie_pl_sideband_in_63_32 + u1_pcie_pl_sideband_in_63_32 [31:0] read-write @@ -16320,8 +16320,8 @@ 0 - u1_plda_pcie_pl_sideband_out_31_0 - u1_plda_pcie_pl_sideband_out_31_0 + u1_pcie_pl_sideband_out_31_0 + u1_pcie_pl_sideband_out_31_0 [31:0] read-write @@ -16335,8 +16335,8 @@ 0 - u1_plda_pcie_pl_sideband_out_63_32 - u1_plda_pcie_pl_sideband_out_63_32 + u1_pcie_pl_sideband_out_63_32 + u1_pcie_pl_sideband_out_63_32 [31:0] read-write @@ -16350,20 +16350,20 @@ 0 - u1_plda_pcie_pl_wake_in - u1_plda_pcie_pl_wake_in + u1_pcie_pl_wake_in + u1_pcie_pl_wake_in [0:0] read-write - u1_plda_pcie_pl_wake_oen - u1_plda_pcie_pl_wake_oen + u1_pcie_pl_wake_oen + u1_pcie_pl_wake_oen [1:1] read-only - u1_plda_pcie_rx_standby_o - u1_plda_pcie_rx_standby_o + u1_pcie_rx_standby_o + u1_pcie_rx_standby_o [2:2] read-only @@ -16377,8 +16377,8 @@ 0 - u1_plda_pcie_test_in_31_0 - u1_plda_pcie_test_in_31_0 + u1_pcie_test_in_31_0 + u1_pcie_test_in_31_0 [31:0] read-write @@ -16392,8 +16392,8 @@ 0 - u1_plda_pcie_test_in_63_32 - u1_plda_pcie_test_in_63_32 + u1_pcie_test_in_63_32 + u1_pcie_test_in_63_32 [31:0] read-write @@ -16407,8 +16407,8 @@ 0 - u1_plda_pcie_test_out_bridge_31_0 - u1_plda_pcie_test_out_bridge_31_0 + u1_pcie_test_out_bridge_31_0 + u1_pcie_test_out_bridge_31_0 [31:0] read-write @@ -16422,8 +16422,8 @@ 0 - u1_plda_pcie_test_out_bridge_63_32 - u1_plda_pcie_test_out_bridge_63_32 + u1_pcie_test_out_bridge_63_32 + u1_pcie_test_out_bridge_63_32 [31:0] read-write @@ -16437,8 +16437,8 @@ 0 - u1_plda_pcie_test_out_bridge_95_64 - u1_plda_pcie_test_out_bridge_95_64 + u1_pcie_test_out_bridge_95_64 + u1_pcie_test_out_bridge_95_64 [31:0] read-write @@ -16452,8 +16452,8 @@ 0 - u1_plda_pcie_test_out_bridge_127_96 - u1_plda_pcie_test_out_bridge_127_96 + u1_pcie_test_out_bridge_127_96 + u1_pcie_test_out_bridge_127_96 [31:0] read-write @@ -16467,8 +16467,8 @@ 0 - u1_plda_pcie_test_out_bridge_159_128 - u1_plda_pcie_test_out_bridge_159_128 + u1_pcie_test_out_bridge_159_128 + u1_pcie_test_out_bridge_159_128 [31:0] read-write @@ -16482,8 +16482,8 @@ 0 - u1_plda_pcie_test_out_bridge_191_160 - u1_plda_pcie_test_out_bridge_191_160 + u1_pcie_test_out_bridge_191_160 + u1_pcie_test_out_bridge_191_160 [31:0] read-write @@ -16497,8 +16497,8 @@ 0 - u1_plda_pcie_test_out_bridge_223_192 - u1_plda_pcie_test_out_bridge_223_192 + u1_pcie_test_out_bridge_223_192 + u1_pcie_test_out_bridge_223_192 [31:0] read-write @@ -16512,8 +16512,8 @@ 0 - u1_plda_pcie_test_out_bridge_255_224 - u1_plda_pcie_test_out_bridge_255_224 + u1_pcie_test_out_bridge_255_224 + u1_pcie_test_out_bridge_255_224 [31:0] read-write @@ -16527,8 +16527,8 @@ 0 - u1_plda_pcie_test_out_bridge_287_256 - u1_plda_pcie_test_out_bridge_287_256 + u1_pcie_test_out_bridge_287_256 + u1_pcie_test_out_bridge_287_256 [31:0] read-write @@ -16542,8 +16542,8 @@ 0 - u1_plda_pcie_test_out_bridge_319_288 - u1_plda_pcie_test_out_bridge_319_288 + u1_pcie_test_out_bridge_319_288 + u1_pcie_test_out_bridge_319_288 [31:0] read-write @@ -16557,8 +16557,8 @@ 0 - u1_plda_pcie_test_out_bridge_351_320 - u1_plda_pcie_test_out_bridge_351_320 + u1_pcie_test_out_bridge_351_320 + u1_pcie_test_out_bridge_351_320 [31:0] read-write @@ -16572,8 +16572,8 @@ 0 - u1_plda_pcie_test_out_bridge_383_352 - u1_plda_pcie_test_out_bridge_383_352 + u1_pcie_test_out_bridge_383_352 + u1_pcie_test_out_bridge_383_352 [31:0] read-write @@ -16587,8 +16587,8 @@ 0 - u1_plda_pcie_test_out_bridge_415_384 - u1_plda_pcie_test_out_bridge_415_384 + u1_pcie_test_out_bridge_415_384 + u1_pcie_test_out_bridge_415_384 [31:0] read-write @@ -16602,8 +16602,8 @@ 0 - u1_plda_pcie_test_out_bridge_447_416 - u1_plda_pcie_test_out_bridge_447_416 + u1_pcie_test_out_bridge_447_416 + u1_pcie_test_out_bridge_447_416 [31:0] read-write @@ -16617,8 +16617,8 @@ 0 - u1_plda_pcie_test_out_bridge_479_448 - u1_plda_pcie_test_out_bridge_479_448 + u1_pcie_test_out_bridge_479_448 + u1_pcie_test_out_bridge_479_448 [31:0] read-write @@ -16632,8 +16632,8 @@ 0 - u1_plda_pcie_test_out_bridge_511_480 - u1_plda_pcie_test_out_bridge_511_480 + u1_pcie_test_out_bridge_511_480 + u1_pcie_test_out_bridge_511_480 [31:0] read-write @@ -16647,8 +16647,8 @@ 0 - u1_plda_pcie_test_out_pcie_31_0 - u1_plda_pcie_test_out_pcie_31_0 + u1_pcie_test_out_pcie_31_0 + u1_pcie_test_out_pcie_31_0 [31:0] read-only @@ -16662,8 +16662,8 @@ 0 - u1_plda_pcie_test_out_pcie_63_32 - u1_plda_pcie_test_out_pcie_63_32 + u1_pcie_test_out_pcie_63_32 + u1_pcie_test_out_pcie_63_32 [31:0] read-only @@ -16677,8 +16677,8 @@ 0 - u1_plda_pcie_test_out_pcie_95_64 - u1_plda_pcie_test_out_pcie_95_64 + u1_pcie_test_out_pcie_95_64 + u1_pcie_test_out_pcie_95_64 [31:0] read-only @@ -16692,8 +16692,8 @@ 0 - u1_plda_pcie_test_out_pcie_127_96 - u1_plda_pcie_test_out_pcie_127_96 + u1_pcie_test_out_pcie_127_96 + u1_pcie_test_out_pcie_127_96 [31:0] read-only @@ -16707,8 +16707,8 @@ 0 - u1_plda_pcie_test_out_pcie_159_128 - u1_plda_pcie_test_out_pcie_159_128 + u1_pcie_test_out_pcie_159_128 + u1_pcie_test_out_pcie_159_128 [31:0] read-only @@ -16722,8 +16722,8 @@ 0 - u1_plda_pcie_test_out_pcie_191_160 - u1_plda_pcie_test_out_pcie_191_160 + u1_pcie_test_out_pcie_191_160 + u1_pcie_test_out_pcie_191_160 [31:0] read-only @@ -16737,8 +16737,8 @@ 0 - u1_plda_pcie_test_out_pcie_223_192 - u1_plda_pcie_test_out_pcie_223_192 + u1_pcie_test_out_pcie_223_192 + u1_pcie_test_out_pcie_223_192 [31:0] read-only @@ -16752,8 +16752,8 @@ 0 - u1_plda_pcie_test_out_pcie_255_224 - u1_plda_pcie_test_out_pcie_255_224 + u1_pcie_test_out_pcie_255_224 + u1_pcie_test_out_pcie_255_224 [31:0] read-only @@ -16767,8 +16767,8 @@ 0 - u1_plda_pcie_test_out_pcie_287_256 - u1_plda_pcie_test_out_pcie_287_256 + u1_pcie_test_out_pcie_287_256 + u1_pcie_test_out_pcie_287_256 [31:0] read-only @@ -16782,8 +16782,8 @@ 0 - u1_plda_pcie_test_out_pcie_319_288 - u1_plda_pcie_test_out_pcie_319_288 + u1_pcie_test_out_pcie_319_288 + u1_pcie_test_out_pcie_319_288 [31:0] read-only @@ -16797,8 +16797,8 @@ 0 - u1_plda_pcie_test_out_pcie_351_320 - u1_plda_pcie_test_out_pcie_351_320 + u1_pcie_test_out_pcie_351_320 + u1_pcie_test_out_pcie_351_320 [31:0] read-only @@ -16812,8 +16812,8 @@ 0 - u1_plda_pcie_test_out_pcie_383_352 - u1_plda_pcie_test_out_pcie_383_352 + u1_pcie_test_out_pcie_383_352 + u1_pcie_test_out_pcie_383_352 [31:0] read-only @@ -16827,8 +16827,8 @@ 0 - u1_plda_pcie_test_out_pcie_415_384 - u1_plda_pcie_test_out_pcie_415_384 + u1_pcie_test_out_pcie_415_384 + u1_pcie_test_out_pcie_415_384 [31:0] read-only @@ -16842,8 +16842,8 @@ 0 - u1_plda_pcie_test_out_pcie_447_416 - u1_plda_pcie_test_out_pcie_447_416 + u1_pcie_test_out_pcie_447_416 + u1_pcie_test_out_pcie_447_416 [31:0] read-only @@ -16857,8 +16857,8 @@ 0 - u1_plda_pcie_test_out_pcie_479_448 - u1_plda_pcie_test_out_pcie_479_448 + u1_pcie_test_out_pcie_479_448 + u1_pcie_test_out_pcie_479_448 [31:0] read-only @@ -16872,8 +16872,8 @@ 0 - u1_plda_pcie_test_out_pcie_511_480 - u1_plda_pcie_test_out_pcie_511_480 + u1_pcie_test_out_pcie_511_480 + u1_pcie_test_out_pcie_511_480 [31:0] read-only @@ -16887,14 +16887,14 @@ 0 - u1_plda_pcie_test_sel - u1_plda_pcie_test_sel + u1_pcie_test_sel + u1_pcie_test_sel [3:0] read-write - u1_plda_pcie_tl_clock_freq - u1_plda_pcie_tl_clock_freq + u1_pcie_tl_clock_freq + u1_pcie_tl_clock_freq [25:4] read-write @@ -16908,14 +16908,14 @@ 0 - u1_plda_pcie_tl_ctrl_hotplug - u1_plda_pcie_tl_ctrl_hotplug + u1_pcie_tl_ctrl_hotplug + u1_pcie_tl_ctrl_hotplug [15:0] read-only - u1_plda_pcie_tl_report_hotplug - u1_plda_pcie_tl_report_hotplug + u1_pcie_tl_report_hotplug + u1_pcie_tl_report_hotplug [31:16] read-write @@ -16929,50 +16929,50 @@ 0 - u1_plda_pcie_tx_pattern - u1_plda_pcie_tx_pattern + u1_pcie_tx_pattern + u1_pcie_tx_pattern [1:0] read-write - u1_plda_pcie_usb3_bus_width - u1_plda_pcie_usb3_bus_width + u1_pcie_usb3_bus_width + u1_pcie_usb3_bus_width [3:2] read-write - u1_plda_pcie_usb3_phy_enable - u1_plda_pcie_usb3_phy_enable + u1_pcie_usb3_phy_enable + u1_pcie_usb3_phy_enable [4:4] read-write - u1_plda_pcie_usb3_rate - u1_plda_pcie_usb3_rate + u1_pcie_usb3_rate + u1_pcie_usb3_rate [6:5] read-write - u1_plda_pcie_usb3_rx_standby - u1_plda_pcie_usb3_rx_standby + u1_pcie_usb3_rx_standby + u1_pcie_usb3_rx_standby [7:7] read-write - u1_plda_pcie_xwdecerr - u1_plda_pcie_xwdecerr + u1_pcie_xwdecerr + u1_pcie_xwdecerr [8:8] read-only - u1_plda_pcie_xwerrclr - u1_plda_pcie_xwerrclr + u1_pcie_xwerrclr + u1_pcie_xwerrclr [9:9] read-write - u1_plda_pcie_xwslverr - u1_plda_pcie_xwslverr + u1_pcie_xwslverr + u1_pcie_xwslverr [10:10] read-only diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_0.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_0.rs index bc34db9..1a0c72e 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_0.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_0.rs @@ -10,68 +10,68 @@ pub type SCFG_HPROT_SD_0_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; pub type SCFG_HPROT_SD_1_R = crate::FieldReader; #[doc = "Field `scfg_hprot_sd_1` writer - scfg_hprot_sd_1"] pub type SCFG_HPROT_SD_1_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `u0_cdn_usb_adp_en` reader - u0_cdn_usb_adp_en"] -pub type U0_CDN_USB_ADP_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_adp_probe_ana` reader - u0_cdn_usb_adp_probe_ana"] -pub type U0_CDN_USB_ADP_PROBE_ANA_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_adp_probe_ana` writer - u0_cdn_usb_adp_probe_ana"] -pub type U0_CDN_USB_ADP_PROBE_ANA_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_adp_probe_en` reader - u0_cdn_usb_adp_probe_en"] -pub type U0_CDN_USB_ADP_PROBE_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_adp_sense_ana` reader - u0_cdn_usb_adp_sense_ana"] -pub type U0_CDN_USB_ADP_SENSE_ANA_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_adp_sense_ana` writer - u0_cdn_usb_adp_sense_ana"] -pub type U0_CDN_USB_ADP_SENSE_ANA_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_adp_sense_en` reader - u0_cdn_usb_adp_sense_en"] -pub type U0_CDN_USB_ADP_SENSE_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_adp_sink_current_en` reader - u0_cdn_usb_adp_sink_current_en"] -pub type U0_CDN_USB_ADP_SINK_CURRENT_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_adp_source_current_en` reader - u0_cdn_usb_adp_source_current_en"] -pub type U0_CDN_USB_ADP_SOURCE_CURRENT_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_bc_en` reader - u0_cdn_usb_bc_en"] -pub type U0_CDN_USB_BC_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_chrg_vbus` reader - u0_cdn_usb_chrg_vbus"] -pub type U0_CDN_USB_CHRG_VBUS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_chrg_vbus` writer - u0_cdn_usb_chrg_vbus"] -pub type U0_CDN_USB_CHRG_VBUS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_dcd_comp_sts` reader - u0_cdn_usb_dcd_comp_sts"] -pub type U0_CDN_USB_DCD_COMP_STS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_dcd_comp_sts` writer - u0_cdn_usb_dcd_comp_sts"] -pub type U0_CDN_USB_DCD_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_dischrg_vbus` reader - u0_cdn_usb_dischrg_vbus"] -pub type U0_CDN_USB_DISCHRG_VBUS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_dischrg_vbus` writer - u0_cdn_usb_dischrg_vbus"] -pub type U0_CDN_USB_DISCHRG_VBUS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_dm_vdat_ref_comp_en` reader - u0_cdn_usb_dm_vdat_ref_comp_en"] -pub type U0_CDN_USB_DM_VDAT_REF_COMP_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_dm_vdat_ref_comp_sts` reader - u0_cdn_usb_dm_vdat_ref_comp_sts"] -pub type U0_CDN_USB_DM_VDAT_REF_COMP_STS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_dm_vdat_ref_comp_sts` writer - u0_cdn_usb_dm_vdat_ref_comp_sts"] -pub type U0_CDN_USB_DM_VDAT_REF_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_dm_vlgc_comp_en` reader - u0_cdn_usb_dm_vlgc_comp_en"] -pub type U0_CDN_USB_DM_VLGC_COMP_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_dm_vlgc_comp_sts` reader - u0_cdn_usb_dm_vlgc_comp_sts"] -pub type U0_CDN_USB_DM_VLGC_COMP_STS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_dm_vlgc_comp_sts` writer - u0_cdn_usb_dm_vlgc_comp_sts"] -pub type U0_CDN_USB_DM_VLGC_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_dp_vdat_ref_comp_en` reader - u0_cdn_usb_dp_vdat_ref_comp_en"] -pub type U0_CDN_USB_DP_VDAT_REF_COMP_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_dp_vdat_ref_comp_sts` reader - u0_cdn_usb_dp_vdat_ref_comp_sts"] -pub type U0_CDN_USB_DP_VDAT_REF_COMP_STS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_dp_vdat_ref_comp_sts` writer - u0_cdn_usb_dp_vdat_ref_comp_sts"] -pub type U0_CDN_USB_DP_VDAT_REF_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_host_system_err` reader - u0_cdn_usb_host_system_err"] -pub type U0_CDN_USB_HOST_SYSTEM_ERR_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_host_system_err` writer - u0_cdn_usb_host_system_err"] -pub type U0_CDN_USB_HOST_SYSTEM_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_hsystem_err_ext` reader - u0_cdn_usb_hsystem_err_ext"] -pub type U0_CDN_USB_HSYSTEM_ERR_EXT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_idm_sink_en` reader - u0_cdn_usb_idm_sink_en"] -pub type U0_CDN_USB_IDM_SINK_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_idp_sink_en` reader - u0_cdn_usb_idp_sink_en"] -pub type U0_CDN_USB_IDP_SINK_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_idp_src_en` reader - u0_cdn_usb_idp_src_en"] -pub type U0_CDN_USB_IDP_SRC_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_adp_en` reader - u0_usb_adp_en"] +pub type U0_USB_ADP_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_adp_probe_ana` reader - u0_usb_adp_probe_ana"] +pub type U0_USB_ADP_PROBE_ANA_R = crate::BitReader; +#[doc = "Field `u0_usb_adp_probe_ana` writer - u0_usb_adp_probe_ana"] +pub type U0_USB_ADP_PROBE_ANA_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_adp_probe_en` reader - u0_usb_adp_probe_en"] +pub type U0_USB_ADP_PROBE_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_adp_sense_ana` reader - u0_usb_adp_sense_ana"] +pub type U0_USB_ADP_SENSE_ANA_R = crate::BitReader; +#[doc = "Field `u0_usb_adp_sense_ana` writer - u0_usb_adp_sense_ana"] +pub type U0_USB_ADP_SENSE_ANA_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_adp_sense_en` reader - u0_usb_adp_sense_en"] +pub type U0_USB_ADP_SENSE_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_adp_sink_current_en` reader - u0_usb_adp_sink_current_en"] +pub type U0_USB_ADP_SINK_CURRENT_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_adp_source_current_en` reader - u0_usb_adp_source_current_en"] +pub type U0_USB_ADP_SOURCE_CURRENT_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_bc_en` reader - u0_usb_bc_en"] +pub type U0_USB_BC_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_chrg_vbus` reader - u0_usb_chrg_vbus"] +pub type U0_USB_CHRG_VBUS_R = crate::BitReader; +#[doc = "Field `u0_usb_chrg_vbus` writer - u0_usb_chrg_vbus"] +pub type U0_USB_CHRG_VBUS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_dcd_comp_sts` reader - u0_usb_dcd_comp_sts"] +pub type U0_USB_DCD_COMP_STS_R = crate::BitReader; +#[doc = "Field `u0_usb_dcd_comp_sts` writer - u0_usb_dcd_comp_sts"] +pub type U0_USB_DCD_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_dischrg_vbus` reader - u0_usb_dischrg_vbus"] +pub type U0_USB_DISCHRG_VBUS_R = crate::BitReader; +#[doc = "Field `u0_usb_dischrg_vbus` writer - u0_usb_dischrg_vbus"] +pub type U0_USB_DISCHRG_VBUS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_dm_vdat_ref_comp_en` reader - u0_usb_dm_vdat_ref_comp_en"] +pub type U0_USB_DM_VDAT_REF_COMP_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_dm_vdat_ref_comp_sts` reader - u0_usb_dm_vdat_ref_comp_sts"] +pub type U0_USB_DM_VDAT_REF_COMP_STS_R = crate::BitReader; +#[doc = "Field `u0_usb_dm_vdat_ref_comp_sts` writer - u0_usb_dm_vdat_ref_comp_sts"] +pub type U0_USB_DM_VDAT_REF_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_dm_vlgc_comp_en` reader - u0_usb_dm_vlgc_comp_en"] +pub type U0_USB_DM_VLGC_COMP_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_dm_vlgc_comp_sts` reader - u0_usb_dm_vlgc_comp_sts"] +pub type U0_USB_DM_VLGC_COMP_STS_R = crate::BitReader; +#[doc = "Field `u0_usb_dm_vlgc_comp_sts` writer - u0_usb_dm_vlgc_comp_sts"] +pub type U0_USB_DM_VLGC_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_dp_vdat_ref_comp_en` reader - u0_usb_dp_vdat_ref_comp_en"] +pub type U0_USB_DP_VDAT_REF_COMP_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_dp_vdat_ref_comp_sts` reader - u0_usb_dp_vdat_ref_comp_sts"] +pub type U0_USB_DP_VDAT_REF_COMP_STS_R = crate::BitReader; +#[doc = "Field `u0_usb_dp_vdat_ref_comp_sts` writer - u0_usb_dp_vdat_ref_comp_sts"] +pub type U0_USB_DP_VDAT_REF_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_host_system_err` reader - u0_usb_host_system_err"] +pub type U0_USB_HOST_SYSTEM_ERR_R = crate::BitReader; +#[doc = "Field `u0_usb_host_system_err` writer - u0_usb_host_system_err"] +pub type U0_USB_HOST_SYSTEM_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_hsystem_err_ext` reader - u0_usb_hsystem_err_ext"] +pub type U0_USB_HSYSTEM_ERR_EXT_R = crate::BitReader; +#[doc = "Field `u0_usb_idm_sink_en` reader - u0_usb_idm_sink_en"] +pub type U0_USB_IDM_SINK_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_idp_sink_en` reader - u0_usb_idp_sink_en"] +pub type U0_USB_IDP_SINK_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_idp_src_en` reader - u0_usb_idp_src_en"] +pub type U0_USB_IDP_SRC_EN_R = crate::BitReader; impl R { #[doc = "Bits 0:3 - scfg_hprot_sd_0"] #[inline(always)] @@ -83,115 +83,115 @@ impl R { pub fn scfg_hprot_sd_1(&self) -> SCFG_HPROT_SD_1_R { SCFG_HPROT_SD_1_R::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bit 8 - u0_cdn_usb_adp_en"] + #[doc = "Bit 8 - u0_usb_adp_en"] #[inline(always)] - pub fn u0_cdn_usb_adp_en(&self) -> U0_CDN_USB_ADP_EN_R { - U0_CDN_USB_ADP_EN_R::new(((self.bits >> 8) & 1) != 0) + pub fn u0_usb_adp_en(&self) -> U0_USB_ADP_EN_R { + U0_USB_ADP_EN_R::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 9 - u0_cdn_usb_adp_probe_ana"] + #[doc = "Bit 9 - u0_usb_adp_probe_ana"] #[inline(always)] - pub fn u0_cdn_usb_adp_probe_ana(&self) -> U0_CDN_USB_ADP_PROBE_ANA_R { - U0_CDN_USB_ADP_PROBE_ANA_R::new(((self.bits >> 9) & 1) != 0) + pub fn u0_usb_adp_probe_ana(&self) -> U0_USB_ADP_PROBE_ANA_R { + U0_USB_ADP_PROBE_ANA_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 10 - u0_cdn_usb_adp_probe_en"] + #[doc = "Bit 10 - u0_usb_adp_probe_en"] #[inline(always)] - pub fn u0_cdn_usb_adp_probe_en(&self) -> U0_CDN_USB_ADP_PROBE_EN_R { - U0_CDN_USB_ADP_PROBE_EN_R::new(((self.bits >> 10) & 1) != 0) + pub fn u0_usb_adp_probe_en(&self) -> U0_USB_ADP_PROBE_EN_R { + U0_USB_ADP_PROBE_EN_R::new(((self.bits >> 10) & 1) != 0) } - #[doc = "Bit 11 - u0_cdn_usb_adp_sense_ana"] + #[doc = "Bit 11 - u0_usb_adp_sense_ana"] #[inline(always)] - pub fn u0_cdn_usb_adp_sense_ana(&self) -> U0_CDN_USB_ADP_SENSE_ANA_R { - U0_CDN_USB_ADP_SENSE_ANA_R::new(((self.bits >> 11) & 1) != 0) + pub fn u0_usb_adp_sense_ana(&self) -> U0_USB_ADP_SENSE_ANA_R { + U0_USB_ADP_SENSE_ANA_R::new(((self.bits >> 11) & 1) != 0) } - #[doc = "Bit 12 - u0_cdn_usb_adp_sense_en"] + #[doc = "Bit 12 - u0_usb_adp_sense_en"] #[inline(always)] - pub fn u0_cdn_usb_adp_sense_en(&self) -> U0_CDN_USB_ADP_SENSE_EN_R { - U0_CDN_USB_ADP_SENSE_EN_R::new(((self.bits >> 12) & 1) != 0) + pub fn u0_usb_adp_sense_en(&self) -> U0_USB_ADP_SENSE_EN_R { + U0_USB_ADP_SENSE_EN_R::new(((self.bits >> 12) & 1) != 0) } - #[doc = "Bit 13 - u0_cdn_usb_adp_sink_current_en"] + #[doc = "Bit 13 - u0_usb_adp_sink_current_en"] #[inline(always)] - pub fn u0_cdn_usb_adp_sink_current_en(&self) -> U0_CDN_USB_ADP_SINK_CURRENT_EN_R { - U0_CDN_USB_ADP_SINK_CURRENT_EN_R::new(((self.bits >> 13) & 1) != 0) + pub fn u0_usb_adp_sink_current_en(&self) -> U0_USB_ADP_SINK_CURRENT_EN_R { + U0_USB_ADP_SINK_CURRENT_EN_R::new(((self.bits >> 13) & 1) != 0) } - #[doc = "Bit 14 - u0_cdn_usb_adp_source_current_en"] + #[doc = "Bit 14 - u0_usb_adp_source_current_en"] #[inline(always)] - pub fn u0_cdn_usb_adp_source_current_en(&self) -> U0_CDN_USB_ADP_SOURCE_CURRENT_EN_R { - U0_CDN_USB_ADP_SOURCE_CURRENT_EN_R::new(((self.bits >> 14) & 1) != 0) + pub fn u0_usb_adp_source_current_en(&self) -> U0_USB_ADP_SOURCE_CURRENT_EN_R { + U0_USB_ADP_SOURCE_CURRENT_EN_R::new(((self.bits >> 14) & 1) != 0) } - #[doc = "Bit 15 - u0_cdn_usb_bc_en"] + #[doc = "Bit 15 - u0_usb_bc_en"] #[inline(always)] - pub fn u0_cdn_usb_bc_en(&self) -> U0_CDN_USB_BC_EN_R { - U0_CDN_USB_BC_EN_R::new(((self.bits >> 15) & 1) != 0) + pub fn u0_usb_bc_en(&self) -> U0_USB_BC_EN_R { + U0_USB_BC_EN_R::new(((self.bits >> 15) & 1) != 0) } - #[doc = "Bit 16 - u0_cdn_usb_chrg_vbus"] + #[doc = "Bit 16 - u0_usb_chrg_vbus"] #[inline(always)] - pub fn u0_cdn_usb_chrg_vbus(&self) -> U0_CDN_USB_CHRG_VBUS_R { - U0_CDN_USB_CHRG_VBUS_R::new(((self.bits >> 16) & 1) != 0) + pub fn u0_usb_chrg_vbus(&self) -> U0_USB_CHRG_VBUS_R { + U0_USB_CHRG_VBUS_R::new(((self.bits >> 16) & 1) != 0) } - #[doc = "Bit 17 - u0_cdn_usb_dcd_comp_sts"] + #[doc = "Bit 17 - u0_usb_dcd_comp_sts"] #[inline(always)] - pub fn u0_cdn_usb_dcd_comp_sts(&self) -> U0_CDN_USB_DCD_COMP_STS_R { - U0_CDN_USB_DCD_COMP_STS_R::new(((self.bits >> 17) & 1) != 0) + pub fn u0_usb_dcd_comp_sts(&self) -> U0_USB_DCD_COMP_STS_R { + U0_USB_DCD_COMP_STS_R::new(((self.bits >> 17) & 1) != 0) } - #[doc = "Bit 18 - u0_cdn_usb_dischrg_vbus"] + #[doc = "Bit 18 - u0_usb_dischrg_vbus"] #[inline(always)] - pub fn u0_cdn_usb_dischrg_vbus(&self) -> U0_CDN_USB_DISCHRG_VBUS_R { - U0_CDN_USB_DISCHRG_VBUS_R::new(((self.bits >> 18) & 1) != 0) + pub fn u0_usb_dischrg_vbus(&self) -> U0_USB_DISCHRG_VBUS_R { + U0_USB_DISCHRG_VBUS_R::new(((self.bits >> 18) & 1) != 0) } - #[doc = "Bit 19 - u0_cdn_usb_dm_vdat_ref_comp_en"] + #[doc = "Bit 19 - u0_usb_dm_vdat_ref_comp_en"] #[inline(always)] - pub fn u0_cdn_usb_dm_vdat_ref_comp_en(&self) -> U0_CDN_USB_DM_VDAT_REF_COMP_EN_R { - U0_CDN_USB_DM_VDAT_REF_COMP_EN_R::new(((self.bits >> 19) & 1) != 0) + pub fn u0_usb_dm_vdat_ref_comp_en(&self) -> U0_USB_DM_VDAT_REF_COMP_EN_R { + U0_USB_DM_VDAT_REF_COMP_EN_R::new(((self.bits >> 19) & 1) != 0) } - #[doc = "Bit 20 - u0_cdn_usb_dm_vdat_ref_comp_sts"] + #[doc = "Bit 20 - u0_usb_dm_vdat_ref_comp_sts"] #[inline(always)] - pub fn u0_cdn_usb_dm_vdat_ref_comp_sts(&self) -> U0_CDN_USB_DM_VDAT_REF_COMP_STS_R { - U0_CDN_USB_DM_VDAT_REF_COMP_STS_R::new(((self.bits >> 20) & 1) != 0) + pub fn u0_usb_dm_vdat_ref_comp_sts(&self) -> U0_USB_DM_VDAT_REF_COMP_STS_R { + U0_USB_DM_VDAT_REF_COMP_STS_R::new(((self.bits >> 20) & 1) != 0) } - #[doc = "Bit 21 - u0_cdn_usb_dm_vlgc_comp_en"] + #[doc = "Bit 21 - u0_usb_dm_vlgc_comp_en"] #[inline(always)] - pub fn u0_cdn_usb_dm_vlgc_comp_en(&self) -> U0_CDN_USB_DM_VLGC_COMP_EN_R { - U0_CDN_USB_DM_VLGC_COMP_EN_R::new(((self.bits >> 21) & 1) != 0) + pub fn u0_usb_dm_vlgc_comp_en(&self) -> U0_USB_DM_VLGC_COMP_EN_R { + U0_USB_DM_VLGC_COMP_EN_R::new(((self.bits >> 21) & 1) != 0) } - #[doc = "Bit 22 - u0_cdn_usb_dm_vlgc_comp_sts"] + #[doc = "Bit 22 - u0_usb_dm_vlgc_comp_sts"] #[inline(always)] - pub fn u0_cdn_usb_dm_vlgc_comp_sts(&self) -> U0_CDN_USB_DM_VLGC_COMP_STS_R { - U0_CDN_USB_DM_VLGC_COMP_STS_R::new(((self.bits >> 22) & 1) != 0) + pub fn u0_usb_dm_vlgc_comp_sts(&self) -> U0_USB_DM_VLGC_COMP_STS_R { + U0_USB_DM_VLGC_COMP_STS_R::new(((self.bits >> 22) & 1) != 0) } - #[doc = "Bit 23 - u0_cdn_usb_dp_vdat_ref_comp_en"] + #[doc = "Bit 23 - u0_usb_dp_vdat_ref_comp_en"] #[inline(always)] - pub fn u0_cdn_usb_dp_vdat_ref_comp_en(&self) -> U0_CDN_USB_DP_VDAT_REF_COMP_EN_R { - U0_CDN_USB_DP_VDAT_REF_COMP_EN_R::new(((self.bits >> 23) & 1) != 0) + pub fn u0_usb_dp_vdat_ref_comp_en(&self) -> U0_USB_DP_VDAT_REF_COMP_EN_R { + U0_USB_DP_VDAT_REF_COMP_EN_R::new(((self.bits >> 23) & 1) != 0) } - #[doc = "Bit 24 - u0_cdn_usb_dp_vdat_ref_comp_sts"] + #[doc = "Bit 24 - u0_usb_dp_vdat_ref_comp_sts"] #[inline(always)] - pub fn u0_cdn_usb_dp_vdat_ref_comp_sts(&self) -> U0_CDN_USB_DP_VDAT_REF_COMP_STS_R { - U0_CDN_USB_DP_VDAT_REF_COMP_STS_R::new(((self.bits >> 24) & 1) != 0) + pub fn u0_usb_dp_vdat_ref_comp_sts(&self) -> U0_USB_DP_VDAT_REF_COMP_STS_R { + U0_USB_DP_VDAT_REF_COMP_STS_R::new(((self.bits >> 24) & 1) != 0) } - #[doc = "Bit 25 - u0_cdn_usb_host_system_err"] + #[doc = "Bit 25 - u0_usb_host_system_err"] #[inline(always)] - pub fn u0_cdn_usb_host_system_err(&self) -> U0_CDN_USB_HOST_SYSTEM_ERR_R { - U0_CDN_USB_HOST_SYSTEM_ERR_R::new(((self.bits >> 25) & 1) != 0) + pub fn u0_usb_host_system_err(&self) -> U0_USB_HOST_SYSTEM_ERR_R { + U0_USB_HOST_SYSTEM_ERR_R::new(((self.bits >> 25) & 1) != 0) } - #[doc = "Bit 26 - u0_cdn_usb_hsystem_err_ext"] + #[doc = "Bit 26 - u0_usb_hsystem_err_ext"] #[inline(always)] - pub fn u0_cdn_usb_hsystem_err_ext(&self) -> U0_CDN_USB_HSYSTEM_ERR_EXT_R { - U0_CDN_USB_HSYSTEM_ERR_EXT_R::new(((self.bits >> 26) & 1) != 0) + pub fn u0_usb_hsystem_err_ext(&self) -> U0_USB_HSYSTEM_ERR_EXT_R { + U0_USB_HSYSTEM_ERR_EXT_R::new(((self.bits >> 26) & 1) != 0) } - #[doc = "Bit 27 - u0_cdn_usb_idm_sink_en"] + #[doc = "Bit 27 - u0_usb_idm_sink_en"] #[inline(always)] - pub fn u0_cdn_usb_idm_sink_en(&self) -> U0_CDN_USB_IDM_SINK_EN_R { - U0_CDN_USB_IDM_SINK_EN_R::new(((self.bits >> 27) & 1) != 0) + pub fn u0_usb_idm_sink_en(&self) -> U0_USB_IDM_SINK_EN_R { + U0_USB_IDM_SINK_EN_R::new(((self.bits >> 27) & 1) != 0) } - #[doc = "Bit 28 - u0_cdn_usb_idp_sink_en"] + #[doc = "Bit 28 - u0_usb_idp_sink_en"] #[inline(always)] - pub fn u0_cdn_usb_idp_sink_en(&self) -> U0_CDN_USB_IDP_SINK_EN_R { - U0_CDN_USB_IDP_SINK_EN_R::new(((self.bits >> 28) & 1) != 0) + pub fn u0_usb_idp_sink_en(&self) -> U0_USB_IDP_SINK_EN_R { + U0_USB_IDP_SINK_EN_R::new(((self.bits >> 28) & 1) != 0) } - #[doc = "Bit 29 - u0_cdn_usb_idp_src_en"] + #[doc = "Bit 29 - u0_usb_idp_src_en"] #[inline(always)] - pub fn u0_cdn_usb_idp_src_en(&self) -> U0_CDN_USB_IDP_SRC_EN_R { - U0_CDN_USB_IDP_SRC_EN_R::new(((self.bits >> 29) & 1) != 0) + pub fn u0_usb_idp_src_en(&self) -> U0_USB_IDP_SRC_EN_R { + U0_USB_IDP_SRC_EN_R::new(((self.bits >> 29) & 1) != 0) } } impl W { @@ -207,67 +207,63 @@ impl W { pub fn scfg_hprot_sd_1(&mut self) -> SCFG_HPROT_SD_1_W { SCFG_HPROT_SD_1_W::new(self, 4) } - #[doc = "Bit 9 - u0_cdn_usb_adp_probe_ana"] + #[doc = "Bit 9 - u0_usb_adp_probe_ana"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_adp_probe_ana(&mut self) -> U0_CDN_USB_ADP_PROBE_ANA_W { - U0_CDN_USB_ADP_PROBE_ANA_W::new(self, 9) + pub fn u0_usb_adp_probe_ana(&mut self) -> U0_USB_ADP_PROBE_ANA_W { + U0_USB_ADP_PROBE_ANA_W::new(self, 9) } - #[doc = "Bit 11 - u0_cdn_usb_adp_sense_ana"] + #[doc = "Bit 11 - u0_usb_adp_sense_ana"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_adp_sense_ana(&mut self) -> U0_CDN_USB_ADP_SENSE_ANA_W { - U0_CDN_USB_ADP_SENSE_ANA_W::new(self, 11) + pub fn u0_usb_adp_sense_ana(&mut self) -> U0_USB_ADP_SENSE_ANA_W { + U0_USB_ADP_SENSE_ANA_W::new(self, 11) } - #[doc = "Bit 16 - u0_cdn_usb_chrg_vbus"] + #[doc = "Bit 16 - u0_usb_chrg_vbus"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_chrg_vbus(&mut self) -> U0_CDN_USB_CHRG_VBUS_W { - U0_CDN_USB_CHRG_VBUS_W::new(self, 16) + pub fn u0_usb_chrg_vbus(&mut self) -> U0_USB_CHRG_VBUS_W { + U0_USB_CHRG_VBUS_W::new(self, 16) } - #[doc = "Bit 17 - u0_cdn_usb_dcd_comp_sts"] + #[doc = "Bit 17 - u0_usb_dcd_comp_sts"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_dcd_comp_sts(&mut self) -> U0_CDN_USB_DCD_COMP_STS_W { - U0_CDN_USB_DCD_COMP_STS_W::new(self, 17) + pub fn u0_usb_dcd_comp_sts(&mut self) -> U0_USB_DCD_COMP_STS_W { + U0_USB_DCD_COMP_STS_W::new(self, 17) } - #[doc = "Bit 18 - u0_cdn_usb_dischrg_vbus"] + #[doc = "Bit 18 - u0_usb_dischrg_vbus"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_dischrg_vbus(&mut self) -> U0_CDN_USB_DISCHRG_VBUS_W { - U0_CDN_USB_DISCHRG_VBUS_W::new(self, 18) + pub fn u0_usb_dischrg_vbus(&mut self) -> U0_USB_DISCHRG_VBUS_W { + U0_USB_DISCHRG_VBUS_W::new(self, 18) } - #[doc = "Bit 20 - u0_cdn_usb_dm_vdat_ref_comp_sts"] + #[doc = "Bit 20 - u0_usb_dm_vdat_ref_comp_sts"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_dm_vdat_ref_comp_sts( + pub fn u0_usb_dm_vdat_ref_comp_sts( &mut self, - ) -> U0_CDN_USB_DM_VDAT_REF_COMP_STS_W { - U0_CDN_USB_DM_VDAT_REF_COMP_STS_W::new(self, 20) + ) -> U0_USB_DM_VDAT_REF_COMP_STS_W { + U0_USB_DM_VDAT_REF_COMP_STS_W::new(self, 20) } - #[doc = "Bit 22 - u0_cdn_usb_dm_vlgc_comp_sts"] + #[doc = "Bit 22 - u0_usb_dm_vlgc_comp_sts"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_dm_vlgc_comp_sts( - &mut self, - ) -> U0_CDN_USB_DM_VLGC_COMP_STS_W { - U0_CDN_USB_DM_VLGC_COMP_STS_W::new(self, 22) + pub fn u0_usb_dm_vlgc_comp_sts(&mut self) -> U0_USB_DM_VLGC_COMP_STS_W { + U0_USB_DM_VLGC_COMP_STS_W::new(self, 22) } - #[doc = "Bit 24 - u0_cdn_usb_dp_vdat_ref_comp_sts"] + #[doc = "Bit 24 - u0_usb_dp_vdat_ref_comp_sts"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_dp_vdat_ref_comp_sts( + pub fn u0_usb_dp_vdat_ref_comp_sts( &mut self, - ) -> U0_CDN_USB_DP_VDAT_REF_COMP_STS_W { - U0_CDN_USB_DP_VDAT_REF_COMP_STS_W::new(self, 24) + ) -> U0_USB_DP_VDAT_REF_COMP_STS_W { + U0_USB_DP_VDAT_REF_COMP_STS_W::new(self, 24) } - #[doc = "Bit 25 - u0_cdn_usb_host_system_err"] + #[doc = "Bit 25 - u0_usb_host_system_err"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_host_system_err( - &mut self, - ) -> U0_CDN_USB_HOST_SYSTEM_ERR_W { - U0_CDN_USB_HOST_SYSTEM_ERR_W::new(self, 25) + pub fn u0_usb_host_system_err(&mut self) -> U0_USB_HOST_SYSTEM_ERR_W { + U0_USB_HOST_SYSTEM_ERR_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_1.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_1.rs index eead8a9..5d0d21f 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_1.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_1.rs @@ -2,42 +2,42 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_1` writer"] pub type W = crate::W; -#[doc = "Field `u0_cdn_usb_lowest_belt` reader - LTM interface to software"] -pub type U0_CDN_USB_LOWEST_BELT_R = crate::FieldReader; -#[doc = "Field `u0_cdn_usb_ltm_host_req` reader - LTM interface to software"] -pub type U0_CDN_USB_LTM_HOST_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_ltm_host_req_halt` reader - LTM interface to software"] -pub type U0_CDN_USB_LTM_HOST_REQ_HALT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_ltm_host_req_halt` writer - LTM interface to software"] -pub type U0_CDN_USB_LTM_HOST_REQ_HALT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_mdctrl_clk_sel` reader - u0_cdn_usb_mdctrl_clk_sel"] -pub type U0_CDN_USB_MDCTRL_CLK_SEL_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_mdctrl_clk_sel` writer - u0_cdn_usb_mdctrl_clk_sel"] -pub type U0_CDN_USB_MDCTRL_CLK_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_mdctrl_clk_status` reader - u0_cdn_usb_mdctrl_clk_status"] -pub type U0_CDN_USB_MDCTRL_CLK_STATUS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_mode_strap` reader - Can onlly be changed when pwrup_rst_n is low"] -pub type U0_CDN_USB_MODE_STRAP_R = crate::FieldReader; -#[doc = "Field `u0_cdn_usb_mode_strap` writer - Can onlly be changed when pwrup_rst_n is low"] -pub type U0_CDN_USB_MODE_STRAP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `u0_cdn_usb_otg_suspendm` reader - u0_cdn_usb_otg_suspendm"] -pub type U0_CDN_USB_OTG_SUSPENDM_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_otg_suspendm` writer - u0_cdn_usb_otg_suspendm"] -pub type U0_CDN_USB_OTG_SUSPENDM_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_otg_suspendm_byps` reader - u0_cdn_usb_otg_suspendm_byps"] -pub type U0_CDN_USB_OTG_SUSPENDM_BYPS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_otg_suspendm_byps` writer - u0_cdn_usb_otg_suspendm_byps"] -pub type U0_CDN_USB_OTG_SUSPENDM_BYPS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_phy_bvalid` reader - u0_cdn_usb_phy_bvalid"] -pub type U0_CDN_USB_PHY_BVALID_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_pll_en` reader - u0_cdn_usb_pll_en"] -pub type U0_CDN_USB_PLL_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_pll_en` writer - u0_cdn_usb_pll_en"] -pub type U0_CDN_USB_PLL_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_refclk_mode` reader - u0_cdn_usb_refclk_mode"] -pub type U0_CDN_USB_REFCLK_MODE_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_refclk_mode` writer - u0_cdn_usb_refclk_mode"] -pub type U0_CDN_USB_REFCLK_MODE_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_lowest_belt` reader - LTM interface to software"] +pub type U0_USB_LOWEST_BELT_R = crate::FieldReader; +#[doc = "Field `u0_usb_ltm_host_req` reader - LTM interface to software"] +pub type U0_USB_LTM_HOST_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_ltm_host_req_halt` reader - LTM interface to software"] +pub type U0_USB_LTM_HOST_REQ_HALT_R = crate::BitReader; +#[doc = "Field `u0_usb_ltm_host_req_halt` writer - LTM interface to software"] +pub type U0_USB_LTM_HOST_REQ_HALT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_mdctrl_clk_sel` reader - u0_usb_mdctrl_clk_sel"] +pub type U0_USB_MDCTRL_CLK_SEL_R = crate::BitReader; +#[doc = "Field `u0_usb_mdctrl_clk_sel` writer - u0_usb_mdctrl_clk_sel"] +pub type U0_USB_MDCTRL_CLK_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_mdctrl_clk_status` reader - u0_usb_mdctrl_clk_status"] +pub type U0_USB_MDCTRL_CLK_STATUS_R = crate::BitReader; +#[doc = "Field `u0_usb_mode_strap` reader - Can onlly be changed when pwrup_rst_n is low"] +pub type U0_USB_MODE_STRAP_R = crate::FieldReader; +#[doc = "Field `u0_usb_mode_strap` writer - Can onlly be changed when pwrup_rst_n is low"] +pub type U0_USB_MODE_STRAP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +#[doc = "Field `u0_usb_otg_suspendm` reader - u0_usb_otg_suspendm"] +pub type U0_USB_OTG_SUSPENDM_R = crate::BitReader; +#[doc = "Field `u0_usb_otg_suspendm` writer - u0_usb_otg_suspendm"] +pub type U0_USB_OTG_SUSPENDM_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_otg_suspendm_byps` reader - u0_usb_otg_suspendm_byps"] +pub type U0_USB_OTG_SUSPENDM_BYPS_R = crate::BitReader; +#[doc = "Field `u0_usb_otg_suspendm_byps` writer - u0_usb_otg_suspendm_byps"] +pub type U0_USB_OTG_SUSPENDM_BYPS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_phy_bvalid` reader - u0_usb_phy_bvalid"] +pub type U0_USB_PHY_BVALID_R = crate::BitReader; +#[doc = "Field `u0_usb_pll_en` reader - u0_usb_pll_en"] +pub type U0_USB_PLL_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_pll_en` writer - u0_usb_pll_en"] +pub type U0_USB_PLL_EN_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_refclk_mode` reader - u0_usb_refclk_mode"] +pub type U0_USB_REFCLK_MODE_R = crate::BitReader; +#[doc = "Field `u0_usb_refclk_mode` writer - u0_usb_refclk_mode"] +pub type U0_USB_REFCLK_MODE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `u0_cdn_usb_rid_comp_sts_0` reader - u0_cdn_usb_rid_comp_sts_0"] pub type U0_CDN_USB_RID_COMP_STS_0_R = crate::BitReader; #[doc = "Field `u0_cdn_usb_rid_comp_sts_0` writer - u0_cdn_usb_rid_comp_sts_0"] @@ -50,75 +50,75 @@ pub type U0_CDN_USB_RID_COMP_STS_1_W<'a, REG> = crate::BitWriter<'a, REG>; pub type U0_CDN_USB_RID_COMP_STS_2_R = crate::BitReader; #[doc = "Field `u0_cdn_usb_rid_comp_sts_2` writer - u0_cdn_usb_rid_comp_sts_2"] pub type U0_CDN_USB_RID_COMP_STS_2_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_rid_float_comp_en` reader - u0_cdn_usb_rid_float_comp_en"] -pub type U0_CDN_USB_RID_FLOAT_COMP_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_rid_float_comp_sts` reader - u0_cdn_usb_rid_float_comp_sts"] -pub type U0_CDN_USB_RID_FLOAT_COMP_STS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_rid_float_comp_sts` writer - u0_cdn_usb_rid_float_comp_sts"] -pub type U0_CDN_USB_RID_FLOAT_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_rid_gnd_comp_sts` reader - u0_cdn_usb_rid_gnd_comp_sts"] -pub type U0_CDN_USB_RID_GND_COMP_STS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_rid_gnd_comp_sts` writer - u0_cdn_usb_rid_gnd_comp_sts"] -pub type U0_CDN_USB_RID_GND_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_rid_nonfloat_comp_en` reader - u0_cdn_usb_rid_nonfloat_comp_en"] -pub type U0_CDN_USB_RID_NONFLOAT_COMP_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_rx_dm` reader - u0_cdn_usb_rx_dm"] -pub type U0_CDN_USB_RX_DM_R = crate::BitReader; +#[doc = "Field `u0_usb_rid_float_comp_en` reader - u0_usb_rid_float_comp_en"] +pub type U0_USB_RID_FLOAT_COMP_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_rid_float_comp_sts` reader - u0_usb_rid_float_comp_sts"] +pub type U0_USB_RID_FLOAT_COMP_STS_R = crate::BitReader; +#[doc = "Field `u0_usb_rid_float_comp_sts` writer - u0_usb_rid_float_comp_sts"] +pub type U0_USB_RID_FLOAT_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_rid_gnd_comp_sts` reader - u0_usb_rid_gnd_comp_sts"] +pub type U0_USB_RID_GND_COMP_STS_R = crate::BitReader; +#[doc = "Field `u0_usb_rid_gnd_comp_sts` writer - u0_usb_rid_gnd_comp_sts"] +pub type U0_USB_RID_GND_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_rid_nonfloat_comp_en` reader - u0_usb_rid_nonfloat_comp_en"] +pub type U0_USB_RID_NONFLOAT_COMP_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_rx_dm` reader - u0_usb_rx_dm"] +pub type U0_USB_RX_DM_R = crate::BitReader; impl R { #[doc = "Bits 0:11 - LTM interface to software"] #[inline(always)] - pub fn u0_cdn_usb_lowest_belt(&self) -> U0_CDN_USB_LOWEST_BELT_R { - U0_CDN_USB_LOWEST_BELT_R::new((self.bits & 0x0fff) as u16) + pub fn u0_usb_lowest_belt(&self) -> U0_USB_LOWEST_BELT_R { + U0_USB_LOWEST_BELT_R::new((self.bits & 0x0fff) as u16) } #[doc = "Bit 12 - LTM interface to software"] #[inline(always)] - pub fn u0_cdn_usb_ltm_host_req(&self) -> U0_CDN_USB_LTM_HOST_REQ_R { - U0_CDN_USB_LTM_HOST_REQ_R::new(((self.bits >> 12) & 1) != 0) + pub fn u0_usb_ltm_host_req(&self) -> U0_USB_LTM_HOST_REQ_R { + U0_USB_LTM_HOST_REQ_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - LTM interface to software"] #[inline(always)] - pub fn u0_cdn_usb_ltm_host_req_halt(&self) -> U0_CDN_USB_LTM_HOST_REQ_HALT_R { - U0_CDN_USB_LTM_HOST_REQ_HALT_R::new(((self.bits >> 13) & 1) != 0) + pub fn u0_usb_ltm_host_req_halt(&self) -> U0_USB_LTM_HOST_REQ_HALT_R { + U0_USB_LTM_HOST_REQ_HALT_R::new(((self.bits >> 13) & 1) != 0) } - #[doc = "Bit 14 - u0_cdn_usb_mdctrl_clk_sel"] + #[doc = "Bit 14 - u0_usb_mdctrl_clk_sel"] #[inline(always)] - pub fn u0_cdn_usb_mdctrl_clk_sel(&self) -> U0_CDN_USB_MDCTRL_CLK_SEL_R { - U0_CDN_USB_MDCTRL_CLK_SEL_R::new(((self.bits >> 14) & 1) != 0) + pub fn u0_usb_mdctrl_clk_sel(&self) -> U0_USB_MDCTRL_CLK_SEL_R { + U0_USB_MDCTRL_CLK_SEL_R::new(((self.bits >> 14) & 1) != 0) } - #[doc = "Bit 15 - u0_cdn_usb_mdctrl_clk_status"] + #[doc = "Bit 15 - u0_usb_mdctrl_clk_status"] #[inline(always)] - pub fn u0_cdn_usb_mdctrl_clk_status(&self) -> U0_CDN_USB_MDCTRL_CLK_STATUS_R { - U0_CDN_USB_MDCTRL_CLK_STATUS_R::new(((self.bits >> 15) & 1) != 0) + pub fn u0_usb_mdctrl_clk_status(&self) -> U0_USB_MDCTRL_CLK_STATUS_R { + U0_USB_MDCTRL_CLK_STATUS_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:18 - Can onlly be changed when pwrup_rst_n is low"] #[inline(always)] - pub fn u0_cdn_usb_mode_strap(&self) -> U0_CDN_USB_MODE_STRAP_R { - U0_CDN_USB_MODE_STRAP_R::new(((self.bits >> 16) & 7) as u8) + pub fn u0_usb_mode_strap(&self) -> U0_USB_MODE_STRAP_R { + U0_USB_MODE_STRAP_R::new(((self.bits >> 16) & 7) as u8) } - #[doc = "Bit 19 - u0_cdn_usb_otg_suspendm"] + #[doc = "Bit 19 - u0_usb_otg_suspendm"] #[inline(always)] - pub fn u0_cdn_usb_otg_suspendm(&self) -> U0_CDN_USB_OTG_SUSPENDM_R { - U0_CDN_USB_OTG_SUSPENDM_R::new(((self.bits >> 19) & 1) != 0) + pub fn u0_usb_otg_suspendm(&self) -> U0_USB_OTG_SUSPENDM_R { + U0_USB_OTG_SUSPENDM_R::new(((self.bits >> 19) & 1) != 0) } - #[doc = "Bit 20 - u0_cdn_usb_otg_suspendm_byps"] + #[doc = "Bit 20 - u0_usb_otg_suspendm_byps"] #[inline(always)] - pub fn u0_cdn_usb_otg_suspendm_byps(&self) -> U0_CDN_USB_OTG_SUSPENDM_BYPS_R { - U0_CDN_USB_OTG_SUSPENDM_BYPS_R::new(((self.bits >> 20) & 1) != 0) + pub fn u0_usb_otg_suspendm_byps(&self) -> U0_USB_OTG_SUSPENDM_BYPS_R { + U0_USB_OTG_SUSPENDM_BYPS_R::new(((self.bits >> 20) & 1) != 0) } - #[doc = "Bit 21 - u0_cdn_usb_phy_bvalid"] + #[doc = "Bit 21 - u0_usb_phy_bvalid"] #[inline(always)] - pub fn u0_cdn_usb_phy_bvalid(&self) -> U0_CDN_USB_PHY_BVALID_R { - U0_CDN_USB_PHY_BVALID_R::new(((self.bits >> 21) & 1) != 0) + pub fn u0_usb_phy_bvalid(&self) -> U0_USB_PHY_BVALID_R { + U0_USB_PHY_BVALID_R::new(((self.bits >> 21) & 1) != 0) } - #[doc = "Bit 22 - u0_cdn_usb_pll_en"] + #[doc = "Bit 22 - u0_usb_pll_en"] #[inline(always)] - pub fn u0_cdn_usb_pll_en(&self) -> U0_CDN_USB_PLL_EN_R { - U0_CDN_USB_PLL_EN_R::new(((self.bits >> 22) & 1) != 0) + pub fn u0_usb_pll_en(&self) -> U0_USB_PLL_EN_R { + U0_USB_PLL_EN_R::new(((self.bits >> 22) & 1) != 0) } - #[doc = "Bit 23 - u0_cdn_usb_refclk_mode"] + #[doc = "Bit 23 - u0_usb_refclk_mode"] #[inline(always)] - pub fn u0_cdn_usb_refclk_mode(&self) -> U0_CDN_USB_REFCLK_MODE_R { - U0_CDN_USB_REFCLK_MODE_R::new(((self.bits >> 23) & 1) != 0) + pub fn u0_usb_refclk_mode(&self) -> U0_USB_REFCLK_MODE_R { + U0_USB_REFCLK_MODE_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - u0_cdn_usb_rid_comp_sts_0"] #[inline(always)] @@ -135,78 +135,74 @@ impl R { pub fn u0_cdn_usb_rid_comp_sts_2(&self) -> U0_CDN_USB_RID_COMP_STS_2_R { U0_CDN_USB_RID_COMP_STS_2_R::new(((self.bits >> 26) & 1) != 0) } - #[doc = "Bit 27 - u0_cdn_usb_rid_float_comp_en"] + #[doc = "Bit 27 - u0_usb_rid_float_comp_en"] #[inline(always)] - pub fn u0_cdn_usb_rid_float_comp_en(&self) -> U0_CDN_USB_RID_FLOAT_COMP_EN_R { - U0_CDN_USB_RID_FLOAT_COMP_EN_R::new(((self.bits >> 27) & 1) != 0) + pub fn u0_usb_rid_float_comp_en(&self) -> U0_USB_RID_FLOAT_COMP_EN_R { + U0_USB_RID_FLOAT_COMP_EN_R::new(((self.bits >> 27) & 1) != 0) } - #[doc = "Bit 28 - u0_cdn_usb_rid_float_comp_sts"] + #[doc = "Bit 28 - u0_usb_rid_float_comp_sts"] #[inline(always)] - pub fn u0_cdn_usb_rid_float_comp_sts(&self) -> U0_CDN_USB_RID_FLOAT_COMP_STS_R { - U0_CDN_USB_RID_FLOAT_COMP_STS_R::new(((self.bits >> 28) & 1) != 0) + pub fn u0_usb_rid_float_comp_sts(&self) -> U0_USB_RID_FLOAT_COMP_STS_R { + U0_USB_RID_FLOAT_COMP_STS_R::new(((self.bits >> 28) & 1) != 0) } - #[doc = "Bit 29 - u0_cdn_usb_rid_gnd_comp_sts"] + #[doc = "Bit 29 - u0_usb_rid_gnd_comp_sts"] #[inline(always)] - pub fn u0_cdn_usb_rid_gnd_comp_sts(&self) -> U0_CDN_USB_RID_GND_COMP_STS_R { - U0_CDN_USB_RID_GND_COMP_STS_R::new(((self.bits >> 29) & 1) != 0) + pub fn u0_usb_rid_gnd_comp_sts(&self) -> U0_USB_RID_GND_COMP_STS_R { + U0_USB_RID_GND_COMP_STS_R::new(((self.bits >> 29) & 1) != 0) } - #[doc = "Bit 30 - u0_cdn_usb_rid_nonfloat_comp_en"] + #[doc = "Bit 30 - u0_usb_rid_nonfloat_comp_en"] #[inline(always)] - pub fn u0_cdn_usb_rid_nonfloat_comp_en(&self) -> U0_CDN_USB_RID_NONFLOAT_COMP_EN_R { - U0_CDN_USB_RID_NONFLOAT_COMP_EN_R::new(((self.bits >> 30) & 1) != 0) + pub fn u0_usb_rid_nonfloat_comp_en(&self) -> U0_USB_RID_NONFLOAT_COMP_EN_R { + U0_USB_RID_NONFLOAT_COMP_EN_R::new(((self.bits >> 30) & 1) != 0) } - #[doc = "Bit 31 - u0_cdn_usb_rx_dm"] + #[doc = "Bit 31 - u0_usb_rx_dm"] #[inline(always)] - pub fn u0_cdn_usb_rx_dm(&self) -> U0_CDN_USB_RX_DM_R { - U0_CDN_USB_RX_DM_R::new(((self.bits >> 31) & 1) != 0) + pub fn u0_usb_rx_dm(&self) -> U0_USB_RX_DM_R { + U0_USB_RX_DM_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 13 - LTM interface to software"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_ltm_host_req_halt( - &mut self, - ) -> U0_CDN_USB_LTM_HOST_REQ_HALT_W { - U0_CDN_USB_LTM_HOST_REQ_HALT_W::new(self, 13) + pub fn u0_usb_ltm_host_req_halt(&mut self) -> U0_USB_LTM_HOST_REQ_HALT_W { + U0_USB_LTM_HOST_REQ_HALT_W::new(self, 13) } - #[doc = "Bit 14 - u0_cdn_usb_mdctrl_clk_sel"] + #[doc = "Bit 14 - u0_usb_mdctrl_clk_sel"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_mdctrl_clk_sel(&mut self) -> U0_CDN_USB_MDCTRL_CLK_SEL_W { - U0_CDN_USB_MDCTRL_CLK_SEL_W::new(self, 14) + pub fn u0_usb_mdctrl_clk_sel(&mut self) -> U0_USB_MDCTRL_CLK_SEL_W { + U0_USB_MDCTRL_CLK_SEL_W::new(self, 14) } #[doc = "Bits 16:18 - Can onlly be changed when pwrup_rst_n is low"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_mode_strap(&mut self) -> U0_CDN_USB_MODE_STRAP_W { - U0_CDN_USB_MODE_STRAP_W::new(self, 16) + pub fn u0_usb_mode_strap(&mut self) -> U0_USB_MODE_STRAP_W { + U0_USB_MODE_STRAP_W::new(self, 16) } - #[doc = "Bit 19 - u0_cdn_usb_otg_suspendm"] + #[doc = "Bit 19 - u0_usb_otg_suspendm"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_otg_suspendm(&mut self) -> U0_CDN_USB_OTG_SUSPENDM_W { - U0_CDN_USB_OTG_SUSPENDM_W::new(self, 19) + pub fn u0_usb_otg_suspendm(&mut self) -> U0_USB_OTG_SUSPENDM_W { + U0_USB_OTG_SUSPENDM_W::new(self, 19) } - #[doc = "Bit 20 - u0_cdn_usb_otg_suspendm_byps"] + #[doc = "Bit 20 - u0_usb_otg_suspendm_byps"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_otg_suspendm_byps( - &mut self, - ) -> U0_CDN_USB_OTG_SUSPENDM_BYPS_W { - U0_CDN_USB_OTG_SUSPENDM_BYPS_W::new(self, 20) + pub fn u0_usb_otg_suspendm_byps(&mut self) -> U0_USB_OTG_SUSPENDM_BYPS_W { + U0_USB_OTG_SUSPENDM_BYPS_W::new(self, 20) } - #[doc = "Bit 22 - u0_cdn_usb_pll_en"] + #[doc = "Bit 22 - u0_usb_pll_en"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_pll_en(&mut self) -> U0_CDN_USB_PLL_EN_W { - U0_CDN_USB_PLL_EN_W::new(self, 22) + pub fn u0_usb_pll_en(&mut self) -> U0_USB_PLL_EN_W { + U0_USB_PLL_EN_W::new(self, 22) } - #[doc = "Bit 23 - u0_cdn_usb_refclk_mode"] + #[doc = "Bit 23 - u0_usb_refclk_mode"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_refclk_mode(&mut self) -> U0_CDN_USB_REFCLK_MODE_W { - U0_CDN_USB_REFCLK_MODE_W::new(self, 23) + pub fn u0_usb_refclk_mode(&mut self) -> U0_USB_REFCLK_MODE_W { + U0_USB_REFCLK_MODE_W::new(self, 23) } #[doc = "Bit 24 - u0_cdn_usb_rid_comp_sts_0"] #[inline(always)] @@ -226,21 +222,17 @@ impl W { pub fn u0_cdn_usb_rid_comp_sts_2(&mut self) -> U0_CDN_USB_RID_COMP_STS_2_W { U0_CDN_USB_RID_COMP_STS_2_W::new(self, 26) } - #[doc = "Bit 28 - u0_cdn_usb_rid_float_comp_sts"] + #[doc = "Bit 28 - u0_usb_rid_float_comp_sts"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_rid_float_comp_sts( - &mut self, - ) -> U0_CDN_USB_RID_FLOAT_COMP_STS_W { - U0_CDN_USB_RID_FLOAT_COMP_STS_W::new(self, 28) + pub fn u0_usb_rid_float_comp_sts(&mut self) -> U0_USB_RID_FLOAT_COMP_STS_W { + U0_USB_RID_FLOAT_COMP_STS_W::new(self, 28) } - #[doc = "Bit 29 - u0_cdn_usb_rid_gnd_comp_sts"] + #[doc = "Bit 29 - u0_usb_rid_gnd_comp_sts"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_rid_gnd_comp_sts( - &mut self, - ) -> U0_CDN_USB_RID_GND_COMP_STS_W { - U0_CDN_USB_RID_GND_COMP_STS_W::new(self, 29) + pub fn u0_usb_rid_gnd_comp_sts(&mut self) -> U0_USB_RID_GND_COMP_STS_W { + U0_USB_RID_GND_COMP_STS_W::new(self, 29) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_10.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_10.rs index 210f606..dba8255 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_10.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_10.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_10` writer"] pub type W = crate::W; -#[doc = "Field `u0_e2_sft7110_wfi_from_tile_0` reader - u0_e2_sft7110_wfi_from_tile_0"] -pub type U0_E2_SFT7110_WFI_FROM_TILE_0_R = crate::BitReader; +#[doc = "Field `u0_e2_wfi_from_tile_0` reader - u0_e2_wfi_from_tile_0"] +pub type U0_E2_WFI_FROM_TILE_0_R = crate::BitReader; impl R { - #[doc = "Bit 0 - u0_e2_sft7110_wfi_from_tile_0"] + #[doc = "Bit 0 - u0_e2_wfi_from_tile_0"] #[inline(always)] - pub fn u0_e2_sft7110_wfi_from_tile_0(&self) -> U0_E2_SFT7110_WFI_FROM_TILE_0_R { - U0_E2_SFT7110_WFI_FROM_TILE_0_R::new((self.bits & 1) != 0) + pub fn u0_e2_wfi_from_tile_0(&self) -> U0_E2_WFI_FROM_TILE_0_R { + U0_E2_WFI_FROM_TILE_0_R::new((self.bits & 1) != 0) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_100.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_100.rs index 8750bbd..0247a4b 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_100.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_100.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_100` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_319_288` reader - u0_plda_pcie_test_out_bridge_319_288"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_319_288` reader - u0_pcie_test_out_bridge_319_288"] +pub type U0_PCIE_TEST_OUT_BRIDGE_319_288_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_319_288"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_319_288"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_319_288(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_319_288(&self) -> U0_PCIE_TEST_OUT_BRIDGE_319_288_R { + U0_PCIE_TEST_OUT_BRIDGE_319_288_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_101.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_101.rs index 2333d31..64f19a5 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_101.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_101.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_101` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_351_320` reader - u0_plda_pcie_test_out_bridge_351_320"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_351_320` reader - u0_pcie_test_out_bridge_351_320"] +pub type U0_PCIE_TEST_OUT_BRIDGE_351_320_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_351_320"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_351_320"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_351_320(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_351_320(&self) -> U0_PCIE_TEST_OUT_BRIDGE_351_320_R { + U0_PCIE_TEST_OUT_BRIDGE_351_320_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_102.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_102.rs index 404cd9c..de202da 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_102.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_102.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_102` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_383_352` reader - u0_plda_pcie_test_out_bridge_383_352"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_383_352` reader - u0_pcie_test_out_bridge_383_352"] +pub type U0_PCIE_TEST_OUT_BRIDGE_383_352_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_383_352"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_383_352"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_383_352(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_383_352(&self) -> U0_PCIE_TEST_OUT_BRIDGE_383_352_R { + U0_PCIE_TEST_OUT_BRIDGE_383_352_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_103.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_103.rs index d8e4c01..8e72459 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_103.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_103.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_103` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_415_384` reader - u0_plda_pcie_test_out_bridge_415_384"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_415_384` reader - u0_pcie_test_out_bridge_415_384"] +pub type U0_PCIE_TEST_OUT_BRIDGE_415_384_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_415_384"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_415_384"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_415_384(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_415_384(&self) -> U0_PCIE_TEST_OUT_BRIDGE_415_384_R { + U0_PCIE_TEST_OUT_BRIDGE_415_384_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_104.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_104.rs index 27e82db..ed2db9b 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_104.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_104.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_104` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_447_416` reader - u0_plda_pcie_test_out_bridge_447_416"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_447_416` reader - u0_pcie_test_out_bridge_447_416"] +pub type U0_PCIE_TEST_OUT_BRIDGE_447_416_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_447_416"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_447_416"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_447_416(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_447_416(&self) -> U0_PCIE_TEST_OUT_BRIDGE_447_416_R { + U0_PCIE_TEST_OUT_BRIDGE_447_416_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_105.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_105.rs index 7ceab98..ab6c5b3 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_105.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_105.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_105` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_479_448` reader - u0_plda_pcie_test_out_bridge_479_448"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_479_448` reader - u0_pcie_test_out_bridge_479_448"] +pub type U0_PCIE_TEST_OUT_BRIDGE_479_448_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_479_448"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_479_448"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_479_448(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_479_448(&self) -> U0_PCIE_TEST_OUT_BRIDGE_479_448_R { + U0_PCIE_TEST_OUT_BRIDGE_479_448_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_106.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_106.rs index dfc9843..bafde18 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_106.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_106.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_106` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_511_480` reader - u0_plda_pcie_test_out_bridge_511_480"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_511_480` reader - u0_pcie_test_out_bridge_511_480"] +pub type U0_PCIE_TEST_OUT_BRIDGE_511_480_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_511_480"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_511_480"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_511_480(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_511_480(&self) -> U0_PCIE_TEST_OUT_BRIDGE_511_480_R { + U0_PCIE_TEST_OUT_BRIDGE_511_480_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_107.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_107.rs index 46faaaa..7acdda8 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_107.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_107.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_107` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_31_0` reader - u0_plda_pcie_test_out_pcie_31_0"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_31_0` reader - u0_pcie_test_out_pcie_31_0"] +pub type U0_PCIE_TEST_OUT_PCIE_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_31_0"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_31_0"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_31_0(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_31_0_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_31_0_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_31_0(&self) -> U0_PCIE_TEST_OUT_PCIE_31_0_R { + U0_PCIE_TEST_OUT_PCIE_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_108.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_108.rs index 7d44fbc..ceafc14 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_108.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_108.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_108` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_63_32` reader - u0_plda_pcie_test_out_pcie_63_32"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_63_32` reader - u0_pcie_test_out_pcie_63_32"] +pub type U0_PCIE_TEST_OUT_PCIE_63_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_63_32"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_63_32"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_63_32(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_63_32_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_63_32_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_63_32(&self) -> U0_PCIE_TEST_OUT_PCIE_63_32_R { + U0_PCIE_TEST_OUT_PCIE_63_32_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_109.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_109.rs index c56e431..3fe8a19 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_109.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_109.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_109` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_95_64` reader - u0_plda_pcie_test_out_pcie_95_64"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_95_64_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_95_64` reader - u0_pcie_test_out_pcie_95_64"] +pub type U0_PCIE_TEST_OUT_PCIE_95_64_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_95_64"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_95_64"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_95_64(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_95_64_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_95_64_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_95_64(&self) -> U0_PCIE_TEST_OUT_PCIE_95_64_R { + U0_PCIE_TEST_OUT_PCIE_95_64_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_110.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_110.rs index 9303229..37b280c 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_110.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_110.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_110` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_127_96` reader - u0_plda_pcie_test_out_pcie_127_96"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_127_96_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_127_96` reader - u0_pcie_test_out_pcie_127_96"] +pub type U0_PCIE_TEST_OUT_PCIE_127_96_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_127_96"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_127_96"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_127_96(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_127_96_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_127_96_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_127_96(&self) -> U0_PCIE_TEST_OUT_PCIE_127_96_R { + U0_PCIE_TEST_OUT_PCIE_127_96_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_111.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_111.rs index cdbee0d..a89b1dd 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_111.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_111.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_111` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_159_128` reader - u0_plda_pcie_test_out_pcie_159_128"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_159_128_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_159_128` reader - u0_pcie_test_out_pcie_159_128"] +pub type U0_PCIE_TEST_OUT_PCIE_159_128_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_159_128"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_159_128"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_159_128(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_159_128_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_159_128_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_159_128(&self) -> U0_PCIE_TEST_OUT_PCIE_159_128_R { + U0_PCIE_TEST_OUT_PCIE_159_128_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_112.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_112.rs index e00d374..3ca4816 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_112.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_112.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_112` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_191_160` reader - u0_plda_pcie_test_out_pcie_191_160"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_191_160_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_191_160` reader - u0_pcie_test_out_pcie_191_160"] +pub type U0_PCIE_TEST_OUT_PCIE_191_160_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_191_160"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_191_160"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_191_160(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_191_160_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_191_160_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_191_160(&self) -> U0_PCIE_TEST_OUT_PCIE_191_160_R { + U0_PCIE_TEST_OUT_PCIE_191_160_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_113.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_113.rs index 07d16a3..a6be3aa 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_113.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_113.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_113` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_223_192` reader - u0_plda_pcie_test_out_pcie_223_192"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_223_192_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_223_192` reader - u0_pcie_test_out_pcie_223_192"] +pub type U0_PCIE_TEST_OUT_PCIE_223_192_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_223_192"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_223_192"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_223_192(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_223_192_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_223_192_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_223_192(&self) -> U0_PCIE_TEST_OUT_PCIE_223_192_R { + U0_PCIE_TEST_OUT_PCIE_223_192_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_114.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_114.rs index eb1db31..c217b3e 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_114.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_114.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_114` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_255_224` reader - u0_plda_pcie_test_out_pcie_255_224"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_255_224_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_255_224` reader - u0_pcie_test_out_pcie_255_224"] +pub type U0_PCIE_TEST_OUT_PCIE_255_224_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_255_224"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_255_224"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_255_224(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_255_224_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_255_224_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_255_224(&self) -> U0_PCIE_TEST_OUT_PCIE_255_224_R { + U0_PCIE_TEST_OUT_PCIE_255_224_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_115.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_115.rs index 9e0c834..add89ef 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_115.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_115.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_115` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_287_256` reader - u0_plda_pcie_test_out_pcie_287_256"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_287_256_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_287_256` reader - u0_pcie_test_out_pcie_287_256"] +pub type U0_PCIE_TEST_OUT_PCIE_287_256_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_287_256"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_287_256"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_287_256(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_287_256_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_287_256_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_287_256(&self) -> U0_PCIE_TEST_OUT_PCIE_287_256_R { + U0_PCIE_TEST_OUT_PCIE_287_256_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_116.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_116.rs index 5f8ae41..e1517f6 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_116.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_116.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_116` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_319_288` reader - u0_plda_pcie_test_out_pcie_319_288"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_319_288_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_319_288` reader - u0_pcie_test_out_pcie_319_288"] +pub type U0_PCIE_TEST_OUT_PCIE_319_288_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_319_288"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_319_288"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_319_288(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_319_288_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_319_288_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_319_288(&self) -> U0_PCIE_TEST_OUT_PCIE_319_288_R { + U0_PCIE_TEST_OUT_PCIE_319_288_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_117.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_117.rs index e92ea28..130197a 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_117.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_117.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_117` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_351_320` reader - u0_plda_pcie_test_out_pcie_351_320"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_351_320_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_351_320` reader - u0_pcie_test_out_pcie_351_320"] +pub type U0_PCIE_TEST_OUT_PCIE_351_320_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_351_320"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_351_320"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_351_320(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_351_320_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_351_320_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_351_320(&self) -> U0_PCIE_TEST_OUT_PCIE_351_320_R { + U0_PCIE_TEST_OUT_PCIE_351_320_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_118.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_118.rs index 4127b44..c593942 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_118.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_118.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_118` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_383_352` reader - u0_plda_pcie_test_out_pcie_383_352"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_383_352_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_383_352` reader - u0_pcie_test_out_pcie_383_352"] +pub type U0_PCIE_TEST_OUT_PCIE_383_352_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_383_352"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_383_352"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_383_352(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_383_352_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_383_352_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_383_352(&self) -> U0_PCIE_TEST_OUT_PCIE_383_352_R { + U0_PCIE_TEST_OUT_PCIE_383_352_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_119.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_119.rs index 0c62e2c..c945ca9 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_119.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_119.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_119` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_415_384` reader - u0_plda_pcie_test_out_pcie_415_384"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_415_384_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_415_384` reader - u0_pcie_test_out_pcie_415_384"] +pub type U0_PCIE_TEST_OUT_PCIE_415_384_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_415_384"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_415_384"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_415_384(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_415_384_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_415_384_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_415_384(&self) -> U0_PCIE_TEST_OUT_PCIE_415_384_R { + U0_PCIE_TEST_OUT_PCIE_415_384_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_120.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_120.rs index 10927a7..bf06b45 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_120.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_120.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_120` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_447_416` reader - u0_plda_pcie_test_out_pcie_447_416"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_447_416_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_447_416` reader - u0_pcie_test_out_pcie_447_416"] +pub type U0_PCIE_TEST_OUT_PCIE_447_416_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_447_416"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_447_416"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_447_416(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_447_416_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_447_416_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_447_416(&self) -> U0_PCIE_TEST_OUT_PCIE_447_416_R { + U0_PCIE_TEST_OUT_PCIE_447_416_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_121.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_121.rs index 79a277b..85f1285 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_121.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_121.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_121` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_479_448` reader - u0_plda_pcie_test_out_pcie_479_448"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_479_448_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_479_448` reader - u0_pcie_test_out_pcie_479_448"] +pub type U0_PCIE_TEST_OUT_PCIE_479_448_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_479_448"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_479_448"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_479_448(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_479_448_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_479_448_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_479_448(&self) -> U0_PCIE_TEST_OUT_PCIE_479_448_R { + U0_PCIE_TEST_OUT_PCIE_479_448_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_122.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_122.rs index bae7133..65882fc 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_122.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_122.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_122` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_511_480` reader - u0_plda_pcie_test_out_pcie_511_480"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_511_480_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_511_480` reader - u0_pcie_test_out_pcie_511_480"] +pub type U0_PCIE_TEST_OUT_PCIE_511_480_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_511_480"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_511_480"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_511_480(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_511_480_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_511_480_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_511_480(&self) -> U0_PCIE_TEST_OUT_PCIE_511_480_R { + U0_PCIE_TEST_OUT_PCIE_511_480_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_123.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_123.rs index f629c33..d8bc7f3 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_123.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_123.rs @@ -2,40 +2,38 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_123` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_sel` reader - u0_plda_pcie_test_sel"] -pub type U0_PLDA_PCIE_TEST_SEL_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_test_sel` writer - u0_plda_pcie_test_sel"] -pub type U0_PLDA_PCIE_TEST_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `u0_plda_pcie_tl_clock_freq` reader - u0_plda_pcie_tl_clock_freq"] -pub type U0_PLDA_PCIE_TL_CLOCK_FREQ_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_tl_clock_freq` writer - u0_plda_pcie_tl_clock_freq"] -pub type U0_PLDA_PCIE_TL_CLOCK_FREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>; +#[doc = "Field `u0_pcie_test_sel` reader - u0_pcie_test_sel"] +pub type U0_PCIE_TEST_SEL_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_sel` writer - u0_pcie_test_sel"] +pub type U0_PCIE_TEST_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `u0_pcie_tl_clock_freq` reader - u0_pcie_tl_clock_freq"] +pub type U0_PCIE_TL_CLOCK_FREQ_R = crate::FieldReader; +#[doc = "Field `u0_pcie_tl_clock_freq` writer - u0_pcie_tl_clock_freq"] +pub type U0_PCIE_TL_CLOCK_FREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>; impl R { - #[doc = "Bits 0:3 - u0_plda_pcie_test_sel"] + #[doc = "Bits 0:3 - u0_pcie_test_sel"] #[inline(always)] - pub fn u0_plda_pcie_test_sel(&self) -> U0_PLDA_PCIE_TEST_SEL_R { - U0_PLDA_PCIE_TEST_SEL_R::new((self.bits & 0x0f) as u8) + pub fn u0_pcie_test_sel(&self) -> U0_PCIE_TEST_SEL_R { + U0_PCIE_TEST_SEL_R::new((self.bits & 0x0f) as u8) } - #[doc = "Bits 4:25 - u0_plda_pcie_tl_clock_freq"] + #[doc = "Bits 4:25 - u0_pcie_tl_clock_freq"] #[inline(always)] - pub fn u0_plda_pcie_tl_clock_freq(&self) -> U0_PLDA_PCIE_TL_CLOCK_FREQ_R { - U0_PLDA_PCIE_TL_CLOCK_FREQ_R::new((self.bits >> 4) & 0x003f_ffff) + pub fn u0_pcie_tl_clock_freq(&self) -> U0_PCIE_TL_CLOCK_FREQ_R { + U0_PCIE_TL_CLOCK_FREQ_R::new((self.bits >> 4) & 0x003f_ffff) } } impl W { - #[doc = "Bits 0:3 - u0_plda_pcie_test_sel"] + #[doc = "Bits 0:3 - u0_pcie_test_sel"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_test_sel(&mut self) -> U0_PLDA_PCIE_TEST_SEL_W { - U0_PLDA_PCIE_TEST_SEL_W::new(self, 0) + pub fn u0_pcie_test_sel(&mut self) -> U0_PCIE_TEST_SEL_W { + U0_PCIE_TEST_SEL_W::new(self, 0) } - #[doc = "Bits 4:25 - u0_plda_pcie_tl_clock_freq"] + #[doc = "Bits 4:25 - u0_pcie_tl_clock_freq"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_tl_clock_freq( - &mut self, - ) -> U0_PLDA_PCIE_TL_CLOCK_FREQ_W { - U0_PLDA_PCIE_TL_CLOCK_FREQ_W::new(self, 4) + pub fn u0_pcie_tl_clock_freq(&mut self) -> U0_PCIE_TL_CLOCK_FREQ_W { + U0_PCIE_TL_CLOCK_FREQ_W::new(self, 4) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_124.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_124.rs index b1e0c89..6591905 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_124.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_124.rs @@ -2,32 +2,32 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_124` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_tl_ctrl_hotplug` reader - u0_plda_pcie_tl_ctrl_hotplug"] -pub type U0_PLDA_PCIE_TL_CTRL_HOTPLUG_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_tl_report_hotplug` reader - u0_plda_pcie_tl_report_hotplug"] -pub type U0_PLDA_PCIE_TL_REPORT_HOTPLUG_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_tl_report_hotplug` writer - u0_plda_pcie_tl_report_hotplug"] -pub type U0_PLDA_PCIE_TL_REPORT_HOTPLUG_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +#[doc = "Field `u0_pcie_tl_ctrl_hotplug` reader - u0_pcie_tl_ctrl_hotplug"] +pub type U0_PCIE_TL_CTRL_HOTPLUG_R = crate::FieldReader; +#[doc = "Field `u0_pcie_tl_report_hotplug` reader - u0_pcie_tl_report_hotplug"] +pub type U0_PCIE_TL_REPORT_HOTPLUG_R = crate::FieldReader; +#[doc = "Field `u0_pcie_tl_report_hotplug` writer - u0_pcie_tl_report_hotplug"] +pub type U0_PCIE_TL_REPORT_HOTPLUG_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { - #[doc = "Bits 0:15 - u0_plda_pcie_tl_ctrl_hotplug"] + #[doc = "Bits 0:15 - u0_pcie_tl_ctrl_hotplug"] #[inline(always)] - pub fn u0_plda_pcie_tl_ctrl_hotplug(&self) -> U0_PLDA_PCIE_TL_CTRL_HOTPLUG_R { - U0_PLDA_PCIE_TL_CTRL_HOTPLUG_R::new((self.bits & 0xffff) as u16) + pub fn u0_pcie_tl_ctrl_hotplug(&self) -> U0_PCIE_TL_CTRL_HOTPLUG_R { + U0_PCIE_TL_CTRL_HOTPLUG_R::new((self.bits & 0xffff) as u16) } - #[doc = "Bits 16:31 - u0_plda_pcie_tl_report_hotplug"] + #[doc = "Bits 16:31 - u0_pcie_tl_report_hotplug"] #[inline(always)] - pub fn u0_plda_pcie_tl_report_hotplug(&self) -> U0_PLDA_PCIE_TL_REPORT_HOTPLUG_R { - U0_PLDA_PCIE_TL_REPORT_HOTPLUG_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn u0_pcie_tl_report_hotplug(&self) -> U0_PCIE_TL_REPORT_HOTPLUG_R { + U0_PCIE_TL_REPORT_HOTPLUG_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { - #[doc = "Bits 16:31 - u0_plda_pcie_tl_report_hotplug"] + #[doc = "Bits 16:31 - u0_pcie_tl_report_hotplug"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_tl_report_hotplug( + pub fn u0_pcie_tl_report_hotplug( &mut self, - ) -> U0_PLDA_PCIE_TL_REPORT_HOTPLUG_W { - U0_PLDA_PCIE_TL_REPORT_HOTPLUG_W::new(self, 16) + ) -> U0_PCIE_TL_REPORT_HOTPLUG_W { + U0_PCIE_TL_REPORT_HOTPLUG_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_125.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_125.rs index b3eb15b..2de4526 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_125.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_125.rs @@ -2,34 +2,34 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_125` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_tx_pattern` reader - u0_plda_pcie_tx_pattern"] -pub type U0_PLDA_PCIE_TX_PATTERN_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_tx_pattern` writer - u0_plda_pcie_tx_pattern"] -pub type U0_PLDA_PCIE_TX_PATTERN_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_plda_pcie_usb3_bus_width` reader - u0_plda_pcie_usb3_bus_width"] -pub type U0_PLDA_PCIE_USB3_BUS_WIDTH_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_usb3_bus_width` writer - u0_plda_pcie_usb3_bus_width"] -pub type U0_PLDA_PCIE_USB3_BUS_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_plda_pcie_usb3_phy_enable` reader - u0_plda_pcie_usb3_phy_enable"] -pub type U0_PLDA_PCIE_USB3_PHY_ENABLE_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_usb3_phy_enable` writer - u0_plda_pcie_usb3_phy_enable"] -pub type U0_PLDA_PCIE_USB3_PHY_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_usb3_rate` reader - u0_plda_pcie_usb3_rate"] -pub type U0_PLDA_PCIE_USB3_RATE_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_usb3_rate` writer - u0_plda_pcie_usb3_rate"] -pub type U0_PLDA_PCIE_USB3_RATE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_plda_pcie_usb3_rx_standby` reader - u0_plda_pcie_usb3_rx_standby"] -pub type U0_PLDA_PCIE_USB3_RX_STANDBY_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_usb3_rx_standby` writer - u0_plda_pcie_usb3_rx_standby"] -pub type U0_PLDA_PCIE_USB3_RX_STANDBY_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_xwdecerr` reader - u0_plda_pcie_xwdecerr"] -pub type U0_PLDA_PCIE_XWDECERR_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_xwerrclr` reader - u0_plda_pcie_xwerrclr"] -pub type U0_PLDA_PCIE_XWERRCLR_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_xwerrclr` writer - u0_plda_pcie_xwerrclr"] -pub type U0_PLDA_PCIE_XWERRCLR_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_xwslverr` reader - u0_plda_pcie_xwslverr"] -pub type U0_PLDA_PCIE_XWSLVERR_R = crate::BitReader; +#[doc = "Field `u0_pcie_tx_pattern` reader - u0_pcie_tx_pattern"] +pub type U0_PCIE_TX_PATTERN_R = crate::FieldReader; +#[doc = "Field `u0_pcie_tx_pattern` writer - u0_pcie_tx_pattern"] +pub type U0_PCIE_TX_PATTERN_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_pcie_usb3_bus_width` reader - u0_pcie_usb3_bus_width"] +pub type U0_PCIE_USB3_BUS_WIDTH_R = crate::FieldReader; +#[doc = "Field `u0_pcie_usb3_bus_width` writer - u0_pcie_usb3_bus_width"] +pub type U0_PCIE_USB3_BUS_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_pcie_usb3_phy_enable` reader - u0_pcie_usb3_phy_enable"] +pub type U0_PCIE_USB3_PHY_ENABLE_R = crate::BitReader; +#[doc = "Field `u0_pcie_usb3_phy_enable` writer - u0_pcie_usb3_phy_enable"] +pub type U0_PCIE_USB3_PHY_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_usb3_rate` reader - u0_pcie_usb3_rate"] +pub type U0_PCIE_USB3_RATE_R = crate::FieldReader; +#[doc = "Field `u0_pcie_usb3_rate` writer - u0_pcie_usb3_rate"] +pub type U0_PCIE_USB3_RATE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_pcie_usb3_rx_standby` reader - u0_pcie_usb3_rx_standby"] +pub type U0_PCIE_USB3_RX_STANDBY_R = crate::BitReader; +#[doc = "Field `u0_pcie_usb3_rx_standby` writer - u0_pcie_usb3_rx_standby"] +pub type U0_PCIE_USB3_RX_STANDBY_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_xwdecerr` reader - u0_pcie_xwdecerr"] +pub type U0_PCIE_XWDECERR_R = crate::BitReader; +#[doc = "Field `u0_pcie_xwerrclr` reader - u0_pcie_xwerrclr"] +pub type U0_PCIE_XWERRCLR_R = crate::BitReader; +#[doc = "Field `u0_pcie_xwerrclr` writer - u0_pcie_xwerrclr"] +pub type U0_PCIE_XWERRCLR_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_xwslverr` reader - u0_pcie_xwslverr"] +pub type U0_PCIE_XWSLVERR_R = crate::BitReader; #[doc = "Field `u0_sec_top_sramcfg_slp` reader - SRAM/ROM configuration. SLP: sleep enable, high active, default is low."] pub type U0_SEC_TOP_SRAMCFG_SLP_R = crate::BitReader; #[doc = "Field `u0_sec_top_sramcfg_slp` writer - SRAM/ROM configuration. SLP: sleep enable, high active, default is low."] @@ -65,45 +65,45 @@ pub type U0_SEC_TOP_SRAMCFG_VG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `u0_plda_pcie_align_detect` reader - u0_plda_pcie_align_detect"] pub type U0_PLDA_PCIE_ALIGN_DETECT_R = crate::BitReader; impl R { - #[doc = "Bits 0:1 - u0_plda_pcie_tx_pattern"] + #[doc = "Bits 0:1 - u0_pcie_tx_pattern"] #[inline(always)] - pub fn u0_plda_pcie_tx_pattern(&self) -> U0_PLDA_PCIE_TX_PATTERN_R { - U0_PLDA_PCIE_TX_PATTERN_R::new((self.bits & 3) as u8) + pub fn u0_pcie_tx_pattern(&self) -> U0_PCIE_TX_PATTERN_R { + U0_PCIE_TX_PATTERN_R::new((self.bits & 3) as u8) } - #[doc = "Bits 2:3 - u0_plda_pcie_usb3_bus_width"] + #[doc = "Bits 2:3 - u0_pcie_usb3_bus_width"] #[inline(always)] - pub fn u0_plda_pcie_usb3_bus_width(&self) -> U0_PLDA_PCIE_USB3_BUS_WIDTH_R { - U0_PLDA_PCIE_USB3_BUS_WIDTH_R::new(((self.bits >> 2) & 3) as u8) + pub fn u0_pcie_usb3_bus_width(&self) -> U0_PCIE_USB3_BUS_WIDTH_R { + U0_PCIE_USB3_BUS_WIDTH_R::new(((self.bits >> 2) & 3) as u8) } - #[doc = "Bit 4 - u0_plda_pcie_usb3_phy_enable"] + #[doc = "Bit 4 - u0_pcie_usb3_phy_enable"] #[inline(always)] - pub fn u0_plda_pcie_usb3_phy_enable(&self) -> U0_PLDA_PCIE_USB3_PHY_ENABLE_R { - U0_PLDA_PCIE_USB3_PHY_ENABLE_R::new(((self.bits >> 4) & 1) != 0) + pub fn u0_pcie_usb3_phy_enable(&self) -> U0_PCIE_USB3_PHY_ENABLE_R { + U0_PCIE_USB3_PHY_ENABLE_R::new(((self.bits >> 4) & 1) != 0) } - #[doc = "Bits 5:6 - u0_plda_pcie_usb3_rate"] + #[doc = "Bits 5:6 - u0_pcie_usb3_rate"] #[inline(always)] - pub fn u0_plda_pcie_usb3_rate(&self) -> U0_PLDA_PCIE_USB3_RATE_R { - U0_PLDA_PCIE_USB3_RATE_R::new(((self.bits >> 5) & 3) as u8) + pub fn u0_pcie_usb3_rate(&self) -> U0_PCIE_USB3_RATE_R { + U0_PCIE_USB3_RATE_R::new(((self.bits >> 5) & 3) as u8) } - #[doc = "Bit 7 - u0_plda_pcie_usb3_rx_standby"] + #[doc = "Bit 7 - u0_pcie_usb3_rx_standby"] #[inline(always)] - pub fn u0_plda_pcie_usb3_rx_standby(&self) -> U0_PLDA_PCIE_USB3_RX_STANDBY_R { - U0_PLDA_PCIE_USB3_RX_STANDBY_R::new(((self.bits >> 7) & 1) != 0) + pub fn u0_pcie_usb3_rx_standby(&self) -> U0_PCIE_USB3_RX_STANDBY_R { + U0_PCIE_USB3_RX_STANDBY_R::new(((self.bits >> 7) & 1) != 0) } - #[doc = "Bit 8 - u0_plda_pcie_xwdecerr"] + #[doc = "Bit 8 - u0_pcie_xwdecerr"] #[inline(always)] - pub fn u0_plda_pcie_xwdecerr(&self) -> U0_PLDA_PCIE_XWDECERR_R { - U0_PLDA_PCIE_XWDECERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn u0_pcie_xwdecerr(&self) -> U0_PCIE_XWDECERR_R { + U0_PCIE_XWDECERR_R::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 9 - u0_plda_pcie_xwerrclr"] + #[doc = "Bit 9 - u0_pcie_xwerrclr"] #[inline(always)] - pub fn u0_plda_pcie_xwerrclr(&self) -> U0_PLDA_PCIE_XWERRCLR_R { - U0_PLDA_PCIE_XWERRCLR_R::new(((self.bits >> 9) & 1) != 0) + pub fn u0_pcie_xwerrclr(&self) -> U0_PCIE_XWERRCLR_R { + U0_PCIE_XWERRCLR_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 10 - u0_plda_pcie_xwslverr"] + #[doc = "Bit 10 - u0_pcie_xwslverr"] #[inline(always)] - pub fn u0_plda_pcie_xwslverr(&self) -> U0_PLDA_PCIE_XWSLVERR_R { - U0_PLDA_PCIE_XWSLVERR_R::new(((self.bits >> 10) & 1) != 0) + pub fn u0_pcie_xwslverr(&self) -> U0_PCIE_XWSLVERR_R { + U0_PCIE_XWSLVERR_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - SRAM/ROM configuration. SLP: sleep enable, high active, default is low."] #[inline(always)] @@ -152,47 +152,41 @@ impl R { } } impl W { - #[doc = "Bits 0:1 - u0_plda_pcie_tx_pattern"] + #[doc = "Bits 0:1 - u0_pcie_tx_pattern"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_tx_pattern(&mut self) -> U0_PLDA_PCIE_TX_PATTERN_W { - U0_PLDA_PCIE_TX_PATTERN_W::new(self, 0) + pub fn u0_pcie_tx_pattern(&mut self) -> U0_PCIE_TX_PATTERN_W { + U0_PCIE_TX_PATTERN_W::new(self, 0) } - #[doc = "Bits 2:3 - u0_plda_pcie_usb3_bus_width"] + #[doc = "Bits 2:3 - u0_pcie_usb3_bus_width"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_usb3_bus_width( - &mut self, - ) -> U0_PLDA_PCIE_USB3_BUS_WIDTH_W { - U0_PLDA_PCIE_USB3_BUS_WIDTH_W::new(self, 2) + pub fn u0_pcie_usb3_bus_width(&mut self) -> U0_PCIE_USB3_BUS_WIDTH_W { + U0_PCIE_USB3_BUS_WIDTH_W::new(self, 2) } - #[doc = "Bit 4 - u0_plda_pcie_usb3_phy_enable"] + #[doc = "Bit 4 - u0_pcie_usb3_phy_enable"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_usb3_phy_enable( - &mut self, - ) -> U0_PLDA_PCIE_USB3_PHY_ENABLE_W { - U0_PLDA_PCIE_USB3_PHY_ENABLE_W::new(self, 4) + pub fn u0_pcie_usb3_phy_enable(&mut self) -> U0_PCIE_USB3_PHY_ENABLE_W { + U0_PCIE_USB3_PHY_ENABLE_W::new(self, 4) } - #[doc = "Bits 5:6 - u0_plda_pcie_usb3_rate"] + #[doc = "Bits 5:6 - u0_pcie_usb3_rate"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_usb3_rate(&mut self) -> U0_PLDA_PCIE_USB3_RATE_W { - U0_PLDA_PCIE_USB3_RATE_W::new(self, 5) + pub fn u0_pcie_usb3_rate(&mut self) -> U0_PCIE_USB3_RATE_W { + U0_PCIE_USB3_RATE_W::new(self, 5) } - #[doc = "Bit 7 - u0_plda_pcie_usb3_rx_standby"] + #[doc = "Bit 7 - u0_pcie_usb3_rx_standby"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_usb3_rx_standby( - &mut self, - ) -> U0_PLDA_PCIE_USB3_RX_STANDBY_W { - U0_PLDA_PCIE_USB3_RX_STANDBY_W::new(self, 7) + pub fn u0_pcie_usb3_rx_standby(&mut self) -> U0_PCIE_USB3_RX_STANDBY_W { + U0_PCIE_USB3_RX_STANDBY_W::new(self, 7) } - #[doc = "Bit 9 - u0_plda_pcie_xwerrclr"] + #[doc = "Bit 9 - u0_pcie_xwerrclr"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_xwerrclr(&mut self) -> U0_PLDA_PCIE_XWERRCLR_W { - U0_PLDA_PCIE_XWERRCLR_W::new(self, 9) + pub fn u0_pcie_xwerrclr(&mut self) -> U0_PCIE_XWERRCLR_W { + U0_PCIE_XWERRCLR_W::new(self, 9) } #[doc = "Bit 11 - SRAM/ROM configuration. SLP: sleep enable, high active, default is low."] #[inline(always)] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_126.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_126.rs index 1a604cc..8caed29 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_126.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_126.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_126` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_31_0` reader - u0_plda_pcie_axi4_mst0_aratomop_31_0"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_31_0` reader - u0_pcie_axi4_mst0_aratomop_31_0"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_31_0"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_31_0(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_31_0_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_31_0_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_31_0(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_31_0_R { + U0_PCIE_AXI4_MST0_ARATOMOP_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_127.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_127.rs index 18d3661..5ed7e5d 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_127.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_127.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_127` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_63_32` reader - u0_plda_pcie_axi4_mst0_aratomop_63_32"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_63_32` reader - u0_pcie_axi4_mst0_aratomop_63_32"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_63_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_63_32"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_63_32"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_63_32(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_63_32_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_63_32_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_63_32(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_63_32_R { + U0_PCIE_AXI4_MST0_ARATOMOP_63_32_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_128.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_128.rs index 2d51555..ee71d1a 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_128.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_128.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_128` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_95_64` reader - u0_plda_pcie_axi4_mst0_aratomop_95_64"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_95_64_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_95_64` reader - u0_pcie_axi4_mst0_aratomop_95_64"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_95_64_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_95_64"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_95_64"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_95_64(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_95_64_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_95_64_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_95_64(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_95_64_R { + U0_PCIE_AXI4_MST0_ARATOMOP_95_64_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_129.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_129.rs index 1345486..b2247f9 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_129.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_129.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_129` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_127_96` reader - u0_plda_pcie_axi4_mst0_aratomop_127_96"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_127_96_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_127_96` reader - u0_pcie_axi4_mst0_aratomop_127_96"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_127_96_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_127_96"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_127_96"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_127_96( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_127_96_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_127_96_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_127_96(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_127_96_R { + U0_PCIE_AXI4_MST0_ARATOMOP_127_96_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_130.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_130.rs index 2952230..f037850 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_130.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_130.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_130` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_159_128` reader - u0_plda_pcie_axi4_mst0_aratomop_159_128"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_159_128_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_159_128` reader - u0_pcie_axi4_mst0_aratomop_159_128"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_159_128_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_159_128"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_159_128"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_159_128( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_159_128_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_159_128_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_159_128(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_159_128_R { + U0_PCIE_AXI4_MST0_ARATOMOP_159_128_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_131.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_131.rs index 8975915..5a68d91 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_131.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_131.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_131` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_191_160` reader - u0_plda_pcie_axi4_mst0_aratomop_191_160"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_191_160_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_191_160` reader - u0_pcie_axi4_mst0_aratomop_191_160"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_191_160_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_191_160"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_191_160"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_191_160( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_191_160_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_191_160_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_191_160(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_191_160_R { + U0_PCIE_AXI4_MST0_ARATOMOP_191_160_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_132.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_132.rs index 307a1c6..00b6725 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_132.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_132.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_132` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_223_192` reader - u0_plda_pcie_axi4_mst0_aratomop_223_192"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_223_192_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_223_192` reader - u0_pcie_axi4_mst0_aratomop_223_192"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_223_192_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_223_192"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_223_192"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_223_192( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_223_192_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_223_192_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_223_192(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_223_192_R { + U0_PCIE_AXI4_MST0_ARATOMOP_223_192_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_133.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_133.rs index c77b84c..80ddfcf 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_133.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_133.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_133` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_255_224` reader - u0_plda_pcie_axi4_mst0_aratomop_255_224"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_255_224_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_255_224` reader - u0_pcie_axi4_mst0_aratomop_255_224"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_255_224_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_255_224"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_255_224"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_255_224( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_255_224_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_255_224_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_255_224(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_255_224_R { + U0_PCIE_AXI4_MST0_ARATOMOP_255_224_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_134.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_134.rs index 9d396f0..8ac3892 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_134.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_134.rs @@ -2,29 +2,27 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_134` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_257_256` reader - u0_plda_pcie_axi4_mst0_aratomop_257_256"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_mst0_arfunc` reader - u0_plda_pcie_axi4_mst0_arfunc"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARFUNC_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_mst0_arregion` reader - u0_plda_pcie_axi4_mst0_arregion"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARREGION_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_257_256` reader - u0_pcie_axi4_mst0_aratomop_257_256"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_257_256_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_arfunc` reader - u0_pcie_axi4_mst0_arfunc"] +pub type U0_PCIE_AXI4_MST0_ARFUNC_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_arregion` reader - u0_pcie_axi4_mst0_arregion"] +pub type U0_PCIE_AXI4_MST0_ARREGION_R = crate::FieldReader; impl R { - #[doc = "Bits 0:1 - u0_plda_pcie_axi4_mst0_aratomop_257_256"] + #[doc = "Bits 0:1 - u0_pcie_axi4_mst0_aratomop_257_256"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_257_256( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R::new((self.bits & 3) as u8) + pub fn u0_pcie_axi4_mst0_aratomop_257_256(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_257_256_R { + U0_PCIE_AXI4_MST0_ARATOMOP_257_256_R::new((self.bits & 3) as u8) } - #[doc = "Bits 2:16 - u0_plda_pcie_axi4_mst0_arfunc"] + #[doc = "Bits 2:16 - u0_pcie_axi4_mst0_arfunc"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_arfunc(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARFUNC_R { - U0_PLDA_PCIE_AXI4_MST0_ARFUNC_R::new(((self.bits >> 2) & 0x7fff) as u16) + pub fn u0_pcie_axi4_mst0_arfunc(&self) -> U0_PCIE_AXI4_MST0_ARFUNC_R { + U0_PCIE_AXI4_MST0_ARFUNC_R::new(((self.bits >> 2) & 0x7fff) as u16) } - #[doc = "Bits 17:20 - u0_plda_pcie_axi4_mst0_arregion"] + #[doc = "Bits 17:20 - u0_pcie_axi4_mst0_arregion"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_arregion(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARREGION_R { - U0_PLDA_PCIE_AXI4_MST0_ARREGION_R::new(((self.bits >> 17) & 0x0f) as u8) + pub fn u0_pcie_axi4_mst0_arregion(&self) -> U0_PCIE_AXI4_MST0_ARREGION_R { + U0_PCIE_AXI4_MST0_ARREGION_R::new(((self.bits >> 17) & 0x0f) as u8) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_135.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_135.rs index 7365234..81f5058 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_135.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_135.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_135` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_mst0_aruser_31_0` reader - u1_plda_pcie_axi4_mst0_aruser_31_0"] -pub type U1_PLDA_PCIE_AXI4_MST0_ARUSER_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_aruser_31_0` reader - u1_pcie_axi4_mst0_aruser_31_0"] +pub type U1_PCIE_AXI4_MST0_ARUSER_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_mst0_aruser_31_0"] + #[doc = "Bits 0:31 - u1_pcie_axi4_mst0_aruser_31_0"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_aruser_31_0(&self) -> U1_PLDA_PCIE_AXI4_MST0_ARUSER_31_0_R { - U1_PLDA_PCIE_AXI4_MST0_ARUSER_31_0_R::new(self.bits) + pub fn u1_pcie_axi4_mst0_aruser_31_0(&self) -> U1_PCIE_AXI4_MST0_ARUSER_31_0_R { + U1_PCIE_AXI4_MST0_ARUSER_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_136.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_136.rs index c00f7a3..ef48fbf 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_136.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_136.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_136` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_mst0_aruser_52_32` reader - u1_plda_pcie_axi4_mst0_aruser_52_32"] -pub type U1_PLDA_PCIE_AXI4_MST0_ARUSER_52_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_aruser_52_32` reader - u1_pcie_axi4_mst0_aruser_52_32"] +pub type U1_PCIE_AXI4_MST0_ARUSER_52_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:20 - u1_plda_pcie_axi4_mst0_aruser_52_32"] + #[doc = "Bits 0:20 - u1_pcie_axi4_mst0_aruser_52_32"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_aruser_52_32(&self) -> U1_PLDA_PCIE_AXI4_MST0_ARUSER_52_32_R { - U1_PLDA_PCIE_AXI4_MST0_ARUSER_52_32_R::new(self.bits & 0x001f_ffff) + pub fn u1_pcie_axi4_mst0_aruser_52_32(&self) -> U1_PCIE_AXI4_MST0_ARUSER_52_32_R { + U1_PCIE_AXI4_MST0_ARUSER_52_32_R::new(self.bits & 0x001f_ffff) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_137.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_137.rs index afe29ff..c809471 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_137.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_137.rs @@ -2,20 +2,20 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_137` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_mst0_awfunc` reader - u1_plda_pcie_axi4_mst0_awfunc"] -pub type U1_PLDA_PCIE_AXI4_MST0_AWFUNC_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_mst0_awregion` reader - u1_plda_pcie_axi4_mst0_awregion"] -pub type U1_PLDA_PCIE_AXI4_MST0_AWREGION_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_awfunc` reader - u1_pcie_axi4_mst0_awfunc"] +pub type U1_PCIE_AXI4_MST0_AWFUNC_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_awregion` reader - u1_pcie_axi4_mst0_awregion"] +pub type U1_PCIE_AXI4_MST0_AWREGION_R = crate::FieldReader; impl R { - #[doc = "Bits 0:14 - u1_plda_pcie_axi4_mst0_awfunc"] + #[doc = "Bits 0:14 - u1_pcie_axi4_mst0_awfunc"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_awfunc(&self) -> U1_PLDA_PCIE_AXI4_MST0_AWFUNC_R { - U1_PLDA_PCIE_AXI4_MST0_AWFUNC_R::new((self.bits & 0x7fff) as u16) + pub fn u1_pcie_axi4_mst0_awfunc(&self) -> U1_PCIE_AXI4_MST0_AWFUNC_R { + U1_PCIE_AXI4_MST0_AWFUNC_R::new((self.bits & 0x7fff) as u16) } - #[doc = "Bits 15:18 - u1_plda_pcie_axi4_mst0_awregion"] + #[doc = "Bits 15:18 - u1_pcie_axi4_mst0_awregion"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_awregion(&self) -> U1_PLDA_PCIE_AXI4_MST0_AWREGION_R { - U1_PLDA_PCIE_AXI4_MST0_AWREGION_R::new(((self.bits >> 15) & 0x0f) as u8) + pub fn u1_pcie_axi4_mst0_awregion(&self) -> U1_PCIE_AXI4_MST0_AWREGION_R { + U1_PCIE_AXI4_MST0_AWREGION_R::new(((self.bits >> 15) & 0x0f) as u8) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_138.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_138.rs index ce7dc4b..eb91417 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_138.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_138.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_138` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_mst0_awuser_31_0` reader - u1_plda_pcie_axi4_mst0_awuser_31_0"] -pub type U1_PLDA_PCIE_AXI4_MST0_AWUSER_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_awuser_31_0` reader - u1_pcie_axi4_mst0_awuser_31_0"] +pub type U1_PCIE_AXI4_MST0_AWUSER_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_mst0_awuser_31_0"] + #[doc = "Bits 0:31 - u1_pcie_axi4_mst0_awuser_31_0"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_awuser_31_0(&self) -> U1_PLDA_PCIE_AXI4_MST0_AWUSER_31_0_R { - U1_PLDA_PCIE_AXI4_MST0_AWUSER_31_0_R::new(self.bits) + pub fn u1_pcie_axi4_mst0_awuser_31_0(&self) -> U1_PCIE_AXI4_MST0_AWUSER_31_0_R { + U1_PCIE_AXI4_MST0_AWUSER_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_139.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_139.rs index 014a548..7c3fa4c 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_139.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_139.rs @@ -2,32 +2,30 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_139` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_mst0_awuser_42_32` reader - u1_plda_pcie_axi4_mst0_awuser_42_32"] -pub type U1_PLDA_PCIE_AXI4_MST0_AWUSER_42_32_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_mst0_rderr` reader - u1_plda_pcie_axi4_mst0_rderr"] -pub type U1_PLDA_PCIE_AXI4_MST0_RDERR_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_mst0_rderr` writer - u1_plda_pcie_axi4_mst0_rderr"] -pub type U1_PLDA_PCIE_AXI4_MST0_RDERR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `u1_pcie_axi4_mst0_awuser_42_32` reader - u1_pcie_axi4_mst0_awuser_42_32"] +pub type U1_PCIE_AXI4_MST0_AWUSER_42_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_rderr` reader - u1_pcie_axi4_mst0_rderr"] +pub type U1_PCIE_AXI4_MST0_RDERR_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_rderr` writer - u1_pcie_axi4_mst0_rderr"] +pub type U1_PCIE_AXI4_MST0_RDERR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 0:10 - u1_plda_pcie_axi4_mst0_awuser_42_32"] + #[doc = "Bits 0:10 - u1_pcie_axi4_mst0_awuser_42_32"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_awuser_42_32(&self) -> U1_PLDA_PCIE_AXI4_MST0_AWUSER_42_32_R { - U1_PLDA_PCIE_AXI4_MST0_AWUSER_42_32_R::new((self.bits & 0x07ff) as u16) + pub fn u1_pcie_axi4_mst0_awuser_42_32(&self) -> U1_PCIE_AXI4_MST0_AWUSER_42_32_R { + U1_PCIE_AXI4_MST0_AWUSER_42_32_R::new((self.bits & 0x07ff) as u16) } - #[doc = "Bits 11:18 - u1_plda_pcie_axi4_mst0_rderr"] + #[doc = "Bits 11:18 - u1_pcie_axi4_mst0_rderr"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_rderr(&self) -> U1_PLDA_PCIE_AXI4_MST0_RDERR_R { - U1_PLDA_PCIE_AXI4_MST0_RDERR_R::new(((self.bits >> 11) & 0xff) as u8) + pub fn u1_pcie_axi4_mst0_rderr(&self) -> U1_PCIE_AXI4_MST0_RDERR_R { + U1_PCIE_AXI4_MST0_RDERR_R::new(((self.bits >> 11) & 0xff) as u8) } } impl W { - #[doc = "Bits 11:18 - u1_plda_pcie_axi4_mst0_rderr"] + #[doc = "Bits 11:18 - u1_pcie_axi4_mst0_rderr"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_mst0_rderr( - &mut self, - ) -> U1_PLDA_PCIE_AXI4_MST0_RDERR_W { - U1_PLDA_PCIE_AXI4_MST0_RDERR_W::new(self, 11) + pub fn u1_pcie_axi4_mst0_rderr(&mut self) -> U1_PCIE_AXI4_MST0_RDERR_W { + U1_PCIE_AXI4_MST0_RDERR_W::new(self, 11) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_140.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_140.rs index 64e433e..81b9601 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_140.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_140.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_140` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_mst0_ruser` reader - u1_plda_pcie_axi4_mst0_ruser"] -pub type U1_PLDA_PCIE_AXI4_MST0_RUSER_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_mst0_ruser` writer - u1_plda_pcie_axi4_mst0_ruser"] -pub type U1_PLDA_PCIE_AXI4_MST0_RUSER_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_mst0_ruser` reader - u1_pcie_axi4_mst0_ruser"] +pub type U1_PCIE_AXI4_MST0_RUSER_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_ruser` writer - u1_pcie_axi4_mst0_ruser"] +pub type U1_PCIE_AXI4_MST0_RUSER_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_mst0_ruser"] + #[doc = "Bits 0:31 - u1_pcie_axi4_mst0_ruser"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_ruser(&self) -> U1_PLDA_PCIE_AXI4_MST0_RUSER_R { - U1_PLDA_PCIE_AXI4_MST0_RUSER_R::new(self.bits) + pub fn u1_pcie_axi4_mst0_ruser(&self) -> U1_PCIE_AXI4_MST0_RUSER_R { + U1_PCIE_AXI4_MST0_RUSER_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_mst0_ruser"] + #[doc = "Bits 0:31 - u1_pcie_axi4_mst0_ruser"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_mst0_ruser( - &mut self, - ) -> U1_PLDA_PCIE_AXI4_MST0_RUSER_W { - U1_PLDA_PCIE_AXI4_MST0_RUSER_W::new(self, 0) + pub fn u1_pcie_axi4_mst0_ruser(&mut self) -> U1_PCIE_AXI4_MST0_RUSER_W { + U1_PCIE_AXI4_MST0_RUSER_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_141.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_141.rs index fef40c9..4279fa5 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_141.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_141.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_141` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_mst0_wderr` reader - u1_plda_pcie_axi4_mst0_wderr"] -pub type U1_PLDA_PCIE_AXI4_MST0_WDERR_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_wderr` reader - u1_pcie_axi4_mst0_wderr"] +pub type U1_PCIE_AXI4_MST0_WDERR_R = crate::FieldReader; impl R { - #[doc = "Bits 0:7 - u1_plda_pcie_axi4_mst0_wderr"] + #[doc = "Bits 0:7 - u1_pcie_axi4_mst0_wderr"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_wderr(&self) -> U1_PLDA_PCIE_AXI4_MST0_WDERR_R { - U1_PLDA_PCIE_AXI4_MST0_WDERR_R::new((self.bits & 0xff) as u8) + pub fn u1_pcie_axi4_mst0_wderr(&self) -> U1_PCIE_AXI4_MST0_WDERR_R { + U1_PCIE_AXI4_MST0_WDERR_R::new((self.bits & 0xff) as u8) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_142.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_142.rs index da2fa35..f8b3204 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_142.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_142.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_142` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_31_0` reader - u1_plda_pcie_axi4_slv0_aratomop_31_0"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_31_0` writer - u1_plda_pcie_axi4_slv0_aratomop_31_0"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_31_0` reader - u1_pcie_axi4_slv0_aratomop_31_0"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_31_0` writer - u1_pcie_axi4_slv0_aratomop_31_0"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_31_0"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_31_0"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aratomop_31_0(&self) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_R { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aratomop_31_0(&self) -> U1_PCIE_AXI4_SLV0_ARATOMOP_31_0_R { + U1_PCIE_AXI4_SLV0_ARATOMOP_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_31_0"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_31_0"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aratomop_31_0( + pub fn u1_pcie_axi4_slv0_aratomop_31_0( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_W { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARATOMOP_31_0_W { + U1_PCIE_AXI4_SLV0_ARATOMOP_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_143.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_143.rs index ef5d288..2e7d0b4 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_143.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_143.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_143` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_63_32` reader - u1_plda_pcie_axi4_slv0_aratomop_63_32"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_63_32` writer - u1_plda_pcie_axi4_slv0_aratomop_63_32"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_63_32` reader - u1_pcie_axi4_slv0_aratomop_63_32"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_63_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_63_32` writer - u1_pcie_axi4_slv0_aratomop_63_32"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_63_32"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_63_32"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aratomop_63_32(&self) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_R { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aratomop_63_32(&self) -> U1_PCIE_AXI4_SLV0_ARATOMOP_63_32_R { + U1_PCIE_AXI4_SLV0_ARATOMOP_63_32_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_63_32"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_63_32"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aratomop_63_32( + pub fn u1_pcie_axi4_slv0_aratomop_63_32( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_W { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARATOMOP_63_32_W { + U1_PCIE_AXI4_SLV0_ARATOMOP_63_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_144.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_144.rs index 4d8e7f8..e977883 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_144.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_144.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_144` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_95_64` reader - u1_plda_pcie_axi4_slv0_aratomop_95_64"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_95_64` writer - u1_plda_pcie_axi4_slv0_aratomop_95_64"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_95_64` reader - u1_pcie_axi4_slv0_aratomop_95_64"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_95_64_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_95_64` writer - u1_pcie_axi4_slv0_aratomop_95_64"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_95_64_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_95_64"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_95_64"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aratomop_95_64(&self) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_R { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aratomop_95_64(&self) -> U1_PCIE_AXI4_SLV0_ARATOMOP_95_64_R { + U1_PCIE_AXI4_SLV0_ARATOMOP_95_64_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_95_64"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_95_64"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aratomop_95_64( + pub fn u1_pcie_axi4_slv0_aratomop_95_64( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_W { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARATOMOP_95_64_W { + U1_PCIE_AXI4_SLV0_ARATOMOP_95_64_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_145.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_145.rs index f6f170f..65f6eac 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_145.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_145.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_145` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_127_96` reader - u1_plda_pcie_axi4_slv0_aratomop_127_96"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_127_96` writer - u1_plda_pcie_axi4_slv0_aratomop_127_96"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_127_96` reader - u1_pcie_axi4_slv0_aratomop_127_96"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_127_96_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_127_96` writer - u1_pcie_axi4_slv0_aratomop_127_96"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_127_96_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_127_96"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_127_96"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aratomop_127_96( - &self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_R { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aratomop_127_96(&self) -> U1_PCIE_AXI4_SLV0_ARATOMOP_127_96_R { + U1_PCIE_AXI4_SLV0_ARATOMOP_127_96_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_127_96"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_127_96"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aratomop_127_96( + pub fn u1_pcie_axi4_slv0_aratomop_127_96( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_W { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARATOMOP_127_96_W { + U1_PCIE_AXI4_SLV0_ARATOMOP_127_96_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_146.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_146.rs index 37638f7..fd4b9c9 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_146.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_146.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_146` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_159_128` reader - u1_plda_pcie_axi4_slv0_aratomop_159_128"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_159_128` writer - u1_plda_pcie_axi4_slv0_aratomop_159_128"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_159_128` reader - u1_pcie_axi4_slv0_aratomop_159_128"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_159_128_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_159_128` writer - u1_pcie_axi4_slv0_aratomop_159_128"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_159_128_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_159_128"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_159_128"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aratomop_159_128( - &self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_R { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aratomop_159_128(&self) -> U1_PCIE_AXI4_SLV0_ARATOMOP_159_128_R { + U1_PCIE_AXI4_SLV0_ARATOMOP_159_128_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_159_128"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_159_128"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aratomop_159_128( + pub fn u1_pcie_axi4_slv0_aratomop_159_128( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_W { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARATOMOP_159_128_W { + U1_PCIE_AXI4_SLV0_ARATOMOP_159_128_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_147.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_147.rs index 4e7493d..44c67ea 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_147.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_147.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_147` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_191_160` reader - u1_plda_pcie_axi4_slv0_aratomop_191_160"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_191_160` writer - u1_plda_pcie_axi4_slv0_aratomop_191_160"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_191_160` reader - u1_pcie_axi4_slv0_aratomop_191_160"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_191_160_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_191_160` writer - u1_pcie_axi4_slv0_aratomop_191_160"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_191_160_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_191_160"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_191_160"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aratomop_191_160( - &self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_R { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aratomop_191_160(&self) -> U1_PCIE_AXI4_SLV0_ARATOMOP_191_160_R { + U1_PCIE_AXI4_SLV0_ARATOMOP_191_160_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_191_160"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_191_160"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aratomop_191_160( + pub fn u1_pcie_axi4_slv0_aratomop_191_160( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_W { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARATOMOP_191_160_W { + U1_PCIE_AXI4_SLV0_ARATOMOP_191_160_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_148.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_148.rs index ec9e41e..ba4cf65 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_148.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_148.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_148` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_223_192` reader - u1_plda_pcie_axi4_slv0_aratomop_223_192"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_223_192` writer - u1_plda_pcie_axi4_slv0_aratomop_223_192"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_223_192` reader - u1_pcie_axi4_slv0_aratomop_223_192"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_223_192_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_223_192` writer - u1_pcie_axi4_slv0_aratomop_223_192"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_223_192_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_223_192"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_223_192"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aratomop_223_192( - &self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_R { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aratomop_223_192(&self) -> U1_PCIE_AXI4_SLV0_ARATOMOP_223_192_R { + U1_PCIE_AXI4_SLV0_ARATOMOP_223_192_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_223_192"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_223_192"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aratomop_223_192( + pub fn u1_pcie_axi4_slv0_aratomop_223_192( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_W { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARATOMOP_223_192_W { + U1_PCIE_AXI4_SLV0_ARATOMOP_223_192_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_149.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_149.rs index ac250d8..c4b07c0 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_149.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_149.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_149` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_255_224` reader - u1_plda_pcie_axi4_slv0_aratomop_255_224"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_255_224` writer - u1_plda_pcie_axi4_slv0_aratomop_255_224"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_255_224` reader - u1_pcie_axi4_slv0_aratomop_255_224"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_255_224_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_255_224` writer - u1_pcie_axi4_slv0_aratomop_255_224"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_255_224_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_255_224"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_255_224"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aratomop_255_224( - &self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_R { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aratomop_255_224(&self) -> U1_PCIE_AXI4_SLV0_ARATOMOP_255_224_R { + U1_PCIE_AXI4_SLV0_ARATOMOP_255_224_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_255_224"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_255_224"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aratomop_255_224( + pub fn u1_pcie_axi4_slv0_aratomop_255_224( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_W { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARATOMOP_255_224_W { + U1_PCIE_AXI4_SLV0_ARATOMOP_255_224_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_150.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_150.rs index 62681b0..cf1d775 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_150.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_150.rs @@ -2,61 +2,57 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_150` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_mst0_aratomop_257_256` reader - u1_plda_pcie_axi4_mst0_aratomop_257_256"] -pub type U1_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_mst0_aratomop_257_256` writer - u1_plda_pcie_axi4_mst0_aratomop_257_256"] -pub type U1_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u1_plda_pcie_axi4_slv0_arfunc` reader - u1_plda_pcie_axi4_slv0_arfunc"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARFUNC_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_arfunc` writer - u1_plda_pcie_axi4_slv0_arfunc"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; -#[doc = "Field `u1_plda_pcie_axi4_slv0_arregion` reader - u1_plda_pcie_axi4_slv0_arregion"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARREGION_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_arregion` writer - u1_plda_pcie_axi4_slv0_arregion"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARREGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `u1_pcie_axi4_mst0_aratomop_257_256` reader - u1_pcie_axi4_mst0_aratomop_257_256"] +pub type U1_PCIE_AXI4_MST0_ARATOMOP_257_256_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_aratomop_257_256` writer - u1_pcie_axi4_mst0_aratomop_257_256"] +pub type U1_PCIE_AXI4_MST0_ARATOMOP_257_256_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u1_pcie_axi4_slv0_arfunc` reader - u1_pcie_axi4_slv0_arfunc"] +pub type U1_PCIE_AXI4_SLV0_ARFUNC_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_arfunc` writer - u1_pcie_axi4_slv0_arfunc"] +pub type U1_PCIE_AXI4_SLV0_ARFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `u1_pcie_axi4_slv0_arregion` reader - u1_pcie_axi4_slv0_arregion"] +pub type U1_PCIE_AXI4_SLV0_ARREGION_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_arregion` writer - u1_pcie_axi4_slv0_arregion"] +pub type U1_PCIE_AXI4_SLV0_ARREGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 0:1 - u1_plda_pcie_axi4_mst0_aratomop_257_256"] + #[doc = "Bits 0:1 - u1_pcie_axi4_mst0_aratomop_257_256"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_aratomop_257_256( - &self, - ) -> U1_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R { - U1_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R::new((self.bits & 3) as u8) + pub fn u1_pcie_axi4_mst0_aratomop_257_256(&self) -> U1_PCIE_AXI4_MST0_ARATOMOP_257_256_R { + U1_PCIE_AXI4_MST0_ARATOMOP_257_256_R::new((self.bits & 3) as u8) } - #[doc = "Bits 2:16 - u1_plda_pcie_axi4_slv0_arfunc"] + #[doc = "Bits 2:16 - u1_pcie_axi4_slv0_arfunc"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_arfunc(&self) -> U1_PLDA_PCIE_AXI4_SLV0_ARFUNC_R { - U1_PLDA_PCIE_AXI4_SLV0_ARFUNC_R::new(((self.bits >> 2) & 0x7fff) as u16) + pub fn u1_pcie_axi4_slv0_arfunc(&self) -> U1_PCIE_AXI4_SLV0_ARFUNC_R { + U1_PCIE_AXI4_SLV0_ARFUNC_R::new(((self.bits >> 2) & 0x7fff) as u16) } - #[doc = "Bits 17:20 - u1_plda_pcie_axi4_slv0_arregion"] + #[doc = "Bits 17:20 - u1_pcie_axi4_slv0_arregion"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_arregion(&self) -> U1_PLDA_PCIE_AXI4_SLV0_ARREGION_R { - U1_PLDA_PCIE_AXI4_SLV0_ARREGION_R::new(((self.bits >> 17) & 0x0f) as u8) + pub fn u1_pcie_axi4_slv0_arregion(&self) -> U1_PCIE_AXI4_SLV0_ARREGION_R { + U1_PCIE_AXI4_SLV0_ARREGION_R::new(((self.bits >> 17) & 0x0f) as u8) } } impl W { - #[doc = "Bits 0:1 - u1_plda_pcie_axi4_mst0_aratomop_257_256"] + #[doc = "Bits 0:1 - u1_pcie_axi4_mst0_aratomop_257_256"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_mst0_aratomop_257_256( + pub fn u1_pcie_axi4_mst0_aratomop_257_256( &mut self, - ) -> U1_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_W { - U1_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_W::new(self, 0) + ) -> U1_PCIE_AXI4_MST0_ARATOMOP_257_256_W { + U1_PCIE_AXI4_MST0_ARATOMOP_257_256_W::new(self, 0) } - #[doc = "Bits 2:16 - u1_plda_pcie_axi4_slv0_arfunc"] + #[doc = "Bits 2:16 - u1_pcie_axi4_slv0_arfunc"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_arfunc( - &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARFUNC_W { - U1_PLDA_PCIE_AXI4_SLV0_ARFUNC_W::new(self, 2) + pub fn u1_pcie_axi4_slv0_arfunc(&mut self) -> U1_PCIE_AXI4_SLV0_ARFUNC_W { + U1_PCIE_AXI4_SLV0_ARFUNC_W::new(self, 2) } - #[doc = "Bits 17:20 - u1_plda_pcie_axi4_slv0_arregion"] + #[doc = "Bits 17:20 - u1_pcie_axi4_slv0_arregion"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_arregion( + pub fn u1_pcie_axi4_slv0_arregion( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARREGION_W { - U1_PLDA_PCIE_AXI4_SLV0_ARREGION_W::new(self, 17) + ) -> U1_PCIE_AXI4_SLV0_ARREGION_W { + U1_PCIE_AXI4_SLV0_ARREGION_W::new(self, 17) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_151.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_151.rs index 83cfb9e..86eb52e 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_151.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_151.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_151` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aruser_31_0` reader - u1_plda_pcie_axi4_slv0_aruser_31_0"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aruser_31_0` writer - u1_plda_pcie_axi4_slv0_aruser_31_0"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aruser_31_0` reader - u1_pcie_axi4_slv0_aruser_31_0"] +pub type U1_PCIE_AXI4_SLV0_ARUSER_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aruser_31_0` writer - u1_pcie_axi4_slv0_aruser_31_0"] +pub type U1_PCIE_AXI4_SLV0_ARUSER_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aruser_31_0"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aruser_31_0"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aruser_31_0(&self) -> U1_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_R { - U1_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aruser_31_0(&self) -> U1_PCIE_AXI4_SLV0_ARUSER_31_0_R { + U1_PCIE_AXI4_SLV0_ARUSER_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aruser_31_0"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aruser_31_0"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aruser_31_0( + pub fn u1_pcie_axi4_slv0_aruser_31_0( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_W { - U1_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARUSER_31_0_W { + U1_PCIE_AXI4_SLV0_ARUSER_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_152.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_152.rs index c20917f..b7b7a71 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_152.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_152.rs @@ -2,59 +2,57 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_152` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aruser_40_32` reader - u1_plda_pcie_axi4_slv0_aruser_40_32"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aruser_40_32` writer - u1_plda_pcie_axi4_slv0_aruser_40_32"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; -#[doc = "Field `u1_plda_pcie_axi4_slv0_awfunc` reader - u1_plda_pcie_axi4_slv0_awfunc"] -pub type U1_PLDA_PCIE_AXI4_SLV0_AWFUNC_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_awfunc` writer - u1_plda_pcie_axi4_slv0_awfunc"] -pub type U1_PLDA_PCIE_AXI4_SLV0_AWFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; -#[doc = "Field `u1_plda_pcie_axi4_slv0_awregion` reader - u1_plda_pcie_axi4_slv0_awregion"] -pub type U1_PLDA_PCIE_AXI4_SLV0_AWREGION_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_awregion` writer - u1_plda_pcie_axi4_slv0_awregion"] -pub type U1_PLDA_PCIE_AXI4_SLV0_AWREGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `u1_pcie_axi4_slv0_aruser_40_32` reader - u1_pcie_axi4_slv0_aruser_40_32"] +pub type U1_PCIE_AXI4_SLV0_ARUSER_40_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aruser_40_32` writer - u1_pcie_axi4_slv0_aruser_40_32"] +pub type U1_PCIE_AXI4_SLV0_ARUSER_40_32_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; +#[doc = "Field `u1_pcie_axi4_slv0_awfunc` reader - u1_pcie_axi4_slv0_awfunc"] +pub type U1_PCIE_AXI4_SLV0_AWFUNC_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_awfunc` writer - u1_pcie_axi4_slv0_awfunc"] +pub type U1_PCIE_AXI4_SLV0_AWFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `u1_pcie_axi4_slv0_awregion` reader - u1_pcie_axi4_slv0_awregion"] +pub type U1_PCIE_AXI4_SLV0_AWREGION_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_awregion` writer - u1_pcie_axi4_slv0_awregion"] +pub type U1_PCIE_AXI4_SLV0_AWREGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 0:8 - u1_plda_pcie_axi4_slv0_aruser_40_32"] + #[doc = "Bits 0:8 - u1_pcie_axi4_slv0_aruser_40_32"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aruser_40_32(&self) -> U1_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_R { - U1_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_R::new((self.bits & 0x01ff) as u16) + pub fn u1_pcie_axi4_slv0_aruser_40_32(&self) -> U1_PCIE_AXI4_SLV0_ARUSER_40_32_R { + U1_PCIE_AXI4_SLV0_ARUSER_40_32_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:23 - u1_plda_pcie_axi4_slv0_awfunc"] + #[doc = "Bits 9:23 - u1_pcie_axi4_slv0_awfunc"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_awfunc(&self) -> U1_PLDA_PCIE_AXI4_SLV0_AWFUNC_R { - U1_PLDA_PCIE_AXI4_SLV0_AWFUNC_R::new(((self.bits >> 9) & 0x7fff) as u16) + pub fn u1_pcie_axi4_slv0_awfunc(&self) -> U1_PCIE_AXI4_SLV0_AWFUNC_R { + U1_PCIE_AXI4_SLV0_AWFUNC_R::new(((self.bits >> 9) & 0x7fff) as u16) } - #[doc = "Bits 24:27 - u1_plda_pcie_axi4_slv0_awregion"] + #[doc = "Bits 24:27 - u1_pcie_axi4_slv0_awregion"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_awregion(&self) -> U1_PLDA_PCIE_AXI4_SLV0_AWREGION_R { - U1_PLDA_PCIE_AXI4_SLV0_AWREGION_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn u1_pcie_axi4_slv0_awregion(&self) -> U1_PCIE_AXI4_SLV0_AWREGION_R { + U1_PCIE_AXI4_SLV0_AWREGION_R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { - #[doc = "Bits 0:8 - u1_plda_pcie_axi4_slv0_aruser_40_32"] + #[doc = "Bits 0:8 - u1_pcie_axi4_slv0_aruser_40_32"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aruser_40_32( + pub fn u1_pcie_axi4_slv0_aruser_40_32( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_W { - U1_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARUSER_40_32_W { + U1_PCIE_AXI4_SLV0_ARUSER_40_32_W::new(self, 0) } - #[doc = "Bits 9:23 - u1_plda_pcie_axi4_slv0_awfunc"] + #[doc = "Bits 9:23 - u1_pcie_axi4_slv0_awfunc"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_awfunc( - &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_AWFUNC_W { - U1_PLDA_PCIE_AXI4_SLV0_AWFUNC_W::new(self, 9) + pub fn u1_pcie_axi4_slv0_awfunc(&mut self) -> U1_PCIE_AXI4_SLV0_AWFUNC_W { + U1_PCIE_AXI4_SLV0_AWFUNC_W::new(self, 9) } - #[doc = "Bits 24:27 - u1_plda_pcie_axi4_slv0_awregion"] + #[doc = "Bits 24:27 - u1_pcie_axi4_slv0_awregion"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_awregion( + pub fn u1_pcie_axi4_slv0_awregion( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_AWREGION_W { - U1_PLDA_PCIE_AXI4_SLV0_AWREGION_W::new(self, 24) + ) -> U1_PCIE_AXI4_SLV0_AWREGION_W { + U1_PCIE_AXI4_SLV0_AWREGION_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_153.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_153.rs index bee94f3..68f3958 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_153.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_153.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_153` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_awuser_31_0` reader - u1_plda_pcie_axi4_slv0_awuser_31_0"] -pub type U1_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_awuser_31_0` writer - u1_plda_pcie_axi4_slv0_awuser_31_0"] -pub type U1_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_awuser_31_0` reader - u1_pcie_axi4_slv0_awuser_31_0"] +pub type U1_PCIE_AXI4_SLV0_AWUSER_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_awuser_31_0` writer - u1_pcie_axi4_slv0_awuser_31_0"] +pub type U1_PCIE_AXI4_SLV0_AWUSER_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_awuser_31_0"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_awuser_31_0"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_awuser_31_0(&self) -> U1_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_R { - U1_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_awuser_31_0(&self) -> U1_PCIE_AXI4_SLV0_AWUSER_31_0_R { + U1_PCIE_AXI4_SLV0_AWUSER_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_awuser_31_0"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_awuser_31_0"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_awuser_31_0( + pub fn u1_pcie_axi4_slv0_awuser_31_0( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_W { - U1_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_AWUSER_31_0_W { + U1_PCIE_AXI4_SLV0_AWUSER_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_154.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_154.rs index 21bb1e4..7339e15 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_154.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_154.rs @@ -2,32 +2,32 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_154` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_awuser_40_32` reader - u1_plda_pcie_axi4_slv0_awuser_40_32"] -pub type U1_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_awuser_40_32` writer - u1_plda_pcie_axi4_slv0_awuser_40_32"] -pub type U1_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; -#[doc = "Field `u1_plda_pcie_axi4_slv0_rderr` reader - u1_plda_pcie_axi4_slv0_rderr"] -pub type U1_PLDA_PCIE_AXI4_SLV0_RDERR_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_awuser_40_32` reader - u1_pcie_axi4_slv0_awuser_40_32"] +pub type U1_PCIE_AXI4_SLV0_AWUSER_40_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_awuser_40_32` writer - u1_pcie_axi4_slv0_awuser_40_32"] +pub type U1_PCIE_AXI4_SLV0_AWUSER_40_32_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; +#[doc = "Field `u1_pcie_axi4_slv0_rderr` reader - u1_pcie_axi4_slv0_rderr"] +pub type U1_PCIE_AXI4_SLV0_RDERR_R = crate::FieldReader; impl R { - #[doc = "Bits 0:8 - u1_plda_pcie_axi4_slv0_awuser_40_32"] + #[doc = "Bits 0:8 - u1_pcie_axi4_slv0_awuser_40_32"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_awuser_40_32(&self) -> U1_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_R { - U1_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_R::new((self.bits & 0x01ff) as u16) + pub fn u1_pcie_axi4_slv0_awuser_40_32(&self) -> U1_PCIE_AXI4_SLV0_AWUSER_40_32_R { + U1_PCIE_AXI4_SLV0_AWUSER_40_32_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:16 - u1_plda_pcie_axi4_slv0_rderr"] + #[doc = "Bits 9:16 - u1_pcie_axi4_slv0_rderr"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_rderr(&self) -> U1_PLDA_PCIE_AXI4_SLV0_RDERR_R { - U1_PLDA_PCIE_AXI4_SLV0_RDERR_R::new(((self.bits >> 9) & 0xff) as u8) + pub fn u1_pcie_axi4_slv0_rderr(&self) -> U1_PCIE_AXI4_SLV0_RDERR_R { + U1_PCIE_AXI4_SLV0_RDERR_R::new(((self.bits >> 9) & 0xff) as u8) } } impl W { - #[doc = "Bits 0:8 - u1_plda_pcie_axi4_slv0_awuser_40_32"] + #[doc = "Bits 0:8 - u1_pcie_axi4_slv0_awuser_40_32"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_awuser_40_32( + pub fn u1_pcie_axi4_slv0_awuser_40_32( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_W { - U1_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_AWUSER_40_32_W { + U1_PCIE_AXI4_SLV0_AWUSER_40_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_155.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_155.rs index 126f18e..836ffd4 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_155.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_155.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_155` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_ruser` reader - u1_plda_pcie_axi4_slv0_ruser"] -pub type U1_PLDA_PCIE_AXI4_SLV0_RUSER_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_ruser` reader - u1_pcie_axi4_slv0_ruser"] +pub type U1_PCIE_AXI4_SLV0_RUSER_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_ruser"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_ruser"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_ruser(&self) -> U1_PLDA_PCIE_AXI4_SLV0_RUSER_R { - U1_PLDA_PCIE_AXI4_SLV0_RUSER_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_ruser(&self) -> U1_PCIE_AXI4_SLV0_RUSER_R { + U1_PCIE_AXI4_SLV0_RUSER_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_156.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_156.rs index 0b34e2f..b583e15 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_156.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_156.rs @@ -2,42 +2,38 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_156` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_wderr` reader - u1_plda_pcie_axi4_slv0_wderr"] -pub type U1_PLDA_PCIE_AXI4_SLV0_WDERR_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_wderr` writer - u1_plda_pcie_axi4_slv0_wderr"] -pub type U1_PLDA_PCIE_AXI4_SLV0_WDERR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `u1_plda_pcie_axi4_slvl_arfunc` reader - u1_plda_pcie_axi4_slvl_arfunc"] -pub type U1_PLDA_PCIE_AXI4_SLVL_ARFUNC_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slvl_arfunc` writer - u1_plda_pcie_axi4_slvl_arfunc"] -pub type U1_PLDA_PCIE_AXI4_SLVL_ARFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `u1_pcie_axi4_slv0_wderr` reader - u1_pcie_axi4_slv0_wderr"] +pub type U1_PCIE_AXI4_SLV0_WDERR_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_wderr` writer - u1_pcie_axi4_slv0_wderr"] +pub type U1_PCIE_AXI4_SLV0_WDERR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `u1_pcie_axi4_slvl_arfunc` reader - u1_pcie_axi4_slvl_arfunc"] +pub type U1_PCIE_AXI4_SLVL_ARFUNC_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slvl_arfunc` writer - u1_pcie_axi4_slvl_arfunc"] +pub type U1_PCIE_AXI4_SLVL_ARFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; impl R { - #[doc = "Bits 0:7 - u1_plda_pcie_axi4_slv0_wderr"] + #[doc = "Bits 0:7 - u1_pcie_axi4_slv0_wderr"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_wderr(&self) -> U1_PLDA_PCIE_AXI4_SLV0_WDERR_R { - U1_PLDA_PCIE_AXI4_SLV0_WDERR_R::new((self.bits & 0xff) as u8) + pub fn u1_pcie_axi4_slv0_wderr(&self) -> U1_PCIE_AXI4_SLV0_WDERR_R { + U1_PCIE_AXI4_SLV0_WDERR_R::new((self.bits & 0xff) as u8) } - #[doc = "Bits 8:22 - u1_plda_pcie_axi4_slvl_arfunc"] + #[doc = "Bits 8:22 - u1_pcie_axi4_slvl_arfunc"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slvl_arfunc(&self) -> U1_PLDA_PCIE_AXI4_SLVL_ARFUNC_R { - U1_PLDA_PCIE_AXI4_SLVL_ARFUNC_R::new(((self.bits >> 8) & 0x7fff) as u16) + pub fn u1_pcie_axi4_slvl_arfunc(&self) -> U1_PCIE_AXI4_SLVL_ARFUNC_R { + U1_PCIE_AXI4_SLVL_ARFUNC_R::new(((self.bits >> 8) & 0x7fff) as u16) } } impl W { - #[doc = "Bits 0:7 - u1_plda_pcie_axi4_slv0_wderr"] + #[doc = "Bits 0:7 - u1_pcie_axi4_slv0_wderr"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_wderr( - &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_WDERR_W { - U1_PLDA_PCIE_AXI4_SLV0_WDERR_W::new(self, 0) + pub fn u1_pcie_axi4_slv0_wderr(&mut self) -> U1_PCIE_AXI4_SLV0_WDERR_W { + U1_PCIE_AXI4_SLV0_WDERR_W::new(self, 0) } - #[doc = "Bits 8:22 - u1_plda_pcie_axi4_slvl_arfunc"] + #[doc = "Bits 8:22 - u1_pcie_axi4_slvl_arfunc"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slvl_arfunc( - &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLVL_ARFUNC_W { - U1_PLDA_PCIE_AXI4_SLVL_ARFUNC_W::new(self, 8) + pub fn u1_pcie_axi4_slvl_arfunc(&mut self) -> U1_PCIE_AXI4_SLVL_ARFUNC_W { + U1_PCIE_AXI4_SLVL_ARFUNC_W::new(self, 8) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_157.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_157.rs index f310957..7f0785e 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_157.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_157.rs @@ -2,94 +2,90 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_157` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slvl_awfunc` reader - u1_plda_pcie_axi4_slvl_awfunc"] -pub type U1_PLDA_PCIE_AXI4_SLVL_AWFUNC_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slvl_awfunc` writer - u1_plda_pcie_axi4_slvl_awfunc"] -pub type U1_PLDA_PCIE_AXI4_SLVL_AWFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; -#[doc = "Field `u1_plda_pcie_bus_width_o` reader - u1_plda_pcie_bus_width_o"] -pub type U1_PLDA_PCIE_BUS_WIDTH_O_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_bypass_codec` reader - u1_plda_pcie_bypass_codec"] -pub type U1_PLDA_PCIE_BYPASS_CODEC_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_bypass_codec` writer - u1_plda_pcie_bypass_codec"] -pub type U1_PLDA_PCIE_BYPASS_CODEC_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_ckref_src` reader - u1_plda_pcie_ckref_src"] -pub type U1_PLDA_PCIE_CKREF_SRC_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_ckref_src` writer - u1_plda_pcie_ckref_src"] -pub type U1_PLDA_PCIE_CKREF_SRC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u1_plda_pcie_clk_sel` reader - u1_plda_pcie_clk_sel"] -pub type U1_PLDA_PCIE_CLK_SEL_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_clk_sel` writer - u1_plda_pcie_clk_sel"] -pub type U1_PLDA_PCIE_CLK_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u1_plda_pcie_clkreq` reader - u1_plda_pcie_clkreq"] -pub type U1_PLDA_PCIE_CLKREQ_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_clkreq` writer - u1_plda_pcie_clkreq"] -pub type U1_PLDA_PCIE_CLKREQ_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_axi4_slvl_awfunc` reader - u1_pcie_axi4_slvl_awfunc"] +pub type U1_PCIE_AXI4_SLVL_AWFUNC_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slvl_awfunc` writer - u1_pcie_axi4_slvl_awfunc"] +pub type U1_PCIE_AXI4_SLVL_AWFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `u1_pcie_bus_width_o` reader - u1_pcie_bus_width_o"] +pub type U1_PCIE_BUS_WIDTH_O_R = crate::FieldReader; +#[doc = "Field `u1_pcie_bypass_codec` reader - u1_pcie_bypass_codec"] +pub type U1_PCIE_BYPASS_CODEC_R = crate::BitReader; +#[doc = "Field `u1_pcie_bypass_codec` writer - u1_pcie_bypass_codec"] +pub type U1_PCIE_BYPASS_CODEC_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_ckref_src` reader - u1_pcie_ckref_src"] +pub type U1_PCIE_CKREF_SRC_R = crate::FieldReader; +#[doc = "Field `u1_pcie_ckref_src` writer - u1_pcie_ckref_src"] +pub type U1_PCIE_CKREF_SRC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u1_pcie_clk_sel` reader - u1_pcie_clk_sel"] +pub type U1_PCIE_CLK_SEL_R = crate::FieldReader; +#[doc = "Field `u1_pcie_clk_sel` writer - u1_pcie_clk_sel"] +pub type U1_PCIE_CLK_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u1_pcie_clkreq` reader - u1_pcie_clkreq"] +pub type U1_PCIE_CLKREQ_R = crate::BitReader; +#[doc = "Field `u1_pcie_clkreq` writer - u1_pcie_clkreq"] +pub type U1_PCIE_CLKREQ_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bits 0:14 - u1_plda_pcie_axi4_slvl_awfunc"] + #[doc = "Bits 0:14 - u1_pcie_axi4_slvl_awfunc"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slvl_awfunc(&self) -> U1_PLDA_PCIE_AXI4_SLVL_AWFUNC_R { - U1_PLDA_PCIE_AXI4_SLVL_AWFUNC_R::new((self.bits & 0x7fff) as u16) + pub fn u1_pcie_axi4_slvl_awfunc(&self) -> U1_PCIE_AXI4_SLVL_AWFUNC_R { + U1_PCIE_AXI4_SLVL_AWFUNC_R::new((self.bits & 0x7fff) as u16) } - #[doc = "Bits 15:16 - u1_plda_pcie_bus_width_o"] + #[doc = "Bits 15:16 - u1_pcie_bus_width_o"] #[inline(always)] - pub fn u1_plda_pcie_bus_width_o(&self) -> U1_PLDA_PCIE_BUS_WIDTH_O_R { - U1_PLDA_PCIE_BUS_WIDTH_O_R::new(((self.bits >> 15) & 3) as u8) + pub fn u1_pcie_bus_width_o(&self) -> U1_PCIE_BUS_WIDTH_O_R { + U1_PCIE_BUS_WIDTH_O_R::new(((self.bits >> 15) & 3) as u8) } - #[doc = "Bit 17 - u1_plda_pcie_bypass_codec"] + #[doc = "Bit 17 - u1_pcie_bypass_codec"] #[inline(always)] - pub fn u1_plda_pcie_bypass_codec(&self) -> U1_PLDA_PCIE_BYPASS_CODEC_R { - U1_PLDA_PCIE_BYPASS_CODEC_R::new(((self.bits >> 17) & 1) != 0) + pub fn u1_pcie_bypass_codec(&self) -> U1_PCIE_BYPASS_CODEC_R { + U1_PCIE_BYPASS_CODEC_R::new(((self.bits >> 17) & 1) != 0) } - #[doc = "Bits 18:19 - u1_plda_pcie_ckref_src"] + #[doc = "Bits 18:19 - u1_pcie_ckref_src"] #[inline(always)] - pub fn u1_plda_pcie_ckref_src(&self) -> U1_PLDA_PCIE_CKREF_SRC_R { - U1_PLDA_PCIE_CKREF_SRC_R::new(((self.bits >> 18) & 3) as u8) + pub fn u1_pcie_ckref_src(&self) -> U1_PCIE_CKREF_SRC_R { + U1_PCIE_CKREF_SRC_R::new(((self.bits >> 18) & 3) as u8) } - #[doc = "Bits 20:21 - u1_plda_pcie_clk_sel"] + #[doc = "Bits 20:21 - u1_pcie_clk_sel"] #[inline(always)] - pub fn u1_plda_pcie_clk_sel(&self) -> U1_PLDA_PCIE_CLK_SEL_R { - U1_PLDA_PCIE_CLK_SEL_R::new(((self.bits >> 20) & 3) as u8) + pub fn u1_pcie_clk_sel(&self) -> U1_PCIE_CLK_SEL_R { + U1_PCIE_CLK_SEL_R::new(((self.bits >> 20) & 3) as u8) } - #[doc = "Bit 22 - u1_plda_pcie_clkreq"] + #[doc = "Bit 22 - u1_pcie_clkreq"] #[inline(always)] - pub fn u1_plda_pcie_clkreq(&self) -> U1_PLDA_PCIE_CLKREQ_R { - U1_PLDA_PCIE_CLKREQ_R::new(((self.bits >> 22) & 1) != 0) + pub fn u1_pcie_clkreq(&self) -> U1_PCIE_CLKREQ_R { + U1_PCIE_CLKREQ_R::new(((self.bits >> 22) & 1) != 0) } } impl W { - #[doc = "Bits 0:14 - u1_plda_pcie_axi4_slvl_awfunc"] + #[doc = "Bits 0:14 - u1_pcie_axi4_slvl_awfunc"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slvl_awfunc( - &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLVL_AWFUNC_W { - U1_PLDA_PCIE_AXI4_SLVL_AWFUNC_W::new(self, 0) + pub fn u1_pcie_axi4_slvl_awfunc(&mut self) -> U1_PCIE_AXI4_SLVL_AWFUNC_W { + U1_PCIE_AXI4_SLVL_AWFUNC_W::new(self, 0) } - #[doc = "Bit 17 - u1_plda_pcie_bypass_codec"] + #[doc = "Bit 17 - u1_pcie_bypass_codec"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_bypass_codec( - &mut self, - ) -> U1_PLDA_PCIE_BYPASS_CODEC_W { - U1_PLDA_PCIE_BYPASS_CODEC_W::new(self, 17) + pub fn u1_pcie_bypass_codec(&mut self) -> U1_PCIE_BYPASS_CODEC_W { + U1_PCIE_BYPASS_CODEC_W::new(self, 17) } - #[doc = "Bits 18:19 - u1_plda_pcie_ckref_src"] + #[doc = "Bits 18:19 - u1_pcie_ckref_src"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_ckref_src(&mut self) -> U1_PLDA_PCIE_CKREF_SRC_W { - U1_PLDA_PCIE_CKREF_SRC_W::new(self, 18) + pub fn u1_pcie_ckref_src(&mut self) -> U1_PCIE_CKREF_SRC_W { + U1_PCIE_CKREF_SRC_W::new(self, 18) } - #[doc = "Bits 20:21 - u1_plda_pcie_clk_sel"] + #[doc = "Bits 20:21 - u1_pcie_clk_sel"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_clk_sel(&mut self) -> U1_PLDA_PCIE_CLK_SEL_W { - U1_PLDA_PCIE_CLK_SEL_W::new(self, 20) + pub fn u1_pcie_clk_sel(&mut self) -> U1_PCIE_CLK_SEL_W { + U1_PCIE_CLK_SEL_W::new(self, 20) } - #[doc = "Bit 22 - u1_plda_pcie_clkreq"] + #[doc = "Bit 22 - u1_pcie_clkreq"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_clkreq(&mut self) -> U1_PLDA_PCIE_CLKREQ_W { - U1_PLDA_PCIE_CLKREQ_W::new(self, 22) + pub fn u1_pcie_clkreq(&mut self) -> U1_PCIE_CLKREQ_W { + U1_PCIE_CLKREQ_W::new(self, 22) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_17.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_17.rs index a38ddcf..fd6de00 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_17.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_17.rs @@ -46,8 +46,8 @@ pub type U0_HIFI4_TRIGIN_IDMA_W<'a, REG> = crate::BitWriter<'a, REG>; pub type U0_HIFI4_TRIGOUT_IDMA_R = crate::BitReader; #[doc = "Field `u0_hifi4_xocdmode` reader - Debug signal"] pub type U0_HIFI4_XOCDMODE_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_align_detect` reader - u0_plda_pcie_align_detect"] -pub type U0_PLDA_PCIE_ALIGN_DETECT_R = crate::BitReader; +#[doc = "Field `u0_pcie_align_detect` reader - u0_pcie_align_detect"] +pub type U0_PCIE_ALIGN_DETECT_R = crate::BitReader; impl R { #[doc = "Bit 0 - SRAM/ROM configuration. SLP: sleep enable, high active, default is low."] #[inline(always)] @@ -109,10 +109,10 @@ impl R { pub fn u0_hifi4_xocdmode(&self) -> U0_HIFI4_XOCDMODE_R { U0_HIFI4_XOCDMODE_R::new(((self.bits >> 15) & 1) != 0) } - #[doc = "Bit 16 - u0_plda_pcie_align_detect"] + #[doc = "Bit 16 - u0_pcie_align_detect"] #[inline(always)] - pub fn u0_plda_pcie_align_detect(&self) -> U0_PLDA_PCIE_ALIGN_DETECT_R { - U0_PLDA_PCIE_ALIGN_DETECT_R::new(((self.bits >> 16) & 1) != 0) + pub fn u0_pcie_align_detect(&self) -> U0_PCIE_ALIGN_DETECT_R { + U0_PCIE_ALIGN_DETECT_R::new(((self.bits >> 16) & 1) != 0) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_18.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_18.rs index d6716ff..e78e003 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_18.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_18.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_18` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_31_0` reader - u0_plda_pcie_axi4_mst0_aratomop_31_0"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_31_0` reader - u0_pcie_axi4_mst0_aratomop_31_0"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_31_0"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_31_0(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_31_0_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_31_0_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_31_0(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_31_0_R { + U0_PCIE_AXI4_MST0_ARATOMOP_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_184.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_184.rs index 64eb35b..211263a 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_184.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_184.rs @@ -2,64 +2,62 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_184` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_k_phyparam_839_832` reader - u1_plda_pcie_k_phyparam_839_832"] -pub type U1_PLDA_PCIE_K_PHYPARAM_839_832_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_k_phyparam_839_832` writer - u1_plda_pcie_k_phyparam_839_832"] -pub type U1_PLDA_PCIE_K_PHYPARAM_839_832_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `u1_plda_pcie_k_rp_nep` reader - u1_plda_pcie_k_rp_nep"] -pub type U1_PLDA_PCIE_K_RP_NEP_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_k_rp_nep` writer - u1_plda_pcie_k_rp_nep"] -pub type U1_PLDA_PCIE_K_RP_NEP_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_l1sub_entack` reader - u1_plda_pcie_l1sub_entack"] -pub type U1_PLDA_PCIE_L1SUB_ENTACK_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_l1sub_entreq` reader - u1_plda_pcie_l1sub_entreq"] -pub type U1_PLDA_PCIE_L1SUB_ENTREQ_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_l1sub_entreq` writer - u1_plda_pcie_l1sub_entreq"] -pub type U1_PLDA_PCIE_L1SUB_ENTREQ_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_k_phyparam_839_832` reader - u1_pcie_k_phyparam_839_832"] +pub type U1_PCIE_K_PHYPARAM_839_832_R = crate::FieldReader; +#[doc = "Field `u1_pcie_k_phyparam_839_832` writer - u1_pcie_k_phyparam_839_832"] +pub type U1_PCIE_K_PHYPARAM_839_832_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `u1_pcie_k_rp_nep` reader - u1_pcie_k_rp_nep"] +pub type U1_PCIE_K_RP_NEP_R = crate::BitReader; +#[doc = "Field `u1_pcie_k_rp_nep` writer - u1_pcie_k_rp_nep"] +pub type U1_PCIE_K_RP_NEP_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_l1sub_entack` reader - u1_pcie_l1sub_entack"] +pub type U1_PCIE_L1SUB_ENTACK_R = crate::BitReader; +#[doc = "Field `u1_pcie_l1sub_entreq` reader - u1_pcie_l1sub_entreq"] +pub type U1_PCIE_L1SUB_ENTREQ_R = crate::BitReader; +#[doc = "Field `u1_pcie_l1sub_entreq` writer - u1_pcie_l1sub_entreq"] +pub type U1_PCIE_L1SUB_ENTREQ_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bits 0:7 - u1_plda_pcie_k_phyparam_839_832"] + #[doc = "Bits 0:7 - u1_pcie_k_phyparam_839_832"] #[inline(always)] - pub fn u1_plda_pcie_k_phyparam_839_832(&self) -> U1_PLDA_PCIE_K_PHYPARAM_839_832_R { - U1_PLDA_PCIE_K_PHYPARAM_839_832_R::new((self.bits & 0xff) as u8) + pub fn u1_pcie_k_phyparam_839_832(&self) -> U1_PCIE_K_PHYPARAM_839_832_R { + U1_PCIE_K_PHYPARAM_839_832_R::new((self.bits & 0xff) as u8) } - #[doc = "Bit 8 - u1_plda_pcie_k_rp_nep"] + #[doc = "Bit 8 - u1_pcie_k_rp_nep"] #[inline(always)] - pub fn u1_plda_pcie_k_rp_nep(&self) -> U1_PLDA_PCIE_K_RP_NEP_R { - U1_PLDA_PCIE_K_RP_NEP_R::new(((self.bits >> 8) & 1) != 0) + pub fn u1_pcie_k_rp_nep(&self) -> U1_PCIE_K_RP_NEP_R { + U1_PCIE_K_RP_NEP_R::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 9 - u1_plda_pcie_l1sub_entack"] + #[doc = "Bit 9 - u1_pcie_l1sub_entack"] #[inline(always)] - pub fn u1_plda_pcie_l1sub_entack(&self) -> U1_PLDA_PCIE_L1SUB_ENTACK_R { - U1_PLDA_PCIE_L1SUB_ENTACK_R::new(((self.bits >> 9) & 1) != 0) + pub fn u1_pcie_l1sub_entack(&self) -> U1_PCIE_L1SUB_ENTACK_R { + U1_PCIE_L1SUB_ENTACK_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 10 - u1_plda_pcie_l1sub_entreq"] + #[doc = "Bit 10 - u1_pcie_l1sub_entreq"] #[inline(always)] - pub fn u1_plda_pcie_l1sub_entreq(&self) -> U1_PLDA_PCIE_L1SUB_ENTREQ_R { - U1_PLDA_PCIE_L1SUB_ENTREQ_R::new(((self.bits >> 10) & 1) != 0) + pub fn u1_pcie_l1sub_entreq(&self) -> U1_PCIE_L1SUB_ENTREQ_R { + U1_PCIE_L1SUB_ENTREQ_R::new(((self.bits >> 10) & 1) != 0) } } impl W { - #[doc = "Bits 0:7 - u1_plda_pcie_k_phyparam_839_832"] + #[doc = "Bits 0:7 - u1_pcie_k_phyparam_839_832"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_k_phyparam_839_832( + pub fn u1_pcie_k_phyparam_839_832( &mut self, - ) -> U1_PLDA_PCIE_K_PHYPARAM_839_832_W { - U1_PLDA_PCIE_K_PHYPARAM_839_832_W::new(self, 0) + ) -> U1_PCIE_K_PHYPARAM_839_832_W { + U1_PCIE_K_PHYPARAM_839_832_W::new(self, 0) } - #[doc = "Bit 8 - u1_plda_pcie_k_rp_nep"] + #[doc = "Bit 8 - u1_pcie_k_rp_nep"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_k_rp_nep(&mut self) -> U1_PLDA_PCIE_K_RP_NEP_W { - U1_PLDA_PCIE_K_RP_NEP_W::new(self, 8) + pub fn u1_pcie_k_rp_nep(&mut self) -> U1_PCIE_K_RP_NEP_W { + U1_PCIE_K_RP_NEP_W::new(self, 8) } - #[doc = "Bit 10 - u1_plda_pcie_l1sub_entreq"] + #[doc = "Bit 10 - u1_pcie_l1sub_entreq"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_l1sub_entreq( - &mut self, - ) -> U1_PLDA_PCIE_L1SUB_ENTREQ_W { - U1_PLDA_PCIE_L1SUB_ENTREQ_W::new(self, 10) + pub fn u1_pcie_l1sub_entreq(&mut self) -> U1_PCIE_L1SUB_ENTREQ_W { + U1_PCIE_L1SUB_ENTREQ_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_185.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_185.rs index 06c87fb..07d6d26 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_185.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_185.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_185` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_local_interrupt_in` reader - u1_plda_pcie_local_interrupt_in"] -pub type U1_PLDA_PCIE_LOCAL_INTERRUPT_IN_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_local_interrupt_in` writer - u1_plda_pcie_local_interrupt_in"] -pub type U1_PLDA_PCIE_LOCAL_INTERRUPT_IN_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_local_interrupt_in` reader - u1_pcie_local_interrupt_in"] +pub type U1_PCIE_LOCAL_INTERRUPT_IN_R = crate::FieldReader; +#[doc = "Field `u1_pcie_local_interrupt_in` writer - u1_pcie_local_interrupt_in"] +pub type U1_PCIE_LOCAL_INTERRUPT_IN_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_local_interrupt_in"] + #[doc = "Bits 0:31 - u1_pcie_local_interrupt_in"] #[inline(always)] - pub fn u1_plda_pcie_local_interrupt_in(&self) -> U1_PLDA_PCIE_LOCAL_INTERRUPT_IN_R { - U1_PLDA_PCIE_LOCAL_INTERRUPT_IN_R::new(self.bits) + pub fn u1_pcie_local_interrupt_in(&self) -> U1_PCIE_LOCAL_INTERRUPT_IN_R { + U1_PCIE_LOCAL_INTERRUPT_IN_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_local_interrupt_in"] + #[doc = "Bits 0:31 - u1_pcie_local_interrupt_in"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_local_interrupt_in( + pub fn u1_pcie_local_interrupt_in( &mut self, - ) -> U1_PLDA_PCIE_LOCAL_INTERRUPT_IN_W { - U1_PLDA_PCIE_LOCAL_INTERRUPT_IN_W::new(self, 0) + ) -> U1_PCIE_LOCAL_INTERRUPT_IN_W { + U1_PCIE_LOCAL_INTERRUPT_IN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_186.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_186.rs index 7428383..80758bb 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_186.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_186.rs @@ -2,108 +2,104 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_186` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_mperstn` reader - u1_plda_pcie_mperstn"] -pub type U1_PLDA_PCIE_MPERSTN_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_mperstn` writer - u1_plda_pcie_mperstn"] -pub type U1_PLDA_PCIE_MPERSTN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_pcie_ebuf_mode` reader - u1_plda_pcie_pcie_ebuf_mode"] -pub type U1_PLDA_PCIE_PCIE_EBUF_MODE_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_pcie_ebuf_mode` writer - u1_plda_pcie_pcie_ebuf_mode"] -pub type U1_PLDA_PCIE_PCIE_EBUF_MODE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_pcie_phy_test_cfg` reader - u1_plda_pcie_pcie_phy_test_cfg"] -pub type U1_PLDA_PCIE_PCIE_PHY_TEST_CFG_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pcie_phy_test_cfg` writer - u1_plda_pcie_pcie_phy_test_cfg"] -pub type U1_PLDA_PCIE_PCIE_PHY_TEST_CFG_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; -#[doc = "Field `u1_plda_pcie_pcie_rx_eq_training` reader - u1_plda_pcie_pcie_rx_eq_training"] -pub type U1_PLDA_PCIE_PCIE_RX_EQ_TRAINING_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_pcie_rx_eq_training` writer - u1_plda_pcie_pcie_rx_eq_training"] -pub type U1_PLDA_PCIE_PCIE_RX_EQ_TRAINING_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_pcie_rxterm_en` reader - u1_plda_pcie_pcie_rxterm_en"] -pub type U1_PLDA_PCIE_PCIE_RXTERM_EN_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_pcie_rxterm_en` writer - u1_plda_pcie_pcie_rxterm_en"] -pub type U1_PLDA_PCIE_PCIE_RXTERM_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_pcie_tx_oneszeros` reader - u1_plda_pcie_pcie_tx_oneszeros"] -pub type U1_PLDA_PCIE_PCIE_TX_ONESZEROS_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_pcie_tx_oneszeros` writer - u1_plda_pcie_pcie_tx_oneszeros"] -pub type U1_PLDA_PCIE_PCIE_TX_ONESZEROS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_mperstn` reader - u1_pcie_mperstn"] +pub type U1_PCIE_MPERSTN_R = crate::BitReader; +#[doc = "Field `u1_pcie_mperstn` writer - u1_pcie_mperstn"] +pub type U1_PCIE_MPERSTN_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_pcie_ebuf_mode` reader - u1_pcie_pcie_ebuf_mode"] +pub type U1_PCIE_PCIE_EBUF_MODE_R = crate::BitReader; +#[doc = "Field `u1_pcie_pcie_ebuf_mode` writer - u1_pcie_pcie_ebuf_mode"] +pub type U1_PCIE_PCIE_EBUF_MODE_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_pcie_phy_test_cfg` reader - u1_pcie_pcie_phy_test_cfg"] +pub type U1_PCIE_PCIE_PHY_TEST_CFG_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pcie_phy_test_cfg` writer - u1_pcie_pcie_phy_test_cfg"] +pub type U1_PCIE_PCIE_PHY_TEST_CFG_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; +#[doc = "Field `u1_pcie_pcie_rx_eq_training` reader - u1_pcie_pcie_rx_eq_training"] +pub type U1_PCIE_PCIE_RX_EQ_TRAINING_R = crate::BitReader; +#[doc = "Field `u1_pcie_pcie_rx_eq_training` writer - u1_pcie_pcie_rx_eq_training"] +pub type U1_PCIE_PCIE_RX_EQ_TRAINING_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_pcie_rxterm_en` reader - u1_pcie_pcie_rxterm_en"] +pub type U1_PCIE_PCIE_RXTERM_EN_R = crate::BitReader; +#[doc = "Field `u1_pcie_pcie_rxterm_en` writer - u1_pcie_pcie_rxterm_en"] +pub type U1_PCIE_PCIE_RXTERM_EN_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_pcie_tx_oneszeros` reader - u1_pcie_pcie_tx_oneszeros"] +pub type U1_PCIE_PCIE_TX_ONESZEROS_R = crate::BitReader; +#[doc = "Field `u1_pcie_pcie_tx_oneszeros` writer - u1_pcie_pcie_tx_oneszeros"] +pub type U1_PCIE_PCIE_TX_ONESZEROS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 0 - u1_plda_pcie_mperstn"] + #[doc = "Bit 0 - u1_pcie_mperstn"] #[inline(always)] - pub fn u1_plda_pcie_mperstn(&self) -> U1_PLDA_PCIE_MPERSTN_R { - U1_PLDA_PCIE_MPERSTN_R::new((self.bits & 1) != 0) + pub fn u1_pcie_mperstn(&self) -> U1_PCIE_MPERSTN_R { + U1_PCIE_MPERSTN_R::new((self.bits & 1) != 0) } - #[doc = "Bit 1 - u1_plda_pcie_pcie_ebuf_mode"] + #[doc = "Bit 1 - u1_pcie_pcie_ebuf_mode"] #[inline(always)] - pub fn u1_plda_pcie_pcie_ebuf_mode(&self) -> U1_PLDA_PCIE_PCIE_EBUF_MODE_R { - U1_PLDA_PCIE_PCIE_EBUF_MODE_R::new(((self.bits >> 1) & 1) != 0) + pub fn u1_pcie_pcie_ebuf_mode(&self) -> U1_PCIE_PCIE_EBUF_MODE_R { + U1_PCIE_PCIE_EBUF_MODE_R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bits 2:24 - u1_plda_pcie_pcie_phy_test_cfg"] + #[doc = "Bits 2:24 - u1_pcie_pcie_phy_test_cfg"] #[inline(always)] - pub fn u1_plda_pcie_pcie_phy_test_cfg(&self) -> U1_PLDA_PCIE_PCIE_PHY_TEST_CFG_R { - U1_PLDA_PCIE_PCIE_PHY_TEST_CFG_R::new((self.bits >> 2) & 0x007f_ffff) + pub fn u1_pcie_pcie_phy_test_cfg(&self) -> U1_PCIE_PCIE_PHY_TEST_CFG_R { + U1_PCIE_PCIE_PHY_TEST_CFG_R::new((self.bits >> 2) & 0x007f_ffff) } - #[doc = "Bit 25 - u1_plda_pcie_pcie_rx_eq_training"] + #[doc = "Bit 25 - u1_pcie_pcie_rx_eq_training"] #[inline(always)] - pub fn u1_plda_pcie_pcie_rx_eq_training(&self) -> U1_PLDA_PCIE_PCIE_RX_EQ_TRAINING_R { - U1_PLDA_PCIE_PCIE_RX_EQ_TRAINING_R::new(((self.bits >> 25) & 1) != 0) + pub fn u1_pcie_pcie_rx_eq_training(&self) -> U1_PCIE_PCIE_RX_EQ_TRAINING_R { + U1_PCIE_PCIE_RX_EQ_TRAINING_R::new(((self.bits >> 25) & 1) != 0) } - #[doc = "Bit 26 - u1_plda_pcie_pcie_rxterm_en"] + #[doc = "Bit 26 - u1_pcie_pcie_rxterm_en"] #[inline(always)] - pub fn u1_plda_pcie_pcie_rxterm_en(&self) -> U1_PLDA_PCIE_PCIE_RXTERM_EN_R { - U1_PLDA_PCIE_PCIE_RXTERM_EN_R::new(((self.bits >> 26) & 1) != 0) + pub fn u1_pcie_pcie_rxterm_en(&self) -> U1_PCIE_PCIE_RXTERM_EN_R { + U1_PCIE_PCIE_RXTERM_EN_R::new(((self.bits >> 26) & 1) != 0) } - #[doc = "Bit 27 - u1_plda_pcie_pcie_tx_oneszeros"] + #[doc = "Bit 27 - u1_pcie_pcie_tx_oneszeros"] #[inline(always)] - pub fn u1_plda_pcie_pcie_tx_oneszeros(&self) -> U1_PLDA_PCIE_PCIE_TX_ONESZEROS_R { - U1_PLDA_PCIE_PCIE_TX_ONESZEROS_R::new(((self.bits >> 27) & 1) != 0) + pub fn u1_pcie_pcie_tx_oneszeros(&self) -> U1_PCIE_PCIE_TX_ONESZEROS_R { + U1_PCIE_PCIE_TX_ONESZEROS_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bit 0 - u1_plda_pcie_mperstn"] + #[doc = "Bit 0 - u1_pcie_mperstn"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_mperstn(&mut self) -> U1_PLDA_PCIE_MPERSTN_W { - U1_PLDA_PCIE_MPERSTN_W::new(self, 0) + pub fn u1_pcie_mperstn(&mut self) -> U1_PCIE_MPERSTN_W { + U1_PCIE_MPERSTN_W::new(self, 0) } - #[doc = "Bit 1 - u1_plda_pcie_pcie_ebuf_mode"] + #[doc = "Bit 1 - u1_pcie_pcie_ebuf_mode"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pcie_ebuf_mode( - &mut self, - ) -> U1_PLDA_PCIE_PCIE_EBUF_MODE_W { - U1_PLDA_PCIE_PCIE_EBUF_MODE_W::new(self, 1) + pub fn u1_pcie_pcie_ebuf_mode(&mut self) -> U1_PCIE_PCIE_EBUF_MODE_W { + U1_PCIE_PCIE_EBUF_MODE_W::new(self, 1) } - #[doc = "Bits 2:24 - u1_plda_pcie_pcie_phy_test_cfg"] + #[doc = "Bits 2:24 - u1_pcie_pcie_phy_test_cfg"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pcie_phy_test_cfg( + pub fn u1_pcie_pcie_phy_test_cfg( &mut self, - ) -> U1_PLDA_PCIE_PCIE_PHY_TEST_CFG_W { - U1_PLDA_PCIE_PCIE_PHY_TEST_CFG_W::new(self, 2) + ) -> U1_PCIE_PCIE_PHY_TEST_CFG_W { + U1_PCIE_PCIE_PHY_TEST_CFG_W::new(self, 2) } - #[doc = "Bit 25 - u1_plda_pcie_pcie_rx_eq_training"] + #[doc = "Bit 25 - u1_pcie_pcie_rx_eq_training"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pcie_rx_eq_training( + pub fn u1_pcie_pcie_rx_eq_training( &mut self, - ) -> U1_PLDA_PCIE_PCIE_RX_EQ_TRAINING_W { - U1_PLDA_PCIE_PCIE_RX_EQ_TRAINING_W::new(self, 25) + ) -> U1_PCIE_PCIE_RX_EQ_TRAINING_W { + U1_PCIE_PCIE_RX_EQ_TRAINING_W::new(self, 25) } - #[doc = "Bit 26 - u1_plda_pcie_pcie_rxterm_en"] + #[doc = "Bit 26 - u1_pcie_pcie_rxterm_en"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pcie_rxterm_en( - &mut self, - ) -> U1_PLDA_PCIE_PCIE_RXTERM_EN_W { - U1_PLDA_PCIE_PCIE_RXTERM_EN_W::new(self, 26) + pub fn u1_pcie_pcie_rxterm_en(&mut self) -> U1_PCIE_PCIE_RXTERM_EN_W { + U1_PCIE_PCIE_RXTERM_EN_W::new(self, 26) } - #[doc = "Bit 27 - u1_plda_pcie_pcie_tx_oneszeros"] + #[doc = "Bit 27 - u1_pcie_pcie_tx_oneszeros"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pcie_tx_oneszeros( + pub fn u1_pcie_pcie_tx_oneszeros( &mut self, - ) -> U1_PLDA_PCIE_PCIE_TX_ONESZEROS_W { - U1_PLDA_PCIE_PCIE_TX_ONESZEROS_W::new(self, 27) + ) -> U1_PCIE_PCIE_TX_ONESZEROS_W { + U1_PCIE_PCIE_TX_ONESZEROS_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_187.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_187.rs index 854c965..11393a3 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_187.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_187.rs @@ -2,23 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_187` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pf0_offset` reader - u1_plda_pcie_pf0_offset"] -pub type U1_PLDA_PCIE_PF0_OFFSET_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pf0_offset` writer - u1_plda_pcie_pf0_offset"] -pub type U1_PLDA_PCIE_PF0_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `u1_pcie_pf0_offset` reader - u1_pcie_pf0_offset"] +pub type U1_PCIE_PF0_OFFSET_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pf0_offset` writer - u1_pcie_pf0_offset"] +pub type U1_PCIE_PF0_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { - #[doc = "Bits 0:19 - u1_plda_pcie_pf0_offset"] + #[doc = "Bits 0:19 - u1_pcie_pf0_offset"] #[inline(always)] - pub fn u1_plda_pcie_pf0_offset(&self) -> U1_PLDA_PCIE_PF0_OFFSET_R { - U1_PLDA_PCIE_PF0_OFFSET_R::new(self.bits & 0x000f_ffff) + pub fn u1_pcie_pf0_offset(&self) -> U1_PCIE_PF0_OFFSET_R { + U1_PCIE_PF0_OFFSET_R::new(self.bits & 0x000f_ffff) } } impl W { - #[doc = "Bits 0:19 - u1_plda_pcie_pf0_offset"] + #[doc = "Bits 0:19 - u1_pcie_pf0_offset"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pf0_offset(&mut self) -> U1_PLDA_PCIE_PF0_OFFSET_W { - U1_PLDA_PCIE_PF0_OFFSET_W::new(self, 0) + pub fn u1_pcie_pf0_offset(&mut self) -> U1_PCIE_PF0_OFFSET_W { + U1_PCIE_PF0_OFFSET_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_188.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_188.rs index b8561b9..120e902 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_188.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_188.rs @@ -2,23 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_188` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pf1_offset` reader - u1_plda_pcie_pf1_offset"] -pub type U1_PLDA_PCIE_PF1_OFFSET_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pf1_offset` writer - u1_plda_pcie_pf1_offset"] -pub type U1_PLDA_PCIE_PF1_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `u1_pcie_pf1_offset` reader - u1_pcie_pf1_offset"] +pub type U1_PCIE_PF1_OFFSET_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pf1_offset` writer - u1_pcie_pf1_offset"] +pub type U1_PCIE_PF1_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { - #[doc = "Bits 0:19 - u1_plda_pcie_pf1_offset"] + #[doc = "Bits 0:19 - u1_pcie_pf1_offset"] #[inline(always)] - pub fn u1_plda_pcie_pf1_offset(&self) -> U1_PLDA_PCIE_PF1_OFFSET_R { - U1_PLDA_PCIE_PF1_OFFSET_R::new(self.bits & 0x000f_ffff) + pub fn u1_pcie_pf1_offset(&self) -> U1_PCIE_PF1_OFFSET_R { + U1_PCIE_PF1_OFFSET_R::new(self.bits & 0x000f_ffff) } } impl W { - #[doc = "Bits 0:19 - u1_plda_pcie_pf1_offset"] + #[doc = "Bits 0:19 - u1_pcie_pf1_offset"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pf1_offset(&mut self) -> U1_PLDA_PCIE_PF1_OFFSET_W { - U1_PLDA_PCIE_PF1_OFFSET_W::new(self, 0) + pub fn u1_pcie_pf1_offset(&mut self) -> U1_PCIE_PF1_OFFSET_W { + U1_PCIE_PF1_OFFSET_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_189.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_189.rs index a3ada7d..f10628c 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_189.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_189.rs @@ -2,23 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_189` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pf2_offset` reader - u1_plda_pcie_pf2_offset"] -pub type U1_PLDA_PCIE_PF2_OFFSET_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pf2_offset` writer - u1_plda_pcie_pf2_offset"] -pub type U1_PLDA_PCIE_PF2_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `u1_pcie_pf2_offset` reader - u1_pcie_pf2_offset"] +pub type U1_PCIE_PF2_OFFSET_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pf2_offset` writer - u1_pcie_pf2_offset"] +pub type U1_PCIE_PF2_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { - #[doc = "Bits 0:19 - u1_plda_pcie_pf2_offset"] + #[doc = "Bits 0:19 - u1_pcie_pf2_offset"] #[inline(always)] - pub fn u1_plda_pcie_pf2_offset(&self) -> U1_PLDA_PCIE_PF2_OFFSET_R { - U1_PLDA_PCIE_PF2_OFFSET_R::new(self.bits & 0x000f_ffff) + pub fn u1_pcie_pf2_offset(&self) -> U1_PCIE_PF2_OFFSET_R { + U1_PCIE_PF2_OFFSET_R::new(self.bits & 0x000f_ffff) } } impl W { - #[doc = "Bits 0:19 - u1_plda_pcie_pf2_offset"] + #[doc = "Bits 0:19 - u1_pcie_pf2_offset"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pf2_offset(&mut self) -> U1_PLDA_PCIE_PF2_OFFSET_W { - U1_PLDA_PCIE_PF2_OFFSET_W::new(self, 0) + pub fn u1_pcie_pf2_offset(&mut self) -> U1_PCIE_PF2_OFFSET_W { + U1_PCIE_PF2_OFFSET_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_19.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_19.rs index 1267450..fc629a3 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_19.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_19.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_19` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_63_32` reader - u0_plda_pcie_axi4_mst0_aratomop_63_32"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_63_32` reader - u0_pcie_axi4_mst0_aratomop_63_32"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_63_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_63_32"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_63_32"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_63_32(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_63_32_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_63_32_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_63_32(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_63_32_R { + U0_PCIE_AXI4_MST0_ARATOMOP_63_32_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_190.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_190.rs index e648bbf..b624841 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_190.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_190.rs @@ -2,76 +2,74 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_190` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pf3_offset` reader - u1_plda_pcie_pf3_offset"] -pub type U1_PLDA_PCIE_PF3_OFFSET_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pf3_offset` writer - u1_plda_pcie_pf3_offset"] -pub type U1_PLDA_PCIE_PF3_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; -#[doc = "Field `u1_plda_pcie_phy_mode` reader - u1_plda_pcie_phy_mode"] -pub type U1_PLDA_PCIE_PHY_MODE_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_phy_mode` writer - u1_plda_pcie_phy_mode"] -pub type U1_PLDA_PCIE_PHY_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u1_plda_pcie_pl_clkrem_allow` reader - u1_plda_pcie_pl_clkrem_allow"] -pub type U1_PLDA_PCIE_PL_CLKREM_ALLOW_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_pl_clkrem_allow` writer - u1_plda_pcie_pl_clkrem_allow"] -pub type U1_PLDA_PCIE_PL_CLKREM_ALLOW_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_pl_clkreq_oen` reader - u1_plda_pcie_pl_clkreq_oen"] -pub type U1_PLDA_PCIE_PL_CLKREQ_OEN_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_pl_equ_phase` reader - u1_plda_pcie_pl_equ_phase"] -pub type U1_PLDA_PCIE_PL_EQU_PHASE_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pl_ltssm` reader - u1_plda_pcie_pl_ltssm"] -pub type U1_PLDA_PCIE_PL_LTSSM_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pf3_offset` reader - u1_pcie_pf3_offset"] +pub type U1_PCIE_PF3_OFFSET_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pf3_offset` writer - u1_pcie_pf3_offset"] +pub type U1_PCIE_PF3_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `u1_pcie_phy_mode` reader - u1_pcie_phy_mode"] +pub type U1_PCIE_PHY_MODE_R = crate::FieldReader; +#[doc = "Field `u1_pcie_phy_mode` writer - u1_pcie_phy_mode"] +pub type U1_PCIE_PHY_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u1_pcie_pl_clkrem_allow` reader - u1_pcie_pl_clkrem_allow"] +pub type U1_PCIE_PL_CLKREM_ALLOW_R = crate::BitReader; +#[doc = "Field `u1_pcie_pl_clkrem_allow` writer - u1_pcie_pl_clkrem_allow"] +pub type U1_PCIE_PL_CLKREM_ALLOW_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_pl_clkreq_oen` reader - u1_pcie_pl_clkreq_oen"] +pub type U1_PCIE_PL_CLKREQ_OEN_R = crate::BitReader; +#[doc = "Field `u1_pcie_pl_equ_phase` reader - u1_pcie_pl_equ_phase"] +pub type U1_PCIE_PL_EQU_PHASE_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pl_ltssm` reader - u1_pcie_pl_ltssm"] +pub type U1_PCIE_PL_LTSSM_R = crate::FieldReader; impl R { - #[doc = "Bits 0:19 - u1_plda_pcie_pf3_offset"] + #[doc = "Bits 0:19 - u1_pcie_pf3_offset"] #[inline(always)] - pub fn u1_plda_pcie_pf3_offset(&self) -> U1_PLDA_PCIE_PF3_OFFSET_R { - U1_PLDA_PCIE_PF3_OFFSET_R::new(self.bits & 0x000f_ffff) + pub fn u1_pcie_pf3_offset(&self) -> U1_PCIE_PF3_OFFSET_R { + U1_PCIE_PF3_OFFSET_R::new(self.bits & 0x000f_ffff) } - #[doc = "Bits 20:21 - u1_plda_pcie_phy_mode"] + #[doc = "Bits 20:21 - u1_pcie_phy_mode"] #[inline(always)] - pub fn u1_plda_pcie_phy_mode(&self) -> U1_PLDA_PCIE_PHY_MODE_R { - U1_PLDA_PCIE_PHY_MODE_R::new(((self.bits >> 20) & 3) as u8) + pub fn u1_pcie_phy_mode(&self) -> U1_PCIE_PHY_MODE_R { + U1_PCIE_PHY_MODE_R::new(((self.bits >> 20) & 3) as u8) } - #[doc = "Bit 22 - u1_plda_pcie_pl_clkrem_allow"] + #[doc = "Bit 22 - u1_pcie_pl_clkrem_allow"] #[inline(always)] - pub fn u1_plda_pcie_pl_clkrem_allow(&self) -> U1_PLDA_PCIE_PL_CLKREM_ALLOW_R { - U1_PLDA_PCIE_PL_CLKREM_ALLOW_R::new(((self.bits >> 22) & 1) != 0) + pub fn u1_pcie_pl_clkrem_allow(&self) -> U1_PCIE_PL_CLKREM_ALLOW_R { + U1_PCIE_PL_CLKREM_ALLOW_R::new(((self.bits >> 22) & 1) != 0) } - #[doc = "Bit 23 - u1_plda_pcie_pl_clkreq_oen"] + #[doc = "Bit 23 - u1_pcie_pl_clkreq_oen"] #[inline(always)] - pub fn u1_plda_pcie_pl_clkreq_oen(&self) -> U1_PLDA_PCIE_PL_CLKREQ_OEN_R { - U1_PLDA_PCIE_PL_CLKREQ_OEN_R::new(((self.bits >> 23) & 1) != 0) + pub fn u1_pcie_pl_clkreq_oen(&self) -> U1_PCIE_PL_CLKREQ_OEN_R { + U1_PCIE_PL_CLKREQ_OEN_R::new(((self.bits >> 23) & 1) != 0) } - #[doc = "Bits 24:25 - u1_plda_pcie_pl_equ_phase"] + #[doc = "Bits 24:25 - u1_pcie_pl_equ_phase"] #[inline(always)] - pub fn u1_plda_pcie_pl_equ_phase(&self) -> U1_PLDA_PCIE_PL_EQU_PHASE_R { - U1_PLDA_PCIE_PL_EQU_PHASE_R::new(((self.bits >> 24) & 3) as u8) + pub fn u1_pcie_pl_equ_phase(&self) -> U1_PCIE_PL_EQU_PHASE_R { + U1_PCIE_PL_EQU_PHASE_R::new(((self.bits >> 24) & 3) as u8) } - #[doc = "Bits 26:30 - u1_plda_pcie_pl_ltssm"] + #[doc = "Bits 26:30 - u1_pcie_pl_ltssm"] #[inline(always)] - pub fn u1_plda_pcie_pl_ltssm(&self) -> U1_PLDA_PCIE_PL_LTSSM_R { - U1_PLDA_PCIE_PL_LTSSM_R::new(((self.bits >> 26) & 0x1f) as u8) + pub fn u1_pcie_pl_ltssm(&self) -> U1_PCIE_PL_LTSSM_R { + U1_PCIE_PL_LTSSM_R::new(((self.bits >> 26) & 0x1f) as u8) } } impl W { - #[doc = "Bits 0:19 - u1_plda_pcie_pf3_offset"] + #[doc = "Bits 0:19 - u1_pcie_pf3_offset"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pf3_offset(&mut self) -> U1_PLDA_PCIE_PF3_OFFSET_W { - U1_PLDA_PCIE_PF3_OFFSET_W::new(self, 0) + pub fn u1_pcie_pf3_offset(&mut self) -> U1_PCIE_PF3_OFFSET_W { + U1_PCIE_PF3_OFFSET_W::new(self, 0) } - #[doc = "Bits 20:21 - u1_plda_pcie_phy_mode"] + #[doc = "Bits 20:21 - u1_pcie_phy_mode"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_phy_mode(&mut self) -> U1_PLDA_PCIE_PHY_MODE_W { - U1_PLDA_PCIE_PHY_MODE_W::new(self, 20) + pub fn u1_pcie_phy_mode(&mut self) -> U1_PCIE_PHY_MODE_W { + U1_PCIE_PHY_MODE_W::new(self, 20) } - #[doc = "Bit 22 - u1_plda_pcie_pl_clkrem_allow"] + #[doc = "Bit 22 - u1_pcie_pl_clkrem_allow"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pl_clkrem_allow( - &mut self, - ) -> U1_PLDA_PCIE_PL_CLKREM_ALLOW_W { - U1_PLDA_PCIE_PL_CLKREM_ALLOW_W::new(self, 22) + pub fn u1_pcie_pl_clkrem_allow(&mut self) -> U1_PCIE_PL_CLKREM_ALLOW_W { + U1_PCIE_PL_CLKREM_ALLOW_W::new(self, 22) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_191.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_191.rs index 6cfb277..8fb0cab 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_191.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_191.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_191` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pl_pclk_rate` reader - u1_plda_pcie_pl_pclk_rate"] -pub type U1_PLDA_PCIE_PL_PCLK_RATE_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pl_pclk_rate` reader - u1_pcie_pl_pclk_rate"] +pub type U1_PCIE_PL_PCLK_RATE_R = crate::FieldReader; impl R { - #[doc = "Bits 0:4 - u1_plda_pcie_pl_pclk_rate"] + #[doc = "Bits 0:4 - u1_pcie_pl_pclk_rate"] #[inline(always)] - pub fn u1_plda_pcie_pl_pclk_rate(&self) -> U1_PLDA_PCIE_PL_PCLK_RATE_R { - U1_PLDA_PCIE_PL_PCLK_RATE_R::new((self.bits & 0x1f) as u8) + pub fn u1_pcie_pl_pclk_rate(&self) -> U1_PCIE_PL_PCLK_RATE_R { + U1_PCIE_PL_PCLK_RATE_R::new((self.bits & 0x1f) as u8) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_192.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_192.rs index 894eb90..9a5c661 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_192.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_192.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_192` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pl_sideband_in_31_0` reader - u1_plda_pcie_pl_sideband_in_31_0"] -pub type U1_PLDA_PCIE_PL_SIDEBAND_IN_31_0_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pl_sideband_in_31_0` writer - u1_plda_pcie_pl_sideband_in_31_0"] -pub type U1_PLDA_PCIE_PL_SIDEBAND_IN_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_pl_sideband_in_31_0` reader - u1_pcie_pl_sideband_in_31_0"] +pub type U1_PCIE_PL_SIDEBAND_IN_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pl_sideband_in_31_0` writer - u1_pcie_pl_sideband_in_31_0"] +pub type U1_PCIE_PL_SIDEBAND_IN_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_pl_sideband_in_31_0"] + #[doc = "Bits 0:31 - u1_pcie_pl_sideband_in_31_0"] #[inline(always)] - pub fn u1_plda_pcie_pl_sideband_in_31_0(&self) -> U1_PLDA_PCIE_PL_SIDEBAND_IN_31_0_R { - U1_PLDA_PCIE_PL_SIDEBAND_IN_31_0_R::new(self.bits) + pub fn u1_pcie_pl_sideband_in_31_0(&self) -> U1_PCIE_PL_SIDEBAND_IN_31_0_R { + U1_PCIE_PL_SIDEBAND_IN_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_pl_sideband_in_31_0"] + #[doc = "Bits 0:31 - u1_pcie_pl_sideband_in_31_0"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pl_sideband_in_31_0( + pub fn u1_pcie_pl_sideband_in_31_0( &mut self, - ) -> U1_PLDA_PCIE_PL_SIDEBAND_IN_31_0_W { - U1_PLDA_PCIE_PL_SIDEBAND_IN_31_0_W::new(self, 0) + ) -> U1_PCIE_PL_SIDEBAND_IN_31_0_W { + U1_PCIE_PL_SIDEBAND_IN_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_193.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_193.rs index 441cb6f..043d8aa 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_193.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_193.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_193` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pl_sideband_in_63_32` reader - u1_plda_pcie_pl_sideband_in_63_32"] -pub type U1_PLDA_PCIE_PL_SIDEBAND_IN_63_32_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pl_sideband_in_63_32` writer - u1_plda_pcie_pl_sideband_in_63_32"] -pub type U1_PLDA_PCIE_PL_SIDEBAND_IN_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_pl_sideband_in_63_32` reader - u1_pcie_pl_sideband_in_63_32"] +pub type U1_PCIE_PL_SIDEBAND_IN_63_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pl_sideband_in_63_32` writer - u1_pcie_pl_sideband_in_63_32"] +pub type U1_PCIE_PL_SIDEBAND_IN_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_pl_sideband_in_63_32"] + #[doc = "Bits 0:31 - u1_pcie_pl_sideband_in_63_32"] #[inline(always)] - pub fn u1_plda_pcie_pl_sideband_in_63_32(&self) -> U1_PLDA_PCIE_PL_SIDEBAND_IN_63_32_R { - U1_PLDA_PCIE_PL_SIDEBAND_IN_63_32_R::new(self.bits) + pub fn u1_pcie_pl_sideband_in_63_32(&self) -> U1_PCIE_PL_SIDEBAND_IN_63_32_R { + U1_PCIE_PL_SIDEBAND_IN_63_32_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_pl_sideband_in_63_32"] + #[doc = "Bits 0:31 - u1_pcie_pl_sideband_in_63_32"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pl_sideband_in_63_32( + pub fn u1_pcie_pl_sideband_in_63_32( &mut self, - ) -> U1_PLDA_PCIE_PL_SIDEBAND_IN_63_32_W { - U1_PLDA_PCIE_PL_SIDEBAND_IN_63_32_W::new(self, 0) + ) -> U1_PCIE_PL_SIDEBAND_IN_63_32_W { + U1_PCIE_PL_SIDEBAND_IN_63_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_194.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_194.rs index dc77cd0..9b68f15 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_194.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_194.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_194` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pl_sideband_out_31_0` reader - u1_plda_pcie_pl_sideband_out_31_0"] -pub type U1_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pl_sideband_out_31_0` writer - u1_plda_pcie_pl_sideband_out_31_0"] -pub type U1_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_pl_sideband_out_31_0` reader - u1_pcie_pl_sideband_out_31_0"] +pub type U1_PCIE_PL_SIDEBAND_OUT_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pl_sideband_out_31_0` writer - u1_pcie_pl_sideband_out_31_0"] +pub type U1_PCIE_PL_SIDEBAND_OUT_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_pl_sideband_out_31_0"] + #[doc = "Bits 0:31 - u1_pcie_pl_sideband_out_31_0"] #[inline(always)] - pub fn u1_plda_pcie_pl_sideband_out_31_0(&self) -> U1_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_R { - U1_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_R::new(self.bits) + pub fn u1_pcie_pl_sideband_out_31_0(&self) -> U1_PCIE_PL_SIDEBAND_OUT_31_0_R { + U1_PCIE_PL_SIDEBAND_OUT_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_pl_sideband_out_31_0"] + #[doc = "Bits 0:31 - u1_pcie_pl_sideband_out_31_0"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pl_sideband_out_31_0( + pub fn u1_pcie_pl_sideband_out_31_0( &mut self, - ) -> U1_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_W { - U1_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_W::new(self, 0) + ) -> U1_PCIE_PL_SIDEBAND_OUT_31_0_W { + U1_PCIE_PL_SIDEBAND_OUT_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_195.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_195.rs index ea60358..47c7200 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_195.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_195.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_195` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pl_sideband_out_63_32` reader - u1_plda_pcie_pl_sideband_out_63_32"] -pub type U1_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pl_sideband_out_63_32` writer - u1_plda_pcie_pl_sideband_out_63_32"] -pub type U1_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_pl_sideband_out_63_32` reader - u1_pcie_pl_sideband_out_63_32"] +pub type U1_PCIE_PL_SIDEBAND_OUT_63_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pl_sideband_out_63_32` writer - u1_pcie_pl_sideband_out_63_32"] +pub type U1_PCIE_PL_SIDEBAND_OUT_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_pl_sideband_out_63_32"] + #[doc = "Bits 0:31 - u1_pcie_pl_sideband_out_63_32"] #[inline(always)] - pub fn u1_plda_pcie_pl_sideband_out_63_32(&self) -> U1_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_R { - U1_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_R::new(self.bits) + pub fn u1_pcie_pl_sideband_out_63_32(&self) -> U1_PCIE_PL_SIDEBAND_OUT_63_32_R { + U1_PCIE_PL_SIDEBAND_OUT_63_32_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_pl_sideband_out_63_32"] + #[doc = "Bits 0:31 - u1_pcie_pl_sideband_out_63_32"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pl_sideband_out_63_32( + pub fn u1_pcie_pl_sideband_out_63_32( &mut self, - ) -> U1_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_W { - U1_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_W::new(self, 0) + ) -> U1_PCIE_PL_SIDEBAND_OUT_63_32_W { + U1_PCIE_PL_SIDEBAND_OUT_63_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_196.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_196.rs index 488ef1d..3ab71d3 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_196.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_196.rs @@ -2,37 +2,37 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_196` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pl_wake_in` reader - u1_plda_pcie_pl_wake_in"] -pub type U1_PLDA_PCIE_PL_WAKE_IN_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_pl_wake_in` writer - u1_plda_pcie_pl_wake_in"] -pub type U1_PLDA_PCIE_PL_WAKE_IN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_pl_wake_oen` reader - u1_plda_pcie_pl_wake_oen"] -pub type U1_PLDA_PCIE_PL_WAKE_OEN_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_rx_standby_o` reader - u1_plda_pcie_rx_standby_o"] -pub type U1_PLDA_PCIE_RX_STANDBY_O_R = crate::BitReader; +#[doc = "Field `u1_pcie_pl_wake_in` reader - u1_pcie_pl_wake_in"] +pub type U1_PCIE_PL_WAKE_IN_R = crate::BitReader; +#[doc = "Field `u1_pcie_pl_wake_in` writer - u1_pcie_pl_wake_in"] +pub type U1_PCIE_PL_WAKE_IN_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_pl_wake_oen` reader - u1_pcie_pl_wake_oen"] +pub type U1_PCIE_PL_WAKE_OEN_R = crate::BitReader; +#[doc = "Field `u1_pcie_rx_standby_o` reader - u1_pcie_rx_standby_o"] +pub type U1_PCIE_RX_STANDBY_O_R = crate::BitReader; impl R { - #[doc = "Bit 0 - u1_plda_pcie_pl_wake_in"] + #[doc = "Bit 0 - u1_pcie_pl_wake_in"] #[inline(always)] - pub fn u1_plda_pcie_pl_wake_in(&self) -> U1_PLDA_PCIE_PL_WAKE_IN_R { - U1_PLDA_PCIE_PL_WAKE_IN_R::new((self.bits & 1) != 0) + pub fn u1_pcie_pl_wake_in(&self) -> U1_PCIE_PL_WAKE_IN_R { + U1_PCIE_PL_WAKE_IN_R::new((self.bits & 1) != 0) } - #[doc = "Bit 1 - u1_plda_pcie_pl_wake_oen"] + #[doc = "Bit 1 - u1_pcie_pl_wake_oen"] #[inline(always)] - pub fn u1_plda_pcie_pl_wake_oen(&self) -> U1_PLDA_PCIE_PL_WAKE_OEN_R { - U1_PLDA_PCIE_PL_WAKE_OEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn u1_pcie_pl_wake_oen(&self) -> U1_PCIE_PL_WAKE_OEN_R { + U1_PCIE_PL_WAKE_OEN_R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 2 - u1_plda_pcie_rx_standby_o"] + #[doc = "Bit 2 - u1_pcie_rx_standby_o"] #[inline(always)] - pub fn u1_plda_pcie_rx_standby_o(&self) -> U1_PLDA_PCIE_RX_STANDBY_O_R { - U1_PLDA_PCIE_RX_STANDBY_O_R::new(((self.bits >> 2) & 1) != 0) + pub fn u1_pcie_rx_standby_o(&self) -> U1_PCIE_RX_STANDBY_O_R { + U1_PCIE_RX_STANDBY_O_R::new(((self.bits >> 2) & 1) != 0) } } impl W { - #[doc = "Bit 0 - u1_plda_pcie_pl_wake_in"] + #[doc = "Bit 0 - u1_pcie_pl_wake_in"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pl_wake_in(&mut self) -> U1_PLDA_PCIE_PL_WAKE_IN_W { - U1_PLDA_PCIE_PL_WAKE_IN_W::new(self, 0) + pub fn u1_pcie_pl_wake_in(&mut self) -> U1_PCIE_PL_WAKE_IN_W { + U1_PCIE_PL_WAKE_IN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_197.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_197.rs index 44f7c59..fa2a501 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_197.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_197.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_197` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_in_31_0` reader - u1_plda_pcie_test_in_31_0"] -pub type U1_PLDA_PCIE_TEST_IN_31_0_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_in_31_0` writer - u1_plda_pcie_test_in_31_0"] -pub type U1_PLDA_PCIE_TEST_IN_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_in_31_0` reader - u1_pcie_test_in_31_0"] +pub type U1_PCIE_TEST_IN_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_in_31_0` writer - u1_pcie_test_in_31_0"] +pub type U1_PCIE_TEST_IN_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_in_31_0"] + #[doc = "Bits 0:31 - u1_pcie_test_in_31_0"] #[inline(always)] - pub fn u1_plda_pcie_test_in_31_0(&self) -> U1_PLDA_PCIE_TEST_IN_31_0_R { - U1_PLDA_PCIE_TEST_IN_31_0_R::new(self.bits) + pub fn u1_pcie_test_in_31_0(&self) -> U1_PCIE_TEST_IN_31_0_R { + U1_PCIE_TEST_IN_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_in_31_0"] + #[doc = "Bits 0:31 - u1_pcie_test_in_31_0"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_in_31_0( - &mut self, - ) -> U1_PLDA_PCIE_TEST_IN_31_0_W { - U1_PLDA_PCIE_TEST_IN_31_0_W::new(self, 0) + pub fn u1_pcie_test_in_31_0(&mut self) -> U1_PCIE_TEST_IN_31_0_W { + U1_PCIE_TEST_IN_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_198.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_198.rs index f0e2ecf..3f0ba5b 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_198.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_198.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_198` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_in_63_32` reader - u1_plda_pcie_test_in_63_32"] -pub type U1_PLDA_PCIE_TEST_IN_63_32_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_in_63_32` writer - u1_plda_pcie_test_in_63_32"] -pub type U1_PLDA_PCIE_TEST_IN_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_in_63_32` reader - u1_pcie_test_in_63_32"] +pub type U1_PCIE_TEST_IN_63_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_in_63_32` writer - u1_pcie_test_in_63_32"] +pub type U1_PCIE_TEST_IN_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_in_63_32"] + #[doc = "Bits 0:31 - u1_pcie_test_in_63_32"] #[inline(always)] - pub fn u1_plda_pcie_test_in_63_32(&self) -> U1_PLDA_PCIE_TEST_IN_63_32_R { - U1_PLDA_PCIE_TEST_IN_63_32_R::new(self.bits) + pub fn u1_pcie_test_in_63_32(&self) -> U1_PCIE_TEST_IN_63_32_R { + U1_PCIE_TEST_IN_63_32_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_in_63_32"] + #[doc = "Bits 0:31 - u1_pcie_test_in_63_32"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_in_63_32( - &mut self, - ) -> U1_PLDA_PCIE_TEST_IN_63_32_W { - U1_PLDA_PCIE_TEST_IN_63_32_W::new(self, 0) + pub fn u1_pcie_test_in_63_32(&mut self) -> U1_PCIE_TEST_IN_63_32_W { + U1_PCIE_TEST_IN_63_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_199.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_199.rs index 03c3450..d0bb787 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_199.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_199.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_199` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_31_0` reader - u1_plda_pcie_test_out_bridge_31_0"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_31_0` writer - u1_plda_pcie_test_out_bridge_31_0"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_31_0` reader - u1_pcie_test_out_bridge_31_0"] +pub type U1_PCIE_TEST_OUT_BRIDGE_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_31_0` writer - u1_pcie_test_out_bridge_31_0"] +pub type U1_PCIE_TEST_OUT_BRIDGE_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_31_0"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_31_0"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_31_0(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_31_0(&self) -> U1_PCIE_TEST_OUT_BRIDGE_31_0_R { + U1_PCIE_TEST_OUT_BRIDGE_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_31_0"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_31_0"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_31_0( + pub fn u1_pcie_test_out_bridge_31_0( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_31_0_W { + U1_PCIE_TEST_OUT_BRIDGE_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_2.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_2.rs index 6fdeb3c..5fdfc73 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_2.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_2.rs @@ -2,318 +2,312 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_2` writer"] pub type W = crate::W; -#[doc = "Field `u0_cdn_usb_rx_dp` reader - u0_cdn_usb_rx_dp"] -pub type U0_CDN_USB_RX_DP_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_rx_rcv` reader - u0_cdn_usb_rx_rcv"] -pub type U0_CDN_USB_RX_RCV_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_self_test` reader - For software bist_test"] -pub type U0_CDN_USB_SELF_TEST_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_self_test` writer - For software bist_test"] -pub type U0_CDN_USB_SELF_TEST_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_sessend` reader - u0_cdn_usb_sessend"] -pub type U0_CDN_USB_SESSEND_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_sessvalid` reader - u0_cdn_usb_sessvalid"] -pub type U0_CDN_USB_SESSVALID_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_sof` reader - u0_cdn_usb_sof"] -pub type U0_CDN_USB_SOF_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_test_bist` reader - For software bist_test"] -pub type U0_CDN_USB_TEST_BIST_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_main_power_off_ack` reader - u0_cdn_usb_usbdev_main_power_off_ack"] -pub type U0_CDN_USB_USBDEV_MAIN_POWER_OFF_ACK_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_main_power_off_ready` reader - u0_cdn_usb_usbdev_main_power_off_ready"] -pub type U0_CDN_USB_USBDEV_MAIN_POWER_OFF_READY_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_main_power_off_req` reader - u0_cdn_usb_usbdev_main_power_off_req"] -pub type U0_CDN_USB_USBDEV_MAIN_POWER_OFF_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_main_power_off_req` writer - u0_cdn_usb_usbdev_main_power_off_req"] -pub type U0_CDN_USB_USBDEV_MAIN_POWER_OFF_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_usbdev_main_power_on_ready` reader - u0_cdn_usb_usbdev_main_power_on_ready"] -pub type U0_CDN_USB_USBDEV_MAIN_POWER_ON_READY_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_main_power_on_req` reader - u0_cdn_usb_usbdev_main_power_on_req"] -pub type U0_CDN_USB_USBDEV_MAIN_POWER_ON_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_main_power_on_valid` reader - u0_cdn_usb_usbdev_main_power_on_valid"] -pub type U0_CDN_USB_USBDEV_MAIN_POWER_ON_VALID_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_main_power_on_valid` writer - u0_cdn_usb_usbdev_main_power_on_valid"] -pub type U0_CDN_USB_USBDEV_MAIN_POWER_ON_VALID_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_usbdev_power_off_ack` reader - u0_cdn_usb_usbdev_power_off_ack"] -pub type U0_CDN_USB_USBDEV_POWER_OFF_ACK_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_power_off_ready` reader - u0_cdn_usb_usbdev_power_off_ready"] -pub type U0_CDN_USB_USBDEV_POWER_OFF_READY_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_power_off_req` reader - u0_cdn_usb_usbdev_power_off_req"] -pub type U0_CDN_USB_USBDEV_POWER_OFF_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_power_off_req` writer - u0_cdn_usb_usbdev_power_off_req"] -pub type U0_CDN_USB_USBDEV_POWER_OFF_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_usbdev_power_on_ready` reader - u0_cdn_usb_usbdev_power_on_ready"] -pub type U0_CDN_USB_USBDEV_POWER_ON_READY_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_power_on_req` reader - u0_cdn_usb_usbdev_power_on_req"] -pub type U0_CDN_USB_USBDEV_POWER_ON_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_power_on_valid` reader - u0_cdn_usb_usbdev_power_on_valid"] -pub type U0_CDN_USB_USBDEV_POWER_ON_VALID_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_power_on_valid` writer - u0_cdn_usb_usbdev_power_on_valid"] -pub type U0_CDN_USB_USBDEV_POWER_ON_VALID_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_dmpulldown_sit` reader - u0_cdn_usb_utmi_dmpulldown_sit"] -pub type U0_CDN_USB_UTMI_DMPULLDOWN_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_dmpulldown_sit` writer - u0_cdn_usb_utmi_dmpulldown_sit"] -pub type U0_CDN_USB_UTMI_DMPULLDOWN_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_dppulldown_sit` reader - u0_cdn_usb_utmi_dppulldown_sit"] -pub type U0_CDN_USB_UTMI_DPPULLDOWN_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_dppulldown_sit` writer - u0_cdn_usb_utmi_dppulldown_sit"] -pub type U0_CDN_USB_UTMI_DPPULLDOWN_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_fslsserialmode_sit` reader - u0_cdn_usb_utmi_fslsserialmode_sit"] -pub type U0_CDN_USB_UTMI_FSLSSERIALMODE_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_fslsserialmode_sit` writer - u0_cdn_usb_utmi_fslsserialmode_sit"] -pub type U0_CDN_USB_UTMI_FSLSSERIALMODE_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_hostdisconnect_sit` reader - u0_cdn_usb_utmi_hostdisconnect_sit"] -pub type U0_CDN_USB_UTMI_HOSTDISCONNECT_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_iddig_sit` reader - u0_cdn_usb_utmi_iddig_sit"] -pub type U0_CDN_USB_UTMI_IDDIG_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_idpullup_sit` reader - u0_cdn_usb_utmi_idpullup_sit"] -pub type U0_CDN_USB_UTMI_IDPULLUP_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_idpullup_sit` writer - u0_cdn_usb_utmi_idpullup_sit"] -pub type U0_CDN_USB_UTMI_IDPULLUP_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_linestate_sit` reader - u0_cdn_usb_utmi_linestate_sit"] -pub type U0_CDN_USB_UTMI_LINESTATE_SIT_R = crate::FieldReader; -#[doc = "Field `u0_cdn_usb_utmi_opmode_sit` reader - u0_cdn_usb_utmi_opmode_sit"] -pub type U0_CDN_USB_UTMI_OPMODE_SIT_R = crate::FieldReader; -#[doc = "Field `u0_cdn_usb_utmi_opmode_sit` writer - u0_cdn_usb_utmi_opmode_sit"] -pub type U0_CDN_USB_UTMI_OPMODE_SIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_cdn_usb_utmi_rxactive_sit` reader - u0_cdn_usb_utmi_rxactive_sit"] -pub type U0_CDN_USB_UTMI_RXACTIVE_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_rxerror_sit` reader - u0_cdn_usb_utmi_rxerror_sit"] -pub type U0_CDN_USB_UTMI_RXERROR_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_rxvalid_sit` reader - u0_cdn_usb_utmi_rxvalid_sit"] -pub type U0_CDN_USB_UTMI_RXVALID_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_rx_dp` reader - u0_usb_rx_dp"] +pub type U0_USB_RX_DP_R = crate::BitReader; +#[doc = "Field `u0_usb_rx_rcv` reader - u0_usb_rx_rcv"] +pub type U0_USB_RX_RCV_R = crate::BitReader; +#[doc = "Field `u0_usb_self_test` reader - For software bist_test"] +pub type U0_USB_SELF_TEST_R = crate::BitReader; +#[doc = "Field `u0_usb_self_test` writer - For software bist_test"] +pub type U0_USB_SELF_TEST_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_sessend` reader - u0_usb_sessend"] +pub type U0_USB_SESSEND_R = crate::BitReader; +#[doc = "Field `u0_usb_sessvalid` reader - u0_usb_sessvalid"] +pub type U0_USB_SESSVALID_R = crate::BitReader; +#[doc = "Field `u0_usb_sof` reader - u0_usb_sof"] +pub type U0_USB_SOF_R = crate::BitReader; +#[doc = "Field `u0_usb_test_bist` reader - For software bist_test"] +pub type U0_USB_TEST_BIST_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_main_power_off_ack` reader - u0_usb_usbdev_main_power_off_ack"] +pub type U0_USB_USBDEV_MAIN_POWER_OFF_ACK_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_main_power_off_ready` reader - u0_usb_usbdev_main_power_off_ready"] +pub type U0_USB_USBDEV_MAIN_POWER_OFF_READY_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_main_power_off_req` reader - u0_usb_usbdev_main_power_off_req"] +pub type U0_USB_USBDEV_MAIN_POWER_OFF_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_main_power_off_req` writer - u0_usb_usbdev_main_power_off_req"] +pub type U0_USB_USBDEV_MAIN_POWER_OFF_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_usbdev_main_power_on_ready` reader - u0_usb_usbdev_main_power_on_ready"] +pub type U0_USB_USBDEV_MAIN_POWER_ON_READY_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_main_power_on_req` reader - u0_usb_usbdev_main_power_on_req"] +pub type U0_USB_USBDEV_MAIN_POWER_ON_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_main_power_on_valid` reader - u0_usb_usbdev_main_power_on_valid"] +pub type U0_USB_USBDEV_MAIN_POWER_ON_VALID_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_main_power_on_valid` writer - u0_usb_usbdev_main_power_on_valid"] +pub type U0_USB_USBDEV_MAIN_POWER_ON_VALID_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_usbdev_power_off_ack` reader - u0_usb_usbdev_power_off_ack"] +pub type U0_USB_USBDEV_POWER_OFF_ACK_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_power_off_ready` reader - u0_usb_usbdev_power_off_ready"] +pub type U0_USB_USBDEV_POWER_OFF_READY_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_power_off_req` reader - u0_usb_usbdev_power_off_req"] +pub type U0_USB_USBDEV_POWER_OFF_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_power_off_req` writer - u0_usb_usbdev_power_off_req"] +pub type U0_USB_USBDEV_POWER_OFF_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_usbdev_power_on_ready` reader - u0_usb_usbdev_power_on_ready"] +pub type U0_USB_USBDEV_POWER_ON_READY_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_power_on_req` reader - u0_usb_usbdev_power_on_req"] +pub type U0_USB_USBDEV_POWER_ON_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_power_on_valid` reader - u0_usb_usbdev_power_on_valid"] +pub type U0_USB_USBDEV_POWER_ON_VALID_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_power_on_valid` writer - u0_usb_usbdev_power_on_valid"] +pub type U0_USB_USBDEV_POWER_ON_VALID_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_dmpulldown_sit` reader - u0_usb_utmi_dmpulldown_sit"] +pub type U0_USB_UTMI_DMPULLDOWN_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_dmpulldown_sit` writer - u0_usb_utmi_dmpulldown_sit"] +pub type U0_USB_UTMI_DMPULLDOWN_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_dppulldown_sit` reader - u0_usb_utmi_dppulldown_sit"] +pub type U0_USB_UTMI_DPPULLDOWN_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_dppulldown_sit` writer - u0_usb_utmi_dppulldown_sit"] +pub type U0_USB_UTMI_DPPULLDOWN_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_fslsserialmode_sit` reader - u0_usb_utmi_fslsserialmode_sit"] +pub type U0_USB_UTMI_FSLSSERIALMODE_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_fslsserialmode_sit` writer - u0_usb_utmi_fslsserialmode_sit"] +pub type U0_USB_UTMI_FSLSSERIALMODE_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_hostdisconnect_sit` reader - u0_usb_utmi_hostdisconnect_sit"] +pub type U0_USB_UTMI_HOSTDISCONNECT_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_iddig_sit` reader - u0_usb_utmi_iddig_sit"] +pub type U0_USB_UTMI_IDDIG_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_idpullup_sit` reader - u0_usb_utmi_idpullup_sit"] +pub type U0_USB_UTMI_IDPULLUP_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_idpullup_sit` writer - u0_usb_utmi_idpullup_sit"] +pub type U0_USB_UTMI_IDPULLUP_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_linestate_sit` reader - u0_usb_utmi_linestate_sit"] +pub type U0_USB_UTMI_LINESTATE_SIT_R = crate::FieldReader; +#[doc = "Field `u0_usb_utmi_opmode_sit` reader - u0_usb_utmi_opmode_sit"] +pub type U0_USB_UTMI_OPMODE_SIT_R = crate::FieldReader; +#[doc = "Field `u0_usb_utmi_opmode_sit` writer - u0_usb_utmi_opmode_sit"] +pub type U0_USB_UTMI_OPMODE_SIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_usb_utmi_rxactive_sit` reader - u0_usb_utmi_rxactive_sit"] +pub type U0_USB_UTMI_RXACTIVE_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_rxerror_sit` reader - u0_usb_utmi_rxerror_sit"] +pub type U0_USB_UTMI_RXERROR_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_rxvalid_sit` reader - u0_usb_utmi_rxvalid_sit"] +pub type U0_USB_UTMI_RXVALID_SIT_R = crate::BitReader; impl R { - #[doc = "Bit 0 - u0_cdn_usb_rx_dp"] + #[doc = "Bit 0 - u0_usb_rx_dp"] #[inline(always)] - pub fn u0_cdn_usb_rx_dp(&self) -> U0_CDN_USB_RX_DP_R { - U0_CDN_USB_RX_DP_R::new((self.bits & 1) != 0) + pub fn u0_usb_rx_dp(&self) -> U0_USB_RX_DP_R { + U0_USB_RX_DP_R::new((self.bits & 1) != 0) } - #[doc = "Bit 1 - u0_cdn_usb_rx_rcv"] + #[doc = "Bit 1 - u0_usb_rx_rcv"] #[inline(always)] - pub fn u0_cdn_usb_rx_rcv(&self) -> U0_CDN_USB_RX_RCV_R { - U0_CDN_USB_RX_RCV_R::new(((self.bits >> 1) & 1) != 0) + pub fn u0_usb_rx_rcv(&self) -> U0_USB_RX_RCV_R { + U0_USB_RX_RCV_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - For software bist_test"] #[inline(always)] - pub fn u0_cdn_usb_self_test(&self) -> U0_CDN_USB_SELF_TEST_R { - U0_CDN_USB_SELF_TEST_R::new(((self.bits >> 2) & 1) != 0) + pub fn u0_usb_self_test(&self) -> U0_USB_SELF_TEST_R { + U0_USB_SELF_TEST_R::new(((self.bits >> 2) & 1) != 0) } - #[doc = "Bit 3 - u0_cdn_usb_sessend"] + #[doc = "Bit 3 - u0_usb_sessend"] #[inline(always)] - pub fn u0_cdn_usb_sessend(&self) -> U0_CDN_USB_SESSEND_R { - U0_CDN_USB_SESSEND_R::new(((self.bits >> 3) & 1) != 0) + pub fn u0_usb_sessend(&self) -> U0_USB_SESSEND_R { + U0_USB_SESSEND_R::new(((self.bits >> 3) & 1) != 0) } - #[doc = "Bit 4 - u0_cdn_usb_sessvalid"] + #[doc = "Bit 4 - u0_usb_sessvalid"] #[inline(always)] - pub fn u0_cdn_usb_sessvalid(&self) -> U0_CDN_USB_SESSVALID_R { - U0_CDN_USB_SESSVALID_R::new(((self.bits >> 4) & 1) != 0) + pub fn u0_usb_sessvalid(&self) -> U0_USB_SESSVALID_R { + U0_USB_SESSVALID_R::new(((self.bits >> 4) & 1) != 0) } - #[doc = "Bit 5 - u0_cdn_usb_sof"] + #[doc = "Bit 5 - u0_usb_sof"] #[inline(always)] - pub fn u0_cdn_usb_sof(&self) -> U0_CDN_USB_SOF_R { - U0_CDN_USB_SOF_R::new(((self.bits >> 5) & 1) != 0) + pub fn u0_usb_sof(&self) -> U0_USB_SOF_R { + U0_USB_SOF_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - For software bist_test"] #[inline(always)] - pub fn u0_cdn_usb_test_bist(&self) -> U0_CDN_USB_TEST_BIST_R { - U0_CDN_USB_TEST_BIST_R::new(((self.bits >> 6) & 1) != 0) + pub fn u0_usb_test_bist(&self) -> U0_USB_TEST_BIST_R { + U0_USB_TEST_BIST_R::new(((self.bits >> 6) & 1) != 0) } - #[doc = "Bit 7 - u0_cdn_usb_usbdev_main_power_off_ack"] + #[doc = "Bit 7 - u0_usb_usbdev_main_power_off_ack"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_main_power_off_ack(&self) -> U0_CDN_USB_USBDEV_MAIN_POWER_OFF_ACK_R { - U0_CDN_USB_USBDEV_MAIN_POWER_OFF_ACK_R::new(((self.bits >> 7) & 1) != 0) + pub fn u0_usb_usbdev_main_power_off_ack(&self) -> U0_USB_USBDEV_MAIN_POWER_OFF_ACK_R { + U0_USB_USBDEV_MAIN_POWER_OFF_ACK_R::new(((self.bits >> 7) & 1) != 0) } - #[doc = "Bit 8 - u0_cdn_usb_usbdev_main_power_off_ready"] + #[doc = "Bit 8 - u0_usb_usbdev_main_power_off_ready"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_main_power_off_ready( - &self, - ) -> U0_CDN_USB_USBDEV_MAIN_POWER_OFF_READY_R { - U0_CDN_USB_USBDEV_MAIN_POWER_OFF_READY_R::new(((self.bits >> 8) & 1) != 0) + pub fn u0_usb_usbdev_main_power_off_ready(&self) -> U0_USB_USBDEV_MAIN_POWER_OFF_READY_R { + U0_USB_USBDEV_MAIN_POWER_OFF_READY_R::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 9 - u0_cdn_usb_usbdev_main_power_off_req"] + #[doc = "Bit 9 - u0_usb_usbdev_main_power_off_req"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_main_power_off_req(&self) -> U0_CDN_USB_USBDEV_MAIN_POWER_OFF_REQ_R { - U0_CDN_USB_USBDEV_MAIN_POWER_OFF_REQ_R::new(((self.bits >> 9) & 1) != 0) + pub fn u0_usb_usbdev_main_power_off_req(&self) -> U0_USB_USBDEV_MAIN_POWER_OFF_REQ_R { + U0_USB_USBDEV_MAIN_POWER_OFF_REQ_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 10 - u0_cdn_usb_usbdev_main_power_on_ready"] + #[doc = "Bit 10 - u0_usb_usbdev_main_power_on_ready"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_main_power_on_ready(&self) -> U0_CDN_USB_USBDEV_MAIN_POWER_ON_READY_R { - U0_CDN_USB_USBDEV_MAIN_POWER_ON_READY_R::new(((self.bits >> 10) & 1) != 0) + pub fn u0_usb_usbdev_main_power_on_ready(&self) -> U0_USB_USBDEV_MAIN_POWER_ON_READY_R { + U0_USB_USBDEV_MAIN_POWER_ON_READY_R::new(((self.bits >> 10) & 1) != 0) } - #[doc = "Bit 11 - u0_cdn_usb_usbdev_main_power_on_req"] + #[doc = "Bit 11 - u0_usb_usbdev_main_power_on_req"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_main_power_on_req(&self) -> U0_CDN_USB_USBDEV_MAIN_POWER_ON_REQ_R { - U0_CDN_USB_USBDEV_MAIN_POWER_ON_REQ_R::new(((self.bits >> 11) & 1) != 0) + pub fn u0_usb_usbdev_main_power_on_req(&self) -> U0_USB_USBDEV_MAIN_POWER_ON_REQ_R { + U0_USB_USBDEV_MAIN_POWER_ON_REQ_R::new(((self.bits >> 11) & 1) != 0) } - #[doc = "Bit 12 - u0_cdn_usb_usbdev_main_power_on_valid"] + #[doc = "Bit 12 - u0_usb_usbdev_main_power_on_valid"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_main_power_on_valid(&self) -> U0_CDN_USB_USBDEV_MAIN_POWER_ON_VALID_R { - U0_CDN_USB_USBDEV_MAIN_POWER_ON_VALID_R::new(((self.bits >> 12) & 1) != 0) + pub fn u0_usb_usbdev_main_power_on_valid(&self) -> U0_USB_USBDEV_MAIN_POWER_ON_VALID_R { + U0_USB_USBDEV_MAIN_POWER_ON_VALID_R::new(((self.bits >> 12) & 1) != 0) } - #[doc = "Bit 13 - u0_cdn_usb_usbdev_power_off_ack"] + #[doc = "Bit 13 - u0_usb_usbdev_power_off_ack"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_power_off_ack(&self) -> U0_CDN_USB_USBDEV_POWER_OFF_ACK_R { - U0_CDN_USB_USBDEV_POWER_OFF_ACK_R::new(((self.bits >> 13) & 1) != 0) + pub fn u0_usb_usbdev_power_off_ack(&self) -> U0_USB_USBDEV_POWER_OFF_ACK_R { + U0_USB_USBDEV_POWER_OFF_ACK_R::new(((self.bits >> 13) & 1) != 0) } - #[doc = "Bit 14 - u0_cdn_usb_usbdev_power_off_ready"] + #[doc = "Bit 14 - u0_usb_usbdev_power_off_ready"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_power_off_ready(&self) -> U0_CDN_USB_USBDEV_POWER_OFF_READY_R { - U0_CDN_USB_USBDEV_POWER_OFF_READY_R::new(((self.bits >> 14) & 1) != 0) + pub fn u0_usb_usbdev_power_off_ready(&self) -> U0_USB_USBDEV_POWER_OFF_READY_R { + U0_USB_USBDEV_POWER_OFF_READY_R::new(((self.bits >> 14) & 1) != 0) } - #[doc = "Bit 15 - u0_cdn_usb_usbdev_power_off_req"] + #[doc = "Bit 15 - u0_usb_usbdev_power_off_req"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_power_off_req(&self) -> U0_CDN_USB_USBDEV_POWER_OFF_REQ_R { - U0_CDN_USB_USBDEV_POWER_OFF_REQ_R::new(((self.bits >> 15) & 1) != 0) + pub fn u0_usb_usbdev_power_off_req(&self) -> U0_USB_USBDEV_POWER_OFF_REQ_R { + U0_USB_USBDEV_POWER_OFF_REQ_R::new(((self.bits >> 15) & 1) != 0) } - #[doc = "Bit 16 - u0_cdn_usb_usbdev_power_on_ready"] + #[doc = "Bit 16 - u0_usb_usbdev_power_on_ready"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_power_on_ready(&self) -> U0_CDN_USB_USBDEV_POWER_ON_READY_R { - U0_CDN_USB_USBDEV_POWER_ON_READY_R::new(((self.bits >> 16) & 1) != 0) + pub fn u0_usb_usbdev_power_on_ready(&self) -> U0_USB_USBDEV_POWER_ON_READY_R { + U0_USB_USBDEV_POWER_ON_READY_R::new(((self.bits >> 16) & 1) != 0) } - #[doc = "Bit 17 - u0_cdn_usb_usbdev_power_on_req"] + #[doc = "Bit 17 - u0_usb_usbdev_power_on_req"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_power_on_req(&self) -> U0_CDN_USB_USBDEV_POWER_ON_REQ_R { - U0_CDN_USB_USBDEV_POWER_ON_REQ_R::new(((self.bits >> 17) & 1) != 0) + pub fn u0_usb_usbdev_power_on_req(&self) -> U0_USB_USBDEV_POWER_ON_REQ_R { + U0_USB_USBDEV_POWER_ON_REQ_R::new(((self.bits >> 17) & 1) != 0) } - #[doc = "Bit 18 - u0_cdn_usb_usbdev_power_on_valid"] + #[doc = "Bit 18 - u0_usb_usbdev_power_on_valid"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_power_on_valid(&self) -> U0_CDN_USB_USBDEV_POWER_ON_VALID_R { - U0_CDN_USB_USBDEV_POWER_ON_VALID_R::new(((self.bits >> 18) & 1) != 0) + pub fn u0_usb_usbdev_power_on_valid(&self) -> U0_USB_USBDEV_POWER_ON_VALID_R { + U0_USB_USBDEV_POWER_ON_VALID_R::new(((self.bits >> 18) & 1) != 0) } - #[doc = "Bit 19 - u0_cdn_usb_utmi_dmpulldown_sit"] + #[doc = "Bit 19 - u0_usb_utmi_dmpulldown_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_dmpulldown_sit(&self) -> U0_CDN_USB_UTMI_DMPULLDOWN_SIT_R { - U0_CDN_USB_UTMI_DMPULLDOWN_SIT_R::new(((self.bits >> 19) & 1) != 0) + pub fn u0_usb_utmi_dmpulldown_sit(&self) -> U0_USB_UTMI_DMPULLDOWN_SIT_R { + U0_USB_UTMI_DMPULLDOWN_SIT_R::new(((self.bits >> 19) & 1) != 0) } - #[doc = "Bit 20 - u0_cdn_usb_utmi_dppulldown_sit"] + #[doc = "Bit 20 - u0_usb_utmi_dppulldown_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_dppulldown_sit(&self) -> U0_CDN_USB_UTMI_DPPULLDOWN_SIT_R { - U0_CDN_USB_UTMI_DPPULLDOWN_SIT_R::new(((self.bits >> 20) & 1) != 0) + pub fn u0_usb_utmi_dppulldown_sit(&self) -> U0_USB_UTMI_DPPULLDOWN_SIT_R { + U0_USB_UTMI_DPPULLDOWN_SIT_R::new(((self.bits >> 20) & 1) != 0) } - #[doc = "Bit 21 - u0_cdn_usb_utmi_fslsserialmode_sit"] + #[doc = "Bit 21 - u0_usb_utmi_fslsserialmode_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_fslsserialmode_sit(&self) -> U0_CDN_USB_UTMI_FSLSSERIALMODE_SIT_R { - U0_CDN_USB_UTMI_FSLSSERIALMODE_SIT_R::new(((self.bits >> 21) & 1) != 0) + pub fn u0_usb_utmi_fslsserialmode_sit(&self) -> U0_USB_UTMI_FSLSSERIALMODE_SIT_R { + U0_USB_UTMI_FSLSSERIALMODE_SIT_R::new(((self.bits >> 21) & 1) != 0) } - #[doc = "Bit 22 - u0_cdn_usb_utmi_hostdisconnect_sit"] + #[doc = "Bit 22 - u0_usb_utmi_hostdisconnect_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_hostdisconnect_sit(&self) -> U0_CDN_USB_UTMI_HOSTDISCONNECT_SIT_R { - U0_CDN_USB_UTMI_HOSTDISCONNECT_SIT_R::new(((self.bits >> 22) & 1) != 0) + pub fn u0_usb_utmi_hostdisconnect_sit(&self) -> U0_USB_UTMI_HOSTDISCONNECT_SIT_R { + U0_USB_UTMI_HOSTDISCONNECT_SIT_R::new(((self.bits >> 22) & 1) != 0) } - #[doc = "Bit 23 - u0_cdn_usb_utmi_iddig_sit"] + #[doc = "Bit 23 - u0_usb_utmi_iddig_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_iddig_sit(&self) -> U0_CDN_USB_UTMI_IDDIG_SIT_R { - U0_CDN_USB_UTMI_IDDIG_SIT_R::new(((self.bits >> 23) & 1) != 0) + pub fn u0_usb_utmi_iddig_sit(&self) -> U0_USB_UTMI_IDDIG_SIT_R { + U0_USB_UTMI_IDDIG_SIT_R::new(((self.bits >> 23) & 1) != 0) } - #[doc = "Bit 24 - u0_cdn_usb_utmi_idpullup_sit"] + #[doc = "Bit 24 - u0_usb_utmi_idpullup_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_idpullup_sit(&self) -> U0_CDN_USB_UTMI_IDPULLUP_SIT_R { - U0_CDN_USB_UTMI_IDPULLUP_SIT_R::new(((self.bits >> 24) & 1) != 0) + pub fn u0_usb_utmi_idpullup_sit(&self) -> U0_USB_UTMI_IDPULLUP_SIT_R { + U0_USB_UTMI_IDPULLUP_SIT_R::new(((self.bits >> 24) & 1) != 0) } - #[doc = "Bits 25:26 - u0_cdn_usb_utmi_linestate_sit"] + #[doc = "Bits 25:26 - u0_usb_utmi_linestate_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_linestate_sit(&self) -> U0_CDN_USB_UTMI_LINESTATE_SIT_R { - U0_CDN_USB_UTMI_LINESTATE_SIT_R::new(((self.bits >> 25) & 3) as u8) + pub fn u0_usb_utmi_linestate_sit(&self) -> U0_USB_UTMI_LINESTATE_SIT_R { + U0_USB_UTMI_LINESTATE_SIT_R::new(((self.bits >> 25) & 3) as u8) } - #[doc = "Bits 27:28 - u0_cdn_usb_utmi_opmode_sit"] + #[doc = "Bits 27:28 - u0_usb_utmi_opmode_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_opmode_sit(&self) -> U0_CDN_USB_UTMI_OPMODE_SIT_R { - U0_CDN_USB_UTMI_OPMODE_SIT_R::new(((self.bits >> 27) & 3) as u8) + pub fn u0_usb_utmi_opmode_sit(&self) -> U0_USB_UTMI_OPMODE_SIT_R { + U0_USB_UTMI_OPMODE_SIT_R::new(((self.bits >> 27) & 3) as u8) } - #[doc = "Bit 29 - u0_cdn_usb_utmi_rxactive_sit"] + #[doc = "Bit 29 - u0_usb_utmi_rxactive_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_rxactive_sit(&self) -> U0_CDN_USB_UTMI_RXACTIVE_SIT_R { - U0_CDN_USB_UTMI_RXACTIVE_SIT_R::new(((self.bits >> 29) & 1) != 0) + pub fn u0_usb_utmi_rxactive_sit(&self) -> U0_USB_UTMI_RXACTIVE_SIT_R { + U0_USB_UTMI_RXACTIVE_SIT_R::new(((self.bits >> 29) & 1) != 0) } - #[doc = "Bit 30 - u0_cdn_usb_utmi_rxerror_sit"] + #[doc = "Bit 30 - u0_usb_utmi_rxerror_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_rxerror_sit(&self) -> U0_CDN_USB_UTMI_RXERROR_SIT_R { - U0_CDN_USB_UTMI_RXERROR_SIT_R::new(((self.bits >> 30) & 1) != 0) + pub fn u0_usb_utmi_rxerror_sit(&self) -> U0_USB_UTMI_RXERROR_SIT_R { + U0_USB_UTMI_RXERROR_SIT_R::new(((self.bits >> 30) & 1) != 0) } - #[doc = "Bit 31 - u0_cdn_usb_utmi_rxvalid_sit"] + #[doc = "Bit 31 - u0_usb_utmi_rxvalid_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_rxvalid_sit(&self) -> U0_CDN_USB_UTMI_RXVALID_SIT_R { - U0_CDN_USB_UTMI_RXVALID_SIT_R::new(((self.bits >> 31) & 1) != 0) + pub fn u0_usb_utmi_rxvalid_sit(&self) -> U0_USB_UTMI_RXVALID_SIT_R { + U0_USB_UTMI_RXVALID_SIT_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 2 - For software bist_test"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_self_test(&mut self) -> U0_CDN_USB_SELF_TEST_W { - U0_CDN_USB_SELF_TEST_W::new(self, 2) + pub fn u0_usb_self_test(&mut self) -> U0_USB_SELF_TEST_W { + U0_USB_SELF_TEST_W::new(self, 2) } - #[doc = "Bit 9 - u0_cdn_usb_usbdev_main_power_off_req"] + #[doc = "Bit 9 - u0_usb_usbdev_main_power_off_req"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_usbdev_main_power_off_req( + pub fn u0_usb_usbdev_main_power_off_req( &mut self, - ) -> U0_CDN_USB_USBDEV_MAIN_POWER_OFF_REQ_W { - U0_CDN_USB_USBDEV_MAIN_POWER_OFF_REQ_W::new(self, 9) + ) -> U0_USB_USBDEV_MAIN_POWER_OFF_REQ_W { + U0_USB_USBDEV_MAIN_POWER_OFF_REQ_W::new(self, 9) } - #[doc = "Bit 12 - u0_cdn_usb_usbdev_main_power_on_valid"] + #[doc = "Bit 12 - u0_usb_usbdev_main_power_on_valid"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_usbdev_main_power_on_valid( + pub fn u0_usb_usbdev_main_power_on_valid( &mut self, - ) -> U0_CDN_USB_USBDEV_MAIN_POWER_ON_VALID_W { - U0_CDN_USB_USBDEV_MAIN_POWER_ON_VALID_W::new(self, 12) + ) -> U0_USB_USBDEV_MAIN_POWER_ON_VALID_W { + U0_USB_USBDEV_MAIN_POWER_ON_VALID_W::new(self, 12) } - #[doc = "Bit 15 - u0_cdn_usb_usbdev_power_off_req"] + #[doc = "Bit 15 - u0_usb_usbdev_power_off_req"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_usbdev_power_off_req( + pub fn u0_usb_usbdev_power_off_req( &mut self, - ) -> U0_CDN_USB_USBDEV_POWER_OFF_REQ_W { - U0_CDN_USB_USBDEV_POWER_OFF_REQ_W::new(self, 15) + ) -> U0_USB_USBDEV_POWER_OFF_REQ_W { + U0_USB_USBDEV_POWER_OFF_REQ_W::new(self, 15) } - #[doc = "Bit 18 - u0_cdn_usb_usbdev_power_on_valid"] + #[doc = "Bit 18 - u0_usb_usbdev_power_on_valid"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_usbdev_power_on_valid( + pub fn u0_usb_usbdev_power_on_valid( &mut self, - ) -> U0_CDN_USB_USBDEV_POWER_ON_VALID_W { - U0_CDN_USB_USBDEV_POWER_ON_VALID_W::new(self, 18) + ) -> U0_USB_USBDEV_POWER_ON_VALID_W { + U0_USB_USBDEV_POWER_ON_VALID_W::new(self, 18) } - #[doc = "Bit 19 - u0_cdn_usb_utmi_dmpulldown_sit"] + #[doc = "Bit 19 - u0_usb_utmi_dmpulldown_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_dmpulldown_sit( + pub fn u0_usb_utmi_dmpulldown_sit( &mut self, - ) -> U0_CDN_USB_UTMI_DMPULLDOWN_SIT_W { - U0_CDN_USB_UTMI_DMPULLDOWN_SIT_W::new(self, 19) + ) -> U0_USB_UTMI_DMPULLDOWN_SIT_W { + U0_USB_UTMI_DMPULLDOWN_SIT_W::new(self, 19) } - #[doc = "Bit 20 - u0_cdn_usb_utmi_dppulldown_sit"] + #[doc = "Bit 20 - u0_usb_utmi_dppulldown_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_dppulldown_sit( + pub fn u0_usb_utmi_dppulldown_sit( &mut self, - ) -> U0_CDN_USB_UTMI_DPPULLDOWN_SIT_W { - U0_CDN_USB_UTMI_DPPULLDOWN_SIT_W::new(self, 20) + ) -> U0_USB_UTMI_DPPULLDOWN_SIT_W { + U0_USB_UTMI_DPPULLDOWN_SIT_W::new(self, 20) } - #[doc = "Bit 21 - u0_cdn_usb_utmi_fslsserialmode_sit"] + #[doc = "Bit 21 - u0_usb_utmi_fslsserialmode_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_fslsserialmode_sit( + pub fn u0_usb_utmi_fslsserialmode_sit( &mut self, - ) -> U0_CDN_USB_UTMI_FSLSSERIALMODE_SIT_W { - U0_CDN_USB_UTMI_FSLSSERIALMODE_SIT_W::new(self, 21) + ) -> U0_USB_UTMI_FSLSSERIALMODE_SIT_W { + U0_USB_UTMI_FSLSSERIALMODE_SIT_W::new(self, 21) } - #[doc = "Bit 24 - u0_cdn_usb_utmi_idpullup_sit"] + #[doc = "Bit 24 - u0_usb_utmi_idpullup_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_idpullup_sit( - &mut self, - ) -> U0_CDN_USB_UTMI_IDPULLUP_SIT_W { - U0_CDN_USB_UTMI_IDPULLUP_SIT_W::new(self, 24) + pub fn u0_usb_utmi_idpullup_sit(&mut self) -> U0_USB_UTMI_IDPULLUP_SIT_W { + U0_USB_UTMI_IDPULLUP_SIT_W::new(self, 24) } - #[doc = "Bits 27:28 - u0_cdn_usb_utmi_opmode_sit"] + #[doc = "Bits 27:28 - u0_usb_utmi_opmode_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_opmode_sit( - &mut self, - ) -> U0_CDN_USB_UTMI_OPMODE_SIT_W { - U0_CDN_USB_UTMI_OPMODE_SIT_W::new(self, 27) + pub fn u0_usb_utmi_opmode_sit(&mut self) -> U0_USB_UTMI_OPMODE_SIT_W { + U0_USB_UTMI_OPMODE_SIT_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_20.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_20.rs index ec7d4ba..e8aa053 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_20.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_20.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_20` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_95_64` reader - u0_plda_pcie_axi4_mst0_aratomop_95_64"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_95_64_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_95_64` reader - u0_pcie_axi4_mst0_aratomop_95_64"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_95_64_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_95_64"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_95_64"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_95_64(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_95_64_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_95_64_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_95_64(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_95_64_R { + U0_PCIE_AXI4_MST0_ARATOMOP_95_64_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_200.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_200.rs index 10befbf..e0d3688 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_200.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_200.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_200` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_63_32` reader - u1_plda_pcie_test_out_bridge_63_32"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_63_32` writer - u1_plda_pcie_test_out_bridge_63_32"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_63_32` reader - u1_pcie_test_out_bridge_63_32"] +pub type U1_PCIE_TEST_OUT_BRIDGE_63_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_63_32` writer - u1_pcie_test_out_bridge_63_32"] +pub type U1_PCIE_TEST_OUT_BRIDGE_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_63_32"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_63_32"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_63_32(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_63_32(&self) -> U1_PCIE_TEST_OUT_BRIDGE_63_32_R { + U1_PCIE_TEST_OUT_BRIDGE_63_32_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_63_32"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_63_32"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_63_32( + pub fn u1_pcie_test_out_bridge_63_32( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_63_32_W { + U1_PCIE_TEST_OUT_BRIDGE_63_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_201.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_201.rs index 852cd72..1ecd6dc 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_201.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_201.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_201` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_95_64` reader - u1_plda_pcie_test_out_bridge_95_64"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_95_64` writer - u1_plda_pcie_test_out_bridge_95_64"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_95_64` reader - u1_pcie_test_out_bridge_95_64"] +pub type U1_PCIE_TEST_OUT_BRIDGE_95_64_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_95_64` writer - u1_pcie_test_out_bridge_95_64"] +pub type U1_PCIE_TEST_OUT_BRIDGE_95_64_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_95_64"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_95_64"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_95_64(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_95_64(&self) -> U1_PCIE_TEST_OUT_BRIDGE_95_64_R { + U1_PCIE_TEST_OUT_BRIDGE_95_64_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_95_64"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_95_64"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_95_64( + pub fn u1_pcie_test_out_bridge_95_64( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_95_64_W { + U1_PCIE_TEST_OUT_BRIDGE_95_64_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_202.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_202.rs index e2132af..e6d489d 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_202.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_202.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_202` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_127_96` reader - u1_plda_pcie_test_out_bridge_127_96"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_127_96` writer - u1_plda_pcie_test_out_bridge_127_96"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_127_96` reader - u1_pcie_test_out_bridge_127_96"] +pub type U1_PCIE_TEST_OUT_BRIDGE_127_96_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_127_96` writer - u1_pcie_test_out_bridge_127_96"] +pub type U1_PCIE_TEST_OUT_BRIDGE_127_96_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_127_96"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_127_96"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_127_96(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_127_96(&self) -> U1_PCIE_TEST_OUT_BRIDGE_127_96_R { + U1_PCIE_TEST_OUT_BRIDGE_127_96_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_127_96"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_127_96"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_127_96( + pub fn u1_pcie_test_out_bridge_127_96( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_127_96_W { + U1_PCIE_TEST_OUT_BRIDGE_127_96_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_203.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_203.rs index 91cdc15..ae6c56e 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_203.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_203.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_203` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_159_128` reader - u1_plda_pcie_test_out_bridge_159_128"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_159_128` writer - u1_plda_pcie_test_out_bridge_159_128"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_159_128` reader - u1_pcie_test_out_bridge_159_128"] +pub type U1_PCIE_TEST_OUT_BRIDGE_159_128_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_159_128` writer - u1_pcie_test_out_bridge_159_128"] +pub type U1_PCIE_TEST_OUT_BRIDGE_159_128_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_159_128"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_159_128"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_159_128(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_159_128(&self) -> U1_PCIE_TEST_OUT_BRIDGE_159_128_R { + U1_PCIE_TEST_OUT_BRIDGE_159_128_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_159_128"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_159_128"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_159_128( + pub fn u1_pcie_test_out_bridge_159_128( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_159_128_W { + U1_PCIE_TEST_OUT_BRIDGE_159_128_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_204.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_204.rs index 82b540e..d2c0ff9 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_204.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_204.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_204` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_191_160` reader - u1_plda_pcie_test_out_bridge_191_160"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_191_160` writer - u1_plda_pcie_test_out_bridge_191_160"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_191_160` reader - u1_pcie_test_out_bridge_191_160"] +pub type U1_PCIE_TEST_OUT_BRIDGE_191_160_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_191_160` writer - u1_pcie_test_out_bridge_191_160"] +pub type U1_PCIE_TEST_OUT_BRIDGE_191_160_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_191_160"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_191_160"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_191_160(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_191_160(&self) -> U1_PCIE_TEST_OUT_BRIDGE_191_160_R { + U1_PCIE_TEST_OUT_BRIDGE_191_160_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_191_160"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_191_160"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_191_160( + pub fn u1_pcie_test_out_bridge_191_160( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_191_160_W { + U1_PCIE_TEST_OUT_BRIDGE_191_160_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_205.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_205.rs index 871e7d3..2c69e0b 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_205.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_205.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_205` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_223_192` reader - u1_plda_pcie_test_out_bridge_223_192"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_223_192` writer - u1_plda_pcie_test_out_bridge_223_192"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_223_192` reader - u1_pcie_test_out_bridge_223_192"] +pub type U1_PCIE_TEST_OUT_BRIDGE_223_192_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_223_192` writer - u1_pcie_test_out_bridge_223_192"] +pub type U1_PCIE_TEST_OUT_BRIDGE_223_192_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_223_192"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_223_192"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_223_192(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_223_192(&self) -> U1_PCIE_TEST_OUT_BRIDGE_223_192_R { + U1_PCIE_TEST_OUT_BRIDGE_223_192_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_223_192"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_223_192"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_223_192( + pub fn u1_pcie_test_out_bridge_223_192( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_223_192_W { + U1_PCIE_TEST_OUT_BRIDGE_223_192_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_206.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_206.rs index b926deb..0a365a8 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_206.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_206.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_206` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_255_224` reader - u1_plda_pcie_test_out_bridge_255_224"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_255_224` writer - u1_plda_pcie_test_out_bridge_255_224"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_255_224` reader - u1_pcie_test_out_bridge_255_224"] +pub type U1_PCIE_TEST_OUT_BRIDGE_255_224_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_255_224` writer - u1_pcie_test_out_bridge_255_224"] +pub type U1_PCIE_TEST_OUT_BRIDGE_255_224_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_255_224"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_255_224"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_255_224(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_255_224(&self) -> U1_PCIE_TEST_OUT_BRIDGE_255_224_R { + U1_PCIE_TEST_OUT_BRIDGE_255_224_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_255_224"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_255_224"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_255_224( + pub fn u1_pcie_test_out_bridge_255_224( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_255_224_W { + U1_PCIE_TEST_OUT_BRIDGE_255_224_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_207.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_207.rs index c18add1..662e9c9 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_207.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_207.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_207` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_287_256` reader - u1_plda_pcie_test_out_bridge_287_256"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_287_256` writer - u1_plda_pcie_test_out_bridge_287_256"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_287_256` reader - u1_pcie_test_out_bridge_287_256"] +pub type U1_PCIE_TEST_OUT_BRIDGE_287_256_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_287_256` writer - u1_pcie_test_out_bridge_287_256"] +pub type U1_PCIE_TEST_OUT_BRIDGE_287_256_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_287_256"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_287_256"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_287_256(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_287_256(&self) -> U1_PCIE_TEST_OUT_BRIDGE_287_256_R { + U1_PCIE_TEST_OUT_BRIDGE_287_256_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_287_256"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_287_256"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_287_256( + pub fn u1_pcie_test_out_bridge_287_256( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_287_256_W { + U1_PCIE_TEST_OUT_BRIDGE_287_256_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_208.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_208.rs index 7fc8221..4e4ab4e 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_208.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_208.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_208` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_319_288` reader - u1_plda_pcie_test_out_bridge_319_288"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_319_288` writer - u1_plda_pcie_test_out_bridge_319_288"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_319_288` reader - u1_pcie_test_out_bridge_319_288"] +pub type U1_PCIE_TEST_OUT_BRIDGE_319_288_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_319_288` writer - u1_pcie_test_out_bridge_319_288"] +pub type U1_PCIE_TEST_OUT_BRIDGE_319_288_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_319_288"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_319_288"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_319_288(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_319_288(&self) -> U1_PCIE_TEST_OUT_BRIDGE_319_288_R { + U1_PCIE_TEST_OUT_BRIDGE_319_288_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_319_288"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_319_288"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_319_288( + pub fn u1_pcie_test_out_bridge_319_288( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_319_288_W { + U1_PCIE_TEST_OUT_BRIDGE_319_288_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_209.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_209.rs index 35144be..674c45b 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_209.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_209.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_209` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_351_320` reader - u1_plda_pcie_test_out_bridge_351_320"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_351_320` writer - u1_plda_pcie_test_out_bridge_351_320"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_351_320` reader - u1_pcie_test_out_bridge_351_320"] +pub type U1_PCIE_TEST_OUT_BRIDGE_351_320_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_351_320` writer - u1_pcie_test_out_bridge_351_320"] +pub type U1_PCIE_TEST_OUT_BRIDGE_351_320_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_351_320"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_351_320"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_351_320(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_351_320(&self) -> U1_PCIE_TEST_OUT_BRIDGE_351_320_R { + U1_PCIE_TEST_OUT_BRIDGE_351_320_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_351_320"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_351_320"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_351_320( + pub fn u1_pcie_test_out_bridge_351_320( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_351_320_W { + U1_PCIE_TEST_OUT_BRIDGE_351_320_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_21.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_21.rs index fb9cbc3..4111c2c 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_21.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_21.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_21` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_127_96` reader - u0_plda_pcie_axi4_mst0_aratomop_127_96"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_127_96_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_127_96` reader - u0_pcie_axi4_mst0_aratomop_127_96"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_127_96_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_127_96"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_127_96"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_127_96( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_127_96_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_127_96_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_127_96(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_127_96_R { + U0_PCIE_AXI4_MST0_ARATOMOP_127_96_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_210.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_210.rs index a764235..328f957 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_210.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_210.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_210` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_383_352` reader - u1_plda_pcie_test_out_bridge_383_352"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_383_352` writer - u1_plda_pcie_test_out_bridge_383_352"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_383_352` reader - u1_pcie_test_out_bridge_383_352"] +pub type U1_PCIE_TEST_OUT_BRIDGE_383_352_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_383_352` writer - u1_pcie_test_out_bridge_383_352"] +pub type U1_PCIE_TEST_OUT_BRIDGE_383_352_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_383_352"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_383_352"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_383_352(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_383_352(&self) -> U1_PCIE_TEST_OUT_BRIDGE_383_352_R { + U1_PCIE_TEST_OUT_BRIDGE_383_352_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_383_352"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_383_352"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_383_352( + pub fn u1_pcie_test_out_bridge_383_352( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_383_352_W { + U1_PCIE_TEST_OUT_BRIDGE_383_352_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_211.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_211.rs index ed1d43e..cc516f1 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_211.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_211.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_211` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_415_384` reader - u1_plda_pcie_test_out_bridge_415_384"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_415_384` writer - u1_plda_pcie_test_out_bridge_415_384"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_415_384` reader - u1_pcie_test_out_bridge_415_384"] +pub type U1_PCIE_TEST_OUT_BRIDGE_415_384_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_415_384` writer - u1_pcie_test_out_bridge_415_384"] +pub type U1_PCIE_TEST_OUT_BRIDGE_415_384_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_415_384"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_415_384"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_415_384(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_415_384(&self) -> U1_PCIE_TEST_OUT_BRIDGE_415_384_R { + U1_PCIE_TEST_OUT_BRIDGE_415_384_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_415_384"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_415_384"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_415_384( + pub fn u1_pcie_test_out_bridge_415_384( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_415_384_W { + U1_PCIE_TEST_OUT_BRIDGE_415_384_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_212.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_212.rs index 1c5f014..a90d1ab 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_212.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_212.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_212` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_447_416` reader - u1_plda_pcie_test_out_bridge_447_416"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_447_416` writer - u1_plda_pcie_test_out_bridge_447_416"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_447_416` reader - u1_pcie_test_out_bridge_447_416"] +pub type U1_PCIE_TEST_OUT_BRIDGE_447_416_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_447_416` writer - u1_pcie_test_out_bridge_447_416"] +pub type U1_PCIE_TEST_OUT_BRIDGE_447_416_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_447_416"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_447_416"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_447_416(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_447_416(&self) -> U1_PCIE_TEST_OUT_BRIDGE_447_416_R { + U1_PCIE_TEST_OUT_BRIDGE_447_416_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_447_416"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_447_416"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_447_416( + pub fn u1_pcie_test_out_bridge_447_416( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_447_416_W { + U1_PCIE_TEST_OUT_BRIDGE_447_416_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_213.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_213.rs index bdedeef..dded075 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_213.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_213.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_213` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_479_448` reader - u1_plda_pcie_test_out_bridge_479_448"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_479_448` writer - u1_plda_pcie_test_out_bridge_479_448"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_479_448` reader - u1_pcie_test_out_bridge_479_448"] +pub type U1_PCIE_TEST_OUT_BRIDGE_479_448_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_479_448` writer - u1_pcie_test_out_bridge_479_448"] +pub type U1_PCIE_TEST_OUT_BRIDGE_479_448_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_479_448"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_479_448"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_479_448(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_479_448(&self) -> U1_PCIE_TEST_OUT_BRIDGE_479_448_R { + U1_PCIE_TEST_OUT_BRIDGE_479_448_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_479_448"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_479_448"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_479_448( + pub fn u1_pcie_test_out_bridge_479_448( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_479_448_W { + U1_PCIE_TEST_OUT_BRIDGE_479_448_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_214.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_214.rs index 02473ea..cbeeb6b 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_214.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_214.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_214` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_511_480` reader - u1_plda_pcie_test_out_bridge_511_480"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_511_480` writer - u1_plda_pcie_test_out_bridge_511_480"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_511_480` reader - u1_pcie_test_out_bridge_511_480"] +pub type U1_PCIE_TEST_OUT_BRIDGE_511_480_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_511_480` writer - u1_pcie_test_out_bridge_511_480"] +pub type U1_PCIE_TEST_OUT_BRIDGE_511_480_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_511_480"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_511_480"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_511_480(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_511_480(&self) -> U1_PCIE_TEST_OUT_BRIDGE_511_480_R { + U1_PCIE_TEST_OUT_BRIDGE_511_480_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_511_480"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_511_480"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_511_480( + pub fn u1_pcie_test_out_bridge_511_480( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_511_480_W { + U1_PCIE_TEST_OUT_BRIDGE_511_480_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_215.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_215.rs index 2ae03da..64eeb93 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_215.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_215.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_215` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_31_0` reader - u1_plda_pcie_test_out_pcie_31_0"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_31_0` reader - u1_pcie_test_out_pcie_31_0"] +pub type U1_PCIE_TEST_OUT_PCIE_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_31_0"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_31_0"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_31_0(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_31_0_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_31_0_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_31_0(&self) -> U1_PCIE_TEST_OUT_PCIE_31_0_R { + U1_PCIE_TEST_OUT_PCIE_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_216.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_216.rs index 544c9dd..3dbaa3b 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_216.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_216.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_216` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_63_32` reader - u1_plda_pcie_test_out_pcie_63_32"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_63_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_63_32` reader - u1_pcie_test_out_pcie_63_32"] +pub type U1_PCIE_TEST_OUT_PCIE_63_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_63_32"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_63_32"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_63_32(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_63_32_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_63_32_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_63_32(&self) -> U1_PCIE_TEST_OUT_PCIE_63_32_R { + U1_PCIE_TEST_OUT_PCIE_63_32_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_217.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_217.rs index 650720f..04e096e 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_217.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_217.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_217` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_95_64` reader - u1_plda_pcie_test_out_pcie_95_64"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_95_64_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_95_64` reader - u1_pcie_test_out_pcie_95_64"] +pub type U1_PCIE_TEST_OUT_PCIE_95_64_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_95_64"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_95_64"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_95_64(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_95_64_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_95_64_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_95_64(&self) -> U1_PCIE_TEST_OUT_PCIE_95_64_R { + U1_PCIE_TEST_OUT_PCIE_95_64_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_218.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_218.rs index 8bc6000..729c38c 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_218.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_218.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_218` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_127_96` reader - u1_plda_pcie_test_out_pcie_127_96"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_127_96_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_127_96` reader - u1_pcie_test_out_pcie_127_96"] +pub type U1_PCIE_TEST_OUT_PCIE_127_96_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_127_96"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_127_96"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_127_96(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_127_96_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_127_96_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_127_96(&self) -> U1_PCIE_TEST_OUT_PCIE_127_96_R { + U1_PCIE_TEST_OUT_PCIE_127_96_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_219.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_219.rs index 63807fe..2ceda44 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_219.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_219.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_219` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_159_128` reader - u1_plda_pcie_test_out_pcie_159_128"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_159_128_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_159_128` reader - u1_pcie_test_out_pcie_159_128"] +pub type U1_PCIE_TEST_OUT_PCIE_159_128_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_159_128"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_159_128"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_159_128(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_159_128_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_159_128_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_159_128(&self) -> U1_PCIE_TEST_OUT_PCIE_159_128_R { + U1_PCIE_TEST_OUT_PCIE_159_128_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_22.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_22.rs index 606c1e3..8559726 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_22.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_22.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_22` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_159_128` reader - u0_plda_pcie_axi4_mst0_aratomop_159_128"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_159_128_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_159_128` reader - u0_pcie_axi4_mst0_aratomop_159_128"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_159_128_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_159_128"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_159_128"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_159_128( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_159_128_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_159_128_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_159_128(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_159_128_R { + U0_PCIE_AXI4_MST0_ARATOMOP_159_128_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_220.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_220.rs index c8b1025..de5f513 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_220.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_220.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_220` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_191_160` reader - u1_plda_pcie_test_out_pcie_191_160"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_191_160_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_191_160` reader - u1_pcie_test_out_pcie_191_160"] +pub type U1_PCIE_TEST_OUT_PCIE_191_160_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_191_160"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_191_160"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_191_160(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_191_160_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_191_160_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_191_160(&self) -> U1_PCIE_TEST_OUT_PCIE_191_160_R { + U1_PCIE_TEST_OUT_PCIE_191_160_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_221.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_221.rs index fbabe56..98d4a76 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_221.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_221.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_221` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_223_192` reader - u1_plda_pcie_test_out_pcie_223_192"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_223_192_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_223_192` reader - u1_pcie_test_out_pcie_223_192"] +pub type U1_PCIE_TEST_OUT_PCIE_223_192_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_223_192"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_223_192"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_223_192(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_223_192_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_223_192_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_223_192(&self) -> U1_PCIE_TEST_OUT_PCIE_223_192_R { + U1_PCIE_TEST_OUT_PCIE_223_192_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_222.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_222.rs index 8852283..54cf1f4 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_222.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_222.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_222` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_255_224` reader - u1_plda_pcie_test_out_pcie_255_224"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_255_224_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_255_224` reader - u1_pcie_test_out_pcie_255_224"] +pub type U1_PCIE_TEST_OUT_PCIE_255_224_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_255_224"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_255_224"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_255_224(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_255_224_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_255_224_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_255_224(&self) -> U1_PCIE_TEST_OUT_PCIE_255_224_R { + U1_PCIE_TEST_OUT_PCIE_255_224_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_223.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_223.rs index c18cd40..96a3aa3 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_223.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_223.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_223` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_287_256` reader - u1_plda_pcie_test_out_pcie_287_256"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_287_256_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_287_256` reader - u1_pcie_test_out_pcie_287_256"] +pub type U1_PCIE_TEST_OUT_PCIE_287_256_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_287_256"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_287_256"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_287_256(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_287_256_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_287_256_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_287_256(&self) -> U1_PCIE_TEST_OUT_PCIE_287_256_R { + U1_PCIE_TEST_OUT_PCIE_287_256_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_224.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_224.rs index d7ccde7..c86d684 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_224.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_224.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_224` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_319_288` reader - u1_plda_pcie_test_out_pcie_319_288"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_319_288_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_319_288` reader - u1_pcie_test_out_pcie_319_288"] +pub type U1_PCIE_TEST_OUT_PCIE_319_288_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_319_288"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_319_288"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_319_288(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_319_288_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_319_288_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_319_288(&self) -> U1_PCIE_TEST_OUT_PCIE_319_288_R { + U1_PCIE_TEST_OUT_PCIE_319_288_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_225.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_225.rs index 341e390..bf24932 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_225.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_225.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_225` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_351_320` reader - u1_plda_pcie_test_out_pcie_351_320"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_351_320_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_351_320` reader - u1_pcie_test_out_pcie_351_320"] +pub type U1_PCIE_TEST_OUT_PCIE_351_320_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_351_320"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_351_320"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_351_320(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_351_320_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_351_320_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_351_320(&self) -> U1_PCIE_TEST_OUT_PCIE_351_320_R { + U1_PCIE_TEST_OUT_PCIE_351_320_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_226.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_226.rs index cc3423a..d2105f6 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_226.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_226.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_226` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_383_352` reader - u1_plda_pcie_test_out_pcie_383_352"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_383_352_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_383_352` reader - u1_pcie_test_out_pcie_383_352"] +pub type U1_PCIE_TEST_OUT_PCIE_383_352_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_383_352"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_383_352"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_383_352(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_383_352_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_383_352_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_383_352(&self) -> U1_PCIE_TEST_OUT_PCIE_383_352_R { + U1_PCIE_TEST_OUT_PCIE_383_352_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_227.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_227.rs index 5a0d794..0ab17f0 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_227.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_227.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_227` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_415_384` reader - u1_plda_pcie_test_out_pcie_415_384"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_415_384_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_415_384` reader - u1_pcie_test_out_pcie_415_384"] +pub type U1_PCIE_TEST_OUT_PCIE_415_384_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_415_384"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_415_384"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_415_384(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_415_384_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_415_384_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_415_384(&self) -> U1_PCIE_TEST_OUT_PCIE_415_384_R { + U1_PCIE_TEST_OUT_PCIE_415_384_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_228.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_228.rs index 1a3095c..7949674 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_228.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_228.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_228` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_447_416` reader - u1_plda_pcie_test_out_pcie_447_416"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_447_416_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_447_416` reader - u1_pcie_test_out_pcie_447_416"] +pub type U1_PCIE_TEST_OUT_PCIE_447_416_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_447_416"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_447_416"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_447_416(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_447_416_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_447_416_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_447_416(&self) -> U1_PCIE_TEST_OUT_PCIE_447_416_R { + U1_PCIE_TEST_OUT_PCIE_447_416_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_229.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_229.rs index ca5e408..cca2dd0 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_229.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_229.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_229` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_479_448` reader - u1_plda_pcie_test_out_pcie_479_448"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_479_448_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_479_448` reader - u1_pcie_test_out_pcie_479_448"] +pub type U1_PCIE_TEST_OUT_PCIE_479_448_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_479_448"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_479_448"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_479_448(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_479_448_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_479_448_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_479_448(&self) -> U1_PCIE_TEST_OUT_PCIE_479_448_R { + U1_PCIE_TEST_OUT_PCIE_479_448_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_23.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_23.rs index ae6f668..fa87403 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_23.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_23.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_23` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_191_160` reader - u0_plda_pcie_axi4_mst0_aratomop_191_160"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_191_160_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_191_160` reader - u0_pcie_axi4_mst0_aratomop_191_160"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_191_160_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_191_160"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_191_160"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_191_160( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_191_160_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_191_160_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_191_160(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_191_160_R { + U0_PCIE_AXI4_MST0_ARATOMOP_191_160_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_230.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_230.rs index 3fffa00..040b921 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_230.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_230.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_230` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_511_480` reader - u1_plda_pcie_test_out_pcie_511_480"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_511_480_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_511_480` reader - u1_pcie_test_out_pcie_511_480"] +pub type U1_PCIE_TEST_OUT_PCIE_511_480_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_511_480"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_511_480"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_511_480(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_511_480_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_511_480_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_511_480(&self) -> U1_PCIE_TEST_OUT_PCIE_511_480_R { + U1_PCIE_TEST_OUT_PCIE_511_480_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_231.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_231.rs index f1141e8..ebe8587 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_231.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_231.rs @@ -2,40 +2,38 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_231` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_sel` reader - u1_plda_pcie_test_sel"] -pub type U1_PLDA_PCIE_TEST_SEL_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_sel` writer - u1_plda_pcie_test_sel"] -pub type U1_PLDA_PCIE_TEST_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `u1_plda_pcie_tl_clock_freq` reader - u1_plda_pcie_tl_clock_freq"] -pub type U1_PLDA_PCIE_TL_CLOCK_FREQ_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_tl_clock_freq` writer - u1_plda_pcie_tl_clock_freq"] -pub type U1_PLDA_PCIE_TL_CLOCK_FREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>; +#[doc = "Field `u1_pcie_test_sel` reader - u1_pcie_test_sel"] +pub type U1_PCIE_TEST_SEL_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_sel` writer - u1_pcie_test_sel"] +pub type U1_PCIE_TEST_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `u1_pcie_tl_clock_freq` reader - u1_pcie_tl_clock_freq"] +pub type U1_PCIE_TL_CLOCK_FREQ_R = crate::FieldReader; +#[doc = "Field `u1_pcie_tl_clock_freq` writer - u1_pcie_tl_clock_freq"] +pub type U1_PCIE_TL_CLOCK_FREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>; impl R { - #[doc = "Bits 0:3 - u1_plda_pcie_test_sel"] + #[doc = "Bits 0:3 - u1_pcie_test_sel"] #[inline(always)] - pub fn u1_plda_pcie_test_sel(&self) -> U1_PLDA_PCIE_TEST_SEL_R { - U1_PLDA_PCIE_TEST_SEL_R::new((self.bits & 0x0f) as u8) + pub fn u1_pcie_test_sel(&self) -> U1_PCIE_TEST_SEL_R { + U1_PCIE_TEST_SEL_R::new((self.bits & 0x0f) as u8) } - #[doc = "Bits 4:25 - u1_plda_pcie_tl_clock_freq"] + #[doc = "Bits 4:25 - u1_pcie_tl_clock_freq"] #[inline(always)] - pub fn u1_plda_pcie_tl_clock_freq(&self) -> U1_PLDA_PCIE_TL_CLOCK_FREQ_R { - U1_PLDA_PCIE_TL_CLOCK_FREQ_R::new((self.bits >> 4) & 0x003f_ffff) + pub fn u1_pcie_tl_clock_freq(&self) -> U1_PCIE_TL_CLOCK_FREQ_R { + U1_PCIE_TL_CLOCK_FREQ_R::new((self.bits >> 4) & 0x003f_ffff) } } impl W { - #[doc = "Bits 0:3 - u1_plda_pcie_test_sel"] + #[doc = "Bits 0:3 - u1_pcie_test_sel"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_sel(&mut self) -> U1_PLDA_PCIE_TEST_SEL_W { - U1_PLDA_PCIE_TEST_SEL_W::new(self, 0) + pub fn u1_pcie_test_sel(&mut self) -> U1_PCIE_TEST_SEL_W { + U1_PCIE_TEST_SEL_W::new(self, 0) } - #[doc = "Bits 4:25 - u1_plda_pcie_tl_clock_freq"] + #[doc = "Bits 4:25 - u1_pcie_tl_clock_freq"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_tl_clock_freq( - &mut self, - ) -> U1_PLDA_PCIE_TL_CLOCK_FREQ_W { - U1_PLDA_PCIE_TL_CLOCK_FREQ_W::new(self, 4) + pub fn u1_pcie_tl_clock_freq(&mut self) -> U1_PCIE_TL_CLOCK_FREQ_W { + U1_PCIE_TL_CLOCK_FREQ_W::new(self, 4) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_232.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_232.rs index 8145114..7c171a6 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_232.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_232.rs @@ -2,32 +2,32 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_232` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_tl_ctrl_hotplug` reader - u1_plda_pcie_tl_ctrl_hotplug"] -pub type U1_PLDA_PCIE_TL_CTRL_HOTPLUG_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_tl_report_hotplug` reader - u1_plda_pcie_tl_report_hotplug"] -pub type U1_PLDA_PCIE_TL_REPORT_HOTPLUG_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_tl_report_hotplug` writer - u1_plda_pcie_tl_report_hotplug"] -pub type U1_PLDA_PCIE_TL_REPORT_HOTPLUG_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +#[doc = "Field `u1_pcie_tl_ctrl_hotplug` reader - u1_pcie_tl_ctrl_hotplug"] +pub type U1_PCIE_TL_CTRL_HOTPLUG_R = crate::FieldReader; +#[doc = "Field `u1_pcie_tl_report_hotplug` reader - u1_pcie_tl_report_hotplug"] +pub type U1_PCIE_TL_REPORT_HOTPLUG_R = crate::FieldReader; +#[doc = "Field `u1_pcie_tl_report_hotplug` writer - u1_pcie_tl_report_hotplug"] +pub type U1_PCIE_TL_REPORT_HOTPLUG_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { - #[doc = "Bits 0:15 - u1_plda_pcie_tl_ctrl_hotplug"] + #[doc = "Bits 0:15 - u1_pcie_tl_ctrl_hotplug"] #[inline(always)] - pub fn u1_plda_pcie_tl_ctrl_hotplug(&self) -> U1_PLDA_PCIE_TL_CTRL_HOTPLUG_R { - U1_PLDA_PCIE_TL_CTRL_HOTPLUG_R::new((self.bits & 0xffff) as u16) + pub fn u1_pcie_tl_ctrl_hotplug(&self) -> U1_PCIE_TL_CTRL_HOTPLUG_R { + U1_PCIE_TL_CTRL_HOTPLUG_R::new((self.bits & 0xffff) as u16) } - #[doc = "Bits 16:31 - u1_plda_pcie_tl_report_hotplug"] + #[doc = "Bits 16:31 - u1_pcie_tl_report_hotplug"] #[inline(always)] - pub fn u1_plda_pcie_tl_report_hotplug(&self) -> U1_PLDA_PCIE_TL_REPORT_HOTPLUG_R { - U1_PLDA_PCIE_TL_REPORT_HOTPLUG_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn u1_pcie_tl_report_hotplug(&self) -> U1_PCIE_TL_REPORT_HOTPLUG_R { + U1_PCIE_TL_REPORT_HOTPLUG_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { - #[doc = "Bits 16:31 - u1_plda_pcie_tl_report_hotplug"] + #[doc = "Bits 16:31 - u1_pcie_tl_report_hotplug"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_tl_report_hotplug( + pub fn u1_pcie_tl_report_hotplug( &mut self, - ) -> U1_PLDA_PCIE_TL_REPORT_HOTPLUG_W { - U1_PLDA_PCIE_TL_REPORT_HOTPLUG_W::new(self, 16) + ) -> U1_PCIE_TL_REPORT_HOTPLUG_W { + U1_PCIE_TL_REPORT_HOTPLUG_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_233.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_233.rs index e85ba1f..9ea2d73 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_233.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_233.rs @@ -2,118 +2,112 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_233` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_tx_pattern` reader - u1_plda_pcie_tx_pattern"] -pub type U1_PLDA_PCIE_TX_PATTERN_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_tx_pattern` writer - u1_plda_pcie_tx_pattern"] -pub type U1_PLDA_PCIE_TX_PATTERN_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u1_plda_pcie_usb3_bus_width` reader - u1_plda_pcie_usb3_bus_width"] -pub type U1_PLDA_PCIE_USB3_BUS_WIDTH_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_usb3_bus_width` writer - u1_plda_pcie_usb3_bus_width"] -pub type U1_PLDA_PCIE_USB3_BUS_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u1_plda_pcie_usb3_phy_enable` reader - u1_plda_pcie_usb3_phy_enable"] -pub type U1_PLDA_PCIE_USB3_PHY_ENABLE_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_usb3_phy_enable` writer - u1_plda_pcie_usb3_phy_enable"] -pub type U1_PLDA_PCIE_USB3_PHY_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_usb3_rate` reader - u1_plda_pcie_usb3_rate"] -pub type U1_PLDA_PCIE_USB3_RATE_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_usb3_rate` writer - u1_plda_pcie_usb3_rate"] -pub type U1_PLDA_PCIE_USB3_RATE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u1_plda_pcie_usb3_rx_standby` reader - u1_plda_pcie_usb3_rx_standby"] -pub type U1_PLDA_PCIE_USB3_RX_STANDBY_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_usb3_rx_standby` writer - u1_plda_pcie_usb3_rx_standby"] -pub type U1_PLDA_PCIE_USB3_RX_STANDBY_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_xwdecerr` reader - u1_plda_pcie_xwdecerr"] -pub type U1_PLDA_PCIE_XWDECERR_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_xwerrclr` reader - u1_plda_pcie_xwerrclr"] -pub type U1_PLDA_PCIE_XWERRCLR_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_xwerrclr` writer - u1_plda_pcie_xwerrclr"] -pub type U1_PLDA_PCIE_XWERRCLR_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_xwslverr` reader - u1_plda_pcie_xwslverr"] -pub type U1_PLDA_PCIE_XWSLVERR_R = crate::BitReader; +#[doc = "Field `u1_pcie_tx_pattern` reader - u1_pcie_tx_pattern"] +pub type U1_PCIE_TX_PATTERN_R = crate::FieldReader; +#[doc = "Field `u1_pcie_tx_pattern` writer - u1_pcie_tx_pattern"] +pub type U1_PCIE_TX_PATTERN_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u1_pcie_usb3_bus_width` reader - u1_pcie_usb3_bus_width"] +pub type U1_PCIE_USB3_BUS_WIDTH_R = crate::FieldReader; +#[doc = "Field `u1_pcie_usb3_bus_width` writer - u1_pcie_usb3_bus_width"] +pub type U1_PCIE_USB3_BUS_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u1_pcie_usb3_phy_enable` reader - u1_pcie_usb3_phy_enable"] +pub type U1_PCIE_USB3_PHY_ENABLE_R = crate::BitReader; +#[doc = "Field `u1_pcie_usb3_phy_enable` writer - u1_pcie_usb3_phy_enable"] +pub type U1_PCIE_USB3_PHY_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_usb3_rate` reader - u1_pcie_usb3_rate"] +pub type U1_PCIE_USB3_RATE_R = crate::FieldReader; +#[doc = "Field `u1_pcie_usb3_rate` writer - u1_pcie_usb3_rate"] +pub type U1_PCIE_USB3_RATE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u1_pcie_usb3_rx_standby` reader - u1_pcie_usb3_rx_standby"] +pub type U1_PCIE_USB3_RX_STANDBY_R = crate::BitReader; +#[doc = "Field `u1_pcie_usb3_rx_standby` writer - u1_pcie_usb3_rx_standby"] +pub type U1_PCIE_USB3_RX_STANDBY_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_xwdecerr` reader - u1_pcie_xwdecerr"] +pub type U1_PCIE_XWDECERR_R = crate::BitReader; +#[doc = "Field `u1_pcie_xwerrclr` reader - u1_pcie_xwerrclr"] +pub type U1_PCIE_XWERRCLR_R = crate::BitReader; +#[doc = "Field `u1_pcie_xwerrclr` writer - u1_pcie_xwerrclr"] +pub type U1_PCIE_XWERRCLR_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_xwslverr` reader - u1_pcie_xwslverr"] +pub type U1_PCIE_XWSLVERR_R = crate::BitReader; impl R { - #[doc = "Bits 0:1 - u1_plda_pcie_tx_pattern"] + #[doc = "Bits 0:1 - u1_pcie_tx_pattern"] #[inline(always)] - pub fn u1_plda_pcie_tx_pattern(&self) -> U1_PLDA_PCIE_TX_PATTERN_R { - U1_PLDA_PCIE_TX_PATTERN_R::new((self.bits & 3) as u8) + pub fn u1_pcie_tx_pattern(&self) -> U1_PCIE_TX_PATTERN_R { + U1_PCIE_TX_PATTERN_R::new((self.bits & 3) as u8) } - #[doc = "Bits 2:3 - u1_plda_pcie_usb3_bus_width"] + #[doc = "Bits 2:3 - u1_pcie_usb3_bus_width"] #[inline(always)] - pub fn u1_plda_pcie_usb3_bus_width(&self) -> U1_PLDA_PCIE_USB3_BUS_WIDTH_R { - U1_PLDA_PCIE_USB3_BUS_WIDTH_R::new(((self.bits >> 2) & 3) as u8) + pub fn u1_pcie_usb3_bus_width(&self) -> U1_PCIE_USB3_BUS_WIDTH_R { + U1_PCIE_USB3_BUS_WIDTH_R::new(((self.bits >> 2) & 3) as u8) } - #[doc = "Bit 4 - u1_plda_pcie_usb3_phy_enable"] + #[doc = "Bit 4 - u1_pcie_usb3_phy_enable"] #[inline(always)] - pub fn u1_plda_pcie_usb3_phy_enable(&self) -> U1_PLDA_PCIE_USB3_PHY_ENABLE_R { - U1_PLDA_PCIE_USB3_PHY_ENABLE_R::new(((self.bits >> 4) & 1) != 0) + pub fn u1_pcie_usb3_phy_enable(&self) -> U1_PCIE_USB3_PHY_ENABLE_R { + U1_PCIE_USB3_PHY_ENABLE_R::new(((self.bits >> 4) & 1) != 0) } - #[doc = "Bits 5:6 - u1_plda_pcie_usb3_rate"] + #[doc = "Bits 5:6 - u1_pcie_usb3_rate"] #[inline(always)] - pub fn u1_plda_pcie_usb3_rate(&self) -> U1_PLDA_PCIE_USB3_RATE_R { - U1_PLDA_PCIE_USB3_RATE_R::new(((self.bits >> 5) & 3) as u8) + pub fn u1_pcie_usb3_rate(&self) -> U1_PCIE_USB3_RATE_R { + U1_PCIE_USB3_RATE_R::new(((self.bits >> 5) & 3) as u8) } - #[doc = "Bit 7 - u1_plda_pcie_usb3_rx_standby"] + #[doc = "Bit 7 - u1_pcie_usb3_rx_standby"] #[inline(always)] - pub fn u1_plda_pcie_usb3_rx_standby(&self) -> U1_PLDA_PCIE_USB3_RX_STANDBY_R { - U1_PLDA_PCIE_USB3_RX_STANDBY_R::new(((self.bits >> 7) & 1) != 0) + pub fn u1_pcie_usb3_rx_standby(&self) -> U1_PCIE_USB3_RX_STANDBY_R { + U1_PCIE_USB3_RX_STANDBY_R::new(((self.bits >> 7) & 1) != 0) } - #[doc = "Bit 8 - u1_plda_pcie_xwdecerr"] + #[doc = "Bit 8 - u1_pcie_xwdecerr"] #[inline(always)] - pub fn u1_plda_pcie_xwdecerr(&self) -> U1_PLDA_PCIE_XWDECERR_R { - U1_PLDA_PCIE_XWDECERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn u1_pcie_xwdecerr(&self) -> U1_PCIE_XWDECERR_R { + U1_PCIE_XWDECERR_R::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 9 - u1_plda_pcie_xwerrclr"] + #[doc = "Bit 9 - u1_pcie_xwerrclr"] #[inline(always)] - pub fn u1_plda_pcie_xwerrclr(&self) -> U1_PLDA_PCIE_XWERRCLR_R { - U1_PLDA_PCIE_XWERRCLR_R::new(((self.bits >> 9) & 1) != 0) + pub fn u1_pcie_xwerrclr(&self) -> U1_PCIE_XWERRCLR_R { + U1_PCIE_XWERRCLR_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 10 - u1_plda_pcie_xwslverr"] + #[doc = "Bit 10 - u1_pcie_xwslverr"] #[inline(always)] - pub fn u1_plda_pcie_xwslverr(&self) -> U1_PLDA_PCIE_XWSLVERR_R { - U1_PLDA_PCIE_XWSLVERR_R::new(((self.bits >> 10) & 1) != 0) + pub fn u1_pcie_xwslverr(&self) -> U1_PCIE_XWSLVERR_R { + U1_PCIE_XWSLVERR_R::new(((self.bits >> 10) & 1) != 0) } } impl W { - #[doc = "Bits 0:1 - u1_plda_pcie_tx_pattern"] + #[doc = "Bits 0:1 - u1_pcie_tx_pattern"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_tx_pattern(&mut self) -> U1_PLDA_PCIE_TX_PATTERN_W { - U1_PLDA_PCIE_TX_PATTERN_W::new(self, 0) + pub fn u1_pcie_tx_pattern(&mut self) -> U1_PCIE_TX_PATTERN_W { + U1_PCIE_TX_PATTERN_W::new(self, 0) } - #[doc = "Bits 2:3 - u1_plda_pcie_usb3_bus_width"] + #[doc = "Bits 2:3 - u1_pcie_usb3_bus_width"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_usb3_bus_width( - &mut self, - ) -> U1_PLDA_PCIE_USB3_BUS_WIDTH_W { - U1_PLDA_PCIE_USB3_BUS_WIDTH_W::new(self, 2) + pub fn u1_pcie_usb3_bus_width(&mut self) -> U1_PCIE_USB3_BUS_WIDTH_W { + U1_PCIE_USB3_BUS_WIDTH_W::new(self, 2) } - #[doc = "Bit 4 - u1_plda_pcie_usb3_phy_enable"] + #[doc = "Bit 4 - u1_pcie_usb3_phy_enable"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_usb3_phy_enable( - &mut self, - ) -> U1_PLDA_PCIE_USB3_PHY_ENABLE_W { - U1_PLDA_PCIE_USB3_PHY_ENABLE_W::new(self, 4) + pub fn u1_pcie_usb3_phy_enable(&mut self) -> U1_PCIE_USB3_PHY_ENABLE_W { + U1_PCIE_USB3_PHY_ENABLE_W::new(self, 4) } - #[doc = "Bits 5:6 - u1_plda_pcie_usb3_rate"] + #[doc = "Bits 5:6 - u1_pcie_usb3_rate"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_usb3_rate(&mut self) -> U1_PLDA_PCIE_USB3_RATE_W { - U1_PLDA_PCIE_USB3_RATE_W::new(self, 5) + pub fn u1_pcie_usb3_rate(&mut self) -> U1_PCIE_USB3_RATE_W { + U1_PCIE_USB3_RATE_W::new(self, 5) } - #[doc = "Bit 7 - u1_plda_pcie_usb3_rx_standby"] + #[doc = "Bit 7 - u1_pcie_usb3_rx_standby"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_usb3_rx_standby( - &mut self, - ) -> U1_PLDA_PCIE_USB3_RX_STANDBY_W { - U1_PLDA_PCIE_USB3_RX_STANDBY_W::new(self, 7) + pub fn u1_pcie_usb3_rx_standby(&mut self) -> U1_PCIE_USB3_RX_STANDBY_W { + U1_PCIE_USB3_RX_STANDBY_W::new(self, 7) } - #[doc = "Bit 9 - u1_plda_pcie_xwerrclr"] + #[doc = "Bit 9 - u1_pcie_xwerrclr"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_xwerrclr(&mut self) -> U1_PLDA_PCIE_XWERRCLR_W { - U1_PLDA_PCIE_XWERRCLR_W::new(self, 9) + pub fn u1_pcie_xwerrclr(&mut self) -> U1_PCIE_XWERRCLR_W { + U1_PCIE_XWERRCLR_W::new(self, 9) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_24.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_24.rs index bce3b49..da4298c 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_24.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_24.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_24` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_223_192` reader - u0_plda_pcie_axi4_mst0_aratomop_223_192"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_223_192_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_223_192` reader - u0_pcie_axi4_mst0_aratomop_223_192"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_223_192_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_223_192"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_223_192"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_223_192( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_223_192_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_223_192_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_223_192(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_223_192_R { + U0_PCIE_AXI4_MST0_ARATOMOP_223_192_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_25.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_25.rs index 1656db0..c87ecc0 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_25.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_25.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_25` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_255_224` reader - u0_plda_pcie_axi4_mst0_aratomop_255_224"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_255_224_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_255_224` reader - u0_pcie_axi4_mst0_aratomop_255_224"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_255_224_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_255_224"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_255_224"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_255_224( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_255_224_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_255_224_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_255_224(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_255_224_R { + U0_PCIE_AXI4_MST0_ARATOMOP_255_224_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_26.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_26.rs index ec4babe..24f1779 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_26.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_26.rs @@ -2,29 +2,27 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_26` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_257_256` reader - u0_plda_pcie_axi4_mst0_aratomop_257_256"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_mst0_arfunc` reader - u0_plda_pcie_axi4_mst0_arfunc"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARFUNC_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_mst0_arregion` reader - u0_plda_pcie_axi4_mst0_arregion"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARREGION_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_257_256` reader - u0_pcie_axi4_mst0_aratomop_257_256"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_257_256_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_arfunc` reader - u0_pcie_axi4_mst0_arfunc"] +pub type U0_PCIE_AXI4_MST0_ARFUNC_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_arregion` reader - u0_pcie_axi4_mst0_arregion"] +pub type U0_PCIE_AXI4_MST0_ARREGION_R = crate::FieldReader; impl R { - #[doc = "Bits 0:1 - u0_plda_pcie_axi4_mst0_aratomop_257_256"] + #[doc = "Bits 0:1 - u0_pcie_axi4_mst0_aratomop_257_256"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_257_256( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R::new((self.bits & 3) as u8) + pub fn u0_pcie_axi4_mst0_aratomop_257_256(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_257_256_R { + U0_PCIE_AXI4_MST0_ARATOMOP_257_256_R::new((self.bits & 3) as u8) } - #[doc = "Bits 2:16 - u0_plda_pcie_axi4_mst0_arfunc"] + #[doc = "Bits 2:16 - u0_pcie_axi4_mst0_arfunc"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_arfunc(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARFUNC_R { - U0_PLDA_PCIE_AXI4_MST0_ARFUNC_R::new(((self.bits >> 2) & 0x7fff) as u16) + pub fn u0_pcie_axi4_mst0_arfunc(&self) -> U0_PCIE_AXI4_MST0_ARFUNC_R { + U0_PCIE_AXI4_MST0_ARFUNC_R::new(((self.bits >> 2) & 0x7fff) as u16) } - #[doc = "Bits 17:20 - u0_plda_pcie_axi4_mst0_arregion"] + #[doc = "Bits 17:20 - u0_pcie_axi4_mst0_arregion"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_arregion(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARREGION_R { - U0_PLDA_PCIE_AXI4_MST0_ARREGION_R::new(((self.bits >> 17) & 0x0f) as u8) + pub fn u0_pcie_axi4_mst0_arregion(&self) -> U0_PCIE_AXI4_MST0_ARREGION_R { + U0_PCIE_AXI4_MST0_ARREGION_R::new(((self.bits >> 17) & 0x0f) as u8) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_27.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_27.rs index 02b2c57..4fb1200 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_27.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_27.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_27` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aruser_31_0` reader - u0_plda_pcie_axi4_mst0_aruser_31_0"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARUSER_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aruser_31_0` reader - u0_pcie_axi4_mst0_aruser_31_0"] +pub type U0_PCIE_AXI4_MST0_ARUSER_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aruser_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aruser_31_0"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aruser_31_0(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARUSER_31_0_R { - U0_PLDA_PCIE_AXI4_MST0_ARUSER_31_0_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aruser_31_0(&self) -> U0_PCIE_AXI4_MST0_ARUSER_31_0_R { + U0_PCIE_AXI4_MST0_ARUSER_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_28.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_28.rs index b278f78..809f5ee 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_28.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_28.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_28` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aruser_63_32` reader - u0_plda_pcie_axi4_mst0_aruser_63_32"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARUSER_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aruser_63_32` reader - u0_pcie_axi4_mst0_aruser_63_32"] +pub type U0_PCIE_AXI4_MST0_ARUSER_63_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aruser_63_32"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aruser_63_32"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aruser_63_32(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARUSER_63_32_R { - U0_PLDA_PCIE_AXI4_MST0_ARUSER_63_32_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aruser_63_32(&self) -> U0_PCIE_AXI4_MST0_ARUSER_63_32_R { + U0_PCIE_AXI4_MST0_ARUSER_63_32_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_29.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_29.rs index dde83db..7d9562b 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_29.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_29.rs @@ -2,20 +2,20 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_29` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_awfunc` reader - u0_plda_pcie_axi4_mst0_awfunc"] -pub type U0_PLDA_PCIE_AXI4_MST0_AWFUNC_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_mst0_awregion` reader - u0_plda_pcie_axi4_mst0_awregion"] -pub type U0_PLDA_PCIE_AXI4_MST0_AWREGION_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_awfunc` reader - u0_pcie_axi4_mst0_awfunc"] +pub type U0_PCIE_AXI4_MST0_AWFUNC_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_awregion` reader - u0_pcie_axi4_mst0_awregion"] +pub type U0_PCIE_AXI4_MST0_AWREGION_R = crate::FieldReader; impl R { - #[doc = "Bits 0:14 - u0_plda_pcie_axi4_mst0_awfunc"] + #[doc = "Bits 0:14 - u0_pcie_axi4_mst0_awfunc"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_awfunc(&self) -> U0_PLDA_PCIE_AXI4_MST0_AWFUNC_R { - U0_PLDA_PCIE_AXI4_MST0_AWFUNC_R::new((self.bits & 0x7fff) as u16) + pub fn u0_pcie_axi4_mst0_awfunc(&self) -> U0_PCIE_AXI4_MST0_AWFUNC_R { + U0_PCIE_AXI4_MST0_AWFUNC_R::new((self.bits & 0x7fff) as u16) } - #[doc = "Bits 15:18 - u0_plda_pcie_axi4_mst0_awregion"] + #[doc = "Bits 15:18 - u0_pcie_axi4_mst0_awregion"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_awregion(&self) -> U0_PLDA_PCIE_AXI4_MST0_AWREGION_R { - U0_PLDA_PCIE_AXI4_MST0_AWREGION_R::new(((self.bits >> 15) & 0x0f) as u8) + pub fn u0_pcie_axi4_mst0_awregion(&self) -> U0_PCIE_AXI4_MST0_AWREGION_R { + U0_PCIE_AXI4_MST0_AWREGION_R::new(((self.bits >> 15) & 0x0f) as u8) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_3.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_3.rs index 2cb2380..6d09059 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_3.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_3.rs @@ -2,231 +2,223 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_3` writer"] pub type W = crate::W; -#[doc = "Field `u0_cdn_usb_utmi_rxvalidh_sit` reader - u0_cdn_usb_utmi_rxvalidh_sit"] -pub type U0_CDN_USB_UTMI_RXVALIDH_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_sessvld` reader - u0_cdn_usb_utmi_sessvld"] -pub type U0_CDN_USB_UTMI_SESSVLD_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_sessvld` writer - u0_cdn_usb_utmi_sessvld"] -pub type U0_CDN_USB_UTMI_SESSVLD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_termselect_sit` reader - u0_cdn_usb_utmi_termselect_sit"] -pub type U0_CDN_USB_UTMI_TERMSELECT_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_termselect_sit` writer - u0_cdn_usb_utmi_termselect_sit"] -pub type U0_CDN_USB_UTMI_TERMSELECT_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_tx_dat_sit` reader - u0_cdn_usb_utmi_tx_dat_sit"] -pub type U0_CDN_USB_UTMI_TX_DAT_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_tx_dat_sit` writer - u0_cdn_usb_utmi_tx_dat_sit"] -pub type U0_CDN_USB_UTMI_TX_DAT_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_tx_enable_n_sit` reader - u0_cdn_usb_utmi_tx_enable_n_sit"] -pub type U0_CDN_USB_UTMI_TX_ENABLE_N_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_tx_enable_n_sit` writer - u0_cdn_usb_utmi_tx_enable_n_sit"] -pub type U0_CDN_USB_UTMI_TX_ENABLE_N_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_tx_se0_sit` reader - u0_cdn_usb_utmi_tx_se0_sit"] -pub type U0_CDN_USB_UTMI_TX_SE0_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_tx_se0_sit` writer - u0_cdn_usb_utmi_tx_se0_sit"] -pub type U0_CDN_USB_UTMI_TX_SE0_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_txbitstuffenable_sit` reader - u0_cdn_usb_utmi_txbitstuffenable_sit"] -pub type U0_CDN_USB_UTMI_TXBITSTUFFENABLE_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_txbitstuffenable_sit` writer - u0_cdn_usb_utmi_txbitstuffenable_sit"] -pub type U0_CDN_USB_UTMI_TXBITSTUFFENABLE_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_txready_sit` reader - u0_cdn_usb_utmi_txready_sit"] -pub type U0_CDN_USB_UTMI_TXREADY_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_txvalid_sit` reader - u0_cdn_usb_utmi_txvalid_sit"] -pub type U0_CDN_USB_UTMI_TXVALID_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_txvalid_sit` writer - u0_cdn_usb_utmi_txvalid_sit"] -pub type U0_CDN_USB_UTMI_TXVALID_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_txvalidh_sit` reader - u0_cdn_usb_utmi_txvalidh_sit"] -pub type U0_CDN_USB_UTMI_TXVALIDH_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_txvalidh_sit` writer - u0_cdn_usb_utmi_txvalidh_sit"] -pub type U0_CDN_USB_UTMI_TXVALIDH_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_vbusvalid_sit` reader - u0_cdn_usb_utmi_vbusvalid_sit"] -pub type U0_CDN_USB_UTMI_VBUSVALID_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_xcvrselect_sit` reader - u0_cdn_usb_utmi_xcvrselect_sit"] -pub type U0_CDN_USB_UTMI_XCVRSELECT_SIT_R = crate::FieldReader; -#[doc = "Field `u0_cdn_usb_utmi_xcvrselect_sit` writer - u0_cdn_usb_utmi_xcvrselect_sit"] -pub type U0_CDN_USB_UTMI_XCVRSELECT_SIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_cdn_usb_utmi_vdm_src_en` reader - u0_cdn_usb_utmi_vdm_src_en"] -pub type U0_CDN_USB_UTMI_VDM_SRC_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_vdp_src_en` reader - u0_cdn_usb_utmi_vdp_src_en"] -pub type U0_CDN_USB_UTMI_VDP_SRC_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_wakeup` reader - u0_cdn_usb_wakeup"] -pub type U0_CDN_USB_WAKEUP_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_wakeup` writer - u0_cdn_usb_wakeup"] -pub type U0_CDN_USB_WAKEUP_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_xhc_d0_ack` reader - u0_cdn_usb_xhc_d0_ack"] -pub type U0_CDN_USB_XHC_D0_ACK_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhc_d0_req` reader - u0_cdn_usb_xhc_d0_req"] -pub type U0_CDN_USB_XHC_D0_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhc_d0_req` writer - u0_cdn_usb_xhc_d0_req"] -pub type U0_CDN_USB_XHC_D0_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_rxvalidh_sit` reader - u0_usb_utmi_rxvalidh_sit"] +pub type U0_USB_UTMI_RXVALIDH_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_sessvld` reader - u0_usb_utmi_sessvld"] +pub type U0_USB_UTMI_SESSVLD_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_sessvld` writer - u0_usb_utmi_sessvld"] +pub type U0_USB_UTMI_SESSVLD_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_termselect_sit` reader - u0_usb_utmi_termselect_sit"] +pub type U0_USB_UTMI_TERMSELECT_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_termselect_sit` writer - u0_usb_utmi_termselect_sit"] +pub type U0_USB_UTMI_TERMSELECT_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_tx_dat_sit` reader - u0_usb_utmi_tx_dat_sit"] +pub type U0_USB_UTMI_TX_DAT_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_tx_dat_sit` writer - u0_usb_utmi_tx_dat_sit"] +pub type U0_USB_UTMI_TX_DAT_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_tx_enable_n_sit` reader - u0_usb_utmi_tx_enable_n_sit"] +pub type U0_USB_UTMI_TX_ENABLE_N_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_tx_enable_n_sit` writer - u0_usb_utmi_tx_enable_n_sit"] +pub type U0_USB_UTMI_TX_ENABLE_N_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_tx_se0_sit` reader - u0_usb_utmi_tx_se0_sit"] +pub type U0_USB_UTMI_TX_SE0_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_tx_se0_sit` writer - u0_usb_utmi_tx_se0_sit"] +pub type U0_USB_UTMI_TX_SE0_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_txbitstuffenable_sit` reader - u0_usb_utmi_txbitstuffenable_sit"] +pub type U0_USB_UTMI_TXBITSTUFFENABLE_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_txbitstuffenable_sit` writer - u0_usb_utmi_txbitstuffenable_sit"] +pub type U0_USB_UTMI_TXBITSTUFFENABLE_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_txready_sit` reader - u0_usb_utmi_txready_sit"] +pub type U0_USB_UTMI_TXREADY_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_txvalid_sit` reader - u0_usb_utmi_txvalid_sit"] +pub type U0_USB_UTMI_TXVALID_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_txvalid_sit` writer - u0_usb_utmi_txvalid_sit"] +pub type U0_USB_UTMI_TXVALID_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_txvalidh_sit` reader - u0_usb_utmi_txvalidh_sit"] +pub type U0_USB_UTMI_TXVALIDH_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_txvalidh_sit` writer - u0_usb_utmi_txvalidh_sit"] +pub type U0_USB_UTMI_TXVALIDH_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_vbusvalid_sit` reader - u0_usb_utmi_vbusvalid_sit"] +pub type U0_USB_UTMI_VBUSVALID_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_xcvrselect_sit` reader - u0_usb_utmi_xcvrselect_sit"] +pub type U0_USB_UTMI_XCVRSELECT_SIT_R = crate::FieldReader; +#[doc = "Field `u0_usb_utmi_xcvrselect_sit` writer - u0_usb_utmi_xcvrselect_sit"] +pub type U0_USB_UTMI_XCVRSELECT_SIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_usb_utmi_vdm_src_en` reader - u0_usb_utmi_vdm_src_en"] +pub type U0_USB_UTMI_VDM_SRC_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_vdp_src_en` reader - u0_usb_utmi_vdp_src_en"] +pub type U0_USB_UTMI_VDP_SRC_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_wakeup` reader - u0_usb_wakeup"] +pub type U0_USB_WAKEUP_R = crate::BitReader; +#[doc = "Field `u0_usb_wakeup` writer - u0_usb_wakeup"] +pub type U0_USB_WAKEUP_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_xhc_d0_ack` reader - u0_usb_xhc_d0_ack"] +pub type U0_USB_XHC_D0_ACK_R = crate::BitReader; +#[doc = "Field `u0_usb_xhc_d0_req` reader - u0_usb_xhc_d0_req"] +pub type U0_USB_XHC_D0_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_xhc_d0_req` writer - u0_usb_xhc_d0_req"] +pub type U0_USB_XHC_D0_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 0 - u0_cdn_usb_utmi_rxvalidh_sit"] + #[doc = "Bit 0 - u0_usb_utmi_rxvalidh_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_rxvalidh_sit(&self) -> U0_CDN_USB_UTMI_RXVALIDH_SIT_R { - U0_CDN_USB_UTMI_RXVALIDH_SIT_R::new((self.bits & 1) != 0) + pub fn u0_usb_utmi_rxvalidh_sit(&self) -> U0_USB_UTMI_RXVALIDH_SIT_R { + U0_USB_UTMI_RXVALIDH_SIT_R::new((self.bits & 1) != 0) } - #[doc = "Bit 1 - u0_cdn_usb_utmi_sessvld"] + #[doc = "Bit 1 - u0_usb_utmi_sessvld"] #[inline(always)] - pub fn u0_cdn_usb_utmi_sessvld(&self) -> U0_CDN_USB_UTMI_SESSVLD_R { - U0_CDN_USB_UTMI_SESSVLD_R::new(((self.bits >> 1) & 1) != 0) + pub fn u0_usb_utmi_sessvld(&self) -> U0_USB_UTMI_SESSVLD_R { + U0_USB_UTMI_SESSVLD_R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 2 - u0_cdn_usb_utmi_termselect_sit"] + #[doc = "Bit 2 - u0_usb_utmi_termselect_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_termselect_sit(&self) -> U0_CDN_USB_UTMI_TERMSELECT_SIT_R { - U0_CDN_USB_UTMI_TERMSELECT_SIT_R::new(((self.bits >> 2) & 1) != 0) + pub fn u0_usb_utmi_termselect_sit(&self) -> U0_USB_UTMI_TERMSELECT_SIT_R { + U0_USB_UTMI_TERMSELECT_SIT_R::new(((self.bits >> 2) & 1) != 0) } - #[doc = "Bit 3 - u0_cdn_usb_utmi_tx_dat_sit"] + #[doc = "Bit 3 - u0_usb_utmi_tx_dat_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_tx_dat_sit(&self) -> U0_CDN_USB_UTMI_TX_DAT_SIT_R { - U0_CDN_USB_UTMI_TX_DAT_SIT_R::new(((self.bits >> 3) & 1) != 0) + pub fn u0_usb_utmi_tx_dat_sit(&self) -> U0_USB_UTMI_TX_DAT_SIT_R { + U0_USB_UTMI_TX_DAT_SIT_R::new(((self.bits >> 3) & 1) != 0) } - #[doc = "Bit 4 - u0_cdn_usb_utmi_tx_enable_n_sit"] + #[doc = "Bit 4 - u0_usb_utmi_tx_enable_n_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_tx_enable_n_sit(&self) -> U0_CDN_USB_UTMI_TX_ENABLE_N_SIT_R { - U0_CDN_USB_UTMI_TX_ENABLE_N_SIT_R::new(((self.bits >> 4) & 1) != 0) + pub fn u0_usb_utmi_tx_enable_n_sit(&self) -> U0_USB_UTMI_TX_ENABLE_N_SIT_R { + U0_USB_UTMI_TX_ENABLE_N_SIT_R::new(((self.bits >> 4) & 1) != 0) } - #[doc = "Bit 5 - u0_cdn_usb_utmi_tx_se0_sit"] + #[doc = "Bit 5 - u0_usb_utmi_tx_se0_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_tx_se0_sit(&self) -> U0_CDN_USB_UTMI_TX_SE0_SIT_R { - U0_CDN_USB_UTMI_TX_SE0_SIT_R::new(((self.bits >> 5) & 1) != 0) + pub fn u0_usb_utmi_tx_se0_sit(&self) -> U0_USB_UTMI_TX_SE0_SIT_R { + U0_USB_UTMI_TX_SE0_SIT_R::new(((self.bits >> 5) & 1) != 0) } - #[doc = "Bit 6 - u0_cdn_usb_utmi_txbitstuffenable_sit"] + #[doc = "Bit 6 - u0_usb_utmi_txbitstuffenable_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_txbitstuffenable_sit(&self) -> U0_CDN_USB_UTMI_TXBITSTUFFENABLE_SIT_R { - U0_CDN_USB_UTMI_TXBITSTUFFENABLE_SIT_R::new(((self.bits >> 6) & 1) != 0) + pub fn u0_usb_utmi_txbitstuffenable_sit(&self) -> U0_USB_UTMI_TXBITSTUFFENABLE_SIT_R { + U0_USB_UTMI_TXBITSTUFFENABLE_SIT_R::new(((self.bits >> 6) & 1) != 0) } - #[doc = "Bit 7 - u0_cdn_usb_utmi_txready_sit"] + #[doc = "Bit 7 - u0_usb_utmi_txready_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_txready_sit(&self) -> U0_CDN_USB_UTMI_TXREADY_SIT_R { - U0_CDN_USB_UTMI_TXREADY_SIT_R::new(((self.bits >> 7) & 1) != 0) + pub fn u0_usb_utmi_txready_sit(&self) -> U0_USB_UTMI_TXREADY_SIT_R { + U0_USB_UTMI_TXREADY_SIT_R::new(((self.bits >> 7) & 1) != 0) } - #[doc = "Bit 8 - u0_cdn_usb_utmi_txvalid_sit"] + #[doc = "Bit 8 - u0_usb_utmi_txvalid_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_txvalid_sit(&self) -> U0_CDN_USB_UTMI_TXVALID_SIT_R { - U0_CDN_USB_UTMI_TXVALID_SIT_R::new(((self.bits >> 8) & 1) != 0) + pub fn u0_usb_utmi_txvalid_sit(&self) -> U0_USB_UTMI_TXVALID_SIT_R { + U0_USB_UTMI_TXVALID_SIT_R::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 9 - u0_cdn_usb_utmi_txvalidh_sit"] + #[doc = "Bit 9 - u0_usb_utmi_txvalidh_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_txvalidh_sit(&self) -> U0_CDN_USB_UTMI_TXVALIDH_SIT_R { - U0_CDN_USB_UTMI_TXVALIDH_SIT_R::new(((self.bits >> 9) & 1) != 0) + pub fn u0_usb_utmi_txvalidh_sit(&self) -> U0_USB_UTMI_TXVALIDH_SIT_R { + U0_USB_UTMI_TXVALIDH_SIT_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 10 - u0_cdn_usb_utmi_vbusvalid_sit"] + #[doc = "Bit 10 - u0_usb_utmi_vbusvalid_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_vbusvalid_sit(&self) -> U0_CDN_USB_UTMI_VBUSVALID_SIT_R { - U0_CDN_USB_UTMI_VBUSVALID_SIT_R::new(((self.bits >> 10) & 1) != 0) + pub fn u0_usb_utmi_vbusvalid_sit(&self) -> U0_USB_UTMI_VBUSVALID_SIT_R { + U0_USB_UTMI_VBUSVALID_SIT_R::new(((self.bits >> 10) & 1) != 0) } - #[doc = "Bits 11:12 - u0_cdn_usb_utmi_xcvrselect_sit"] + #[doc = "Bits 11:12 - u0_usb_utmi_xcvrselect_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_xcvrselect_sit(&self) -> U0_CDN_USB_UTMI_XCVRSELECT_SIT_R { - U0_CDN_USB_UTMI_XCVRSELECT_SIT_R::new(((self.bits >> 11) & 3) as u8) + pub fn u0_usb_utmi_xcvrselect_sit(&self) -> U0_USB_UTMI_XCVRSELECT_SIT_R { + U0_USB_UTMI_XCVRSELECT_SIT_R::new(((self.bits >> 11) & 3) as u8) } - #[doc = "Bit 13 - u0_cdn_usb_utmi_vdm_src_en"] + #[doc = "Bit 13 - u0_usb_utmi_vdm_src_en"] #[inline(always)] - pub fn u0_cdn_usb_utmi_vdm_src_en(&self) -> U0_CDN_USB_UTMI_VDM_SRC_EN_R { - U0_CDN_USB_UTMI_VDM_SRC_EN_R::new(((self.bits >> 13) & 1) != 0) + pub fn u0_usb_utmi_vdm_src_en(&self) -> U0_USB_UTMI_VDM_SRC_EN_R { + U0_USB_UTMI_VDM_SRC_EN_R::new(((self.bits >> 13) & 1) != 0) } - #[doc = "Bit 14 - u0_cdn_usb_utmi_vdp_src_en"] + #[doc = "Bit 14 - u0_usb_utmi_vdp_src_en"] #[inline(always)] - pub fn u0_cdn_usb_utmi_vdp_src_en(&self) -> U0_CDN_USB_UTMI_VDP_SRC_EN_R { - U0_CDN_USB_UTMI_VDP_SRC_EN_R::new(((self.bits >> 14) & 1) != 0) + pub fn u0_usb_utmi_vdp_src_en(&self) -> U0_USB_UTMI_VDP_SRC_EN_R { + U0_USB_UTMI_VDP_SRC_EN_R::new(((self.bits >> 14) & 1) != 0) } - #[doc = "Bit 15 - u0_cdn_usb_wakeup"] + #[doc = "Bit 15 - u0_usb_wakeup"] #[inline(always)] - pub fn u0_cdn_usb_wakeup(&self) -> U0_CDN_USB_WAKEUP_R { - U0_CDN_USB_WAKEUP_R::new(((self.bits >> 15) & 1) != 0) + pub fn u0_usb_wakeup(&self) -> U0_USB_WAKEUP_R { + U0_USB_WAKEUP_R::new(((self.bits >> 15) & 1) != 0) } - #[doc = "Bit 16 - u0_cdn_usb_xhc_d0_ack"] + #[doc = "Bit 16 - u0_usb_xhc_d0_ack"] #[inline(always)] - pub fn u0_cdn_usb_xhc_d0_ack(&self) -> U0_CDN_USB_XHC_D0_ACK_R { - U0_CDN_USB_XHC_D0_ACK_R::new(((self.bits >> 16) & 1) != 0) + pub fn u0_usb_xhc_d0_ack(&self) -> U0_USB_XHC_D0_ACK_R { + U0_USB_XHC_D0_ACK_R::new(((self.bits >> 16) & 1) != 0) } - #[doc = "Bit 17 - u0_cdn_usb_xhc_d0_req"] + #[doc = "Bit 17 - u0_usb_xhc_d0_req"] #[inline(always)] - pub fn u0_cdn_usb_xhc_d0_req(&self) -> U0_CDN_USB_XHC_D0_REQ_R { - U0_CDN_USB_XHC_D0_REQ_R::new(((self.bits >> 17) & 1) != 0) + pub fn u0_usb_xhc_d0_req(&self) -> U0_USB_XHC_D0_REQ_R { + U0_USB_XHC_D0_REQ_R::new(((self.bits >> 17) & 1) != 0) } } impl W { - #[doc = "Bit 1 - u0_cdn_usb_utmi_sessvld"] + #[doc = "Bit 1 - u0_usb_utmi_sessvld"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_sessvld(&mut self) -> U0_CDN_USB_UTMI_SESSVLD_W { - U0_CDN_USB_UTMI_SESSVLD_W::new(self, 1) + pub fn u0_usb_utmi_sessvld(&mut self) -> U0_USB_UTMI_SESSVLD_W { + U0_USB_UTMI_SESSVLD_W::new(self, 1) } - #[doc = "Bit 2 - u0_cdn_usb_utmi_termselect_sit"] + #[doc = "Bit 2 - u0_usb_utmi_termselect_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_termselect_sit( + pub fn u0_usb_utmi_termselect_sit( &mut self, - ) -> U0_CDN_USB_UTMI_TERMSELECT_SIT_W { - U0_CDN_USB_UTMI_TERMSELECT_SIT_W::new(self, 2) + ) -> U0_USB_UTMI_TERMSELECT_SIT_W { + U0_USB_UTMI_TERMSELECT_SIT_W::new(self, 2) } - #[doc = "Bit 3 - u0_cdn_usb_utmi_tx_dat_sit"] + #[doc = "Bit 3 - u0_usb_utmi_tx_dat_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_tx_dat_sit( - &mut self, - ) -> U0_CDN_USB_UTMI_TX_DAT_SIT_W { - U0_CDN_USB_UTMI_TX_DAT_SIT_W::new(self, 3) + pub fn u0_usb_utmi_tx_dat_sit(&mut self) -> U0_USB_UTMI_TX_DAT_SIT_W { + U0_USB_UTMI_TX_DAT_SIT_W::new(self, 3) } - #[doc = "Bit 4 - u0_cdn_usb_utmi_tx_enable_n_sit"] + #[doc = "Bit 4 - u0_usb_utmi_tx_enable_n_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_tx_enable_n_sit( + pub fn u0_usb_utmi_tx_enable_n_sit( &mut self, - ) -> U0_CDN_USB_UTMI_TX_ENABLE_N_SIT_W { - U0_CDN_USB_UTMI_TX_ENABLE_N_SIT_W::new(self, 4) + ) -> U0_USB_UTMI_TX_ENABLE_N_SIT_W { + U0_USB_UTMI_TX_ENABLE_N_SIT_W::new(self, 4) } - #[doc = "Bit 5 - u0_cdn_usb_utmi_tx_se0_sit"] + #[doc = "Bit 5 - u0_usb_utmi_tx_se0_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_tx_se0_sit( - &mut self, - ) -> U0_CDN_USB_UTMI_TX_SE0_SIT_W { - U0_CDN_USB_UTMI_TX_SE0_SIT_W::new(self, 5) + pub fn u0_usb_utmi_tx_se0_sit(&mut self) -> U0_USB_UTMI_TX_SE0_SIT_W { + U0_USB_UTMI_TX_SE0_SIT_W::new(self, 5) } - #[doc = "Bit 6 - u0_cdn_usb_utmi_txbitstuffenable_sit"] + #[doc = "Bit 6 - u0_usb_utmi_txbitstuffenable_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_txbitstuffenable_sit( + pub fn u0_usb_utmi_txbitstuffenable_sit( &mut self, - ) -> U0_CDN_USB_UTMI_TXBITSTUFFENABLE_SIT_W { - U0_CDN_USB_UTMI_TXBITSTUFFENABLE_SIT_W::new(self, 6) + ) -> U0_USB_UTMI_TXBITSTUFFENABLE_SIT_W { + U0_USB_UTMI_TXBITSTUFFENABLE_SIT_W::new(self, 6) } - #[doc = "Bit 8 - u0_cdn_usb_utmi_txvalid_sit"] + #[doc = "Bit 8 - u0_usb_utmi_txvalid_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_txvalid_sit( - &mut self, - ) -> U0_CDN_USB_UTMI_TXVALID_SIT_W { - U0_CDN_USB_UTMI_TXVALID_SIT_W::new(self, 8) + pub fn u0_usb_utmi_txvalid_sit(&mut self) -> U0_USB_UTMI_TXVALID_SIT_W { + U0_USB_UTMI_TXVALID_SIT_W::new(self, 8) } - #[doc = "Bit 9 - u0_cdn_usb_utmi_txvalidh_sit"] + #[doc = "Bit 9 - u0_usb_utmi_txvalidh_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_txvalidh_sit( - &mut self, - ) -> U0_CDN_USB_UTMI_TXVALIDH_SIT_W { - U0_CDN_USB_UTMI_TXVALIDH_SIT_W::new(self, 9) + pub fn u0_usb_utmi_txvalidh_sit(&mut self) -> U0_USB_UTMI_TXVALIDH_SIT_W { + U0_USB_UTMI_TXVALIDH_SIT_W::new(self, 9) } - #[doc = "Bits 11:12 - u0_cdn_usb_utmi_xcvrselect_sit"] + #[doc = "Bits 11:12 - u0_usb_utmi_xcvrselect_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_xcvrselect_sit( + pub fn u0_usb_utmi_xcvrselect_sit( &mut self, - ) -> U0_CDN_USB_UTMI_XCVRSELECT_SIT_W { - U0_CDN_USB_UTMI_XCVRSELECT_SIT_W::new(self, 11) + ) -> U0_USB_UTMI_XCVRSELECT_SIT_W { + U0_USB_UTMI_XCVRSELECT_SIT_W::new(self, 11) } - #[doc = "Bit 15 - u0_cdn_usb_wakeup"] + #[doc = "Bit 15 - u0_usb_wakeup"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_wakeup(&mut self) -> U0_CDN_USB_WAKEUP_W { - U0_CDN_USB_WAKEUP_W::new(self, 15) + pub fn u0_usb_wakeup(&mut self) -> U0_USB_WAKEUP_W { + U0_USB_WAKEUP_W::new(self, 15) } - #[doc = "Bit 17 - u0_cdn_usb_xhc_d0_req"] + #[doc = "Bit 17 - u0_usb_xhc_d0_req"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_xhc_d0_req(&mut self) -> U0_CDN_USB_XHC_D0_REQ_W { - U0_CDN_USB_XHC_D0_REQ_W::new(self, 17) + pub fn u0_usb_xhc_d0_req(&mut self) -> U0_USB_XHC_D0_REQ_W { + U0_USB_XHC_D0_REQ_W::new(self, 17) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_30.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_30.rs index e1081c1..284fd4a 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_30.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_30.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_30` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_a2user_31_0` reader - u0_plda_pcie_axi4_mst0_a2user_31_0"] -pub type U0_PLDA_PCIE_AXI4_MST0_A2USER_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_a2user_31_0` reader - u0_pcie_axi4_mst0_a2user_31_0"] +pub type U0_PCIE_AXI4_MST0_A2USER_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_a2user_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_a2user_31_0"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_a2user_31_0(&self) -> U0_PLDA_PCIE_AXI4_MST0_A2USER_31_0_R { - U0_PLDA_PCIE_AXI4_MST0_A2USER_31_0_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_a2user_31_0(&self) -> U0_PCIE_AXI4_MST0_A2USER_31_0_R { + U0_PCIE_AXI4_MST0_A2USER_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_31.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_31.rs index dc8cc83..9e9f997 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_31.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_31.rs @@ -2,32 +2,30 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_31` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_awuser_42_32` reader - u0_plda_pcie_axi4_mst0_awuser_42_32"] -pub type U0_PLDA_PCIE_AXI4_MST0_AWUSER_42_32_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_mst0_rderr` reader - u0_plda_pcie_axi4_mst0_rderr"] -pub type U0_PLDA_PCIE_AXI4_MST0_RDERR_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_mst0_rderr` writer - u0_plda_pcie_axi4_mst0_rderr"] -pub type U0_PLDA_PCIE_AXI4_MST0_RDERR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `u0_pcie_axi4_mst0_awuser_42_32` reader - u0_pcie_axi4_mst0_awuser_42_32"] +pub type U0_PCIE_AXI4_MST0_AWUSER_42_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_rderr` reader - u0_pcie_axi4_mst0_rderr"] +pub type U0_PCIE_AXI4_MST0_RDERR_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_rderr` writer - u0_pcie_axi4_mst0_rderr"] +pub type U0_PCIE_AXI4_MST0_RDERR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 0:10 - u0_plda_pcie_axi4_mst0_awuser_42_32"] + #[doc = "Bits 0:10 - u0_pcie_axi4_mst0_awuser_42_32"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_awuser_42_32(&self) -> U0_PLDA_PCIE_AXI4_MST0_AWUSER_42_32_R { - U0_PLDA_PCIE_AXI4_MST0_AWUSER_42_32_R::new((self.bits & 0x07ff) as u16) + pub fn u0_pcie_axi4_mst0_awuser_42_32(&self) -> U0_PCIE_AXI4_MST0_AWUSER_42_32_R { + U0_PCIE_AXI4_MST0_AWUSER_42_32_R::new((self.bits & 0x07ff) as u16) } - #[doc = "Bits 11:18 - u0_plda_pcie_axi4_mst0_rderr"] + #[doc = "Bits 11:18 - u0_pcie_axi4_mst0_rderr"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_rderr(&self) -> U0_PLDA_PCIE_AXI4_MST0_RDERR_R { - U0_PLDA_PCIE_AXI4_MST0_RDERR_R::new(((self.bits >> 11) & 0xff) as u8) + pub fn u0_pcie_axi4_mst0_rderr(&self) -> U0_PCIE_AXI4_MST0_RDERR_R { + U0_PCIE_AXI4_MST0_RDERR_R::new(((self.bits >> 11) & 0xff) as u8) } } impl W { - #[doc = "Bits 11:18 - u0_plda_pcie_axi4_mst0_rderr"] + #[doc = "Bits 11:18 - u0_pcie_axi4_mst0_rderr"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_mst0_rderr( - &mut self, - ) -> U0_PLDA_PCIE_AXI4_MST0_RDERR_W { - U0_PLDA_PCIE_AXI4_MST0_RDERR_W::new(self, 11) + pub fn u0_pcie_axi4_mst0_rderr(&mut self) -> U0_PCIE_AXI4_MST0_RDERR_W { + U0_PCIE_AXI4_MST0_RDERR_W::new(self, 11) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_32.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_32.rs index 1d0dd4a..ea7098b 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_32.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_32.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_32` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_ruser` reader - u0_plda_pcie_axi4_mst0_ruser"] -pub type U0_PLDA_PCIE_AXI4_MST0_RUSER_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_mst0_ruser` writer - u0_plda_pcie_axi4_mst0_ruser"] -pub type U0_PLDA_PCIE_AXI4_MST0_RUSER_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_mst0_ruser` reader - u0_pcie_axi4_mst0_ruser"] +pub type U0_PCIE_AXI4_MST0_RUSER_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_ruser` writer - u0_pcie_axi4_mst0_ruser"] +pub type U0_PCIE_AXI4_MST0_RUSER_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_ruser"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_ruser"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_ruser(&self) -> U0_PLDA_PCIE_AXI4_MST0_RUSER_R { - U0_PLDA_PCIE_AXI4_MST0_RUSER_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_ruser(&self) -> U0_PCIE_AXI4_MST0_RUSER_R { + U0_PCIE_AXI4_MST0_RUSER_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_ruser"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_ruser"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_mst0_ruser( - &mut self, - ) -> U0_PLDA_PCIE_AXI4_MST0_RUSER_W { - U0_PLDA_PCIE_AXI4_MST0_RUSER_W::new(self, 0) + pub fn u0_pcie_axi4_mst0_ruser(&mut self) -> U0_PCIE_AXI4_MST0_RUSER_W { + U0_PCIE_AXI4_MST0_RUSER_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_33.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_33.rs index c2f7be9..8440681 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_33.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_33.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_33` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_wderr` reader - u0_plda_pcie_axi4_mst0_wderr"] -pub type U0_PLDA_PCIE_AXI4_MST0_WDERR_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_wderr` reader - u0_pcie_axi4_mst0_wderr"] +pub type U0_PCIE_AXI4_MST0_WDERR_R = crate::FieldReader; impl R { - #[doc = "Bits 0:7 - u0_plda_pcie_axi4_mst0_wderr"] + #[doc = "Bits 0:7 - u0_pcie_axi4_mst0_wderr"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_wderr(&self) -> U0_PLDA_PCIE_AXI4_MST0_WDERR_R { - U0_PLDA_PCIE_AXI4_MST0_WDERR_R::new((self.bits & 0xff) as u8) + pub fn u0_pcie_axi4_mst0_wderr(&self) -> U0_PCIE_AXI4_MST0_WDERR_R { + U0_PCIE_AXI4_MST0_WDERR_R::new((self.bits & 0xff) as u8) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_34.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_34.rs index 75393f2..ee9443f 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_34.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_34.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_34` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_31_0` reader - u0_plda_pcie_axi4_slv0_aratomop_31_0"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_31_0` writer - u0_plda_pcie_axi4_slv0_aratomop_31_0"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_31_0` reader - u0_pcie_axi4_slv0_aratomop_31_0"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_31_0` writer - u0_pcie_axi4_slv0_aratomop_31_0"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_31_0"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_31_0(&self) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aratomop_31_0(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_31_0_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_31_0"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_31_0( + pub fn u0_pcie_axi4_slv0_aratomop_31_0( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_31_0_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_35.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_35.rs index a929d1b..bff7eff 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_35.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_35.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_35` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_63_32` reader - u0_plda_pcie_axi4_slv0_aratomop_63_32"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_63_32` writer - u0_plda_pcie_axi4_slv0_aratomop_63_32"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_63_32` reader - u0_pcie_axi4_slv0_aratomop_63_32"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_63_32` writer - u0_pcie_axi4_slv0_aratomop_63_32"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_63_32"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_63_32"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_63_32(&self) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aratomop_63_32(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_63_32_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_63_32_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_63_32"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_63_32"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_63_32( + pub fn u0_pcie_axi4_slv0_aratomop_63_32( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_63_32_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_63_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_36.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_36.rs index 03c8f49..be34933 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_36.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_36.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_36` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_95_64` reader - u0_plda_pcie_axi4_slv0_aratomop_95_64"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_95_64` writer - u0_plda_pcie_axi4_slv0_aratomop_95_64"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_95_64` reader - u0_pcie_axi4_slv0_aratomop_95_64"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_95_64_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_95_64` writer - u0_pcie_axi4_slv0_aratomop_95_64"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_95_64_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_95_64"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_95_64"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_95_64(&self) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aratomop_95_64(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_95_64_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_95_64_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_95_64"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_95_64"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_95_64( + pub fn u0_pcie_axi4_slv0_aratomop_95_64( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_95_64_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_95_64_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_37.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_37.rs index 3bb72af..e116b63 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_37.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_37.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_37` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_127_96` reader - u0_plda_pcie_axi4_slv0_aratomop_127_96"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_127_96` writer - u0_plda_pcie_axi4_slv0_aratomop_127_96"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_127_96` reader - u0_pcie_axi4_slv0_aratomop_127_96"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_127_96_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_127_96` writer - u0_pcie_axi4_slv0_aratomop_127_96"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_127_96_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_127_96"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_127_96"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_127_96( - &self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aratomop_127_96(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_127_96_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_127_96_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_127_96"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_127_96"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_127_96( + pub fn u0_pcie_axi4_slv0_aratomop_127_96( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_127_96_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_127_96_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_38.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_38.rs index ea4c583..183de6a 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_38.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_38.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_38` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_159_128` reader - u0_plda_pcie_axi4_slv0_aratomop_159_128"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_159_128` writer - u0_plda_pcie_axi4_slv0_aratomop_159_128"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_159_128` reader - u0_pcie_axi4_slv0_aratomop_159_128"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_159_128_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_159_128` writer - u0_pcie_axi4_slv0_aratomop_159_128"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_159_128_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_159_128"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_159_128"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_159_128( - &self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aratomop_159_128(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_159_128_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_159_128_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_159_128"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_159_128"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_159_128( + pub fn u0_pcie_axi4_slv0_aratomop_159_128( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_159_128_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_159_128_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_39.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_39.rs index 3ce2f85..6750c53 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_39.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_39.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_39` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_191_160` reader - u0_plda_pcie_axi4_slv0_aratomop_191_160"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_191_160` writer - u0_plda_pcie_axi4_slv0_aratomop_191_160"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_191_160` reader - u0_pcie_axi4_slv0_aratomop_191_160"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_191_160_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_191_160` writer - u0_pcie_axi4_slv0_aratomop_191_160"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_191_160_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_191_160"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_191_160"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_191_160( - &self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aratomop_191_160(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_191_160_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_191_160_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_191_160"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_191_160"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_191_160( + pub fn u0_pcie_axi4_slv0_aratomop_191_160( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_191_160_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_191_160_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_4.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_4.rs index ef68b01..7f602fb 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_4.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_4.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_4` writer"] pub type W = crate::W; -#[doc = "Field `u0_cdn_usb_xhci_debug_bus` reader - u0_cdn_usb_xhci_debug_bus"] -pub type U0_CDN_USB_XHCI_DEBUG_BUS_R = crate::FieldReader; +#[doc = "Field `u0_usb_xhci_debug_bus` reader - u0_usb_xhci_debug_bus"] +pub type U0_USB_XHCI_DEBUG_BUS_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_cdn_usb_xhci_debug_bus"] + #[doc = "Bits 0:31 - u0_usb_xhci_debug_bus"] #[inline(always)] - pub fn u0_cdn_usb_xhci_debug_bus(&self) -> U0_CDN_USB_XHCI_DEBUG_BUS_R { - U0_CDN_USB_XHCI_DEBUG_BUS_R::new(self.bits) + pub fn u0_usb_xhci_debug_bus(&self) -> U0_USB_XHCI_DEBUG_BUS_R { + U0_USB_XHCI_DEBUG_BUS_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_40.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_40.rs index a503153..e79049c 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_40.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_40.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_40` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_223_192` reader - u0_plda_pcie_axi4_slv0_aratomop_223_192"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_223_192` writer - u0_plda_pcie_axi4_slv0_aratomop_223_192"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_223_192` reader - u0_pcie_axi4_slv0_aratomop_223_192"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_223_192_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_223_192` writer - u0_pcie_axi4_slv0_aratomop_223_192"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_223_192_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_223_192"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_223_192"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_223_192( - &self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aratomop_223_192(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_223_192_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_223_192_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_223_192"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_223_192"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_223_192( + pub fn u0_pcie_axi4_slv0_aratomop_223_192( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_223_192_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_223_192_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_41.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_41.rs index af5e0f4..63a7978 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_41.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_41.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_41` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_255_224` reader - u0_plda_pcie_axi4_slv0_aratomop_255_224"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_255_224` writer - u0_plda_pcie_axi4_slv0_aratomop_255_224"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_255_224` reader - u0_pcie_axi4_slv0_aratomop_255_224"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_255_224_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_255_224` writer - u0_pcie_axi4_slv0_aratomop_255_224"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_255_224_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_255_224"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_255_224"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_255_224( - &self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aratomop_255_224(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_255_224_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_255_224_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_255_224"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_255_224"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_255_224( + pub fn u0_pcie_axi4_slv0_aratomop_255_224( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_255_224_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_255_224_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_42.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_42.rs index 25b76e1..dd03698 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_42.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_42.rs @@ -2,61 +2,57 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_42` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_257_256` reader - u0_plda_pcie_axi4_slv0_aratomop_257_256"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_257_256_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_257_256` writer - u0_plda_pcie_axi4_slv0_aratomop_257_256"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_257_256_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_plda_pcie_axi4_slv0_arfunc` reader - u0_plda_pcie_axi4_slv0_arfunc"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARFUNC_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_arfunc` writer - u0_plda_pcie_axi4_slv0_arfunc"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; -#[doc = "Field `u0_plda_pcie_axi4_slv0_arregion` reader - u0_plda_pcie_axi4_slv0_arregion"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARREGION_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_arregion` writer - u0_plda_pcie_axi4_slv0_arregion"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARREGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_257_256` reader - u0_pcie_axi4_slv0_aratomop_257_256"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_257_256_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_257_256` writer - u0_pcie_axi4_slv0_aratomop_257_256"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_257_256_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_pcie_axi4_slv0_arfunc` reader - u0_pcie_axi4_slv0_arfunc"] +pub type U0_PCIE_AXI4_SLV0_ARFUNC_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_arfunc` writer - u0_pcie_axi4_slv0_arfunc"] +pub type U0_PCIE_AXI4_SLV0_ARFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `u0_pcie_axi4_slv0_arregion` reader - u0_pcie_axi4_slv0_arregion"] +pub type U0_PCIE_AXI4_SLV0_ARREGION_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_arregion` writer - u0_pcie_axi4_slv0_arregion"] +pub type U0_PCIE_AXI4_SLV0_ARREGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 0:1 - u0_plda_pcie_axi4_slv0_aratomop_257_256"] + #[doc = "Bits 0:1 - u0_pcie_axi4_slv0_aratomop_257_256"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_257_256( - &self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_257_256_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_257_256_R::new((self.bits & 3) as u8) + pub fn u0_pcie_axi4_slv0_aratomop_257_256(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_257_256_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_257_256_R::new((self.bits & 3) as u8) } - #[doc = "Bits 2:16 - u0_plda_pcie_axi4_slv0_arfunc"] + #[doc = "Bits 2:16 - u0_pcie_axi4_slv0_arfunc"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_arfunc(&self) -> U0_PLDA_PCIE_AXI4_SLV0_ARFUNC_R { - U0_PLDA_PCIE_AXI4_SLV0_ARFUNC_R::new(((self.bits >> 2) & 0x7fff) as u16) + pub fn u0_pcie_axi4_slv0_arfunc(&self) -> U0_PCIE_AXI4_SLV0_ARFUNC_R { + U0_PCIE_AXI4_SLV0_ARFUNC_R::new(((self.bits >> 2) & 0x7fff) as u16) } - #[doc = "Bits 17:20 - u0_plda_pcie_axi4_slv0_arregion"] + #[doc = "Bits 17:20 - u0_pcie_axi4_slv0_arregion"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_arregion(&self) -> U0_PLDA_PCIE_AXI4_SLV0_ARREGION_R { - U0_PLDA_PCIE_AXI4_SLV0_ARREGION_R::new(((self.bits >> 17) & 0x0f) as u8) + pub fn u0_pcie_axi4_slv0_arregion(&self) -> U0_PCIE_AXI4_SLV0_ARREGION_R { + U0_PCIE_AXI4_SLV0_ARREGION_R::new(((self.bits >> 17) & 0x0f) as u8) } } impl W { - #[doc = "Bits 0:1 - u0_plda_pcie_axi4_slv0_aratomop_257_256"] + #[doc = "Bits 0:1 - u0_pcie_axi4_slv0_aratomop_257_256"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_257_256( + pub fn u0_pcie_axi4_slv0_aratomop_257_256( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_257_256_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_257_256_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_257_256_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_257_256_W::new(self, 0) } - #[doc = "Bits 2:16 - u0_plda_pcie_axi4_slv0_arfunc"] + #[doc = "Bits 2:16 - u0_pcie_axi4_slv0_arfunc"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_arfunc( - &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARFUNC_W { - U0_PLDA_PCIE_AXI4_SLV0_ARFUNC_W::new(self, 2) + pub fn u0_pcie_axi4_slv0_arfunc(&mut self) -> U0_PCIE_AXI4_SLV0_ARFUNC_W { + U0_PCIE_AXI4_SLV0_ARFUNC_W::new(self, 2) } - #[doc = "Bits 17:20 - u0_plda_pcie_axi4_slv0_arregion"] + #[doc = "Bits 17:20 - u0_pcie_axi4_slv0_arregion"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_arregion( + pub fn u0_pcie_axi4_slv0_arregion( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARREGION_W { - U0_PLDA_PCIE_AXI4_SLV0_ARREGION_W::new(self, 17) + ) -> U0_PCIE_AXI4_SLV0_ARREGION_W { + U0_PCIE_AXI4_SLV0_ARREGION_W::new(self, 17) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_43.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_43.rs index 82871fb..4f789df 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_43.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_43.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_43` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aruser_31_0` reader - u0_plda_pcie_axi4_slv0_aruser_31_0"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aruser_31_0` writer - u0_plda_pcie_axi4_slv0_aruser_31_0"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aruser_31_0` reader - u0_pcie_axi4_slv0_aruser_31_0"] +pub type U0_PCIE_AXI4_SLV0_ARUSER_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aruser_31_0` writer - u0_pcie_axi4_slv0_aruser_31_0"] +pub type U0_PCIE_AXI4_SLV0_ARUSER_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aruser_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aruser_31_0"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aruser_31_0(&self) -> U0_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_R { - U0_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aruser_31_0(&self) -> U0_PCIE_AXI4_SLV0_ARUSER_31_0_R { + U0_PCIE_AXI4_SLV0_ARUSER_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aruser_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aruser_31_0"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aruser_31_0( + pub fn u0_pcie_axi4_slv0_aruser_31_0( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_W { - U0_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARUSER_31_0_W { + U0_PCIE_AXI4_SLV0_ARUSER_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_44.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_44.rs index e3acd5d..e2a9a47 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_44.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_44.rs @@ -2,59 +2,57 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_44` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aruser_40_32` reader - u0_plda_pcie_axi4_slv0_aruser_40_32"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aruser_40_32` writer - u0_plda_pcie_axi4_slv0_aruser_40_32"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; -#[doc = "Field `u0_plda_pcie_axi4_slv0_awfunc` reader - u0_plda_pcie_axi4_slv0_awfunc"] -pub type U0_PLDA_PCIE_AXI4_SLV0_AWFUNC_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_awfunc` writer - u0_plda_pcie_axi4_slv0_awfunc"] -pub type U0_PLDA_PCIE_AXI4_SLV0_AWFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; -#[doc = "Field `u0_plda_pcie_axi4_slv0_awregion` reader - u0_plda_pcie_axi4_slv0_awregion"] -pub type U0_PLDA_PCIE_AXI4_SLV0_AWREGION_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_awregion` writer - u0_plda_pcie_axi4_slv0_awregion"] -pub type U0_PLDA_PCIE_AXI4_SLV0_AWREGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `u0_pcie_axi4_slv0_aruser_40_32` reader - u0_pcie_axi4_slv0_aruser_40_32"] +pub type U0_PCIE_AXI4_SLV0_ARUSER_40_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aruser_40_32` writer - u0_pcie_axi4_slv0_aruser_40_32"] +pub type U0_PCIE_AXI4_SLV0_ARUSER_40_32_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; +#[doc = "Field `u0_pcie_axi4_slv0_awfunc` reader - u0_pcie_axi4_slv0_awfunc"] +pub type U0_PCIE_AXI4_SLV0_AWFUNC_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_awfunc` writer - u0_pcie_axi4_slv0_awfunc"] +pub type U0_PCIE_AXI4_SLV0_AWFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `u0_pcie_axi4_slv0_awregion` reader - u0_pcie_axi4_slv0_awregion"] +pub type U0_PCIE_AXI4_SLV0_AWREGION_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_awregion` writer - u0_pcie_axi4_slv0_awregion"] +pub type U0_PCIE_AXI4_SLV0_AWREGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 0:8 - u0_plda_pcie_axi4_slv0_aruser_40_32"] + #[doc = "Bits 0:8 - u0_pcie_axi4_slv0_aruser_40_32"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aruser_40_32(&self) -> U0_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_R { - U0_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_R::new((self.bits & 0x01ff) as u16) + pub fn u0_pcie_axi4_slv0_aruser_40_32(&self) -> U0_PCIE_AXI4_SLV0_ARUSER_40_32_R { + U0_PCIE_AXI4_SLV0_ARUSER_40_32_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:23 - u0_plda_pcie_axi4_slv0_awfunc"] + #[doc = "Bits 9:23 - u0_pcie_axi4_slv0_awfunc"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_awfunc(&self) -> U0_PLDA_PCIE_AXI4_SLV0_AWFUNC_R { - U0_PLDA_PCIE_AXI4_SLV0_AWFUNC_R::new(((self.bits >> 9) & 0x7fff) as u16) + pub fn u0_pcie_axi4_slv0_awfunc(&self) -> U0_PCIE_AXI4_SLV0_AWFUNC_R { + U0_PCIE_AXI4_SLV0_AWFUNC_R::new(((self.bits >> 9) & 0x7fff) as u16) } - #[doc = "Bits 24:27 - u0_plda_pcie_axi4_slv0_awregion"] + #[doc = "Bits 24:27 - u0_pcie_axi4_slv0_awregion"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_awregion(&self) -> U0_PLDA_PCIE_AXI4_SLV0_AWREGION_R { - U0_PLDA_PCIE_AXI4_SLV0_AWREGION_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn u0_pcie_axi4_slv0_awregion(&self) -> U0_PCIE_AXI4_SLV0_AWREGION_R { + U0_PCIE_AXI4_SLV0_AWREGION_R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { - #[doc = "Bits 0:8 - u0_plda_pcie_axi4_slv0_aruser_40_32"] + #[doc = "Bits 0:8 - u0_pcie_axi4_slv0_aruser_40_32"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aruser_40_32( + pub fn u0_pcie_axi4_slv0_aruser_40_32( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_W { - U0_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARUSER_40_32_W { + U0_PCIE_AXI4_SLV0_ARUSER_40_32_W::new(self, 0) } - #[doc = "Bits 9:23 - u0_plda_pcie_axi4_slv0_awfunc"] + #[doc = "Bits 9:23 - u0_pcie_axi4_slv0_awfunc"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_awfunc( - &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_AWFUNC_W { - U0_PLDA_PCIE_AXI4_SLV0_AWFUNC_W::new(self, 9) + pub fn u0_pcie_axi4_slv0_awfunc(&mut self) -> U0_PCIE_AXI4_SLV0_AWFUNC_W { + U0_PCIE_AXI4_SLV0_AWFUNC_W::new(self, 9) } - #[doc = "Bits 24:27 - u0_plda_pcie_axi4_slv0_awregion"] + #[doc = "Bits 24:27 - u0_pcie_axi4_slv0_awregion"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_awregion( + pub fn u0_pcie_axi4_slv0_awregion( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_AWREGION_W { - U0_PLDA_PCIE_AXI4_SLV0_AWREGION_W::new(self, 24) + ) -> U0_PCIE_AXI4_SLV0_AWREGION_W { + U0_PCIE_AXI4_SLV0_AWREGION_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_45.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_45.rs index 979fd1c..87fdc82 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_45.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_45.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_45` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_awuser_31_0` reader - u0_plda_pcie_axi4_slv0_awuser_31_0"] -pub type U0_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_awuser_31_0` writer - u0_plda_pcie_axi4_slv0_awuser_31_0"] -pub type U0_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_awuser_31_0` reader - u0_pcie_axi4_slv0_awuser_31_0"] +pub type U0_PCIE_AXI4_SLV0_AWUSER_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_awuser_31_0` writer - u0_pcie_axi4_slv0_awuser_31_0"] +pub type U0_PCIE_AXI4_SLV0_AWUSER_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_awuser_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_awuser_31_0"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_awuser_31_0(&self) -> U0_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_R { - U0_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_awuser_31_0(&self) -> U0_PCIE_AXI4_SLV0_AWUSER_31_0_R { + U0_PCIE_AXI4_SLV0_AWUSER_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_awuser_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_awuser_31_0"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_awuser_31_0( + pub fn u0_pcie_axi4_slv0_awuser_31_0( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_W { - U0_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_AWUSER_31_0_W { + U0_PCIE_AXI4_SLV0_AWUSER_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_46.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_46.rs index d925b27..d64973a 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_46.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_46.rs @@ -2,32 +2,32 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_46` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_awuser_40_32` reader - u0_plda_pcie_axi4_slv0_awuser_40_32"] -pub type U0_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_awuser_40_32` writer - u0_plda_pcie_axi4_slv0_awuser_40_32"] -pub type U0_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; -#[doc = "Field `u0_plda_pcie_axi4_slv0_rderr` reader - u0_plda_pcie_axi4_slv0_rderr"] -pub type U0_PLDA_PCIE_AXI4_SLV0_RDERR_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_awuser_40_32` reader - u0_pcie_axi4_slv0_awuser_40_32"] +pub type U0_PCIE_AXI4_SLV0_AWUSER_40_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_awuser_40_32` writer - u0_pcie_axi4_slv0_awuser_40_32"] +pub type U0_PCIE_AXI4_SLV0_AWUSER_40_32_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; +#[doc = "Field `u0_pcie_axi4_slv0_rderr` reader - u0_pcie_axi4_slv0_rderr"] +pub type U0_PCIE_AXI4_SLV0_RDERR_R = crate::FieldReader; impl R { - #[doc = "Bits 0:8 - u0_plda_pcie_axi4_slv0_awuser_40_32"] + #[doc = "Bits 0:8 - u0_pcie_axi4_slv0_awuser_40_32"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_awuser_40_32(&self) -> U0_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_R { - U0_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_R::new((self.bits & 0x01ff) as u16) + pub fn u0_pcie_axi4_slv0_awuser_40_32(&self) -> U0_PCIE_AXI4_SLV0_AWUSER_40_32_R { + U0_PCIE_AXI4_SLV0_AWUSER_40_32_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:16 - u0_plda_pcie_axi4_slv0_rderr"] + #[doc = "Bits 9:16 - u0_pcie_axi4_slv0_rderr"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_rderr(&self) -> U0_PLDA_PCIE_AXI4_SLV0_RDERR_R { - U0_PLDA_PCIE_AXI4_SLV0_RDERR_R::new(((self.bits >> 9) & 0xff) as u8) + pub fn u0_pcie_axi4_slv0_rderr(&self) -> U0_PCIE_AXI4_SLV0_RDERR_R { + U0_PCIE_AXI4_SLV0_RDERR_R::new(((self.bits >> 9) & 0xff) as u8) } } impl W { - #[doc = "Bits 0:8 - u0_plda_pcie_axi4_slv0_awuser_40_32"] + #[doc = "Bits 0:8 - u0_pcie_axi4_slv0_awuser_40_32"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_awuser_40_32( + pub fn u0_pcie_axi4_slv0_awuser_40_32( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_W { - U0_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_AWUSER_40_32_W { + U0_PCIE_AXI4_SLV0_AWUSER_40_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_47.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_47.rs index 59ebd2b..8ab20f3 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_47.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_47.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_47` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_ruser` reader - u0_plda_pcie_axi4_slv0_ruser"] -pub type U0_PLDA_PCIE_AXI4_SLV0_RUSER_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_ruser` reader - u0_pcie_axi4_slv0_ruser"] +pub type U0_PCIE_AXI4_SLV0_RUSER_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_ruser"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_ruser"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_ruser(&self) -> U0_PLDA_PCIE_AXI4_SLV0_RUSER_R { - U0_PLDA_PCIE_AXI4_SLV0_RUSER_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_ruser(&self) -> U0_PCIE_AXI4_SLV0_RUSER_R { + U0_PCIE_AXI4_SLV0_RUSER_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_48.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_48.rs index 54120a4..28661d8 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_48.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_48.rs @@ -2,32 +2,30 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_48` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_wderr` reader - u0_plda_pcie_axi4_slv0_wderr"] -pub type U0_PLDA_PCIE_AXI4_SLV0_WDERR_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_wderr` writer - u0_plda_pcie_axi4_slv0_wderr"] -pub type U0_PLDA_PCIE_AXI4_SLV0_WDERR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `u0_plda_pcie_axi4_slvl_arfunc` reader - u0_plda_pcie_axi4_slvl_arfunc"] -pub type U0_PLDA_PCIE_AXI4_SLVL_ARFUNC_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_wderr` reader - u0_pcie_axi4_slv0_wderr"] +pub type U0_PCIE_AXI4_SLV0_WDERR_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_wderr` writer - u0_pcie_axi4_slv0_wderr"] +pub type U0_PCIE_AXI4_SLV0_WDERR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `u0_pcie_axi4_slvl_arfunc` reader - u0_pcie_axi4_slvl_arfunc"] +pub type U0_PCIE_AXI4_SLVL_ARFUNC_R = crate::FieldReader; impl R { - #[doc = "Bits 0:7 - u0_plda_pcie_axi4_slv0_wderr"] + #[doc = "Bits 0:7 - u0_pcie_axi4_slv0_wderr"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_wderr(&self) -> U0_PLDA_PCIE_AXI4_SLV0_WDERR_R { - U0_PLDA_PCIE_AXI4_SLV0_WDERR_R::new((self.bits & 0xff) as u8) + pub fn u0_pcie_axi4_slv0_wderr(&self) -> U0_PCIE_AXI4_SLV0_WDERR_R { + U0_PCIE_AXI4_SLV0_WDERR_R::new((self.bits & 0xff) as u8) } - #[doc = "Bits 8:22 - u0_plda_pcie_axi4_slvl_arfunc"] + #[doc = "Bits 8:22 - u0_pcie_axi4_slvl_arfunc"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slvl_arfunc(&self) -> U0_PLDA_PCIE_AXI4_SLVL_ARFUNC_R { - U0_PLDA_PCIE_AXI4_SLVL_ARFUNC_R::new(((self.bits >> 8) & 0x7fff) as u16) + pub fn u0_pcie_axi4_slvl_arfunc(&self) -> U0_PCIE_AXI4_SLVL_ARFUNC_R { + U0_PCIE_AXI4_SLVL_ARFUNC_R::new(((self.bits >> 8) & 0x7fff) as u16) } } impl W { - #[doc = "Bits 0:7 - u0_plda_pcie_axi4_slv0_wderr"] + #[doc = "Bits 0:7 - u0_pcie_axi4_slv0_wderr"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_wderr( - &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_WDERR_W { - U0_PLDA_PCIE_AXI4_SLV0_WDERR_W::new(self, 0) + pub fn u0_pcie_axi4_slv0_wderr(&mut self) -> U0_PCIE_AXI4_SLV0_WDERR_W { + U0_PCIE_AXI4_SLV0_WDERR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_49.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_49.rs index 1fca0f7..0f45130 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_49.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_49.rs @@ -2,92 +2,90 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_49` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slvl_awfunc` reader - u0_plda_pcie_axi4_slvl_awfunc"] -pub type U0_PLDA_PCIE_AXI4_SLVL_AWFUNC_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slvl_awfunc` writer - u0_plda_pcie_axi4_slvl_awfunc"] -pub type U0_PLDA_PCIE_AXI4_SLVL_AWFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; -#[doc = "Field `u0_plda_pcie_bus_width_o` reader - u0_plda_pcie_bus_width_o"] -pub type U0_PLDA_PCIE_BUS_WIDTH_O_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_bypass_codec` reader - u0_plda_pcie_bypass_codec"] -pub type U0_PLDA_PCIE_BYPASS_CODEC_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_bypass_codec` writer - u0_plda_pcie_bypass_codec"] -pub type U0_PLDA_PCIE_BYPASS_CODEC_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_ckref_src` reader - u0_plda_pcie_ckref_src"] -pub type U0_PLDA_PCIE_CKREF_SRC_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_ckref_src` writer - u0_plda_pcie_ckref_src"] -pub type U0_PLDA_PCIE_CKREF_SRC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_plda_pcie_clk_sel` reader - u0_plda_pcie_clk_sel"] -pub type U0_PLDA_PCIE_CLK_SEL_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_clk_sel` writer - u0_plda_pcie_clk_sel"] -pub type U0_PLDA_PCIE_CLK_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_plda_pcie_clkreq` reader - u0_plda_pcie_clkreq"] -pub type U0_PLDA_PCIE_CLKREQ_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_clkreq` writer - u0_plda_pcie_clkreq"] -pub type U0_PLDA_PCIE_CLKREQ_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_axi4_slvl_awfunc` reader - u0_pcie_axi4_slvl_awfunc"] +pub type U0_PCIE_AXI4_SLVL_AWFUNC_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slvl_awfunc` writer - u0_pcie_axi4_slvl_awfunc"] +pub type U0_PCIE_AXI4_SLVL_AWFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `u0_pcie_bus_width_o` reader - u0_pcie_bus_width_o"] +pub type U0_PCIE_BUS_WIDTH_O_R = crate::FieldReader; +#[doc = "Field `u0_pcie_bypass_codec` reader - u0_pcie_bypass_codec"] +pub type U0_PCIE_BYPASS_CODEC_R = crate::BitReader; +#[doc = "Field `u0_pcie_bypass_codec` writer - u0_pcie_bypass_codec"] +pub type U0_PCIE_BYPASS_CODEC_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_ckref_src` reader - u0_pcie_ckref_src"] +pub type U0_PCIE_CKREF_SRC_R = crate::FieldReader; +#[doc = "Field `u0_pcie_ckref_src` writer - u0_pcie_ckref_src"] +pub type U0_PCIE_CKREF_SRC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_pcie_clk_sel` reader - u0_pcie_clk_sel"] +pub type U0_PCIE_CLK_SEL_R = crate::FieldReader; +#[doc = "Field `u0_pcie_clk_sel` writer - u0_pcie_clk_sel"] +pub type U0_PCIE_CLK_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_pcie_clkreq` reader - u0_pcie_clkreq"] +pub type U0_PCIE_CLKREQ_R = crate::BitReader; +#[doc = "Field `u0_pcie_clkreq` writer - u0_pcie_clkreq"] +pub type U0_PCIE_CLKREQ_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bits 0:14 - u0_plda_pcie_axi4_slvl_awfunc"] + #[doc = "Bits 0:14 - u0_pcie_axi4_slvl_awfunc"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slvl_awfunc(&self) -> U0_PLDA_PCIE_AXI4_SLVL_AWFUNC_R { - U0_PLDA_PCIE_AXI4_SLVL_AWFUNC_R::new((self.bits & 0x7fff) as u16) + pub fn u0_pcie_axi4_slvl_awfunc(&self) -> U0_PCIE_AXI4_SLVL_AWFUNC_R { + U0_PCIE_AXI4_SLVL_AWFUNC_R::new((self.bits & 0x7fff) as u16) } - #[doc = "Bits 15:16 - u0_plda_pcie_bus_width_o"] + #[doc = "Bits 15:16 - u0_pcie_bus_width_o"] #[inline(always)] - pub fn u0_plda_pcie_bus_width_o(&self) -> U0_PLDA_PCIE_BUS_WIDTH_O_R { - U0_PLDA_PCIE_BUS_WIDTH_O_R::new(((self.bits >> 15) & 3) as u8) + pub fn u0_pcie_bus_width_o(&self) -> U0_PCIE_BUS_WIDTH_O_R { + U0_PCIE_BUS_WIDTH_O_R::new(((self.bits >> 15) & 3) as u8) } - #[doc = "Bit 17 - u0_plda_pcie_bypass_codec"] + #[doc = "Bit 17 - u0_pcie_bypass_codec"] #[inline(always)] - pub fn u0_plda_pcie_bypass_codec(&self) -> U0_PLDA_PCIE_BYPASS_CODEC_R { - U0_PLDA_PCIE_BYPASS_CODEC_R::new(((self.bits >> 17) & 1) != 0) + pub fn u0_pcie_bypass_codec(&self) -> U0_PCIE_BYPASS_CODEC_R { + U0_PCIE_BYPASS_CODEC_R::new(((self.bits >> 17) & 1) != 0) } - #[doc = "Bits 18:19 - u0_plda_pcie_ckref_src"] + #[doc = "Bits 18:19 - u0_pcie_ckref_src"] #[inline(always)] - pub fn u0_plda_pcie_ckref_src(&self) -> U0_PLDA_PCIE_CKREF_SRC_R { - U0_PLDA_PCIE_CKREF_SRC_R::new(((self.bits >> 18) & 3) as u8) + pub fn u0_pcie_ckref_src(&self) -> U0_PCIE_CKREF_SRC_R { + U0_PCIE_CKREF_SRC_R::new(((self.bits >> 18) & 3) as u8) } - #[doc = "Bits 20:21 - u0_plda_pcie_clk_sel"] + #[doc = "Bits 20:21 - u0_pcie_clk_sel"] #[inline(always)] - pub fn u0_plda_pcie_clk_sel(&self) -> U0_PLDA_PCIE_CLK_SEL_R { - U0_PLDA_PCIE_CLK_SEL_R::new(((self.bits >> 20) & 3) as u8) + pub fn u0_pcie_clk_sel(&self) -> U0_PCIE_CLK_SEL_R { + U0_PCIE_CLK_SEL_R::new(((self.bits >> 20) & 3) as u8) } - #[doc = "Bit 22 - u0_plda_pcie_clkreq"] + #[doc = "Bit 22 - u0_pcie_clkreq"] #[inline(always)] - pub fn u0_plda_pcie_clkreq(&self) -> U0_PLDA_PCIE_CLKREQ_R { - U0_PLDA_PCIE_CLKREQ_R::new(((self.bits >> 22) & 1) != 0) + pub fn u0_pcie_clkreq(&self) -> U0_PCIE_CLKREQ_R { + U0_PCIE_CLKREQ_R::new(((self.bits >> 22) & 1) != 0) } } impl W { - #[doc = "Bits 0:14 - u0_plda_pcie_axi4_slvl_awfunc"] + #[doc = "Bits 0:14 - u0_pcie_axi4_slvl_awfunc"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slvl_awfunc( - &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLVL_AWFUNC_W { - U0_PLDA_PCIE_AXI4_SLVL_AWFUNC_W::new(self, 0) + pub fn u0_pcie_axi4_slvl_awfunc(&mut self) -> U0_PCIE_AXI4_SLVL_AWFUNC_W { + U0_PCIE_AXI4_SLVL_AWFUNC_W::new(self, 0) } - #[doc = "Bit 17 - u0_plda_pcie_bypass_codec"] + #[doc = "Bit 17 - u0_pcie_bypass_codec"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_bypass_codec(&mut self) -> U0_PLDA_PCIE_BYPASS_CODEC_W { - U0_PLDA_PCIE_BYPASS_CODEC_W::new(self, 17) + pub fn u0_pcie_bypass_codec(&mut self) -> U0_PCIE_BYPASS_CODEC_W { + U0_PCIE_BYPASS_CODEC_W::new(self, 17) } - #[doc = "Bits 18:19 - u0_plda_pcie_ckref_src"] + #[doc = "Bits 18:19 - u0_pcie_ckref_src"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_ckref_src(&mut self) -> U0_PLDA_PCIE_CKREF_SRC_W { - U0_PLDA_PCIE_CKREF_SRC_W::new(self, 18) + pub fn u0_pcie_ckref_src(&mut self) -> U0_PCIE_CKREF_SRC_W { + U0_PCIE_CKREF_SRC_W::new(self, 18) } - #[doc = "Bits 20:21 - u0_plda_pcie_clk_sel"] + #[doc = "Bits 20:21 - u0_pcie_clk_sel"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_clk_sel(&mut self) -> U0_PLDA_PCIE_CLK_SEL_W { - U0_PLDA_PCIE_CLK_SEL_W::new(self, 20) + pub fn u0_pcie_clk_sel(&mut self) -> U0_PCIE_CLK_SEL_W { + U0_PCIE_CLK_SEL_W::new(self, 20) } - #[doc = "Bit 22 - u0_plda_pcie_clkreq"] + #[doc = "Bit 22 - u0_pcie_clkreq"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_clkreq(&mut self) -> U0_PLDA_PCIE_CLKREQ_W { - U0_PLDA_PCIE_CLKREQ_W::new(self, 22) + pub fn u0_pcie_clkreq(&mut self) -> U0_PCIE_CLKREQ_W { + U0_PCIE_CLKREQ_W::new(self, 22) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_5.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_5.rs index e99ee02..57c2be6 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_5.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_5.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_5` writer"] pub type W = crate::W; -#[doc = "Field `u0_cdn_usb_xhci_debug_link_state` reader - u0_cdn_usb_xhci_debug_link_state"] -pub type U0_CDN_USB_XHCI_DEBUG_LINK_STATE_R = crate::FieldReader; +#[doc = "Field `u0_usb_xhci_debug_link_state` reader - u0_usb_xhci_debug_link_state"] +pub type U0_USB_XHCI_DEBUG_LINK_STATE_R = crate::FieldReader; impl R { - #[doc = "Bits 0:30 - u0_cdn_usb_xhci_debug_link_state"] + #[doc = "Bits 0:30 - u0_usb_xhci_debug_link_state"] #[inline(always)] - pub fn u0_cdn_usb_xhci_debug_link_state(&self) -> U0_CDN_USB_XHCI_DEBUG_LINK_STATE_R { - U0_CDN_USB_XHCI_DEBUG_LINK_STATE_R::new(self.bits & 0x7fff_ffff) + pub fn u0_usb_xhci_debug_link_state(&self) -> U0_USB_XHCI_DEBUG_LINK_STATE_R { + U0_USB_XHCI_DEBUG_LINK_STATE_R::new(self.bits & 0x7fff_ffff) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_50.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_50.rs index 2608d25..6374097 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_50.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_50.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_50` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_31_0` reader - u0_plda_pcie_k_phyparam_31_0"] -pub type U0_PLDA_PCIE_K_PHYPARAM_31_0_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_31_0` writer - u0_plda_pcie_k_phyparam_31_0"] -pub type U0_PLDA_PCIE_K_PHYPARAM_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_31_0` reader - u0_pcie_k_phyparam_31_0"] +pub type U0_PCIE_K_PHYPARAM_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_31_0` writer - u0_pcie_k_phyparam_31_0"] +pub type U0_PCIE_K_PHYPARAM_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_31_0"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_31_0"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_31_0(&self) -> U0_PLDA_PCIE_K_PHYPARAM_31_0_R { - U0_PLDA_PCIE_K_PHYPARAM_31_0_R::new(self.bits) + pub fn u0_pcie_k_phyparam_31_0(&self) -> U0_PCIE_K_PHYPARAM_31_0_R { + U0_PCIE_K_PHYPARAM_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_31_0"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_31_0"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_31_0( - &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_31_0_W { - U0_PLDA_PCIE_K_PHYPARAM_31_0_W::new(self, 0) + pub fn u0_pcie_k_phyparam_31_0(&mut self) -> U0_PCIE_K_PHYPARAM_31_0_W { + U0_PCIE_K_PHYPARAM_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_51.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_51.rs index 74d922d..2745749 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_51.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_51.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_51` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_63_32` reader - u0_plda_pcie_k_phyparam_63_32"] -pub type U0_PLDA_PCIE_K_PHYPARAM_63_32_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_63_32` writer - u0_plda_pcie_k_phyparam_63_32"] -pub type U0_PLDA_PCIE_K_PHYPARAM_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_63_32` reader - u0_pcie_k_phyparam_63_32"] +pub type U0_PCIE_K_PHYPARAM_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_63_32` writer - u0_pcie_k_phyparam_63_32"] +pub type U0_PCIE_K_PHYPARAM_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_63_32"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_63_32"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_63_32(&self) -> U0_PLDA_PCIE_K_PHYPARAM_63_32_R { - U0_PLDA_PCIE_K_PHYPARAM_63_32_R::new(self.bits) + pub fn u0_pcie_k_phyparam_63_32(&self) -> U0_PCIE_K_PHYPARAM_63_32_R { + U0_PCIE_K_PHYPARAM_63_32_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_63_32"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_63_32"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_63_32( - &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_63_32_W { - U0_PLDA_PCIE_K_PHYPARAM_63_32_W::new(self, 0) + pub fn u0_pcie_k_phyparam_63_32(&mut self) -> U0_PCIE_K_PHYPARAM_63_32_W { + U0_PCIE_K_PHYPARAM_63_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_52.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_52.rs index 8af6f8c..4f28838 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_52.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_52.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_52` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_95_64` reader - u0_plda_pcie_k_phyparam_95_64"] -pub type U0_PLDA_PCIE_K_PHYPARAM_95_64_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_95_64` writer - u0_plda_pcie_k_phyparam_95_64"] -pub type U0_PLDA_PCIE_K_PHYPARAM_95_64_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_95_64` reader - u0_pcie_k_phyparam_95_64"] +pub type U0_PCIE_K_PHYPARAM_95_64_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_95_64` writer - u0_pcie_k_phyparam_95_64"] +pub type U0_PCIE_K_PHYPARAM_95_64_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_95_64"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_95_64"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_95_64(&self) -> U0_PLDA_PCIE_K_PHYPARAM_95_64_R { - U0_PLDA_PCIE_K_PHYPARAM_95_64_R::new(self.bits) + pub fn u0_pcie_k_phyparam_95_64(&self) -> U0_PCIE_K_PHYPARAM_95_64_R { + U0_PCIE_K_PHYPARAM_95_64_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_95_64"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_95_64"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_95_64( - &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_95_64_W { - U0_PLDA_PCIE_K_PHYPARAM_95_64_W::new(self, 0) + pub fn u0_pcie_k_phyparam_95_64(&mut self) -> U0_PCIE_K_PHYPARAM_95_64_W { + U0_PCIE_K_PHYPARAM_95_64_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_53.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_53.rs index ffb1705..2b6eb36 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_53.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_53.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_53` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_127_96` reader - u0_plda_pcie_k_phyparam_127_96"] -pub type U0_PLDA_PCIE_K_PHYPARAM_127_96_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_127_96` writer - u0_plda_pcie_k_phyparam_127_96"] -pub type U0_PLDA_PCIE_K_PHYPARAM_127_96_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_127_96` reader - u0_pcie_k_phyparam_127_96"] +pub type U0_PCIE_K_PHYPARAM_127_96_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_127_96` writer - u0_pcie_k_phyparam_127_96"] +pub type U0_PCIE_K_PHYPARAM_127_96_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_127_96"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_127_96"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_127_96(&self) -> U0_PLDA_PCIE_K_PHYPARAM_127_96_R { - U0_PLDA_PCIE_K_PHYPARAM_127_96_R::new(self.bits) + pub fn u0_pcie_k_phyparam_127_96(&self) -> U0_PCIE_K_PHYPARAM_127_96_R { + U0_PCIE_K_PHYPARAM_127_96_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_127_96"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_127_96"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_127_96( - &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_127_96_W { - U0_PLDA_PCIE_K_PHYPARAM_127_96_W::new(self, 0) + pub fn u0_pcie_k_phyparam_127_96(&mut self) -> U0_PCIE_K_PHYPARAM_127_96_W { + U0_PCIE_K_PHYPARAM_127_96_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_54.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_54.rs index ebd732f..40466da 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_54.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_54.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_54` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_159_128` reader - u0_plda_pcie_k_phyparam_159_128"] -pub type U0_PLDA_PCIE_K_PHYPARAM_159_128_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_159_128` writer - u0_plda_pcie_k_phyparam_159_128"] -pub type U0_PLDA_PCIE_K_PHYPARAM_159_128_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_159_128` reader - u0_pcie_k_phyparam_159_128"] +pub type U0_PCIE_K_PHYPARAM_159_128_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_159_128` writer - u0_pcie_k_phyparam_159_128"] +pub type U0_PCIE_K_PHYPARAM_159_128_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_159_128"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_159_128"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_159_128(&self) -> U0_PLDA_PCIE_K_PHYPARAM_159_128_R { - U0_PLDA_PCIE_K_PHYPARAM_159_128_R::new(self.bits) + pub fn u0_pcie_k_phyparam_159_128(&self) -> U0_PCIE_K_PHYPARAM_159_128_R { + U0_PCIE_K_PHYPARAM_159_128_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_159_128"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_159_128"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_159_128( + pub fn u0_pcie_k_phyparam_159_128( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_159_128_W { - U0_PLDA_PCIE_K_PHYPARAM_159_128_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_159_128_W { + U0_PCIE_K_PHYPARAM_159_128_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_55.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_55.rs index 5a7811c..61ac2c0 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_55.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_55.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_55` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_191_160` reader - u0_plda_pcie_k_phyparam_191_160"] -pub type U0_PLDA_PCIE_K_PHYPARAM_191_160_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_191_160` writer - u0_plda_pcie_k_phyparam_191_160"] -pub type U0_PLDA_PCIE_K_PHYPARAM_191_160_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_191_160` reader - u0_pcie_k_phyparam_191_160"] +pub type U0_PCIE_K_PHYPARAM_191_160_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_191_160` writer - u0_pcie_k_phyparam_191_160"] +pub type U0_PCIE_K_PHYPARAM_191_160_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_191_160"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_191_160"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_191_160(&self) -> U0_PLDA_PCIE_K_PHYPARAM_191_160_R { - U0_PLDA_PCIE_K_PHYPARAM_191_160_R::new(self.bits) + pub fn u0_pcie_k_phyparam_191_160(&self) -> U0_PCIE_K_PHYPARAM_191_160_R { + U0_PCIE_K_PHYPARAM_191_160_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_191_160"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_191_160"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_191_160( + pub fn u0_pcie_k_phyparam_191_160( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_191_160_W { - U0_PLDA_PCIE_K_PHYPARAM_191_160_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_191_160_W { + U0_PCIE_K_PHYPARAM_191_160_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_56.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_56.rs index 3fc7a95..08e5aef 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_56.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_56.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_56` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_223_192` reader - u0_plda_pcie_k_phyparam_223_192"] -pub type U0_PLDA_PCIE_K_PHYPARAM_223_192_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_223_192` writer - u0_plda_pcie_k_phyparam_223_192"] -pub type U0_PLDA_PCIE_K_PHYPARAM_223_192_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_223_192` reader - u0_pcie_k_phyparam_223_192"] +pub type U0_PCIE_K_PHYPARAM_223_192_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_223_192` writer - u0_pcie_k_phyparam_223_192"] +pub type U0_PCIE_K_PHYPARAM_223_192_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_223_192"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_223_192"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_223_192(&self) -> U0_PLDA_PCIE_K_PHYPARAM_223_192_R { - U0_PLDA_PCIE_K_PHYPARAM_223_192_R::new(self.bits) + pub fn u0_pcie_k_phyparam_223_192(&self) -> U0_PCIE_K_PHYPARAM_223_192_R { + U0_PCIE_K_PHYPARAM_223_192_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_223_192"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_223_192"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_223_192( + pub fn u0_pcie_k_phyparam_223_192( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_223_192_W { - U0_PLDA_PCIE_K_PHYPARAM_223_192_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_223_192_W { + U0_PCIE_K_PHYPARAM_223_192_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_57.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_57.rs index 5e7c4c7..e6dd0e1 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_57.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_57.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_57` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_255_224` reader - u0_plda_pcie_k_phyparam_255_224"] -pub type U0_PLDA_PCIE_K_PHYPARAM_255_224_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_255_224` writer - u0_plda_pcie_k_phyparam_255_224"] -pub type U0_PLDA_PCIE_K_PHYPARAM_255_224_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_255_224` reader - u0_pcie_k_phyparam_255_224"] +pub type U0_PCIE_K_PHYPARAM_255_224_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_255_224` writer - u0_pcie_k_phyparam_255_224"] +pub type U0_PCIE_K_PHYPARAM_255_224_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_255_224"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_255_224"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_255_224(&self) -> U0_PLDA_PCIE_K_PHYPARAM_255_224_R { - U0_PLDA_PCIE_K_PHYPARAM_255_224_R::new(self.bits) + pub fn u0_pcie_k_phyparam_255_224(&self) -> U0_PCIE_K_PHYPARAM_255_224_R { + U0_PCIE_K_PHYPARAM_255_224_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_255_224"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_255_224"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_255_224( + pub fn u0_pcie_k_phyparam_255_224( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_255_224_W { - U0_PLDA_PCIE_K_PHYPARAM_255_224_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_255_224_W { + U0_PCIE_K_PHYPARAM_255_224_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_58.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_58.rs index 3fcb836..fe4626f 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_58.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_58.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_58` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_287_256` reader - u0_plda_pcie_k_phyparam_287_256"] -pub type U0_PLDA_PCIE_K_PHYPARAM_287_256_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_287_256` writer - u0_plda_pcie_k_phyparam_287_256"] -pub type U0_PLDA_PCIE_K_PHYPARAM_287_256_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_287_256` reader - u0_pcie_k_phyparam_287_256"] +pub type U0_PCIE_K_PHYPARAM_287_256_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_287_256` writer - u0_pcie_k_phyparam_287_256"] +pub type U0_PCIE_K_PHYPARAM_287_256_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_287_256"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_287_256"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_287_256(&self) -> U0_PLDA_PCIE_K_PHYPARAM_287_256_R { - U0_PLDA_PCIE_K_PHYPARAM_287_256_R::new(self.bits) + pub fn u0_pcie_k_phyparam_287_256(&self) -> U0_PCIE_K_PHYPARAM_287_256_R { + U0_PCIE_K_PHYPARAM_287_256_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_287_256"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_287_256"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_287_256( + pub fn u0_pcie_k_phyparam_287_256( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_287_256_W { - U0_PLDA_PCIE_K_PHYPARAM_287_256_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_287_256_W { + U0_PCIE_K_PHYPARAM_287_256_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_59.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_59.rs index bface34..8ed0943 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_59.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_59.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_59` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_319_288` reader - u0_plda_pcie_k_phyparam_319_288"] -pub type U0_PLDA_PCIE_K_PHYPARAM_319_288_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_319_288` writer - u0_plda_pcie_k_phyparam_319_288"] -pub type U0_PLDA_PCIE_K_PHYPARAM_319_288_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_319_288` reader - u0_pcie_k_phyparam_319_288"] +pub type U0_PCIE_K_PHYPARAM_319_288_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_319_288` writer - u0_pcie_k_phyparam_319_288"] +pub type U0_PCIE_K_PHYPARAM_319_288_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_319_288"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_319_288"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_319_288(&self) -> U0_PLDA_PCIE_K_PHYPARAM_319_288_R { - U0_PLDA_PCIE_K_PHYPARAM_319_288_R::new(self.bits) + pub fn u0_pcie_k_phyparam_319_288(&self) -> U0_PCIE_K_PHYPARAM_319_288_R { + U0_PCIE_K_PHYPARAM_319_288_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_319_288"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_319_288"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_319_288( + pub fn u0_pcie_k_phyparam_319_288( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_319_288_W { - U0_PLDA_PCIE_K_PHYPARAM_319_288_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_319_288_W { + U0_PCIE_K_PHYPARAM_319_288_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_6.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_6.rs index e2f8660..4dfd27e 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_6.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_6.rs @@ -2,161 +2,159 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_6` writer"] pub type W = crate::W; -#[doc = "Field `u0_cdn_usb_xhci_debug_sel` reader - u0_cdn_usb_xhci_debug_sel"] -pub type U0_CDN_USB_XHCI_DEBUG_SEL_R = crate::FieldReader; -#[doc = "Field `u0_cdn_usb_xhci_debug_sel` writer - u0_cdn_usb_xhci_debug_sel"] -pub type U0_CDN_USB_XHCI_DEBUG_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; -#[doc = "Field `u0_cdn_usb_xhci_main_power_off_ack` reader - u0_cdn_usb_xhci_main_power_off_ack"] -pub type U0_CDN_USB_XHCI_MAIN_POWER_OFF_ACK_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_main_power_off_req` reader - u0_cdn_usb_xhci_main_power_off_req"] -pub type U0_CDN_USB_XHCI_MAIN_POWER_OFF_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_main_power_on_ready` reader - u0_cdn_usb_xhci_main_power_on_ready"] -pub type U0_CDN_USB_XHCI_MAIN_POWER_ON_READY_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_main_power_on_ready` writer - u0_cdn_usb_xhci_main_power_on_ready"] -pub type U0_CDN_USB_XHCI_MAIN_POWER_ON_READY_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_xhci_main_power_on_req` reader - u0_cdn_usb_xhci_main_power_on_req"] -pub type U0_CDN_USB_XHCI_MAIN_POWER_ON_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_main_power_on_valid` reader - u0_cdn_usb_xhci_main_power_on_valid"] -pub type U0_CDN_USB_XHCI_MAIN_POWER_ON_VALID_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_main_power_on_valid` writer - u0_cdn_usb_xhci_main_power_on_valid"] -pub type U0_CDN_USB_XHCI_MAIN_POWER_ON_VALID_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_xhci_power_off_ack` reader - u0_cdn_usb_xhci_power_off_ack"] -pub type U0_CDN_USB_XHCI_POWER_OFF_ACK_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_power_off_ready` reader - u0_cdn_usb_xhci_power_off_ready"] -pub type U0_CDN_USB_XHCI_POWER_OFF_READY_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_power_off_req` reader - u0_cdn_usb_xhci_power_off_req"] -pub type U0_CDN_USB_XHCI_POWER_OFF_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_power_off_req` writer - u0_cdn_usb_xhci_power_off_req"] -pub type U0_CDN_USB_XHCI_POWER_OFF_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_xhci_power_on_ready` reader - u0_cdn_usb_xhci_power_on_ready"] -pub type U0_CDN_USB_XHCI_POWER_ON_READY_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_power_on_req` reader - u0_cdn_usb_xhci_power_on_req"] -pub type U0_CDN_USB_XHCI_POWER_ON_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_power_on_valid` reader - u0_cdn_usb_xhci_power_on_valid"] -pub type U0_CDN_USB_XHCI_POWER_ON_VALID_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_power_on_valid` writer - u0_cdn_usb_xhci_power_on_valid"] -pub type U0_CDN_USB_XHCI_POWER_ON_VALID_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_e2_sft7110_cease_from_tile_0` reader - u0_e2_sft7110_cease_from_tile_0"] -pub type U0_E2_SFT7110_CEASE_FROM_TILE_0_R = crate::BitReader; -#[doc = "Field `u0_e2_sft7110_debug_from_tile_0` reader - u0_e2_sft7110_debug_from_tile_0"] -pub type U0_E2_SFT7110_DEBUG_FROM_TILE_0_R = crate::BitReader; -#[doc = "Field `u0_e2_sft7110_halt_from_tile_0` reader - u0_e2_sft7110_halt_from_tile_0"] -pub type U0_E2_SFT7110_HALT_FROM_TILE_0_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_debug_sel` reader - u0_usb_xhci_debug_sel"] +pub type U0_USB_XHCI_DEBUG_SEL_R = crate::FieldReader; +#[doc = "Field `u0_usb_xhci_debug_sel` writer - u0_usb_xhci_debug_sel"] +pub type U0_USB_XHCI_DEBUG_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +#[doc = "Field `u0_usb_xhci_main_power_off_ack` reader - u0_usb_xhci_main_power_off_ack"] +pub type U0_USB_XHCI_MAIN_POWER_OFF_ACK_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_main_power_off_req` reader - u0_usb_xhci_main_power_off_req"] +pub type U0_USB_XHCI_MAIN_POWER_OFF_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_main_power_on_ready` reader - u0_usb_xhci_main_power_on_ready"] +pub type U0_USB_XHCI_MAIN_POWER_ON_READY_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_main_power_on_ready` writer - u0_usb_xhci_main_power_on_ready"] +pub type U0_USB_XHCI_MAIN_POWER_ON_READY_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_xhci_main_power_on_req` reader - u0_usb_xhci_main_power_on_req"] +pub type U0_USB_XHCI_MAIN_POWER_ON_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_main_power_on_valid` reader - u0_usb_xhci_main_power_on_valid"] +pub type U0_USB_XHCI_MAIN_POWER_ON_VALID_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_main_power_on_valid` writer - u0_usb_xhci_main_power_on_valid"] +pub type U0_USB_XHCI_MAIN_POWER_ON_VALID_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_xhci_power_off_ack` reader - u0_usb_xhci_power_off_ack"] +pub type U0_USB_XHCI_POWER_OFF_ACK_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_power_off_ready` reader - u0_usb_xhci_power_off_ready"] +pub type U0_USB_XHCI_POWER_OFF_READY_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_power_off_req` reader - u0_usb_xhci_power_off_req"] +pub type U0_USB_XHCI_POWER_OFF_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_power_off_req` writer - u0_usb_xhci_power_off_req"] +pub type U0_USB_XHCI_POWER_OFF_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_xhci_power_on_ready` reader - u0_usb_xhci_power_on_ready"] +pub type U0_USB_XHCI_POWER_ON_READY_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_power_on_req` reader - u0_usb_xhci_power_on_req"] +pub type U0_USB_XHCI_POWER_ON_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_power_on_valid` reader - u0_usb_xhci_power_on_valid"] +pub type U0_USB_XHCI_POWER_ON_VALID_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_power_on_valid` writer - u0_usb_xhci_power_on_valid"] +pub type U0_USB_XHCI_POWER_ON_VALID_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_e2_cease_from_tile_0` reader - u0_e2_cease_from_tile_0"] +pub type U0_E2_CEASE_FROM_TILE_0_R = crate::BitReader; +#[doc = "Field `u0_e2_debug_from_tile_0` reader - u0_e2_debug_from_tile_0"] +pub type U0_E2_DEBUG_FROM_TILE_0_R = crate::BitReader; +#[doc = "Field `u0_e2_halt_from_tile_0` reader - u0_e2_halt_from_tile_0"] +pub type U0_E2_HALT_FROM_TILE_0_R = crate::BitReader; impl R { - #[doc = "Bits 0:4 - u0_cdn_usb_xhci_debug_sel"] + #[doc = "Bits 0:4 - u0_usb_xhci_debug_sel"] #[inline(always)] - pub fn u0_cdn_usb_xhci_debug_sel(&self) -> U0_CDN_USB_XHCI_DEBUG_SEL_R { - U0_CDN_USB_XHCI_DEBUG_SEL_R::new((self.bits & 0x1f) as u8) + pub fn u0_usb_xhci_debug_sel(&self) -> U0_USB_XHCI_DEBUG_SEL_R { + U0_USB_XHCI_DEBUG_SEL_R::new((self.bits & 0x1f) as u8) } - #[doc = "Bit 5 - u0_cdn_usb_xhci_main_power_off_ack"] + #[doc = "Bit 5 - u0_usb_xhci_main_power_off_ack"] #[inline(always)] - pub fn u0_cdn_usb_xhci_main_power_off_ack(&self) -> U0_CDN_USB_XHCI_MAIN_POWER_OFF_ACK_R { - U0_CDN_USB_XHCI_MAIN_POWER_OFF_ACK_R::new(((self.bits >> 5) & 1) != 0) + pub fn u0_usb_xhci_main_power_off_ack(&self) -> U0_USB_XHCI_MAIN_POWER_OFF_ACK_R { + U0_USB_XHCI_MAIN_POWER_OFF_ACK_R::new(((self.bits >> 5) & 1) != 0) } - #[doc = "Bit 6 - u0_cdn_usb_xhci_main_power_off_req"] + #[doc = "Bit 6 - u0_usb_xhci_main_power_off_req"] #[inline(always)] - pub fn u0_cdn_usb_xhci_main_power_off_req(&self) -> U0_CDN_USB_XHCI_MAIN_POWER_OFF_REQ_R { - U0_CDN_USB_XHCI_MAIN_POWER_OFF_REQ_R::new(((self.bits >> 6) & 1) != 0) + pub fn u0_usb_xhci_main_power_off_req(&self) -> U0_USB_XHCI_MAIN_POWER_OFF_REQ_R { + U0_USB_XHCI_MAIN_POWER_OFF_REQ_R::new(((self.bits >> 6) & 1) != 0) } - #[doc = "Bit 7 - u0_cdn_usb_xhci_main_power_on_ready"] + #[doc = "Bit 7 - u0_usb_xhci_main_power_on_ready"] #[inline(always)] - pub fn u0_cdn_usb_xhci_main_power_on_ready(&self) -> U0_CDN_USB_XHCI_MAIN_POWER_ON_READY_R { - U0_CDN_USB_XHCI_MAIN_POWER_ON_READY_R::new(((self.bits >> 7) & 1) != 0) + pub fn u0_usb_xhci_main_power_on_ready(&self) -> U0_USB_XHCI_MAIN_POWER_ON_READY_R { + U0_USB_XHCI_MAIN_POWER_ON_READY_R::new(((self.bits >> 7) & 1) != 0) } - #[doc = "Bit 8 - u0_cdn_usb_xhci_main_power_on_req"] + #[doc = "Bit 8 - u0_usb_xhci_main_power_on_req"] #[inline(always)] - pub fn u0_cdn_usb_xhci_main_power_on_req(&self) -> U0_CDN_USB_XHCI_MAIN_POWER_ON_REQ_R { - U0_CDN_USB_XHCI_MAIN_POWER_ON_REQ_R::new(((self.bits >> 8) & 1) != 0) + pub fn u0_usb_xhci_main_power_on_req(&self) -> U0_USB_XHCI_MAIN_POWER_ON_REQ_R { + U0_USB_XHCI_MAIN_POWER_ON_REQ_R::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 9 - u0_cdn_usb_xhci_main_power_on_valid"] + #[doc = "Bit 9 - u0_usb_xhci_main_power_on_valid"] #[inline(always)] - pub fn u0_cdn_usb_xhci_main_power_on_valid(&self) -> U0_CDN_USB_XHCI_MAIN_POWER_ON_VALID_R { - U0_CDN_USB_XHCI_MAIN_POWER_ON_VALID_R::new(((self.bits >> 9) & 1) != 0) + pub fn u0_usb_xhci_main_power_on_valid(&self) -> U0_USB_XHCI_MAIN_POWER_ON_VALID_R { + U0_USB_XHCI_MAIN_POWER_ON_VALID_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 10 - u0_cdn_usb_xhci_power_off_ack"] + #[doc = "Bit 10 - u0_usb_xhci_power_off_ack"] #[inline(always)] - pub fn u0_cdn_usb_xhci_power_off_ack(&self) -> U0_CDN_USB_XHCI_POWER_OFF_ACK_R { - U0_CDN_USB_XHCI_POWER_OFF_ACK_R::new(((self.bits >> 10) & 1) != 0) + pub fn u0_usb_xhci_power_off_ack(&self) -> U0_USB_XHCI_POWER_OFF_ACK_R { + U0_USB_XHCI_POWER_OFF_ACK_R::new(((self.bits >> 10) & 1) != 0) } - #[doc = "Bit 11 - u0_cdn_usb_xhci_power_off_ready"] + #[doc = "Bit 11 - u0_usb_xhci_power_off_ready"] #[inline(always)] - pub fn u0_cdn_usb_xhci_power_off_ready(&self) -> U0_CDN_USB_XHCI_POWER_OFF_READY_R { - U0_CDN_USB_XHCI_POWER_OFF_READY_R::new(((self.bits >> 11) & 1) != 0) + pub fn u0_usb_xhci_power_off_ready(&self) -> U0_USB_XHCI_POWER_OFF_READY_R { + U0_USB_XHCI_POWER_OFF_READY_R::new(((self.bits >> 11) & 1) != 0) } - #[doc = "Bit 12 - u0_cdn_usb_xhci_power_off_req"] + #[doc = "Bit 12 - u0_usb_xhci_power_off_req"] #[inline(always)] - pub fn u0_cdn_usb_xhci_power_off_req(&self) -> U0_CDN_USB_XHCI_POWER_OFF_REQ_R { - U0_CDN_USB_XHCI_POWER_OFF_REQ_R::new(((self.bits >> 12) & 1) != 0) + pub fn u0_usb_xhci_power_off_req(&self) -> U0_USB_XHCI_POWER_OFF_REQ_R { + U0_USB_XHCI_POWER_OFF_REQ_R::new(((self.bits >> 12) & 1) != 0) } - #[doc = "Bit 13 - u0_cdn_usb_xhci_power_on_ready"] + #[doc = "Bit 13 - u0_usb_xhci_power_on_ready"] #[inline(always)] - pub fn u0_cdn_usb_xhci_power_on_ready(&self) -> U0_CDN_USB_XHCI_POWER_ON_READY_R { - U0_CDN_USB_XHCI_POWER_ON_READY_R::new(((self.bits >> 13) & 1) != 0) + pub fn u0_usb_xhci_power_on_ready(&self) -> U0_USB_XHCI_POWER_ON_READY_R { + U0_USB_XHCI_POWER_ON_READY_R::new(((self.bits >> 13) & 1) != 0) } - #[doc = "Bit 14 - u0_cdn_usb_xhci_power_on_req"] + #[doc = "Bit 14 - u0_usb_xhci_power_on_req"] #[inline(always)] - pub fn u0_cdn_usb_xhci_power_on_req(&self) -> U0_CDN_USB_XHCI_POWER_ON_REQ_R { - U0_CDN_USB_XHCI_POWER_ON_REQ_R::new(((self.bits >> 14) & 1) != 0) + pub fn u0_usb_xhci_power_on_req(&self) -> U0_USB_XHCI_POWER_ON_REQ_R { + U0_USB_XHCI_POWER_ON_REQ_R::new(((self.bits >> 14) & 1) != 0) } - #[doc = "Bit 15 - u0_cdn_usb_xhci_power_on_valid"] + #[doc = "Bit 15 - u0_usb_xhci_power_on_valid"] #[inline(always)] - pub fn u0_cdn_usb_xhci_power_on_valid(&self) -> U0_CDN_USB_XHCI_POWER_ON_VALID_R { - U0_CDN_USB_XHCI_POWER_ON_VALID_R::new(((self.bits >> 15) & 1) != 0) + pub fn u0_usb_xhci_power_on_valid(&self) -> U0_USB_XHCI_POWER_ON_VALID_R { + U0_USB_XHCI_POWER_ON_VALID_R::new(((self.bits >> 15) & 1) != 0) } - #[doc = "Bit 16 - u0_e2_sft7110_cease_from_tile_0"] + #[doc = "Bit 16 - u0_e2_cease_from_tile_0"] #[inline(always)] - pub fn u0_e2_sft7110_cease_from_tile_0(&self) -> U0_E2_SFT7110_CEASE_FROM_TILE_0_R { - U0_E2_SFT7110_CEASE_FROM_TILE_0_R::new(((self.bits >> 16) & 1) != 0) + pub fn u0_e2_cease_from_tile_0(&self) -> U0_E2_CEASE_FROM_TILE_0_R { + U0_E2_CEASE_FROM_TILE_0_R::new(((self.bits >> 16) & 1) != 0) } - #[doc = "Bit 17 - u0_e2_sft7110_debug_from_tile_0"] + #[doc = "Bit 17 - u0_e2_debug_from_tile_0"] #[inline(always)] - pub fn u0_e2_sft7110_debug_from_tile_0(&self) -> U0_E2_SFT7110_DEBUG_FROM_TILE_0_R { - U0_E2_SFT7110_DEBUG_FROM_TILE_0_R::new(((self.bits >> 17) & 1) != 0) + pub fn u0_e2_debug_from_tile_0(&self) -> U0_E2_DEBUG_FROM_TILE_0_R { + U0_E2_DEBUG_FROM_TILE_0_R::new(((self.bits >> 17) & 1) != 0) } - #[doc = "Bit 18 - u0_e2_sft7110_halt_from_tile_0"] + #[doc = "Bit 18 - u0_e2_halt_from_tile_0"] #[inline(always)] - pub fn u0_e2_sft7110_halt_from_tile_0(&self) -> U0_E2_SFT7110_HALT_FROM_TILE_0_R { - U0_E2_SFT7110_HALT_FROM_TILE_0_R::new(((self.bits >> 18) & 1) != 0) + pub fn u0_e2_halt_from_tile_0(&self) -> U0_E2_HALT_FROM_TILE_0_R { + U0_E2_HALT_FROM_TILE_0_R::new(((self.bits >> 18) & 1) != 0) } } impl W { - #[doc = "Bits 0:4 - u0_cdn_usb_xhci_debug_sel"] + #[doc = "Bits 0:4 - u0_usb_xhci_debug_sel"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_xhci_debug_sel(&mut self) -> U0_CDN_USB_XHCI_DEBUG_SEL_W { - U0_CDN_USB_XHCI_DEBUG_SEL_W::new(self, 0) + pub fn u0_usb_xhci_debug_sel(&mut self) -> U0_USB_XHCI_DEBUG_SEL_W { + U0_USB_XHCI_DEBUG_SEL_W::new(self, 0) } - #[doc = "Bit 7 - u0_cdn_usb_xhci_main_power_on_ready"] + #[doc = "Bit 7 - u0_usb_xhci_main_power_on_ready"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_xhci_main_power_on_ready( + pub fn u0_usb_xhci_main_power_on_ready( &mut self, - ) -> U0_CDN_USB_XHCI_MAIN_POWER_ON_READY_W { - U0_CDN_USB_XHCI_MAIN_POWER_ON_READY_W::new(self, 7) + ) -> U0_USB_XHCI_MAIN_POWER_ON_READY_W { + U0_USB_XHCI_MAIN_POWER_ON_READY_W::new(self, 7) } - #[doc = "Bit 9 - u0_cdn_usb_xhci_main_power_on_valid"] + #[doc = "Bit 9 - u0_usb_xhci_main_power_on_valid"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_xhci_main_power_on_valid( + pub fn u0_usb_xhci_main_power_on_valid( &mut self, - ) -> U0_CDN_USB_XHCI_MAIN_POWER_ON_VALID_W { - U0_CDN_USB_XHCI_MAIN_POWER_ON_VALID_W::new(self, 9) + ) -> U0_USB_XHCI_MAIN_POWER_ON_VALID_W { + U0_USB_XHCI_MAIN_POWER_ON_VALID_W::new(self, 9) } - #[doc = "Bit 12 - u0_cdn_usb_xhci_power_off_req"] + #[doc = "Bit 12 - u0_usb_xhci_power_off_req"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_xhci_power_off_req( - &mut self, - ) -> U0_CDN_USB_XHCI_POWER_OFF_REQ_W { - U0_CDN_USB_XHCI_POWER_OFF_REQ_W::new(self, 12) + pub fn u0_usb_xhci_power_off_req(&mut self) -> U0_USB_XHCI_POWER_OFF_REQ_W { + U0_USB_XHCI_POWER_OFF_REQ_W::new(self, 12) } - #[doc = "Bit 15 - u0_cdn_usb_xhci_power_on_valid"] + #[doc = "Bit 15 - u0_usb_xhci_power_on_valid"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_xhci_power_on_valid( + pub fn u0_usb_xhci_power_on_valid( &mut self, - ) -> U0_CDN_USB_XHCI_POWER_ON_VALID_W { - U0_CDN_USB_XHCI_POWER_ON_VALID_W::new(self, 15) + ) -> U0_USB_XHCI_POWER_ON_VALID_W { + U0_USB_XHCI_POWER_ON_VALID_W::new(self, 15) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_60.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_60.rs index 8ee91dc..ce50eba 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_60.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_60.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_60` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_351_320` reader - u0_plda_pcie_k_phyparam_351_320"] -pub type U0_PLDA_PCIE_K_PHYPARAM_351_320_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_351_320` writer - u0_plda_pcie_k_phyparam_351_320"] -pub type U0_PLDA_PCIE_K_PHYPARAM_351_320_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_351_320` reader - u0_pcie_k_phyparam_351_320"] +pub type U0_PCIE_K_PHYPARAM_351_320_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_351_320` writer - u0_pcie_k_phyparam_351_320"] +pub type U0_PCIE_K_PHYPARAM_351_320_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_351_320"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_351_320"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_351_320(&self) -> U0_PLDA_PCIE_K_PHYPARAM_351_320_R { - U0_PLDA_PCIE_K_PHYPARAM_351_320_R::new(self.bits) + pub fn u0_pcie_k_phyparam_351_320(&self) -> U0_PCIE_K_PHYPARAM_351_320_R { + U0_PCIE_K_PHYPARAM_351_320_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_351_320"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_351_320"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_351_320( + pub fn u0_pcie_k_phyparam_351_320( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_351_320_W { - U0_PLDA_PCIE_K_PHYPARAM_351_320_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_351_320_W { + U0_PCIE_K_PHYPARAM_351_320_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_61.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_61.rs index 73cd2f0..01c6593 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_61.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_61.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_61` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_383_352` reader - u0_plda_pcie_k_phyparam_383_352"] -pub type U0_PLDA_PCIE_K_PHYPARAM_383_352_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_383_352` writer - u0_plda_pcie_k_phyparam_383_352"] -pub type U0_PLDA_PCIE_K_PHYPARAM_383_352_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_383_352` reader - u0_pcie_k_phyparam_383_352"] +pub type U0_PCIE_K_PHYPARAM_383_352_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_383_352` writer - u0_pcie_k_phyparam_383_352"] +pub type U0_PCIE_K_PHYPARAM_383_352_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_383_352"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_383_352"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_383_352(&self) -> U0_PLDA_PCIE_K_PHYPARAM_383_352_R { - U0_PLDA_PCIE_K_PHYPARAM_383_352_R::new(self.bits) + pub fn u0_pcie_k_phyparam_383_352(&self) -> U0_PCIE_K_PHYPARAM_383_352_R { + U0_PCIE_K_PHYPARAM_383_352_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_383_352"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_383_352"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_383_352( + pub fn u0_pcie_k_phyparam_383_352( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_383_352_W { - U0_PLDA_PCIE_K_PHYPARAM_383_352_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_383_352_W { + U0_PCIE_K_PHYPARAM_383_352_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_62.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_62.rs index c31b2f3..2965218 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_62.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_62.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_62` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_415_384` reader - u0_plda_pcie_k_phyparam_415_384"] -pub type U0_PLDA_PCIE_K_PHYPARAM_415_384_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_415_384` writer - u0_plda_pcie_k_phyparam_415_384"] -pub type U0_PLDA_PCIE_K_PHYPARAM_415_384_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_415_384` reader - u0_pcie_k_phyparam_415_384"] +pub type U0_PCIE_K_PHYPARAM_415_384_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_415_384` writer - u0_pcie_k_phyparam_415_384"] +pub type U0_PCIE_K_PHYPARAM_415_384_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_415_384"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_415_384"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_415_384(&self) -> U0_PLDA_PCIE_K_PHYPARAM_415_384_R { - U0_PLDA_PCIE_K_PHYPARAM_415_384_R::new(self.bits) + pub fn u0_pcie_k_phyparam_415_384(&self) -> U0_PCIE_K_PHYPARAM_415_384_R { + U0_PCIE_K_PHYPARAM_415_384_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_415_384"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_415_384"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_415_384( + pub fn u0_pcie_k_phyparam_415_384( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_415_384_W { - U0_PLDA_PCIE_K_PHYPARAM_415_384_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_415_384_W { + U0_PCIE_K_PHYPARAM_415_384_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_63.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_63.rs index 27f1942..853c252 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_63.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_63.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_63` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_447_416` reader - u0_plda_pcie_k_phyparam_447_416"] -pub type U0_PLDA_PCIE_K_PHYPARAM_447_416_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_447_416` writer - u0_plda_pcie_k_phyparam_447_416"] -pub type U0_PLDA_PCIE_K_PHYPARAM_447_416_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_447_416` reader - u0_pcie_k_phyparam_447_416"] +pub type U0_PCIE_K_PHYPARAM_447_416_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_447_416` writer - u0_pcie_k_phyparam_447_416"] +pub type U0_PCIE_K_PHYPARAM_447_416_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_447_416"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_447_416"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_447_416(&self) -> U0_PLDA_PCIE_K_PHYPARAM_447_416_R { - U0_PLDA_PCIE_K_PHYPARAM_447_416_R::new(self.bits) + pub fn u0_pcie_k_phyparam_447_416(&self) -> U0_PCIE_K_PHYPARAM_447_416_R { + U0_PCIE_K_PHYPARAM_447_416_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_447_416"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_447_416"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_447_416( + pub fn u0_pcie_k_phyparam_447_416( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_447_416_W { - U0_PLDA_PCIE_K_PHYPARAM_447_416_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_447_416_W { + U0_PCIE_K_PHYPARAM_447_416_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_64.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_64.rs index 800b68b..345eee9 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_64.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_64.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_64` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_479_448` reader - u0_plda_pcie_k_phyparam_479_448"] -pub type U0_PLDA_PCIE_K_PHYPARAM_479_448_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_479_448` writer - u0_plda_pcie_k_phyparam_479_448"] -pub type U0_PLDA_PCIE_K_PHYPARAM_479_448_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_479_448` reader - u0_pcie_k_phyparam_479_448"] +pub type U0_PCIE_K_PHYPARAM_479_448_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_479_448` writer - u0_pcie_k_phyparam_479_448"] +pub type U0_PCIE_K_PHYPARAM_479_448_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_479_448"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_479_448"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_479_448(&self) -> U0_PLDA_PCIE_K_PHYPARAM_479_448_R { - U0_PLDA_PCIE_K_PHYPARAM_479_448_R::new(self.bits) + pub fn u0_pcie_k_phyparam_479_448(&self) -> U0_PCIE_K_PHYPARAM_479_448_R { + U0_PCIE_K_PHYPARAM_479_448_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_479_448"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_479_448"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_479_448( + pub fn u0_pcie_k_phyparam_479_448( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_479_448_W { - U0_PLDA_PCIE_K_PHYPARAM_479_448_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_479_448_W { + U0_PCIE_K_PHYPARAM_479_448_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_65.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_65.rs index ce31a0e..c3ba1e7 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_65.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_65.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_65` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_511_480` reader - u0_plda_pcie_k_phyparam_511_480"] -pub type U0_PLDA_PCIE_K_PHYPARAM_511_480_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_511_480` writer - u0_plda_pcie_k_phyparam_511_480"] -pub type U0_PLDA_PCIE_K_PHYPARAM_511_480_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_511_480` reader - u0_pcie_k_phyparam_511_480"] +pub type U0_PCIE_K_PHYPARAM_511_480_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_511_480` writer - u0_pcie_k_phyparam_511_480"] +pub type U0_PCIE_K_PHYPARAM_511_480_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_511_480"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_511_480"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_511_480(&self) -> U0_PLDA_PCIE_K_PHYPARAM_511_480_R { - U0_PLDA_PCIE_K_PHYPARAM_511_480_R::new(self.bits) + pub fn u0_pcie_k_phyparam_511_480(&self) -> U0_PCIE_K_PHYPARAM_511_480_R { + U0_PCIE_K_PHYPARAM_511_480_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_511_480"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_511_480"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_511_480( + pub fn u0_pcie_k_phyparam_511_480( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_511_480_W { - U0_PLDA_PCIE_K_PHYPARAM_511_480_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_511_480_W { + U0_PCIE_K_PHYPARAM_511_480_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_66.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_66.rs index aac5ec5..c5d6415 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_66.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_66.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_66` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_543_512` reader - u0_plda_pcie_k_phyparam_543_512"] -pub type U0_PLDA_PCIE_K_PHYPARAM_543_512_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_543_512` writer - u0_plda_pcie_k_phyparam_543_512"] -pub type U0_PLDA_PCIE_K_PHYPARAM_543_512_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_543_512` reader - u0_pcie_k_phyparam_543_512"] +pub type U0_PCIE_K_PHYPARAM_543_512_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_543_512` writer - u0_pcie_k_phyparam_543_512"] +pub type U0_PCIE_K_PHYPARAM_543_512_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_543_512"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_543_512"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_543_512(&self) -> U0_PLDA_PCIE_K_PHYPARAM_543_512_R { - U0_PLDA_PCIE_K_PHYPARAM_543_512_R::new(self.bits) + pub fn u0_pcie_k_phyparam_543_512(&self) -> U0_PCIE_K_PHYPARAM_543_512_R { + U0_PCIE_K_PHYPARAM_543_512_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_543_512"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_543_512"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_543_512( + pub fn u0_pcie_k_phyparam_543_512( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_543_512_W { - U0_PLDA_PCIE_K_PHYPARAM_543_512_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_543_512_W { + U0_PCIE_K_PHYPARAM_543_512_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_67.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_67.rs index 34d86ce..f760769 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_67.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_67.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_67` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_575_544` reader - u0_plda_pcie_k_phyparam_575_544"] -pub type U0_PLDA_PCIE_K_PHYPARAM_575_544_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_575_544` writer - u0_plda_pcie_k_phyparam_575_544"] -pub type U0_PLDA_PCIE_K_PHYPARAM_575_544_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_575_544` reader - u0_pcie_k_phyparam_575_544"] +pub type U0_PCIE_K_PHYPARAM_575_544_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_575_544` writer - u0_pcie_k_phyparam_575_544"] +pub type U0_PCIE_K_PHYPARAM_575_544_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_575_544"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_575_544"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_575_544(&self) -> U0_PLDA_PCIE_K_PHYPARAM_575_544_R { - U0_PLDA_PCIE_K_PHYPARAM_575_544_R::new(self.bits) + pub fn u0_pcie_k_phyparam_575_544(&self) -> U0_PCIE_K_PHYPARAM_575_544_R { + U0_PCIE_K_PHYPARAM_575_544_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_575_544"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_575_544"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_575_544( + pub fn u0_pcie_k_phyparam_575_544( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_575_544_W { - U0_PLDA_PCIE_K_PHYPARAM_575_544_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_575_544_W { + U0_PCIE_K_PHYPARAM_575_544_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_68.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_68.rs index f1cff6f..4634393 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_68.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_68.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_68` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_607_576` reader - u0_plda_pcie_k_phyparam_607_576"] -pub type U0_PLDA_PCIE_K_PHYPARAM_607_576_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_607_576` writer - u0_plda_pcie_k_phyparam_607_576"] -pub type U0_PLDA_PCIE_K_PHYPARAM_607_576_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_607_576` reader - u0_pcie_k_phyparam_607_576"] +pub type U0_PCIE_K_PHYPARAM_607_576_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_607_576` writer - u0_pcie_k_phyparam_607_576"] +pub type U0_PCIE_K_PHYPARAM_607_576_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_607_576"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_607_576"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_607_576(&self) -> U0_PLDA_PCIE_K_PHYPARAM_607_576_R { - U0_PLDA_PCIE_K_PHYPARAM_607_576_R::new(self.bits) + pub fn u0_pcie_k_phyparam_607_576(&self) -> U0_PCIE_K_PHYPARAM_607_576_R { + U0_PCIE_K_PHYPARAM_607_576_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_607_576"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_607_576"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_607_576( + pub fn u0_pcie_k_phyparam_607_576( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_607_576_W { - U0_PLDA_PCIE_K_PHYPARAM_607_576_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_607_576_W { + U0_PCIE_K_PHYPARAM_607_576_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_69.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_69.rs index b2fb7e4..272b598 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_69.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_69.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_69` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_639_608` reader - u0_plda_pcie_k_phyparam_639_608"] -pub type U0_PLDA_PCIE_K_PHYPARAM_639_608_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_639_608` writer - u0_plda_pcie_k_phyparam_639_608"] -pub type U0_PLDA_PCIE_K_PHYPARAM_639_608_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_639_608` reader - u0_pcie_k_phyparam_639_608"] +pub type U0_PCIE_K_PHYPARAM_639_608_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_639_608` writer - u0_pcie_k_phyparam_639_608"] +pub type U0_PCIE_K_PHYPARAM_639_608_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_639_608"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_639_608"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_639_608(&self) -> U0_PLDA_PCIE_K_PHYPARAM_639_608_R { - U0_PLDA_PCIE_K_PHYPARAM_639_608_R::new(self.bits) + pub fn u0_pcie_k_phyparam_639_608(&self) -> U0_PCIE_K_PHYPARAM_639_608_R { + U0_PCIE_K_PHYPARAM_639_608_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_639_608"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_639_608"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_639_608( + pub fn u0_pcie_k_phyparam_639_608( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_639_608_W { - U0_PLDA_PCIE_K_PHYPARAM_639_608_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_639_608_W { + U0_PCIE_K_PHYPARAM_639_608_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_7.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_7.rs index 9380f1d..e8dab01 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_7.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_7.rs @@ -2,28 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_7` writer"] pub type W = crate::W; -#[doc = "Field `u0_e2_sft7110_nmi_0_rnmi_exception_vector` reader - u0_e2_sft7110_nmi_0_rnmi_exception_vector"] -pub type U0_E2_SFT7110_NMI_0_RNMI_EXCEPTION_VECTOR_R = crate::FieldReader; -#[doc = "Field `u0_e2_sft7110_nmi_0_rnmi_exception_vector` writer - u0_e2_sft7110_nmi_0_rnmi_exception_vector"] -pub type U0_E2_SFT7110_NMI_0_RNMI_EXCEPTION_VECTOR_W<'a, REG> = - crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_e2_nmi_exception_vector` reader - u0_e2_nmi_exception_vector"] +pub type U0_E2_NMI_EXCEPTION_VECTOR_R = crate::FieldReader; +#[doc = "Field `u0_e2_nmi_exception_vector` writer - u0_e2_nmi_exception_vector"] +pub type U0_E2_NMI_EXCEPTION_VECTOR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_e2_sft7110_nmi_0_rnmi_exception_vector"] + #[doc = "Bits 0:31 - u0_e2_nmi_exception_vector"] #[inline(always)] - pub fn u0_e2_sft7110_nmi_0_rnmi_exception_vector( - &self, - ) -> U0_E2_SFT7110_NMI_0_RNMI_EXCEPTION_VECTOR_R { - U0_E2_SFT7110_NMI_0_RNMI_EXCEPTION_VECTOR_R::new(self.bits) + pub fn u0_e2_nmi_exception_vector(&self) -> U0_E2_NMI_EXCEPTION_VECTOR_R { + U0_E2_NMI_EXCEPTION_VECTOR_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_e2_sft7110_nmi_0_rnmi_exception_vector"] + #[doc = "Bits 0:31 - u0_e2_nmi_exception_vector"] #[inline(always)] #[must_use] - pub fn u0_e2_sft7110_nmi_0_rnmi_exception_vector( + pub fn u0_e2_nmi_exception_vector( &mut self, - ) -> U0_E2_SFT7110_NMI_0_RNMI_EXCEPTION_VECTOR_W { - U0_E2_SFT7110_NMI_0_RNMI_EXCEPTION_VECTOR_W::new(self, 0) + ) -> U0_E2_NMI_EXCEPTION_VECTOR_W { + U0_E2_NMI_EXCEPTION_VECTOR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_70.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_70.rs index 23acb07..4c9fa69 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_70.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_70.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_70` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_671_640` reader - u0_plda_pcie_k_phyparam_671_640"] -pub type U0_PLDA_PCIE_K_PHYPARAM_671_640_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_671_640` writer - u0_plda_pcie_k_phyparam_671_640"] -pub type U0_PLDA_PCIE_K_PHYPARAM_671_640_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_671_640` reader - u0_pcie_k_phyparam_671_640"] +pub type U0_PCIE_K_PHYPARAM_671_640_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_671_640` writer - u0_pcie_k_phyparam_671_640"] +pub type U0_PCIE_K_PHYPARAM_671_640_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_671_640"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_671_640"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_671_640(&self) -> U0_PLDA_PCIE_K_PHYPARAM_671_640_R { - U0_PLDA_PCIE_K_PHYPARAM_671_640_R::new(self.bits) + pub fn u0_pcie_k_phyparam_671_640(&self) -> U0_PCIE_K_PHYPARAM_671_640_R { + U0_PCIE_K_PHYPARAM_671_640_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_671_640"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_671_640"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_671_640( + pub fn u0_pcie_k_phyparam_671_640( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_671_640_W { - U0_PLDA_PCIE_K_PHYPARAM_671_640_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_671_640_W { + U0_PCIE_K_PHYPARAM_671_640_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_71.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_71.rs index c8e319f..09891d4 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_71.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_71.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_71` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_703_672` reader - u0_plda_pcie_k_phyparam_703_672"] -pub type U0_PLDA_PCIE_K_PHYPARAM_703_672_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_703_672` writer - u0_plda_pcie_k_phyparam_703_672"] -pub type U0_PLDA_PCIE_K_PHYPARAM_703_672_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_703_672` reader - u0_pcie_k_phyparam_703_672"] +pub type U0_PCIE_K_PHYPARAM_703_672_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_703_672` writer - u0_pcie_k_phyparam_703_672"] +pub type U0_PCIE_K_PHYPARAM_703_672_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_703_672"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_703_672"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_703_672(&self) -> U0_PLDA_PCIE_K_PHYPARAM_703_672_R { - U0_PLDA_PCIE_K_PHYPARAM_703_672_R::new(self.bits) + pub fn u0_pcie_k_phyparam_703_672(&self) -> U0_PCIE_K_PHYPARAM_703_672_R { + U0_PCIE_K_PHYPARAM_703_672_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_703_672"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_703_672"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_703_672( + pub fn u0_pcie_k_phyparam_703_672( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_703_672_W { - U0_PLDA_PCIE_K_PHYPARAM_703_672_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_703_672_W { + U0_PCIE_K_PHYPARAM_703_672_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_72.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_72.rs index e7a3ba7..16501cc 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_72.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_72.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_72` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_735_704` reader - u0_plda_pcie_k_phyparam_735_704"] -pub type U0_PLDA_PCIE_K_PHYPARAM_735_704_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_735_704` writer - u0_plda_pcie_k_phyparam_735_704"] -pub type U0_PLDA_PCIE_K_PHYPARAM_735_704_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_735_704` reader - u0_pcie_k_phyparam_735_704"] +pub type U0_PCIE_K_PHYPARAM_735_704_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_735_704` writer - u0_pcie_k_phyparam_735_704"] +pub type U0_PCIE_K_PHYPARAM_735_704_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_735_704"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_735_704"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_735_704(&self) -> U0_PLDA_PCIE_K_PHYPARAM_735_704_R { - U0_PLDA_PCIE_K_PHYPARAM_735_704_R::new(self.bits) + pub fn u0_pcie_k_phyparam_735_704(&self) -> U0_PCIE_K_PHYPARAM_735_704_R { + U0_PCIE_K_PHYPARAM_735_704_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_735_704"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_735_704"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_735_704( + pub fn u0_pcie_k_phyparam_735_704( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_735_704_W { - U0_PLDA_PCIE_K_PHYPARAM_735_704_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_735_704_W { + U0_PCIE_K_PHYPARAM_735_704_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_73.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_73.rs index d5c31c3..a2599c5 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_73.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_73.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_73` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_767_736` reader - u0_plda_pcie_k_phyparam_767_736"] -pub type U0_PLDA_PCIE_K_PHYPARAM_767_736_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_767_736` writer - u0_plda_pcie_k_phyparam_767_736"] -pub type U0_PLDA_PCIE_K_PHYPARAM_767_736_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_767_736` reader - u0_pcie_k_phyparam_767_736"] +pub type U0_PCIE_K_PHYPARAM_767_736_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_767_736` writer - u0_pcie_k_phyparam_767_736"] +pub type U0_PCIE_K_PHYPARAM_767_736_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_767_736"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_767_736"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_767_736(&self) -> U0_PLDA_PCIE_K_PHYPARAM_767_736_R { - U0_PLDA_PCIE_K_PHYPARAM_767_736_R::new(self.bits) + pub fn u0_pcie_k_phyparam_767_736(&self) -> U0_PCIE_K_PHYPARAM_767_736_R { + U0_PCIE_K_PHYPARAM_767_736_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_767_736"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_767_736"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_767_736( + pub fn u0_pcie_k_phyparam_767_736( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_767_736_W { - U0_PLDA_PCIE_K_PHYPARAM_767_736_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_767_736_W { + U0_PCIE_K_PHYPARAM_767_736_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_74.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_74.rs index 60242f5..754a5c2 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_74.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_74.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_74` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_799_768` reader - u0_plda_pcie_k_phyparam_799_768"] -pub type U0_PLDA_PCIE_K_PHYPARAM_799_768_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_799_768` writer - u0_plda_pcie_k_phyparam_799_768"] -pub type U0_PLDA_PCIE_K_PHYPARAM_799_768_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_799_768` reader - u0_pcie_k_phyparam_799_768"] +pub type U0_PCIE_K_PHYPARAM_799_768_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_799_768` writer - u0_pcie_k_phyparam_799_768"] +pub type U0_PCIE_K_PHYPARAM_799_768_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_799_768"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_799_768"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_799_768(&self) -> U0_PLDA_PCIE_K_PHYPARAM_799_768_R { - U0_PLDA_PCIE_K_PHYPARAM_799_768_R::new(self.bits) + pub fn u0_pcie_k_phyparam_799_768(&self) -> U0_PCIE_K_PHYPARAM_799_768_R { + U0_PCIE_K_PHYPARAM_799_768_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_799_768"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_799_768"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_799_768( + pub fn u0_pcie_k_phyparam_799_768( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_799_768_W { - U0_PLDA_PCIE_K_PHYPARAM_799_768_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_799_768_W { + U0_PCIE_K_PHYPARAM_799_768_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_75.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_75.rs index 6ca96be..03acd82 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_75.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_75.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_75` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_831_800` reader - u0_plda_pcie_k_phyparam_831_800"] -pub type U0_PLDA_PCIE_K_PHYPARAM_831_800_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_831_800` writer - u0_plda_pcie_k_phyparam_831_800"] -pub type U0_PLDA_PCIE_K_PHYPARAM_831_800_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_831_800` reader - u0_pcie_k_phyparam_831_800"] +pub type U0_PCIE_K_PHYPARAM_831_800_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_831_800` writer - u0_pcie_k_phyparam_831_800"] +pub type U0_PCIE_K_PHYPARAM_831_800_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_831_800"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_831_800"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_831_800(&self) -> U0_PLDA_PCIE_K_PHYPARAM_831_800_R { - U0_PLDA_PCIE_K_PHYPARAM_831_800_R::new(self.bits) + pub fn u0_pcie_k_phyparam_831_800(&self) -> U0_PCIE_K_PHYPARAM_831_800_R { + U0_PCIE_K_PHYPARAM_831_800_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_831_800"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_831_800"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_831_800( + pub fn u0_pcie_k_phyparam_831_800( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_831_800_W { - U0_PLDA_PCIE_K_PHYPARAM_831_800_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_831_800_W { + U0_PCIE_K_PHYPARAM_831_800_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_76.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_76.rs index 5f3b3b1..4ae9d2e 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_76.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_76.rs @@ -2,62 +2,62 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_76` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_839_832` reader - u0_plda_pcie_k_phyparam_839_832"] -pub type U0_PLDA_PCIE_K_PHYPARAM_839_832_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_839_832` writer - u0_plda_pcie_k_phyparam_839_832"] -pub type U0_PLDA_PCIE_K_PHYPARAM_839_832_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `u0_plda_pcie_k_rp_nep` reader - u0_plda_pcie_k_rp_nep"] -pub type U0_PLDA_PCIE_K_RP_NEP_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_k_rp_nep` writer - u0_plda_pcie_k_rp_nep"] -pub type U0_PLDA_PCIE_K_RP_NEP_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_l1sub_entack` reader - u0_plda_pcie_l1sub_entack"] -pub type U0_PLDA_PCIE_L1SUB_ENTACK_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_l1sub_entreq` reader - u0_plda_pcie_l1sub_entreq"] -pub type U0_PLDA_PCIE_L1SUB_ENTREQ_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_l1sub_entreq` writer - u0_plda_pcie_l1sub_entreq"] -pub type U0_PLDA_PCIE_L1SUB_ENTREQ_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_k_phyparam_839_832` reader - u0_pcie_k_phyparam_839_832"] +pub type U0_PCIE_K_PHYPARAM_839_832_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_839_832` writer - u0_pcie_k_phyparam_839_832"] +pub type U0_PCIE_K_PHYPARAM_839_832_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `u0_pcie_k_rp_nep` reader - u0_pcie_k_rp_nep"] +pub type U0_PCIE_K_RP_NEP_R = crate::BitReader; +#[doc = "Field `u0_pcie_k_rp_nep` writer - u0_pcie_k_rp_nep"] +pub type U0_PCIE_K_RP_NEP_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_l1sub_entack` reader - u0_pcie_l1sub_entack"] +pub type U0_PCIE_L1SUB_ENTACK_R = crate::BitReader; +#[doc = "Field `u0_pcie_l1sub_entreq` reader - u0_pcie_l1sub_entreq"] +pub type U0_PCIE_L1SUB_ENTREQ_R = crate::BitReader; +#[doc = "Field `u0_pcie_l1sub_entreq` writer - u0_pcie_l1sub_entreq"] +pub type U0_PCIE_L1SUB_ENTREQ_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bits 0:7 - u0_plda_pcie_k_phyparam_839_832"] + #[doc = "Bits 0:7 - u0_pcie_k_phyparam_839_832"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_839_832(&self) -> U0_PLDA_PCIE_K_PHYPARAM_839_832_R { - U0_PLDA_PCIE_K_PHYPARAM_839_832_R::new((self.bits & 0xff) as u8) + pub fn u0_pcie_k_phyparam_839_832(&self) -> U0_PCIE_K_PHYPARAM_839_832_R { + U0_PCIE_K_PHYPARAM_839_832_R::new((self.bits & 0xff) as u8) } - #[doc = "Bit 8 - u0_plda_pcie_k_rp_nep"] + #[doc = "Bit 8 - u0_pcie_k_rp_nep"] #[inline(always)] - pub fn u0_plda_pcie_k_rp_nep(&self) -> U0_PLDA_PCIE_K_RP_NEP_R { - U0_PLDA_PCIE_K_RP_NEP_R::new(((self.bits >> 8) & 1) != 0) + pub fn u0_pcie_k_rp_nep(&self) -> U0_PCIE_K_RP_NEP_R { + U0_PCIE_K_RP_NEP_R::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 9 - u0_plda_pcie_l1sub_entack"] + #[doc = "Bit 9 - u0_pcie_l1sub_entack"] #[inline(always)] - pub fn u0_plda_pcie_l1sub_entack(&self) -> U0_PLDA_PCIE_L1SUB_ENTACK_R { - U0_PLDA_PCIE_L1SUB_ENTACK_R::new(((self.bits >> 9) & 1) != 0) + pub fn u0_pcie_l1sub_entack(&self) -> U0_PCIE_L1SUB_ENTACK_R { + U0_PCIE_L1SUB_ENTACK_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 10 - u0_plda_pcie_l1sub_entreq"] + #[doc = "Bit 10 - u0_pcie_l1sub_entreq"] #[inline(always)] - pub fn u0_plda_pcie_l1sub_entreq(&self) -> U0_PLDA_PCIE_L1SUB_ENTREQ_R { - U0_PLDA_PCIE_L1SUB_ENTREQ_R::new(((self.bits >> 10) & 1) != 0) + pub fn u0_pcie_l1sub_entreq(&self) -> U0_PCIE_L1SUB_ENTREQ_R { + U0_PCIE_L1SUB_ENTREQ_R::new(((self.bits >> 10) & 1) != 0) } } impl W { - #[doc = "Bits 0:7 - u0_plda_pcie_k_phyparam_839_832"] + #[doc = "Bits 0:7 - u0_pcie_k_phyparam_839_832"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_839_832( + pub fn u0_pcie_k_phyparam_839_832( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_839_832_W { - U0_PLDA_PCIE_K_PHYPARAM_839_832_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_839_832_W { + U0_PCIE_K_PHYPARAM_839_832_W::new(self, 0) } - #[doc = "Bit 8 - u0_plda_pcie_k_rp_nep"] + #[doc = "Bit 8 - u0_pcie_k_rp_nep"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_rp_nep(&mut self) -> U0_PLDA_PCIE_K_RP_NEP_W { - U0_PLDA_PCIE_K_RP_NEP_W::new(self, 8) + pub fn u0_pcie_k_rp_nep(&mut self) -> U0_PCIE_K_RP_NEP_W { + U0_PCIE_K_RP_NEP_W::new(self, 8) } - #[doc = "Bit 10 - u0_plda_pcie_l1sub_entreq"] + #[doc = "Bit 10 - u0_pcie_l1sub_entreq"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_l1sub_entreq(&mut self) -> U0_PLDA_PCIE_L1SUB_ENTREQ_W { - U0_PLDA_PCIE_L1SUB_ENTREQ_W::new(self, 10) + pub fn u0_pcie_l1sub_entreq(&mut self) -> U0_PCIE_L1SUB_ENTREQ_W { + U0_PCIE_L1SUB_ENTREQ_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_77.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_77.rs index 4f996d8..b0d471c 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_77.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_77.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_77` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_local_interrupt_in` reader - u0_plda_pcie_local_interrupt_in"] -pub type U0_PLDA_PCIE_LOCAL_INTERRUPT_IN_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_local_interrupt_in` writer - u0_plda_pcie_local_interrupt_in"] -pub type U0_PLDA_PCIE_LOCAL_INTERRUPT_IN_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_local_interrupt_in` reader - u0_pcie_local_interrupt_in"] +pub type U0_PCIE_LOCAL_INTERRUPT_IN_R = crate::FieldReader; +#[doc = "Field `u0_pcie_local_interrupt_in` writer - u0_pcie_local_interrupt_in"] +pub type U0_PCIE_LOCAL_INTERRUPT_IN_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_local_interrupt_in"] + #[doc = "Bits 0:31 - u0_pcie_local_interrupt_in"] #[inline(always)] - pub fn u0_plda_pcie_local_interrupt_in(&self) -> U0_PLDA_PCIE_LOCAL_INTERRUPT_IN_R { - U0_PLDA_PCIE_LOCAL_INTERRUPT_IN_R::new(self.bits) + pub fn u0_pcie_local_interrupt_in(&self) -> U0_PCIE_LOCAL_INTERRUPT_IN_R { + U0_PCIE_LOCAL_INTERRUPT_IN_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_local_interrupt_in"] + #[doc = "Bits 0:31 - u0_pcie_local_interrupt_in"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_local_interrupt_in( + pub fn u0_pcie_local_interrupt_in( &mut self, - ) -> U0_PLDA_PCIE_LOCAL_INTERRUPT_IN_W { - U0_PLDA_PCIE_LOCAL_INTERRUPT_IN_W::new(self, 0) + ) -> U0_PCIE_LOCAL_INTERRUPT_IN_W { + U0_PCIE_LOCAL_INTERRUPT_IN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_78.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_78.rs index 791c478..cd2e6aa 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_78.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_78.rs @@ -2,108 +2,100 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_78` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_mperstn` reader - u0_plda_pcie_mperstn"] -pub type U0_PLDA_PCIE_MPERSTN_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_mperstn` writer - u0_plda_pcie_mperstn"] -pub type U0_PLDA_PCIE_MPERSTN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_pcie_ebuf_mode` reader - u0_plda_pcie_pcie_ebuf_mode"] -pub type U0_PLDA_PCIE_PCIE_EBUF_MODE_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_pcie_ebuf_mode` writer - u0_plda_pcie_pcie_ebuf_mode"] -pub type U0_PLDA_PCIE_PCIE_EBUF_MODE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_pcie_phy_test_cfg` reader - u0_plda_pcie_pcie_phy_test_cfg"] -pub type U0_PLDA_PCIE_PCIE_PHY_TEST_CFG_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_pcie_phy_test_cfg` writer - u0_plda_pcie_pcie_phy_test_cfg"] -pub type U0_PLDA_PCIE_PCIE_PHY_TEST_CFG_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; -#[doc = "Field `u0_plda_pcie_pcie_rx_eq_training` reader - u0_plda_pcie_pcie_rx_eq_training"] -pub type U0_PLDA_PCIE_PCIE_RX_EQ_TRAINING_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_pcie_rx_eq_training` writer - u0_plda_pcie_pcie_rx_eq_training"] -pub type U0_PLDA_PCIE_PCIE_RX_EQ_TRAINING_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_pcie_rxterm_en` reader - u0_plda_pcie_pcie_rxterm_en"] -pub type U0_PLDA_PCIE_PCIE_RXTERM_EN_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_pcie_rxterm_en` writer - u0_plda_pcie_pcie_rxterm_en"] -pub type U0_PLDA_PCIE_PCIE_RXTERM_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_pcie_tx_onezeros` reader - u0_plda_pcie_pcie_tx_onezeros"] -pub type U0_PLDA_PCIE_PCIE_TX_ONEZEROS_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_pcie_tx_onezeros` writer - u0_plda_pcie_pcie_tx_onezeros"] -pub type U0_PLDA_PCIE_PCIE_TX_ONEZEROS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_mperstn` reader - u0_pcie_mperstn"] +pub type U0_PCIE_MPERSTN_R = crate::BitReader; +#[doc = "Field `u0_pcie_mperstn` writer - u0_pcie_mperstn"] +pub type U0_PCIE_MPERSTN_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_pcie_ebuf_mode` reader - u0_pcie_pcie_ebuf_mode"] +pub type U0_PCIE_PCIE_EBUF_MODE_R = crate::BitReader; +#[doc = "Field `u0_pcie_pcie_ebuf_mode` writer - u0_pcie_pcie_ebuf_mode"] +pub type U0_PCIE_PCIE_EBUF_MODE_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_pcie_phy_test_cfg` reader - u0_pcie_pcie_phy_test_cfg"] +pub type U0_PCIE_PCIE_PHY_TEST_CFG_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pcie_phy_test_cfg` writer - u0_pcie_pcie_phy_test_cfg"] +pub type U0_PCIE_PCIE_PHY_TEST_CFG_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; +#[doc = "Field `u0_pcie_pcie_rx_eq_training` reader - u0_pcie_pcie_rx_eq_training"] +pub type U0_PCIE_PCIE_RX_EQ_TRAINING_R = crate::BitReader; +#[doc = "Field `u0_pcie_pcie_rx_eq_training` writer - u0_pcie_pcie_rx_eq_training"] +pub type U0_PCIE_PCIE_RX_EQ_TRAINING_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_pcie_rxterm_en` reader - u0_pcie_pcie_rxterm_en"] +pub type U0_PCIE_PCIE_RXTERM_EN_R = crate::BitReader; +#[doc = "Field `u0_pcie_pcie_rxterm_en` writer - u0_pcie_pcie_rxterm_en"] +pub type U0_PCIE_PCIE_RXTERM_EN_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_pcie_tx_onezeros` reader - u0_pcie_pcie_tx_onezeros"] +pub type U0_PCIE_PCIE_TX_ONEZEROS_R = crate::BitReader; +#[doc = "Field `u0_pcie_pcie_tx_onezeros` writer - u0_pcie_pcie_tx_onezeros"] +pub type U0_PCIE_PCIE_TX_ONEZEROS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 0 - u0_plda_pcie_mperstn"] + #[doc = "Bit 0 - u0_pcie_mperstn"] #[inline(always)] - pub fn u0_plda_pcie_mperstn(&self) -> U0_PLDA_PCIE_MPERSTN_R { - U0_PLDA_PCIE_MPERSTN_R::new((self.bits & 1) != 0) + pub fn u0_pcie_mperstn(&self) -> U0_PCIE_MPERSTN_R { + U0_PCIE_MPERSTN_R::new((self.bits & 1) != 0) } - #[doc = "Bit 1 - u0_plda_pcie_pcie_ebuf_mode"] + #[doc = "Bit 1 - u0_pcie_pcie_ebuf_mode"] #[inline(always)] - pub fn u0_plda_pcie_pcie_ebuf_mode(&self) -> U0_PLDA_PCIE_PCIE_EBUF_MODE_R { - U0_PLDA_PCIE_PCIE_EBUF_MODE_R::new(((self.bits >> 1) & 1) != 0) + pub fn u0_pcie_pcie_ebuf_mode(&self) -> U0_PCIE_PCIE_EBUF_MODE_R { + U0_PCIE_PCIE_EBUF_MODE_R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bits 2:24 - u0_plda_pcie_pcie_phy_test_cfg"] + #[doc = "Bits 2:24 - u0_pcie_pcie_phy_test_cfg"] #[inline(always)] - pub fn u0_plda_pcie_pcie_phy_test_cfg(&self) -> U0_PLDA_PCIE_PCIE_PHY_TEST_CFG_R { - U0_PLDA_PCIE_PCIE_PHY_TEST_CFG_R::new((self.bits >> 2) & 0x007f_ffff) + pub fn u0_pcie_pcie_phy_test_cfg(&self) -> U0_PCIE_PCIE_PHY_TEST_CFG_R { + U0_PCIE_PCIE_PHY_TEST_CFG_R::new((self.bits >> 2) & 0x007f_ffff) } - #[doc = "Bit 25 - u0_plda_pcie_pcie_rx_eq_training"] + #[doc = "Bit 25 - u0_pcie_pcie_rx_eq_training"] #[inline(always)] - pub fn u0_plda_pcie_pcie_rx_eq_training(&self) -> U0_PLDA_PCIE_PCIE_RX_EQ_TRAINING_R { - U0_PLDA_PCIE_PCIE_RX_EQ_TRAINING_R::new(((self.bits >> 25) & 1) != 0) + pub fn u0_pcie_pcie_rx_eq_training(&self) -> U0_PCIE_PCIE_RX_EQ_TRAINING_R { + U0_PCIE_PCIE_RX_EQ_TRAINING_R::new(((self.bits >> 25) & 1) != 0) } - #[doc = "Bit 26 - u0_plda_pcie_pcie_rxterm_en"] + #[doc = "Bit 26 - u0_pcie_pcie_rxterm_en"] #[inline(always)] - pub fn u0_plda_pcie_pcie_rxterm_en(&self) -> U0_PLDA_PCIE_PCIE_RXTERM_EN_R { - U0_PLDA_PCIE_PCIE_RXTERM_EN_R::new(((self.bits >> 26) & 1) != 0) + pub fn u0_pcie_pcie_rxterm_en(&self) -> U0_PCIE_PCIE_RXTERM_EN_R { + U0_PCIE_PCIE_RXTERM_EN_R::new(((self.bits >> 26) & 1) != 0) } - #[doc = "Bit 27 - u0_plda_pcie_pcie_tx_onezeros"] + #[doc = "Bit 27 - u0_pcie_pcie_tx_onezeros"] #[inline(always)] - pub fn u0_plda_pcie_pcie_tx_onezeros(&self) -> U0_PLDA_PCIE_PCIE_TX_ONEZEROS_R { - U0_PLDA_PCIE_PCIE_TX_ONEZEROS_R::new(((self.bits >> 27) & 1) != 0) + pub fn u0_pcie_pcie_tx_onezeros(&self) -> U0_PCIE_PCIE_TX_ONEZEROS_R { + U0_PCIE_PCIE_TX_ONEZEROS_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bit 0 - u0_plda_pcie_mperstn"] + #[doc = "Bit 0 - u0_pcie_mperstn"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_mperstn(&mut self) -> U0_PLDA_PCIE_MPERSTN_W { - U0_PLDA_PCIE_MPERSTN_W::new(self, 0) + pub fn u0_pcie_mperstn(&mut self) -> U0_PCIE_MPERSTN_W { + U0_PCIE_MPERSTN_W::new(self, 0) } - #[doc = "Bit 1 - u0_plda_pcie_pcie_ebuf_mode"] + #[doc = "Bit 1 - u0_pcie_pcie_ebuf_mode"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pcie_ebuf_mode( - &mut self, - ) -> U0_PLDA_PCIE_PCIE_EBUF_MODE_W { - U0_PLDA_PCIE_PCIE_EBUF_MODE_W::new(self, 1) + pub fn u0_pcie_pcie_ebuf_mode(&mut self) -> U0_PCIE_PCIE_EBUF_MODE_W { + U0_PCIE_PCIE_EBUF_MODE_W::new(self, 1) } - #[doc = "Bits 2:24 - u0_plda_pcie_pcie_phy_test_cfg"] + #[doc = "Bits 2:24 - u0_pcie_pcie_phy_test_cfg"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pcie_phy_test_cfg( - &mut self, - ) -> U0_PLDA_PCIE_PCIE_PHY_TEST_CFG_W { - U0_PLDA_PCIE_PCIE_PHY_TEST_CFG_W::new(self, 2) + pub fn u0_pcie_pcie_phy_test_cfg(&mut self) -> U0_PCIE_PCIE_PHY_TEST_CFG_W { + U0_PCIE_PCIE_PHY_TEST_CFG_W::new(self, 2) } - #[doc = "Bit 25 - u0_plda_pcie_pcie_rx_eq_training"] + #[doc = "Bit 25 - u0_pcie_pcie_rx_eq_training"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pcie_rx_eq_training( + pub fn u0_pcie_pcie_rx_eq_training( &mut self, - ) -> U0_PLDA_PCIE_PCIE_RX_EQ_TRAINING_W { - U0_PLDA_PCIE_PCIE_RX_EQ_TRAINING_W::new(self, 25) + ) -> U0_PCIE_PCIE_RX_EQ_TRAINING_W { + U0_PCIE_PCIE_RX_EQ_TRAINING_W::new(self, 25) } - #[doc = "Bit 26 - u0_plda_pcie_pcie_rxterm_en"] + #[doc = "Bit 26 - u0_pcie_pcie_rxterm_en"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pcie_rxterm_en( - &mut self, - ) -> U0_PLDA_PCIE_PCIE_RXTERM_EN_W { - U0_PLDA_PCIE_PCIE_RXTERM_EN_W::new(self, 26) + pub fn u0_pcie_pcie_rxterm_en(&mut self) -> U0_PCIE_PCIE_RXTERM_EN_W { + U0_PCIE_PCIE_RXTERM_EN_W::new(self, 26) } - #[doc = "Bit 27 - u0_plda_pcie_pcie_tx_onezeros"] + #[doc = "Bit 27 - u0_pcie_pcie_tx_onezeros"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pcie_tx_onezeros( - &mut self, - ) -> U0_PLDA_PCIE_PCIE_TX_ONEZEROS_W { - U0_PLDA_PCIE_PCIE_TX_ONEZEROS_W::new(self, 27) + pub fn u0_pcie_pcie_tx_onezeros(&mut self) -> U0_PCIE_PCIE_TX_ONEZEROS_W { + U0_PCIE_PCIE_TX_ONEZEROS_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_79.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_79.rs index b41d34c..2cab867 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_79.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_79.rs @@ -2,23 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_79` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pf0_offset` reader - u0_plda_pcie_pf0_offset"] -pub type U0_PLDA_PCIE_PF0_OFFSET_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_pf0_offset` writer - u0_plda_pcie_pf0_offset"] -pub type U0_PLDA_PCIE_PF0_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `u0_pcie_pf0_offset` reader - u0_pcie_pf0_offset"] +pub type U0_PCIE_PF0_OFFSET_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pf0_offset` writer - u0_pcie_pf0_offset"] +pub type U0_PCIE_PF0_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { - #[doc = "Bits 0:19 - u0_plda_pcie_pf0_offset"] + #[doc = "Bits 0:19 - u0_pcie_pf0_offset"] #[inline(always)] - pub fn u0_plda_pcie_pf0_offset(&self) -> U0_PLDA_PCIE_PF0_OFFSET_R { - U0_PLDA_PCIE_PF0_OFFSET_R::new(self.bits & 0x000f_ffff) + pub fn u0_pcie_pf0_offset(&self) -> U0_PCIE_PF0_OFFSET_R { + U0_PCIE_PF0_OFFSET_R::new(self.bits & 0x000f_ffff) } } impl W { - #[doc = "Bits 0:19 - u0_plda_pcie_pf0_offset"] + #[doc = "Bits 0:19 - u0_pcie_pf0_offset"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pf0_offset(&mut self) -> U0_PLDA_PCIE_PF0_OFFSET_W { - U0_PLDA_PCIE_PF0_OFFSET_W::new(self, 0) + pub fn u0_pcie_pf0_offset(&mut self) -> U0_PCIE_PF0_OFFSET_W { + U0_PCIE_PF0_OFFSET_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_8.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_8.rs index 8cea2bd..eed2480 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_8.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_8.rs @@ -2,28 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_8` writer"] pub type W = crate::W; -#[doc = "Field `u0_e2_sft7110_nmi_0_rnmi_interrupt_vector` reader - u0_e2_sft7110_nmi_0_rnmi_interrupt_vector"] -pub type U0_E2_SFT7110_NMI_0_RNMI_INTERRUPT_VECTOR_R = crate::FieldReader; -#[doc = "Field `u0_e2_sft7110_nmi_0_rnmi_interrupt_vector` writer - u0_e2_sft7110_nmi_0_rnmi_interrupt_vector"] -pub type U0_E2_SFT7110_NMI_0_RNMI_INTERRUPT_VECTOR_W<'a, REG> = - crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_e2_nmi_interrupt_vector` reader - u0_e2_nmi_interrupt_vector"] +pub type U0_E2_NMI_INTERRUPT_VECTOR_R = crate::FieldReader; +#[doc = "Field `u0_e2_nmi_interrupt_vector` writer - u0_e2_nmi_interrupt_vector"] +pub type U0_E2_NMI_INTERRUPT_VECTOR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_e2_sft7110_nmi_0_rnmi_interrupt_vector"] + #[doc = "Bits 0:31 - u0_e2_nmi_interrupt_vector"] #[inline(always)] - pub fn u0_e2_sft7110_nmi_0_rnmi_interrupt_vector( - &self, - ) -> U0_E2_SFT7110_NMI_0_RNMI_INTERRUPT_VECTOR_R { - U0_E2_SFT7110_NMI_0_RNMI_INTERRUPT_VECTOR_R::new(self.bits) + pub fn u0_e2_nmi_interrupt_vector(&self) -> U0_E2_NMI_INTERRUPT_VECTOR_R { + U0_E2_NMI_INTERRUPT_VECTOR_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_e2_sft7110_nmi_0_rnmi_interrupt_vector"] + #[doc = "Bits 0:31 - u0_e2_nmi_interrupt_vector"] #[inline(always)] #[must_use] - pub fn u0_e2_sft7110_nmi_0_rnmi_interrupt_vector( + pub fn u0_e2_nmi_interrupt_vector( &mut self, - ) -> U0_E2_SFT7110_NMI_0_RNMI_INTERRUPT_VECTOR_W { - U0_E2_SFT7110_NMI_0_RNMI_INTERRUPT_VECTOR_W::new(self, 0) + ) -> U0_E2_NMI_INTERRUPT_VECTOR_W { + U0_E2_NMI_INTERRUPT_VECTOR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_80.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_80.rs index c3516ff..a2ef156 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_80.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_80.rs @@ -2,23 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_80` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pf1_offset` reader - u0_plda_pcie_pf1_offset"] -pub type U0_PLDA_PCIE_PF1_OFFSET_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_pf1_offset` writer - u0_plda_pcie_pf1_offset"] -pub type U0_PLDA_PCIE_PF1_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `u0_pcie_pf1_offset` reader - u0_pcie_pf1_offset"] +pub type U0_PCIE_PF1_OFFSET_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pf1_offset` writer - u0_pcie_pf1_offset"] +pub type U0_PCIE_PF1_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { - #[doc = "Bits 0:19 - u0_plda_pcie_pf1_offset"] + #[doc = "Bits 0:19 - u0_pcie_pf1_offset"] #[inline(always)] - pub fn u0_plda_pcie_pf1_offset(&self) -> U0_PLDA_PCIE_PF1_OFFSET_R { - U0_PLDA_PCIE_PF1_OFFSET_R::new(self.bits & 0x000f_ffff) + pub fn u0_pcie_pf1_offset(&self) -> U0_PCIE_PF1_OFFSET_R { + U0_PCIE_PF1_OFFSET_R::new(self.bits & 0x000f_ffff) } } impl W { - #[doc = "Bits 0:19 - u0_plda_pcie_pf1_offset"] + #[doc = "Bits 0:19 - u0_pcie_pf1_offset"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pf1_offset(&mut self) -> U0_PLDA_PCIE_PF1_OFFSET_W { - U0_PLDA_PCIE_PF1_OFFSET_W::new(self, 0) + pub fn u0_pcie_pf1_offset(&mut self) -> U0_PCIE_PF1_OFFSET_W { + U0_PCIE_PF1_OFFSET_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_81.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_81.rs index 0ab94b9..075d34b 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_81.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_81.rs @@ -2,23 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_81` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pf2_offset` reader - u0_plda_pcie_pf2_offset"] -pub type U0_PLDA_PCIE_PF2_OFFSET_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_pf2_offset` writer - u0_plda_pcie_pf2_offset"] -pub type U0_PLDA_PCIE_PF2_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `u0_pcie_pf2_offset` reader - u0_pcie_pf2_offset"] +pub type U0_PCIE_PF2_OFFSET_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pf2_offset` writer - u0_pcie_pf2_offset"] +pub type U0_PCIE_PF2_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { - #[doc = "Bits 0:19 - u0_plda_pcie_pf2_offset"] + #[doc = "Bits 0:19 - u0_pcie_pf2_offset"] #[inline(always)] - pub fn u0_plda_pcie_pf2_offset(&self) -> U0_PLDA_PCIE_PF2_OFFSET_R { - U0_PLDA_PCIE_PF2_OFFSET_R::new(self.bits & 0x000f_ffff) + pub fn u0_pcie_pf2_offset(&self) -> U0_PCIE_PF2_OFFSET_R { + U0_PCIE_PF2_OFFSET_R::new(self.bits & 0x000f_ffff) } } impl W { - #[doc = "Bits 0:19 - u0_plda_pcie_pf2_offset"] + #[doc = "Bits 0:19 - u0_pcie_pf2_offset"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pf2_offset(&mut self) -> U0_PLDA_PCIE_PF2_OFFSET_W { - U0_PLDA_PCIE_PF2_OFFSET_W::new(self, 0) + pub fn u0_pcie_pf2_offset(&mut self) -> U0_PCIE_PF2_OFFSET_W { + U0_PCIE_PF2_OFFSET_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_82.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_82.rs index 2da6c50..b100bd7 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_82.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_82.rs @@ -2,76 +2,74 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_82` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pf3_offset` reader - u0_plda_pcie_pf3_offset"] -pub type U0_PLDA_PCIE_PF3_OFFSET_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_pf3_offset` writer - u0_plda_pcie_pf3_offset"] -pub type U0_PLDA_PCIE_PF3_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; -#[doc = "Field `u0_plda_pcie_phy_mode` reader - u0_plda_pcie_phy_mode"] -pub type U0_PLDA_PCIE_PHY_MODE_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_phy_mode` writer - u0_plda_pcie_phy_mode"] -pub type U0_PLDA_PCIE_PHY_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_plda_pcie_pl_clkrem_allow` reader - u0_plda_pcie_pl_clkrem_allow"] -pub type U0_PLDA_PCIE_PL_CLKREM_ALLOW_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_pl_clkrem_allow` writer - u0_plda_pcie_pl_clkrem_allow"] -pub type U0_PLDA_PCIE_PL_CLKREM_ALLOW_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_pl_clkreq_oen` reader - u0_plda_pcie_pl_clkreq_oen"] -pub type U0_PLDA_PCIE_PL_CLKREQ_OEN_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_pl_equ_phase` reader - u0_plda_pcie_pl_equ_phase"] -pub type U0_PLDA_PCIE_PL_EQU_PHASE_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_pl_ltssm` reader - u0_plda_pcie_pl_ltssm"] -pub type U0_PLDA_PCIE_PL_LTSSM_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pf3_offset` reader - u0_pcie_pf3_offset"] +pub type U0_PCIE_PF3_OFFSET_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pf3_offset` writer - u0_pcie_pf3_offset"] +pub type U0_PCIE_PF3_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `u0_pcie_phy_mode` reader - u0_pcie_phy_mode"] +pub type U0_PCIE_PHY_MODE_R = crate::FieldReader; +#[doc = "Field `u0_pcie_phy_mode` writer - u0_pcie_phy_mode"] +pub type U0_PCIE_PHY_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_pcie_pl_clkrem_allow` reader - u0_pcie_pl_clkrem_allow"] +pub type U0_PCIE_PL_CLKREM_ALLOW_R = crate::BitReader; +#[doc = "Field `u0_pcie_pl_clkrem_allow` writer - u0_pcie_pl_clkrem_allow"] +pub type U0_PCIE_PL_CLKREM_ALLOW_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_pl_clkreq_oen` reader - u0_pcie_pl_clkreq_oen"] +pub type U0_PCIE_PL_CLKREQ_OEN_R = crate::BitReader; +#[doc = "Field `u0_pcie_pl_equ_phase` reader - u0_pcie_pl_equ_phase"] +pub type U0_PCIE_PL_EQU_PHASE_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pl_ltssm` reader - u0_pcie_pl_ltssm"] +pub type U0_PCIE_PL_LTSSM_R = crate::FieldReader; impl R { - #[doc = "Bits 0:19 - u0_plda_pcie_pf3_offset"] + #[doc = "Bits 0:19 - u0_pcie_pf3_offset"] #[inline(always)] - pub fn u0_plda_pcie_pf3_offset(&self) -> U0_PLDA_PCIE_PF3_OFFSET_R { - U0_PLDA_PCIE_PF3_OFFSET_R::new(self.bits & 0x000f_ffff) + pub fn u0_pcie_pf3_offset(&self) -> U0_PCIE_PF3_OFFSET_R { + U0_PCIE_PF3_OFFSET_R::new(self.bits & 0x000f_ffff) } - #[doc = "Bits 20:21 - u0_plda_pcie_phy_mode"] + #[doc = "Bits 20:21 - u0_pcie_phy_mode"] #[inline(always)] - pub fn u0_plda_pcie_phy_mode(&self) -> U0_PLDA_PCIE_PHY_MODE_R { - U0_PLDA_PCIE_PHY_MODE_R::new(((self.bits >> 20) & 3) as u8) + pub fn u0_pcie_phy_mode(&self) -> U0_PCIE_PHY_MODE_R { + U0_PCIE_PHY_MODE_R::new(((self.bits >> 20) & 3) as u8) } - #[doc = "Bit 22 - u0_plda_pcie_pl_clkrem_allow"] + #[doc = "Bit 22 - u0_pcie_pl_clkrem_allow"] #[inline(always)] - pub fn u0_plda_pcie_pl_clkrem_allow(&self) -> U0_PLDA_PCIE_PL_CLKREM_ALLOW_R { - U0_PLDA_PCIE_PL_CLKREM_ALLOW_R::new(((self.bits >> 22) & 1) != 0) + pub fn u0_pcie_pl_clkrem_allow(&self) -> U0_PCIE_PL_CLKREM_ALLOW_R { + U0_PCIE_PL_CLKREM_ALLOW_R::new(((self.bits >> 22) & 1) != 0) } - #[doc = "Bit 23 - u0_plda_pcie_pl_clkreq_oen"] + #[doc = "Bit 23 - u0_pcie_pl_clkreq_oen"] #[inline(always)] - pub fn u0_plda_pcie_pl_clkreq_oen(&self) -> U0_PLDA_PCIE_PL_CLKREQ_OEN_R { - U0_PLDA_PCIE_PL_CLKREQ_OEN_R::new(((self.bits >> 23) & 1) != 0) + pub fn u0_pcie_pl_clkreq_oen(&self) -> U0_PCIE_PL_CLKREQ_OEN_R { + U0_PCIE_PL_CLKREQ_OEN_R::new(((self.bits >> 23) & 1) != 0) } - #[doc = "Bits 24:25 - u0_plda_pcie_pl_equ_phase"] + #[doc = "Bits 24:25 - u0_pcie_pl_equ_phase"] #[inline(always)] - pub fn u0_plda_pcie_pl_equ_phase(&self) -> U0_PLDA_PCIE_PL_EQU_PHASE_R { - U0_PLDA_PCIE_PL_EQU_PHASE_R::new(((self.bits >> 24) & 3) as u8) + pub fn u0_pcie_pl_equ_phase(&self) -> U0_PCIE_PL_EQU_PHASE_R { + U0_PCIE_PL_EQU_PHASE_R::new(((self.bits >> 24) & 3) as u8) } - #[doc = "Bits 26:30 - u0_plda_pcie_pl_ltssm"] + #[doc = "Bits 26:30 - u0_pcie_pl_ltssm"] #[inline(always)] - pub fn u0_plda_pcie_pl_ltssm(&self) -> U0_PLDA_PCIE_PL_LTSSM_R { - U0_PLDA_PCIE_PL_LTSSM_R::new(((self.bits >> 26) & 0x1f) as u8) + pub fn u0_pcie_pl_ltssm(&self) -> U0_PCIE_PL_LTSSM_R { + U0_PCIE_PL_LTSSM_R::new(((self.bits >> 26) & 0x1f) as u8) } } impl W { - #[doc = "Bits 0:19 - u0_plda_pcie_pf3_offset"] + #[doc = "Bits 0:19 - u0_pcie_pf3_offset"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pf3_offset(&mut self) -> U0_PLDA_PCIE_PF3_OFFSET_W { - U0_PLDA_PCIE_PF3_OFFSET_W::new(self, 0) + pub fn u0_pcie_pf3_offset(&mut self) -> U0_PCIE_PF3_OFFSET_W { + U0_PCIE_PF3_OFFSET_W::new(self, 0) } - #[doc = "Bits 20:21 - u0_plda_pcie_phy_mode"] + #[doc = "Bits 20:21 - u0_pcie_phy_mode"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_phy_mode(&mut self) -> U0_PLDA_PCIE_PHY_MODE_W { - U0_PLDA_PCIE_PHY_MODE_W::new(self, 20) + pub fn u0_pcie_phy_mode(&mut self) -> U0_PCIE_PHY_MODE_W { + U0_PCIE_PHY_MODE_W::new(self, 20) } - #[doc = "Bit 22 - u0_plda_pcie_pl_clkrem_allow"] + #[doc = "Bit 22 - u0_pcie_pl_clkrem_allow"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pl_clkrem_allow( - &mut self, - ) -> U0_PLDA_PCIE_PL_CLKREM_ALLOW_W { - U0_PLDA_PCIE_PL_CLKREM_ALLOW_W::new(self, 22) + pub fn u0_pcie_pl_clkrem_allow(&mut self) -> U0_PCIE_PL_CLKREM_ALLOW_W { + U0_PCIE_PL_CLKREM_ALLOW_W::new(self, 22) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_83.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_83.rs index 0c3fb93..9f6952a 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_83.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_83.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_83` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pl_pclk_rate` reader - u0_plda_pcie_pl_pclk_rate"] -pub type U0_PLDA_PCIE_PL_PCLK_RATE_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pl_pclk_rate` reader - u0_pcie_pl_pclk_rate"] +pub type U0_PCIE_PL_PCLK_RATE_R = crate::FieldReader; impl R { - #[doc = "Bits 0:4 - u0_plda_pcie_pl_pclk_rate"] + #[doc = "Bits 0:4 - u0_pcie_pl_pclk_rate"] #[inline(always)] - pub fn u0_plda_pcie_pl_pclk_rate(&self) -> U0_PLDA_PCIE_PL_PCLK_RATE_R { - U0_PLDA_PCIE_PL_PCLK_RATE_R::new((self.bits & 0x1f) as u8) + pub fn u0_pcie_pl_pclk_rate(&self) -> U0_PCIE_PL_PCLK_RATE_R { + U0_PCIE_PL_PCLK_RATE_R::new((self.bits & 0x1f) as u8) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_84.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_84.rs index 52331d1..4915615 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_84.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_84.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_84` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pl_sideband_in_31_0` reader - u0_plda_pcie_pl_sideband_in_31_0"] -pub type U0_PLDA_PCIE_PL_SIDEBAND_IN_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pl_sideband_in_31_0` reader - u0_pcie_pl_sideband_in_31_0"] +pub type U0_PCIE_PL_SIDEBAND_IN_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_pl_sideband_in_31_0"] + #[doc = "Bits 0:31 - u0_pcie_pl_sideband_in_31_0"] #[inline(always)] - pub fn u0_plda_pcie_pl_sideband_in_31_0(&self) -> U0_PLDA_PCIE_PL_SIDEBAND_IN_31_0_R { - U0_PLDA_PCIE_PL_SIDEBAND_IN_31_0_R::new(self.bits) + pub fn u0_pcie_pl_sideband_in_31_0(&self) -> U0_PCIE_PL_SIDEBAND_IN_31_0_R { + U0_PCIE_PL_SIDEBAND_IN_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_85.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_85.rs index be24550..29645ac 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_85.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_85.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_85` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pl_sideband_in_63_32` reader - u0_plda_pcie_pl_sideband_in_63_32"] -pub type U0_PLDA_PCIE_PL_SIDEBAND_IN_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pl_sideband_in_63_32` reader - u0_pcie_pl_sideband_in_63_32"] +pub type U0_PCIE_PL_SIDEBAND_IN_63_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_pl_sideband_in_63_32"] + #[doc = "Bits 0:31 - u0_pcie_pl_sideband_in_63_32"] #[inline(always)] - pub fn u0_plda_pcie_pl_sideband_in_63_32(&self) -> U0_PLDA_PCIE_PL_SIDEBAND_IN_63_32_R { - U0_PLDA_PCIE_PL_SIDEBAND_IN_63_32_R::new(self.bits) + pub fn u0_pcie_pl_sideband_in_63_32(&self) -> U0_PCIE_PL_SIDEBAND_IN_63_32_R { + U0_PCIE_PL_SIDEBAND_IN_63_32_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_86.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_86.rs index f593457..440a82c 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_86.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_86.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_86` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pl_sideband_out_31_0` reader - u0_plda_pcie_pl_sideband_out_31_0"] -pub type U0_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pl_sideband_out_31_0` reader - u0_pcie_pl_sideband_out_31_0"] +pub type U0_PCIE_PL_SIDEBAND_OUT_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_pl_sideband_out_31_0"] + #[doc = "Bits 0:31 - u0_pcie_pl_sideband_out_31_0"] #[inline(always)] - pub fn u0_plda_pcie_pl_sideband_out_31_0(&self) -> U0_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_R { - U0_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_R::new(self.bits) + pub fn u0_pcie_pl_sideband_out_31_0(&self) -> U0_PCIE_PL_SIDEBAND_OUT_31_0_R { + U0_PCIE_PL_SIDEBAND_OUT_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_87.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_87.rs index 85fb73d..4cae490 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_87.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_87.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_87` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pl_sideband_out_63_32` reader - u0_plda_pcie_pl_sideband_out_63_32"] -pub type U0_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pl_sideband_out_63_32` reader - u0_pcie_pl_sideband_out_63_32"] +pub type U0_PCIE_PL_SIDEBAND_OUT_63_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_pl_sideband_out_63_32"] + #[doc = "Bits 0:31 - u0_pcie_pl_sideband_out_63_32"] #[inline(always)] - pub fn u0_plda_pcie_pl_sideband_out_63_32(&self) -> U0_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_R { - U0_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_R::new(self.bits) + pub fn u0_pcie_pl_sideband_out_63_32(&self) -> U0_PCIE_PL_SIDEBAND_OUT_63_32_R { + U0_PCIE_PL_SIDEBAND_OUT_63_32_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_88.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_88.rs index 00f0070..054656e 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_88.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_88.rs @@ -2,37 +2,37 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_88` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pl_wake_in` reader - u0_plda_pcie_pl_wake_in"] -pub type U0_PLDA_PCIE_PL_WAKE_IN_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_pl_wake_in` writer - u0_plda_pcie_pl_wake_in"] -pub type U0_PLDA_PCIE_PL_WAKE_IN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_pl_wake_oen` reader - u0_plda_pcie_pl_wake_oen"] -pub type U0_PLDA_PCIE_PL_WAKE_OEN_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_rx_standby_0` reader - u0_plda_pcie_rx_standby_0"] -pub type U0_PLDA_PCIE_RX_STANDBY_0_R = crate::BitReader; +#[doc = "Field `u0_pcie_pl_wake_in` reader - u0_pcie_pl_wake_in"] +pub type U0_PCIE_PL_WAKE_IN_R = crate::BitReader; +#[doc = "Field `u0_pcie_pl_wake_in` writer - u0_pcie_pl_wake_in"] +pub type U0_PCIE_PL_WAKE_IN_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_pl_wake_oen` reader - u0_pcie_pl_wake_oen"] +pub type U0_PCIE_PL_WAKE_OEN_R = crate::BitReader; +#[doc = "Field `u0_pcie_rx_standby_0` reader - u0_pcie_rx_standby_0"] +pub type U0_PCIE_RX_STANDBY_0_R = crate::BitReader; impl R { - #[doc = "Bit 0 - u0_plda_pcie_pl_wake_in"] + #[doc = "Bit 0 - u0_pcie_pl_wake_in"] #[inline(always)] - pub fn u0_plda_pcie_pl_wake_in(&self) -> U0_PLDA_PCIE_PL_WAKE_IN_R { - U0_PLDA_PCIE_PL_WAKE_IN_R::new((self.bits & 1) != 0) + pub fn u0_pcie_pl_wake_in(&self) -> U0_PCIE_PL_WAKE_IN_R { + U0_PCIE_PL_WAKE_IN_R::new((self.bits & 1) != 0) } - #[doc = "Bit 1 - u0_plda_pcie_pl_wake_oen"] + #[doc = "Bit 1 - u0_pcie_pl_wake_oen"] #[inline(always)] - pub fn u0_plda_pcie_pl_wake_oen(&self) -> U0_PLDA_PCIE_PL_WAKE_OEN_R { - U0_PLDA_PCIE_PL_WAKE_OEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn u0_pcie_pl_wake_oen(&self) -> U0_PCIE_PL_WAKE_OEN_R { + U0_PCIE_PL_WAKE_OEN_R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 2 - u0_plda_pcie_rx_standby_0"] + #[doc = "Bit 2 - u0_pcie_rx_standby_0"] #[inline(always)] - pub fn u0_plda_pcie_rx_standby_0(&self) -> U0_PLDA_PCIE_RX_STANDBY_0_R { - U0_PLDA_PCIE_RX_STANDBY_0_R::new(((self.bits >> 2) & 1) != 0) + pub fn u0_pcie_rx_standby_0(&self) -> U0_PCIE_RX_STANDBY_0_R { + U0_PCIE_RX_STANDBY_0_R::new(((self.bits >> 2) & 1) != 0) } } impl W { - #[doc = "Bit 0 - u0_plda_pcie_pl_wake_in"] + #[doc = "Bit 0 - u0_pcie_pl_wake_in"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pl_wake_in(&mut self) -> U0_PLDA_PCIE_PL_WAKE_IN_W { - U0_PLDA_PCIE_PL_WAKE_IN_W::new(self, 0) + pub fn u0_pcie_pl_wake_in(&mut self) -> U0_PCIE_PL_WAKE_IN_W { + U0_PCIE_PL_WAKE_IN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_89.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_89.rs index 26354ef..996e267 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_89.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_89.rs @@ -2,23 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_89` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_in_31_0` reader - u0_plda_pcie_test_in_31_0"] -pub type U0_PLDA_PCIE_TEST_IN_31_0_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_test_in_31_0` writer - u0_plda_pcie_test_in_31_0"] -pub type U0_PLDA_PCIE_TEST_IN_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_test_in_31_0` reader - u0_pcie_test_in_31_0"] +pub type U0_PCIE_TEST_IN_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_in_31_0` writer - u0_pcie_test_in_31_0"] +pub type U0_PCIE_TEST_IN_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_in_31_0"] + #[doc = "Bits 0:31 - u0_pcie_test_in_31_0"] #[inline(always)] - pub fn u0_plda_pcie_test_in_31_0(&self) -> U0_PLDA_PCIE_TEST_IN_31_0_R { - U0_PLDA_PCIE_TEST_IN_31_0_R::new(self.bits) + pub fn u0_pcie_test_in_31_0(&self) -> U0_PCIE_TEST_IN_31_0_R { + U0_PCIE_TEST_IN_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_test_in_31_0"] + #[doc = "Bits 0:31 - u0_pcie_test_in_31_0"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_test_in_31_0(&mut self) -> U0_PLDA_PCIE_TEST_IN_31_0_W { - U0_PLDA_PCIE_TEST_IN_31_0_W::new(self, 0) + pub fn u0_pcie_test_in_31_0(&mut self) -> U0_PCIE_TEST_IN_31_0_W { + U0_PCIE_TEST_IN_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_9.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_9.rs index 33fe5c3..e0676a3 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_9.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_9.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_9` writer"] pub type W = crate::W; -#[doc = "Field `u0_e2_sft7110_reset_vector_0` reader - u0_e2_sft7110_reset_vector_0"] -pub type U0_E2_SFT7110_RESET_VECTOR_0_R = crate::FieldReader; -#[doc = "Field `u0_e2_sft7110_reset_vector_0` writer - u0_e2_sft7110_reset_vector_0"] -pub type U0_E2_SFT7110_RESET_VECTOR_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_e2_reset_vector_0` reader - u0_e2_reset_vector_0"] +pub type U0_E2_RESET_VECTOR_0_R = crate::FieldReader; +#[doc = "Field `u0_e2_reset_vector_0` writer - u0_e2_reset_vector_0"] +pub type U0_E2_RESET_VECTOR_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_e2_sft7110_reset_vector_0"] + #[doc = "Bits 0:31 - u0_e2_reset_vector_0"] #[inline(always)] - pub fn u0_e2_sft7110_reset_vector_0(&self) -> U0_E2_SFT7110_RESET_VECTOR_0_R { - U0_E2_SFT7110_RESET_VECTOR_0_R::new(self.bits) + pub fn u0_e2_reset_vector_0(&self) -> U0_E2_RESET_VECTOR_0_R { + U0_E2_RESET_VECTOR_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_e2_sft7110_reset_vector_0"] + #[doc = "Bits 0:31 - u0_e2_reset_vector_0"] #[inline(always)] #[must_use] - pub fn u0_e2_sft7110_reset_vector_0( - &mut self, - ) -> U0_E2_SFT7110_RESET_VECTOR_0_W { - U0_E2_SFT7110_RESET_VECTOR_0_W::new(self, 0) + pub fn u0_e2_reset_vector_0(&mut self) -> U0_E2_RESET_VECTOR_0_W { + U0_E2_RESET_VECTOR_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_90.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_90.rs index 7c8598d..e23918d 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_90.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_90.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_90` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_in_63_32` reader - u0_plda_pcie_test_in_63_32"] -pub type U0_PLDA_PCIE_TEST_IN_63_32_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_test_in_63_32` writer - u0_plda_pcie_test_in_63_32"] -pub type U0_PLDA_PCIE_TEST_IN_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_test_in_63_32` reader - u0_pcie_test_in_63_32"] +pub type U0_PCIE_TEST_IN_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_in_63_32` writer - u0_pcie_test_in_63_32"] +pub type U0_PCIE_TEST_IN_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_in_63_32"] + #[doc = "Bits 0:31 - u0_pcie_test_in_63_32"] #[inline(always)] - pub fn u0_plda_pcie_test_in_63_32(&self) -> U0_PLDA_PCIE_TEST_IN_63_32_R { - U0_PLDA_PCIE_TEST_IN_63_32_R::new(self.bits) + pub fn u0_pcie_test_in_63_32(&self) -> U0_PCIE_TEST_IN_63_32_R { + U0_PCIE_TEST_IN_63_32_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_test_in_63_32"] + #[doc = "Bits 0:31 - u0_pcie_test_in_63_32"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_test_in_63_32( - &mut self, - ) -> U0_PLDA_PCIE_TEST_IN_63_32_W { - U0_PLDA_PCIE_TEST_IN_63_32_W::new(self, 0) + pub fn u0_pcie_test_in_63_32(&mut self) -> U0_PCIE_TEST_IN_63_32_W { + U0_PCIE_TEST_IN_63_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_91.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_91.rs index ae524da..7667120 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_91.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_91.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_91` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_31_0` reader - u0_plda_pcie_test_out_bridge_31_0"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_31_0` reader - u0_pcie_test_out_bridge_31_0"] +pub type U0_PCIE_TEST_OUT_BRIDGE_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_31_0"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_31_0"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_31_0(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_31_0(&self) -> U0_PCIE_TEST_OUT_BRIDGE_31_0_R { + U0_PCIE_TEST_OUT_BRIDGE_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_92.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_92.rs index 05aa15e..0b1ded8 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_92.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_92.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_92` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_63_32` reader - u0_plda_pcie_test_out_bridge_63_32"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_63_32` reader - u0_pcie_test_out_bridge_63_32"] +pub type U0_PCIE_TEST_OUT_BRIDGE_63_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_63_32"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_63_32"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_63_32(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_63_32(&self) -> U0_PCIE_TEST_OUT_BRIDGE_63_32_R { + U0_PCIE_TEST_OUT_BRIDGE_63_32_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_93.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_93.rs index fee9ad9..d836f0d 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_93.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_93.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_93` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_95_64` reader - u0_plda_pcie_test_out_bridge_95_64"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_95_64` reader - u0_pcie_test_out_bridge_95_64"] +pub type U0_PCIE_TEST_OUT_BRIDGE_95_64_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_95_64"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_95_64"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_95_64(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_95_64(&self) -> U0_PCIE_TEST_OUT_BRIDGE_95_64_R { + U0_PCIE_TEST_OUT_BRIDGE_95_64_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_94.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_94.rs index 715a3eb..1a75e62 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_94.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_94.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_94` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_127_96` reader - u0_plda_pcie_test_out_bridge_127_96"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_127_96` reader - u0_pcie_test_out_bridge_127_96"] +pub type U0_PCIE_TEST_OUT_BRIDGE_127_96_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_127_96"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_127_96"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_127_96(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_127_96(&self) -> U0_PCIE_TEST_OUT_BRIDGE_127_96_R { + U0_PCIE_TEST_OUT_BRIDGE_127_96_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_95.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_95.rs index 4107b69..b8d9ceb 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_95.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_95.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_95` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_159_128` reader - u0_plda_pcie_test_out_bridge_159_128"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_159_128` reader - u0_pcie_test_out_bridge_159_128"] +pub type U0_PCIE_TEST_OUT_BRIDGE_159_128_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_159_128"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_159_128"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_159_128(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_159_128(&self) -> U0_PCIE_TEST_OUT_BRIDGE_159_128_R { + U0_PCIE_TEST_OUT_BRIDGE_159_128_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_96.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_96.rs index c42f0b8..853325c 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_96.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_96.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_96` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_191_160` reader - u0_plda_pcie_test_out_bridge_191_160"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_191_160` reader - u0_pcie_test_out_bridge_191_160"] +pub type U0_PCIE_TEST_OUT_BRIDGE_191_160_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_191_160"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_191_160"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_191_160(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_191_160(&self) -> U0_PCIE_TEST_OUT_BRIDGE_191_160_R { + U0_PCIE_TEST_OUT_BRIDGE_191_160_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_97.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_97.rs index 3d5d731..8c3983a 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_97.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_97.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_97` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_223_192` reader - u0_plda_pcie_test_out_bridge_223_192"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_223_192` reader - u0_pcie_test_out_bridge_223_192"] +pub type U0_PCIE_TEST_OUT_BRIDGE_223_192_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_223_192"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_223_192"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_223_192(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_223_192(&self) -> U0_PCIE_TEST_OUT_BRIDGE_223_192_R { + U0_PCIE_TEST_OUT_BRIDGE_223_192_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_98.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_98.rs index d1ea3b7..e280f79 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_98.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_98.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_98` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_255_224` reader - u0_plda_pcie_test_out_bridge_255_224"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_255_224` reader - u0_pcie_test_out_bridge_255_224"] +pub type U0_PCIE_TEST_OUT_BRIDGE_255_224_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_255_224"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_255_224"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_255_224(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_255_224(&self) -> U0_PCIE_TEST_OUT_BRIDGE_255_224_R { + U0_PCIE_TEST_OUT_BRIDGE_255_224_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_99.rs b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_99.rs index a29630d..6f48646 100644 --- a/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_99.rs +++ b/jh7110-vf2-12a-pac/src/stg_syscon/stg_syscfg_99.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_99` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_287_256` reader - u0_plda_pcie_test_out_bridge_287_256"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_287_256` reader - u0_pcie_test_out_bridge_287_256"] +pub type U0_PCIE_TEST_OUT_BRIDGE_287_256_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_287_256"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_287_256"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_287_256(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_287_256(&self) -> U0_PCIE_TEST_OUT_BRIDGE_287_256_R { + U0_PCIE_TEST_OUT_BRIDGE_287_256_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/jh7110-starfive-visionfive-2-v1.3b.svd b/jh7110-vf2-13b-pac/jh7110-starfive-visionfive-2-v1.3b.svd index 33d4ba6..f6744db 100644 --- a/jh7110-vf2-13b-pac/jh7110-starfive-visionfive-2-v1.3b.svd +++ b/jh7110-vf2-13b-pac/jh7110-starfive-visionfive-2-v1.3b.svd @@ -12216,134 +12216,134 @@ read-write - u0_cdn_usb_adp_en - u0_cdn_usb_adp_en + u0_usb_adp_en + u0_usb_adp_en [8:8] read-only - u0_cdn_usb_adp_probe_ana - u0_cdn_usb_adp_probe_ana + u0_usb_adp_probe_ana + u0_usb_adp_probe_ana [9:9] read-write - u0_cdn_usb_adp_probe_en - u0_cdn_usb_adp_probe_en + u0_usb_adp_probe_en + u0_usb_adp_probe_en [10:10] read-only - u0_cdn_usb_adp_sense_ana - u0_cdn_usb_adp_sense_ana + u0_usb_adp_sense_ana + u0_usb_adp_sense_ana [11:11] read-write - u0_cdn_usb_adp_sense_en - u0_cdn_usb_adp_sense_en + u0_usb_adp_sense_en + u0_usb_adp_sense_en [12:12] read-only - u0_cdn_usb_adp_sink_current_en - u0_cdn_usb_adp_sink_current_en + u0_usb_adp_sink_current_en + u0_usb_adp_sink_current_en [13:13] read-only - u0_cdn_usb_adp_source_current_en - u0_cdn_usb_adp_source_current_en + u0_usb_adp_source_current_en + u0_usb_adp_source_current_en [14:14] read-only - u0_cdn_usb_bc_en - u0_cdn_usb_bc_en + u0_usb_bc_en + u0_usb_bc_en [15:15] read-only - u0_cdn_usb_chrg_vbus - u0_cdn_usb_chrg_vbus + u0_usb_chrg_vbus + u0_usb_chrg_vbus [16:16] read-write - u0_cdn_usb_dcd_comp_sts - u0_cdn_usb_dcd_comp_sts + u0_usb_dcd_comp_sts + u0_usb_dcd_comp_sts [17:17] read-write - u0_cdn_usb_dischrg_vbus - u0_cdn_usb_dischrg_vbus + u0_usb_dischrg_vbus + u0_usb_dischrg_vbus [18:18] read-write - u0_cdn_usb_dm_vdat_ref_comp_en - u0_cdn_usb_dm_vdat_ref_comp_en + u0_usb_dm_vdat_ref_comp_en + u0_usb_dm_vdat_ref_comp_en [19:19] read-only - u0_cdn_usb_dm_vdat_ref_comp_sts - u0_cdn_usb_dm_vdat_ref_comp_sts + u0_usb_dm_vdat_ref_comp_sts + u0_usb_dm_vdat_ref_comp_sts [20:20] read-write - u0_cdn_usb_dm_vlgc_comp_en - u0_cdn_usb_dm_vlgc_comp_en + u0_usb_dm_vlgc_comp_en + u0_usb_dm_vlgc_comp_en [21:21] read-only - u0_cdn_usb_dm_vlgc_comp_sts - u0_cdn_usb_dm_vlgc_comp_sts + u0_usb_dm_vlgc_comp_sts + u0_usb_dm_vlgc_comp_sts [22:22] read-write - u0_cdn_usb_dp_vdat_ref_comp_en - u0_cdn_usb_dp_vdat_ref_comp_en + u0_usb_dp_vdat_ref_comp_en + u0_usb_dp_vdat_ref_comp_en [23:23] read-only - u0_cdn_usb_dp_vdat_ref_comp_sts - u0_cdn_usb_dp_vdat_ref_comp_sts + u0_usb_dp_vdat_ref_comp_sts + u0_usb_dp_vdat_ref_comp_sts [24:24] read-write - u0_cdn_usb_host_system_err - u0_cdn_usb_host_system_err + u0_usb_host_system_err + u0_usb_host_system_err [25:25] read-write - u0_cdn_usb_hsystem_err_ext - u0_cdn_usb_hsystem_err_ext + u0_usb_hsystem_err_ext + u0_usb_hsystem_err_ext [26:26] read-only - u0_cdn_usb_idm_sink_en - u0_cdn_usb_idm_sink_en + u0_usb_idm_sink_en + u0_usb_idm_sink_en [27:27] read-only - u0_cdn_usb_idp_sink_en - u0_cdn_usb_idp_sink_en + u0_usb_idp_sink_en + u0_usb_idp_sink_en [28:28] read-only - u0_cdn_usb_idp_src_en - u0_cdn_usb_idp_src_en + u0_usb_idp_src_en + u0_usb_idp_src_en [29:29] read-only @@ -12357,68 +12357,68 @@ 0 - u0_cdn_usb_lowest_belt + u0_usb_lowest_belt LTM interface to software [11:0] read-only - u0_cdn_usb_ltm_host_req + u0_usb_ltm_host_req LTM interface to software [12:12] read-only - u0_cdn_usb_ltm_host_req_halt + u0_usb_ltm_host_req_halt LTM interface to software [13:13] read-write - u0_cdn_usb_mdctrl_clk_sel - u0_cdn_usb_mdctrl_clk_sel + u0_usb_mdctrl_clk_sel + u0_usb_mdctrl_clk_sel [14:14] read-write - u0_cdn_usb_mdctrl_clk_status - u0_cdn_usb_mdctrl_clk_status + u0_usb_mdctrl_clk_status + u0_usb_mdctrl_clk_status [15:15] read-only - u0_cdn_usb_mode_strap + u0_usb_mode_strap Can onlly be changed when pwrup_rst_n is low [18:16] read-write - u0_cdn_usb_otg_suspendm - u0_cdn_usb_otg_suspendm + u0_usb_otg_suspendm + u0_usb_otg_suspendm [19:19] read-write - u0_cdn_usb_otg_suspendm_byps - u0_cdn_usb_otg_suspendm_byps + u0_usb_otg_suspendm_byps + u0_usb_otg_suspendm_byps [20:20] read-write - u0_cdn_usb_phy_bvalid - u0_cdn_usb_phy_bvalid + u0_usb_phy_bvalid + u0_usb_phy_bvalid [21:21] read-only - u0_cdn_usb_pll_en - u0_cdn_usb_pll_en + u0_usb_pll_en + u0_usb_pll_en [22:22] read-write - u0_cdn_usb_refclk_mode - u0_cdn_usb_refclk_mode + u0_usb_refclk_mode + u0_usb_refclk_mode [23:23] read-write @@ -12441,32 +12441,32 @@ read-write - u0_cdn_usb_rid_float_comp_en - u0_cdn_usb_rid_float_comp_en + u0_usb_rid_float_comp_en + u0_usb_rid_float_comp_en [27:27] read-only - u0_cdn_usb_rid_float_comp_sts - u0_cdn_usb_rid_float_comp_sts + u0_usb_rid_float_comp_sts + u0_usb_rid_float_comp_sts [28:28] read-write - u0_cdn_usb_rid_gnd_comp_sts - u0_cdn_usb_rid_gnd_comp_sts + u0_usb_rid_gnd_comp_sts + u0_usb_rid_gnd_comp_sts [29:29] read-write - u0_cdn_usb_rid_nonfloat_comp_en - u0_cdn_usb_rid_nonfloat_comp_en + u0_usb_rid_nonfloat_comp_en + u0_usb_rid_nonfloat_comp_en [30:30] read-only - u0_cdn_usb_rx_dm - u0_cdn_usb_rx_dm + u0_usb_rx_dm + u0_usb_rx_dm [31:31] read-only @@ -12480,182 +12480,182 @@ 0 - u0_cdn_usb_rx_dp - u0_cdn_usb_rx_dp + u0_usb_rx_dp + u0_usb_rx_dp [0:0] read-only - u0_cdn_usb_rx_rcv - u0_cdn_usb_rx_rcv + u0_usb_rx_rcv + u0_usb_rx_rcv [1:1] read-only - u0_cdn_usb_self_test + u0_usb_self_test For software bist_test [2:2] read-write - u0_cdn_usb_sessend - u0_cdn_usb_sessend + u0_usb_sessend + u0_usb_sessend [3:3] read-only - u0_cdn_usb_sessvalid - u0_cdn_usb_sessvalid + u0_usb_sessvalid + u0_usb_sessvalid [4:4] read-only - u0_cdn_usb_sof - u0_cdn_usb_sof + u0_usb_sof + u0_usb_sof [5:5] read-only - u0_cdn_usb_test_bist + u0_usb_test_bist For software bist_test [6:6] read-only - u0_cdn_usb_usbdev_main_power_off_ack - u0_cdn_usb_usbdev_main_power_off_ack + u0_usb_usbdev_main_power_off_ack + u0_usb_usbdev_main_power_off_ack [7:7] read-only - u0_cdn_usb_usbdev_main_power_off_ready - u0_cdn_usb_usbdev_main_power_off_ready + u0_usb_usbdev_main_power_off_ready + u0_usb_usbdev_main_power_off_ready [8:8] read-only - u0_cdn_usb_usbdev_main_power_off_req - u0_cdn_usb_usbdev_main_power_off_req + u0_usb_usbdev_main_power_off_req + u0_usb_usbdev_main_power_off_req [9:9] read-write - u0_cdn_usb_usbdev_main_power_on_ready - u0_cdn_usb_usbdev_main_power_on_ready + u0_usb_usbdev_main_power_on_ready + u0_usb_usbdev_main_power_on_ready [10:10] read-only - u0_cdn_usb_usbdev_main_power_on_req - u0_cdn_usb_usbdev_main_power_on_req + u0_usb_usbdev_main_power_on_req + u0_usb_usbdev_main_power_on_req [11:11] read-only - u0_cdn_usb_usbdev_main_power_on_valid - u0_cdn_usb_usbdev_main_power_on_valid + u0_usb_usbdev_main_power_on_valid + u0_usb_usbdev_main_power_on_valid [12:12] read-write - u0_cdn_usb_usbdev_power_off_ack - u0_cdn_usb_usbdev_power_off_ack + u0_usb_usbdev_power_off_ack + u0_usb_usbdev_power_off_ack [13:13] read-only - u0_cdn_usb_usbdev_power_off_ready - u0_cdn_usb_usbdev_power_off_ready + u0_usb_usbdev_power_off_ready + u0_usb_usbdev_power_off_ready [14:14] read-only - u0_cdn_usb_usbdev_power_off_req - u0_cdn_usb_usbdev_power_off_req + u0_usb_usbdev_power_off_req + u0_usb_usbdev_power_off_req [15:15] read-write - u0_cdn_usb_usbdev_power_on_ready - u0_cdn_usb_usbdev_power_on_ready + u0_usb_usbdev_power_on_ready + u0_usb_usbdev_power_on_ready [16:16] read-only - u0_cdn_usb_usbdev_power_on_req - u0_cdn_usb_usbdev_power_on_req + u0_usb_usbdev_power_on_req + u0_usb_usbdev_power_on_req [17:17] read-only - u0_cdn_usb_usbdev_power_on_valid - u0_cdn_usb_usbdev_power_on_valid + u0_usb_usbdev_power_on_valid + u0_usb_usbdev_power_on_valid [18:18] read-write - u0_cdn_usb_utmi_dmpulldown_sit - u0_cdn_usb_utmi_dmpulldown_sit + u0_usb_utmi_dmpulldown_sit + u0_usb_utmi_dmpulldown_sit [19:19] read-write - u0_cdn_usb_utmi_dppulldown_sit - u0_cdn_usb_utmi_dppulldown_sit + u0_usb_utmi_dppulldown_sit + u0_usb_utmi_dppulldown_sit [20:20] read-write - u0_cdn_usb_utmi_fslsserialmode_sit - u0_cdn_usb_utmi_fslsserialmode_sit + u0_usb_utmi_fslsserialmode_sit + u0_usb_utmi_fslsserialmode_sit [21:21] read-write - u0_cdn_usb_utmi_hostdisconnect_sit - u0_cdn_usb_utmi_hostdisconnect_sit + u0_usb_utmi_hostdisconnect_sit + u0_usb_utmi_hostdisconnect_sit [22:22] read-only - u0_cdn_usb_utmi_iddig_sit - u0_cdn_usb_utmi_iddig_sit + u0_usb_utmi_iddig_sit + u0_usb_utmi_iddig_sit [23:23] read-only - u0_cdn_usb_utmi_idpullup_sit - u0_cdn_usb_utmi_idpullup_sit + u0_usb_utmi_idpullup_sit + u0_usb_utmi_idpullup_sit [24:24] read-write - u0_cdn_usb_utmi_linestate_sit - u0_cdn_usb_utmi_linestate_sit + u0_usb_utmi_linestate_sit + u0_usb_utmi_linestate_sit [26:25] read-only - u0_cdn_usb_utmi_opmode_sit - u0_cdn_usb_utmi_opmode_sit + u0_usb_utmi_opmode_sit + u0_usb_utmi_opmode_sit [28:27] read-write - u0_cdn_usb_utmi_rxactive_sit - u0_cdn_usb_utmi_rxactive_sit + u0_usb_utmi_rxactive_sit + u0_usb_utmi_rxactive_sit [29:29] read-only - u0_cdn_usb_utmi_rxerror_sit - u0_cdn_usb_utmi_rxerror_sit + u0_usb_utmi_rxerror_sit + u0_usb_utmi_rxerror_sit [30:30] read-only - u0_cdn_usb_utmi_rxvalid_sit - u0_cdn_usb_utmi_rxvalid_sit + u0_usb_utmi_rxvalid_sit + u0_usb_utmi_rxvalid_sit [31:31] read-only @@ -12669,104 +12669,104 @@ 0 - u0_cdn_usb_utmi_rxvalidh_sit - u0_cdn_usb_utmi_rxvalidh_sit + u0_usb_utmi_rxvalidh_sit + u0_usb_utmi_rxvalidh_sit [0:0] read-only - u0_cdn_usb_utmi_sessvld - u0_cdn_usb_utmi_sessvld + u0_usb_utmi_sessvld + u0_usb_utmi_sessvld [1:1] read-write - u0_cdn_usb_utmi_termselect_sit - u0_cdn_usb_utmi_termselect_sit + u0_usb_utmi_termselect_sit + u0_usb_utmi_termselect_sit [2:2] read-write - u0_cdn_usb_utmi_tx_dat_sit - u0_cdn_usb_utmi_tx_dat_sit + u0_usb_utmi_tx_dat_sit + u0_usb_utmi_tx_dat_sit [3:3] read-write - u0_cdn_usb_utmi_tx_enable_n_sit - u0_cdn_usb_utmi_tx_enable_n_sit + u0_usb_utmi_tx_enable_n_sit + u0_usb_utmi_tx_enable_n_sit [4:4] read-write - u0_cdn_usb_utmi_tx_se0_sit - u0_cdn_usb_utmi_tx_se0_sit + u0_usb_utmi_tx_se0_sit + u0_usb_utmi_tx_se0_sit [5:5] read-write - u0_cdn_usb_utmi_txbitstuffenable_sit - u0_cdn_usb_utmi_txbitstuffenable_sit + u0_usb_utmi_txbitstuffenable_sit + u0_usb_utmi_txbitstuffenable_sit [6:6] read-write - u0_cdn_usb_utmi_txready_sit - u0_cdn_usb_utmi_txready_sit + u0_usb_utmi_txready_sit + u0_usb_utmi_txready_sit [7:7] read-only - u0_cdn_usb_utmi_txvalid_sit - u0_cdn_usb_utmi_txvalid_sit + u0_usb_utmi_txvalid_sit + u0_usb_utmi_txvalid_sit [8:8] read-write - u0_cdn_usb_utmi_txvalidh_sit - u0_cdn_usb_utmi_txvalidh_sit + u0_usb_utmi_txvalidh_sit + u0_usb_utmi_txvalidh_sit [9:9] read-write - u0_cdn_usb_utmi_vbusvalid_sit - u0_cdn_usb_utmi_vbusvalid_sit + u0_usb_utmi_vbusvalid_sit + u0_usb_utmi_vbusvalid_sit [10:10] read-only - u0_cdn_usb_utmi_xcvrselect_sit - u0_cdn_usb_utmi_xcvrselect_sit + u0_usb_utmi_xcvrselect_sit + u0_usb_utmi_xcvrselect_sit [12:11] read-write - u0_cdn_usb_utmi_vdm_src_en - u0_cdn_usb_utmi_vdm_src_en + u0_usb_utmi_vdm_src_en + u0_usb_utmi_vdm_src_en [13:13] read-only - u0_cdn_usb_utmi_vdp_src_en - u0_cdn_usb_utmi_vdp_src_en + u0_usb_utmi_vdp_src_en + u0_usb_utmi_vdp_src_en [14:14] read-only - u0_cdn_usb_wakeup - u0_cdn_usb_wakeup + u0_usb_wakeup + u0_usb_wakeup [15:15] read-write - u0_cdn_usb_xhc_d0_ack - u0_cdn_usb_xhc_d0_ack + u0_usb_xhc_d0_ack + u0_usb_xhc_d0_ack [16:16] read-only - u0_cdn_usb_xhc_d0_req - u0_cdn_usb_xhc_d0_req + u0_usb_xhc_d0_req + u0_usb_xhc_d0_req [17:17] read-write @@ -12780,8 +12780,8 @@ 0 - u0_cdn_usb_xhci_debug_bus - u0_cdn_usb_xhci_debug_bus + u0_usb_xhci_debug_bus + u0_usb_xhci_debug_bus [31:0] read-only @@ -12795,8 +12795,8 @@ 0 - u0_cdn_usb_xhci_debug_link_state - u0_cdn_usb_xhci_debug_link_state + u0_usb_xhci_debug_link_state + u0_usb_xhci_debug_link_state [30:0] read-only @@ -12810,92 +12810,92 @@ 0 - u0_cdn_usb_xhci_debug_sel - u0_cdn_usb_xhci_debug_sel + u0_usb_xhci_debug_sel + u0_usb_xhci_debug_sel [4:0] read-write - u0_cdn_usb_xhci_main_power_off_ack - u0_cdn_usb_xhci_main_power_off_ack + u0_usb_xhci_main_power_off_ack + u0_usb_xhci_main_power_off_ack [5:5] read-only - u0_cdn_usb_xhci_main_power_off_req - u0_cdn_usb_xhci_main_power_off_req + u0_usb_xhci_main_power_off_req + u0_usb_xhci_main_power_off_req [6:6] read-only - u0_cdn_usb_xhci_main_power_on_ready - u0_cdn_usb_xhci_main_power_on_ready + u0_usb_xhci_main_power_on_ready + u0_usb_xhci_main_power_on_ready [7:7] read-write - u0_cdn_usb_xhci_main_power_on_req - u0_cdn_usb_xhci_main_power_on_req + u0_usb_xhci_main_power_on_req + u0_usb_xhci_main_power_on_req [8:8] read-only - u0_cdn_usb_xhci_main_power_on_valid - u0_cdn_usb_xhci_main_power_on_valid + u0_usb_xhci_main_power_on_valid + u0_usb_xhci_main_power_on_valid [9:9] read-write - u0_cdn_usb_xhci_power_off_ack - u0_cdn_usb_xhci_power_off_ack + u0_usb_xhci_power_off_ack + u0_usb_xhci_power_off_ack [10:10] read-only - u0_cdn_usb_xhci_power_off_ready - u0_cdn_usb_xhci_power_off_ready + u0_usb_xhci_power_off_ready + u0_usb_xhci_power_off_ready [11:11] read-only - u0_cdn_usb_xhci_power_off_req - u0_cdn_usb_xhci_power_off_req + u0_usb_xhci_power_off_req + u0_usb_xhci_power_off_req [12:12] read-write - u0_cdn_usb_xhci_power_on_ready - u0_cdn_usb_xhci_power_on_ready + u0_usb_xhci_power_on_ready + u0_usb_xhci_power_on_ready [13:13] read-only - u0_cdn_usb_xhci_power_on_req - u0_cdn_usb_xhci_power_on_req + u0_usb_xhci_power_on_req + u0_usb_xhci_power_on_req [14:14] read-only - u0_cdn_usb_xhci_power_on_valid - u0_cdn_usb_xhci_power_on_valid + u0_usb_xhci_power_on_valid + u0_usb_xhci_power_on_valid [15:15] read-write - u0_e2_sft7110_cease_from_tile_0 - u0_e2_sft7110_cease_from_tile_0 + u0_e2_cease_from_tile_0 + u0_e2_cease_from_tile_0 [16:16] read-only - u0_e2_sft7110_debug_from_tile_0 - u0_e2_sft7110_debug_from_tile_0 + u0_e2_debug_from_tile_0 + u0_e2_debug_from_tile_0 [17:17] read-only - u0_e2_sft7110_halt_from_tile_0 - u0_e2_sft7110_halt_from_tile_0 + u0_e2_halt_from_tile_0 + u0_e2_halt_from_tile_0 [18:18] read-only @@ -12909,8 +12909,8 @@ 0 - u0_e2_sft7110_nmi_0_rnmi_exception_vector - u0_e2_sft7110_nmi_0_rnmi_exception_vector + u0_e2_nmi_exception_vector + u0_e2_nmi_exception_vector [31:0] read-write @@ -12924,8 +12924,8 @@ 0 - u0_e2_sft7110_nmi_0_rnmi_interrupt_vector - u0_e2_sft7110_nmi_0_rnmi_interrupt_vector + u0_e2_nmi_interrupt_vector + u0_e2_nmi_interrupt_vector [31:0] read-write @@ -12939,8 +12939,8 @@ 0 - u0_e2_sft7110_reset_vector_0 - u0_e2_sft7110_reset_vector_0 + u0_e2_reset_vector_0 + u0_e2_reset_vector_0 [31:0] read-write @@ -12954,8 +12954,8 @@ 0 - u0_e2_sft7110_wfi_from_tile_0 - u0_e2_sft7110_wfi_from_tile_0 + u0_e2_wfi_from_tile_0 + u0_e2_wfi_from_tile_0 [0:0] read-only @@ -13209,8 +13209,8 @@ read-only - u0_plda_pcie_align_detect - u0_plda_pcie_align_detect + u0_pcie_align_detect + u0_pcie_align_detect [16:16] read-only @@ -13224,8 +13224,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_31_0 - u0_plda_pcie_axi4_mst0_aratomop_31_0 + u0_pcie_axi4_mst0_aratomop_31_0 + u0_pcie_axi4_mst0_aratomop_31_0 [31:0] read-only @@ -13239,8 +13239,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_63_32 - u0_plda_pcie_axi4_mst0_aratomop_63_32 + u0_pcie_axi4_mst0_aratomop_63_32 + u0_pcie_axi4_mst0_aratomop_63_32 [31:0] read-only @@ -13254,8 +13254,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_95_64 - u0_plda_pcie_axi4_mst0_aratomop_95_64 + u0_pcie_axi4_mst0_aratomop_95_64 + u0_pcie_axi4_mst0_aratomop_95_64 [31:0] read-only @@ -13269,8 +13269,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_127_96 - u0_plda_pcie_axi4_mst0_aratomop_127_96 + u0_pcie_axi4_mst0_aratomop_127_96 + u0_pcie_axi4_mst0_aratomop_127_96 [31:0] read-only @@ -13284,8 +13284,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_159_128 - u0_plda_pcie_axi4_mst0_aratomop_159_128 + u0_pcie_axi4_mst0_aratomop_159_128 + u0_pcie_axi4_mst0_aratomop_159_128 [31:0] read-only @@ -13299,8 +13299,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_191_160 - u0_plda_pcie_axi4_mst0_aratomop_191_160 + u0_pcie_axi4_mst0_aratomop_191_160 + u0_pcie_axi4_mst0_aratomop_191_160 [31:0] read-only @@ -13314,8 +13314,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_223_192 - u0_plda_pcie_axi4_mst0_aratomop_223_192 + u0_pcie_axi4_mst0_aratomop_223_192 + u0_pcie_axi4_mst0_aratomop_223_192 [31:0] read-only @@ -13329,8 +13329,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_255_224 - u0_plda_pcie_axi4_mst0_aratomop_255_224 + u0_pcie_axi4_mst0_aratomop_255_224 + u0_pcie_axi4_mst0_aratomop_255_224 [31:0] read-only @@ -13344,20 +13344,20 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_257_256 - u0_plda_pcie_axi4_mst0_aratomop_257_256 + u0_pcie_axi4_mst0_aratomop_257_256 + u0_pcie_axi4_mst0_aratomop_257_256 [1:0] read-only - u0_plda_pcie_axi4_mst0_arfunc - u0_plda_pcie_axi4_mst0_arfunc + u0_pcie_axi4_mst0_arfunc + u0_pcie_axi4_mst0_arfunc [16:2] read-only - u0_plda_pcie_axi4_mst0_arregion - u0_plda_pcie_axi4_mst0_arregion + u0_pcie_axi4_mst0_arregion + u0_pcie_axi4_mst0_arregion [20:17] read-only @@ -13371,8 +13371,8 @@ 0 - u0_plda_pcie_axi4_mst0_aruser_31_0 - u0_plda_pcie_axi4_mst0_aruser_31_0 + u0_pcie_axi4_mst0_aruser_31_0 + u0_pcie_axi4_mst0_aruser_31_0 [31:0] read-only @@ -13386,8 +13386,8 @@ 0 - u0_plda_pcie_axi4_mst0_aruser_63_32 - u0_plda_pcie_axi4_mst0_aruser_63_32 + u0_pcie_axi4_mst0_aruser_63_32 + u0_pcie_axi4_mst0_aruser_63_32 [31:0] read-only @@ -13401,14 +13401,14 @@ 0 - u0_plda_pcie_axi4_mst0_awfunc - u0_plda_pcie_axi4_mst0_awfunc + u0_pcie_axi4_mst0_awfunc + u0_pcie_axi4_mst0_awfunc [14:0] read-only - u0_plda_pcie_axi4_mst0_awregion - u0_plda_pcie_axi4_mst0_awregion + u0_pcie_axi4_mst0_awregion + u0_pcie_axi4_mst0_awregion [18:15] read-only @@ -13422,8 +13422,8 @@ 0 - u0_plda_pcie_axi4_mst0_a2user_31_0 - u0_plda_pcie_axi4_mst0_a2user_31_0 + u0_pcie_axi4_mst0_a2user_31_0 + u0_pcie_axi4_mst0_a2user_31_0 [31:0] read-only @@ -13437,14 +13437,14 @@ 0 - u0_plda_pcie_axi4_mst0_awuser_42_32 - u0_plda_pcie_axi4_mst0_awuser_42_32 + u0_pcie_axi4_mst0_awuser_42_32 + u0_pcie_axi4_mst0_awuser_42_32 [10:0] read-only - u0_plda_pcie_axi4_mst0_rderr - u0_plda_pcie_axi4_mst0_rderr + u0_pcie_axi4_mst0_rderr + u0_pcie_axi4_mst0_rderr [18:11] read-write @@ -13458,8 +13458,8 @@ 0 - u0_plda_pcie_axi4_mst0_ruser - u0_plda_pcie_axi4_mst0_ruser + u0_pcie_axi4_mst0_ruser + u0_pcie_axi4_mst0_ruser [31:0] read-write @@ -13473,8 +13473,8 @@ 0 - u0_plda_pcie_axi4_mst0_wderr - u0_plda_pcie_axi4_mst0_wderr + u0_pcie_axi4_mst0_wderr + u0_pcie_axi4_mst0_wderr [7:0] read-only @@ -13488,8 +13488,8 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_31_0 - u0_plda_pcie_axi4_slv0_aratomop_31_0 + u0_pcie_axi4_slv0_aratomop_31_0 + u0_pcie_axi4_slv0_aratomop_31_0 [31:0] read-write @@ -13503,8 +13503,8 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_63_32 - u0_plda_pcie_axi4_slv0_aratomop_63_32 + u0_pcie_axi4_slv0_aratomop_63_32 + u0_pcie_axi4_slv0_aratomop_63_32 [31:0] read-write @@ -13518,8 +13518,8 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_95_64 - u0_plda_pcie_axi4_slv0_aratomop_95_64 + u0_pcie_axi4_slv0_aratomop_95_64 + u0_pcie_axi4_slv0_aratomop_95_64 [31:0] read-write @@ -13533,8 +13533,8 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_127_96 - u0_plda_pcie_axi4_slv0_aratomop_127_96 + u0_pcie_axi4_slv0_aratomop_127_96 + u0_pcie_axi4_slv0_aratomop_127_96 [31:0] read-write @@ -13548,8 +13548,8 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_159_128 - u0_plda_pcie_axi4_slv0_aratomop_159_128 + u0_pcie_axi4_slv0_aratomop_159_128 + u0_pcie_axi4_slv0_aratomop_159_128 [31:0] read-write @@ -13563,8 +13563,8 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_191_160 - u0_plda_pcie_axi4_slv0_aratomop_191_160 + u0_pcie_axi4_slv0_aratomop_191_160 + u0_pcie_axi4_slv0_aratomop_191_160 [31:0] read-write @@ -13578,8 +13578,8 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_223_192 - u0_plda_pcie_axi4_slv0_aratomop_223_192 + u0_pcie_axi4_slv0_aratomop_223_192 + u0_pcie_axi4_slv0_aratomop_223_192 [31:0] read-write @@ -13593,8 +13593,8 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_255_224 - u0_plda_pcie_axi4_slv0_aratomop_255_224 + u0_pcie_axi4_slv0_aratomop_255_224 + u0_pcie_axi4_slv0_aratomop_255_224 [31:0] read-write @@ -13608,20 +13608,20 @@ 0 - u0_plda_pcie_axi4_slv0_aratomop_257_256 - u0_plda_pcie_axi4_slv0_aratomop_257_256 + u0_pcie_axi4_slv0_aratomop_257_256 + u0_pcie_axi4_slv0_aratomop_257_256 [1:0] read-write - u0_plda_pcie_axi4_slv0_arfunc - u0_plda_pcie_axi4_slv0_arfunc + u0_pcie_axi4_slv0_arfunc + u0_pcie_axi4_slv0_arfunc [16:2] read-write - u0_plda_pcie_axi4_slv0_arregion - u0_plda_pcie_axi4_slv0_arregion + u0_pcie_axi4_slv0_arregion + u0_pcie_axi4_slv0_arregion [20:17] read-write @@ -13635,8 +13635,8 @@ 0 - u0_plda_pcie_axi4_slv0_aruser_31_0 - u0_plda_pcie_axi4_slv0_aruser_31_0 + u0_pcie_axi4_slv0_aruser_31_0 + u0_pcie_axi4_slv0_aruser_31_0 [31:0] read-write @@ -13650,20 +13650,20 @@ 0 - u0_plda_pcie_axi4_slv0_aruser_40_32 - u0_plda_pcie_axi4_slv0_aruser_40_32 + u0_pcie_axi4_slv0_aruser_40_32 + u0_pcie_axi4_slv0_aruser_40_32 [8:0] read-write - u0_plda_pcie_axi4_slv0_awfunc - u0_plda_pcie_axi4_slv0_awfunc + u0_pcie_axi4_slv0_awfunc + u0_pcie_axi4_slv0_awfunc [23:9] read-write - u0_plda_pcie_axi4_slv0_awregion - u0_plda_pcie_axi4_slv0_awregion + u0_pcie_axi4_slv0_awregion + u0_pcie_axi4_slv0_awregion [27:24] read-write @@ -13677,8 +13677,8 @@ 0 - u0_plda_pcie_axi4_slv0_awuser_31_0 - u0_plda_pcie_axi4_slv0_awuser_31_0 + u0_pcie_axi4_slv0_awuser_31_0 + u0_pcie_axi4_slv0_awuser_31_0 [31:0] read-write @@ -13692,14 +13692,14 @@ 0 - u0_plda_pcie_axi4_slv0_awuser_40_32 - u0_plda_pcie_axi4_slv0_awuser_40_32 + u0_pcie_axi4_slv0_awuser_40_32 + u0_pcie_axi4_slv0_awuser_40_32 [8:0] read-write - u0_plda_pcie_axi4_slv0_rderr - u0_plda_pcie_axi4_slv0_rderr + u0_pcie_axi4_slv0_rderr + u0_pcie_axi4_slv0_rderr [16:9] read-only @@ -13713,8 +13713,8 @@ 0 - u0_plda_pcie_axi4_slv0_ruser - u0_plda_pcie_axi4_slv0_ruser + u0_pcie_axi4_slv0_ruser + u0_pcie_axi4_slv0_ruser [31:0] read-only @@ -13728,14 +13728,14 @@ 0 - u0_plda_pcie_axi4_slv0_wderr - u0_plda_pcie_axi4_slv0_wderr + u0_pcie_axi4_slv0_wderr + u0_pcie_axi4_slv0_wderr [7:0] read-write - u0_plda_pcie_axi4_slvl_arfunc - u0_plda_pcie_axi4_slvl_arfunc + u0_pcie_axi4_slvl_arfunc + u0_pcie_axi4_slvl_arfunc [22:8] read-only @@ -13749,38 +13749,38 @@ 0 - u0_plda_pcie_axi4_slvl_awfunc - u0_plda_pcie_axi4_slvl_awfunc + u0_pcie_axi4_slvl_awfunc + u0_pcie_axi4_slvl_awfunc [14:0] read-write - u0_plda_pcie_bus_width_o - u0_plda_pcie_bus_width_o + u0_pcie_bus_width_o + u0_pcie_bus_width_o [16:15] read-only - u0_plda_pcie_bypass_codec - u0_plda_pcie_bypass_codec + u0_pcie_bypass_codec + u0_pcie_bypass_codec [17:17] read-write - u0_plda_pcie_ckref_src - u0_plda_pcie_ckref_src + u0_pcie_ckref_src + u0_pcie_ckref_src [19:18] read-write - u0_plda_pcie_clk_sel - u0_plda_pcie_clk_sel + u0_pcie_clk_sel + u0_pcie_clk_sel [21:20] read-write - u0_plda_pcie_clkreq - u0_plda_pcie_clkreq + u0_pcie_clkreq + u0_pcie_clkreq [22:22] read-write @@ -13794,8 +13794,8 @@ 0 - u0_plda_pcie_k_phyparam_31_0 - u0_plda_pcie_k_phyparam_31_0 + u0_pcie_k_phyparam_31_0 + u0_pcie_k_phyparam_31_0 [31:0] read-write @@ -13809,8 +13809,8 @@ 0 - u0_plda_pcie_k_phyparam_63_32 - u0_plda_pcie_k_phyparam_63_32 + u0_pcie_k_phyparam_63_32 + u0_pcie_k_phyparam_63_32 [31:0] read-write @@ -13824,8 +13824,8 @@ 0 - u0_plda_pcie_k_phyparam_95_64 - u0_plda_pcie_k_phyparam_95_64 + u0_pcie_k_phyparam_95_64 + u0_pcie_k_phyparam_95_64 [31:0] read-write @@ -13839,8 +13839,8 @@ 0 - u0_plda_pcie_k_phyparam_127_96 - u0_plda_pcie_k_phyparam_127_96 + u0_pcie_k_phyparam_127_96 + u0_pcie_k_phyparam_127_96 [31:0] read-write @@ -13854,8 +13854,8 @@ 0 - u0_plda_pcie_k_phyparam_159_128 - u0_plda_pcie_k_phyparam_159_128 + u0_pcie_k_phyparam_159_128 + u0_pcie_k_phyparam_159_128 [31:0] read-write @@ -13869,8 +13869,8 @@ 0 - u0_plda_pcie_k_phyparam_191_160 - u0_plda_pcie_k_phyparam_191_160 + u0_pcie_k_phyparam_191_160 + u0_pcie_k_phyparam_191_160 [31:0] read-write @@ -13884,8 +13884,8 @@ 0 - u0_plda_pcie_k_phyparam_223_192 - u0_plda_pcie_k_phyparam_223_192 + u0_pcie_k_phyparam_223_192 + u0_pcie_k_phyparam_223_192 [31:0] read-write @@ -13899,8 +13899,8 @@ 0 - u0_plda_pcie_k_phyparam_255_224 - u0_plda_pcie_k_phyparam_255_224 + u0_pcie_k_phyparam_255_224 + u0_pcie_k_phyparam_255_224 [31:0] read-write @@ -13914,8 +13914,8 @@ 0 - u0_plda_pcie_k_phyparam_287_256 - u0_plda_pcie_k_phyparam_287_256 + u0_pcie_k_phyparam_287_256 + u0_pcie_k_phyparam_287_256 [31:0] read-write @@ -13929,8 +13929,8 @@ 0 - u0_plda_pcie_k_phyparam_319_288 - u0_plda_pcie_k_phyparam_319_288 + u0_pcie_k_phyparam_319_288 + u0_pcie_k_phyparam_319_288 [31:0] read-write @@ -13944,8 +13944,8 @@ 0 - u0_plda_pcie_k_phyparam_351_320 - u0_plda_pcie_k_phyparam_351_320 + u0_pcie_k_phyparam_351_320 + u0_pcie_k_phyparam_351_320 [31:0] read-write @@ -13959,8 +13959,8 @@ 0 - u0_plda_pcie_k_phyparam_383_352 - u0_plda_pcie_k_phyparam_383_352 + u0_pcie_k_phyparam_383_352 + u0_pcie_k_phyparam_383_352 [31:0] read-write @@ -13974,8 +13974,8 @@ 0 - u0_plda_pcie_k_phyparam_415_384 - u0_plda_pcie_k_phyparam_415_384 + u0_pcie_k_phyparam_415_384 + u0_pcie_k_phyparam_415_384 [31:0] read-write @@ -13989,8 +13989,8 @@ 0 - u0_plda_pcie_k_phyparam_447_416 - u0_plda_pcie_k_phyparam_447_416 + u0_pcie_k_phyparam_447_416 + u0_pcie_k_phyparam_447_416 [31:0] read-write @@ -14004,8 +14004,8 @@ 0 - u0_plda_pcie_k_phyparam_479_448 - u0_plda_pcie_k_phyparam_479_448 + u0_pcie_k_phyparam_479_448 + u0_pcie_k_phyparam_479_448 [31:0] read-write @@ -14019,8 +14019,8 @@ 0 - u0_plda_pcie_k_phyparam_511_480 - u0_plda_pcie_k_phyparam_511_480 + u0_pcie_k_phyparam_511_480 + u0_pcie_k_phyparam_511_480 [31:0] read-write @@ -14034,8 +14034,8 @@ 0 - u0_plda_pcie_k_phyparam_543_512 - u0_plda_pcie_k_phyparam_543_512 + u0_pcie_k_phyparam_543_512 + u0_pcie_k_phyparam_543_512 [31:0] read-write @@ -14049,8 +14049,8 @@ 0 - u0_plda_pcie_k_phyparam_575_544 - u0_plda_pcie_k_phyparam_575_544 + u0_pcie_k_phyparam_575_544 + u0_pcie_k_phyparam_575_544 [31:0] read-write @@ -14064,8 +14064,8 @@ 0 - u0_plda_pcie_k_phyparam_607_576 - u0_plda_pcie_k_phyparam_607_576 + u0_pcie_k_phyparam_607_576 + u0_pcie_k_phyparam_607_576 [31:0] read-write @@ -14079,8 +14079,8 @@ 0 - u0_plda_pcie_k_phyparam_639_608 - u0_plda_pcie_k_phyparam_639_608 + u0_pcie_k_phyparam_639_608 + u0_pcie_k_phyparam_639_608 [31:0] read-write @@ -14094,8 +14094,8 @@ 0 - u0_plda_pcie_k_phyparam_671_640 - u0_plda_pcie_k_phyparam_671_640 + u0_pcie_k_phyparam_671_640 + u0_pcie_k_phyparam_671_640 [31:0] read-write @@ -14109,8 +14109,8 @@ 0 - u0_plda_pcie_k_phyparam_703_672 - u0_plda_pcie_k_phyparam_703_672 + u0_pcie_k_phyparam_703_672 + u0_pcie_k_phyparam_703_672 [31:0] read-write @@ -14124,8 +14124,8 @@ 0 - u0_plda_pcie_k_phyparam_735_704 - u0_plda_pcie_k_phyparam_735_704 + u0_pcie_k_phyparam_735_704 + u0_pcie_k_phyparam_735_704 [31:0] read-write @@ -14139,8 +14139,8 @@ 0 - u0_plda_pcie_k_phyparam_767_736 - u0_plda_pcie_k_phyparam_767_736 + u0_pcie_k_phyparam_767_736 + u0_pcie_k_phyparam_767_736 [31:0] read-write @@ -14154,8 +14154,8 @@ 0 - u0_plda_pcie_k_phyparam_799_768 - u0_plda_pcie_k_phyparam_799_768 + u0_pcie_k_phyparam_799_768 + u0_pcie_k_phyparam_799_768 [31:0] read-write @@ -14169,8 +14169,8 @@ 0 - u0_plda_pcie_k_phyparam_831_800 - u0_plda_pcie_k_phyparam_831_800 + u0_pcie_k_phyparam_831_800 + u0_pcie_k_phyparam_831_800 [31:0] read-write @@ -14184,26 +14184,26 @@ 0 - u0_plda_pcie_k_phyparam_839_832 - u0_plda_pcie_k_phyparam_839_832 + u0_pcie_k_phyparam_839_832 + u0_pcie_k_phyparam_839_832 [7:0] read-write - u0_plda_pcie_k_rp_nep - u0_plda_pcie_k_rp_nep + u0_pcie_k_rp_nep + u0_pcie_k_rp_nep [8:8] read-write - u0_plda_pcie_l1sub_entack - u0_plda_pcie_l1sub_entack + u0_pcie_l1sub_entack + u0_pcie_l1sub_entack [9:9] read-only - u0_plda_pcie_l1sub_entreq - u0_plda_pcie_l1sub_entreq + u0_pcie_l1sub_entreq + u0_pcie_l1sub_entreq [10:10] read-write @@ -14217,8 +14217,8 @@ 0 - u0_plda_pcie_local_interrupt_in - u0_plda_pcie_local_interrupt_in + u0_pcie_local_interrupt_in + u0_pcie_local_interrupt_in [31:0] read-write @@ -14232,38 +14232,38 @@ 0 - u0_plda_pcie_mperstn - u0_plda_pcie_mperstn + u0_pcie_mperstn + u0_pcie_mperstn [0:0] read-write - u0_plda_pcie_pcie_ebuf_mode - u0_plda_pcie_pcie_ebuf_mode + u0_pcie_pcie_ebuf_mode + u0_pcie_pcie_ebuf_mode [1:1] read-write - u0_plda_pcie_pcie_phy_test_cfg - u0_plda_pcie_pcie_phy_test_cfg + u0_pcie_pcie_phy_test_cfg + u0_pcie_pcie_phy_test_cfg [24:2] read-write - u0_plda_pcie_pcie_rx_eq_training - u0_plda_pcie_pcie_rx_eq_training + u0_pcie_pcie_rx_eq_training + u0_pcie_pcie_rx_eq_training [25:25] read-write - u0_plda_pcie_pcie_rxterm_en - u0_plda_pcie_pcie_rxterm_en + u0_pcie_pcie_rxterm_en + u0_pcie_pcie_rxterm_en [26:26] read-write - u0_plda_pcie_pcie_tx_onezeros - u0_plda_pcie_pcie_tx_onezeros + u0_pcie_pcie_tx_onezeros + u0_pcie_pcie_tx_onezeros [27:27] read-write @@ -14277,8 +14277,8 @@ 0 - u0_plda_pcie_pf0_offset - u0_plda_pcie_pf0_offset + u0_pcie_pf0_offset + u0_pcie_pf0_offset [19:0] read-write @@ -14292,8 +14292,8 @@ 0 - u0_plda_pcie_pf1_offset - u0_plda_pcie_pf1_offset + u0_pcie_pf1_offset + u0_pcie_pf1_offset [19:0] read-write @@ -14307,8 +14307,8 @@ 0 - u0_plda_pcie_pf2_offset - u0_plda_pcie_pf2_offset + u0_pcie_pf2_offset + u0_pcie_pf2_offset [19:0] read-write @@ -14322,38 +14322,38 @@ 0 - u0_plda_pcie_pf3_offset - u0_plda_pcie_pf3_offset + u0_pcie_pf3_offset + u0_pcie_pf3_offset [19:0] read-write - u0_plda_pcie_phy_mode - u0_plda_pcie_phy_mode + u0_pcie_phy_mode + u0_pcie_phy_mode [21:20] read-write - u0_plda_pcie_pl_clkrem_allow - u0_plda_pcie_pl_clkrem_allow + u0_pcie_pl_clkrem_allow + u0_pcie_pl_clkrem_allow [22:22] read-write - u0_plda_pcie_pl_clkreq_oen - u0_plda_pcie_pl_clkreq_oen + u0_pcie_pl_clkreq_oen + u0_pcie_pl_clkreq_oen [23:23] read-only - u0_plda_pcie_pl_equ_phase - u0_plda_pcie_pl_equ_phase + u0_pcie_pl_equ_phase + u0_pcie_pl_equ_phase [25:24] read-only - u0_plda_pcie_pl_ltssm - u0_plda_pcie_pl_ltssm + u0_pcie_pl_ltssm + u0_pcie_pl_ltssm [30:26] read-only @@ -14367,8 +14367,8 @@ 0 - u0_plda_pcie_pl_pclk_rate - u0_plda_pcie_pl_pclk_rate + u0_pcie_pl_pclk_rate + u0_pcie_pl_pclk_rate [4:0] read-only @@ -14382,8 +14382,8 @@ 0 - u0_plda_pcie_pl_sideband_in_31_0 - u0_plda_pcie_pl_sideband_in_31_0 + u0_pcie_pl_sideband_in_31_0 + u0_pcie_pl_sideband_in_31_0 [31:0] read-only @@ -14397,8 +14397,8 @@ 0 - u0_plda_pcie_pl_sideband_in_63_32 - u0_plda_pcie_pl_sideband_in_63_32 + u0_pcie_pl_sideband_in_63_32 + u0_pcie_pl_sideband_in_63_32 [31:0] read-only @@ -14412,8 +14412,8 @@ 0 - u0_plda_pcie_pl_sideband_out_31_0 - u0_plda_pcie_pl_sideband_out_31_0 + u0_pcie_pl_sideband_out_31_0 + u0_pcie_pl_sideband_out_31_0 [31:0] read-only @@ -14427,8 +14427,8 @@ 0 - u0_plda_pcie_pl_sideband_out_63_32 - u0_plda_pcie_pl_sideband_out_63_32 + u0_pcie_pl_sideband_out_63_32 + u0_pcie_pl_sideband_out_63_32 [31:0] read-only @@ -14442,20 +14442,20 @@ 0 - u0_plda_pcie_pl_wake_in - u0_plda_pcie_pl_wake_in + u0_pcie_pl_wake_in + u0_pcie_pl_wake_in [0:0] read-write - u0_plda_pcie_pl_wake_oen - u0_plda_pcie_pl_wake_oen + u0_pcie_pl_wake_oen + u0_pcie_pl_wake_oen [1:1] read-only - u0_plda_pcie_rx_standby_0 - u0_plda_pcie_rx_standby_0 + u0_pcie_rx_standby_0 + u0_pcie_rx_standby_0 [2:2] read-only @@ -14469,8 +14469,8 @@ 0 - u0_plda_pcie_test_in_31_0 - u0_plda_pcie_test_in_31_0 + u0_pcie_test_in_31_0 + u0_pcie_test_in_31_0 [31:0] read-write @@ -14484,8 +14484,8 @@ 0 - u0_plda_pcie_test_in_63_32 - u0_plda_pcie_test_in_63_32 + u0_pcie_test_in_63_32 + u0_pcie_test_in_63_32 [31:0] read-write @@ -14499,8 +14499,8 @@ 0 - u0_plda_pcie_test_out_bridge_31_0 - u0_plda_pcie_test_out_bridge_31_0 + u0_pcie_test_out_bridge_31_0 + u0_pcie_test_out_bridge_31_0 [31:0] read-only @@ -14514,8 +14514,8 @@ 0 - u0_plda_pcie_test_out_bridge_63_32 - u0_plda_pcie_test_out_bridge_63_32 + u0_pcie_test_out_bridge_63_32 + u0_pcie_test_out_bridge_63_32 [31:0] read-only @@ -14529,8 +14529,8 @@ 0 - u0_plda_pcie_test_out_bridge_95_64 - u0_plda_pcie_test_out_bridge_95_64 + u0_pcie_test_out_bridge_95_64 + u0_pcie_test_out_bridge_95_64 [31:0] read-only @@ -14544,8 +14544,8 @@ 0 - u0_plda_pcie_test_out_bridge_127_96 - u0_plda_pcie_test_out_bridge_127_96 + u0_pcie_test_out_bridge_127_96 + u0_pcie_test_out_bridge_127_96 [31:0] read-only @@ -14559,8 +14559,8 @@ 0 - u0_plda_pcie_test_out_bridge_159_128 - u0_plda_pcie_test_out_bridge_159_128 + u0_pcie_test_out_bridge_159_128 + u0_pcie_test_out_bridge_159_128 [31:0] read-only @@ -14574,8 +14574,8 @@ 0 - u0_plda_pcie_test_out_bridge_191_160 - u0_plda_pcie_test_out_bridge_191_160 + u0_pcie_test_out_bridge_191_160 + u0_pcie_test_out_bridge_191_160 [31:0] read-only @@ -14589,8 +14589,8 @@ 0 - u0_plda_pcie_test_out_bridge_223_192 - u0_plda_pcie_test_out_bridge_223_192 + u0_pcie_test_out_bridge_223_192 + u0_pcie_test_out_bridge_223_192 [31:0] read-only @@ -14604,8 +14604,8 @@ 0 - u0_plda_pcie_test_out_bridge_255_224 - u0_plda_pcie_test_out_bridge_255_224 + u0_pcie_test_out_bridge_255_224 + u0_pcie_test_out_bridge_255_224 [31:0] read-only @@ -14619,8 +14619,8 @@ 0 - u0_plda_pcie_test_out_bridge_287_256 - u0_plda_pcie_test_out_bridge_287_256 + u0_pcie_test_out_bridge_287_256 + u0_pcie_test_out_bridge_287_256 [31:0] read-only @@ -14634,8 +14634,8 @@ 0 - u0_plda_pcie_test_out_bridge_319_288 - u0_plda_pcie_test_out_bridge_319_288 + u0_pcie_test_out_bridge_319_288 + u0_pcie_test_out_bridge_319_288 [31:0] read-only @@ -14649,8 +14649,8 @@ 0 - u0_plda_pcie_test_out_bridge_351_320 - u0_plda_pcie_test_out_bridge_351_320 + u0_pcie_test_out_bridge_351_320 + u0_pcie_test_out_bridge_351_320 [31:0] read-only @@ -14664,8 +14664,8 @@ 0 - u0_plda_pcie_test_out_bridge_383_352 - u0_plda_pcie_test_out_bridge_383_352 + u0_pcie_test_out_bridge_383_352 + u0_pcie_test_out_bridge_383_352 [31:0] read-only @@ -14679,8 +14679,8 @@ 0 - u0_plda_pcie_test_out_bridge_415_384 - u0_plda_pcie_test_out_bridge_415_384 + u0_pcie_test_out_bridge_415_384 + u0_pcie_test_out_bridge_415_384 [31:0] read-only @@ -14694,8 +14694,8 @@ 0 - u0_plda_pcie_test_out_bridge_447_416 - u0_plda_pcie_test_out_bridge_447_416 + u0_pcie_test_out_bridge_447_416 + u0_pcie_test_out_bridge_447_416 [31:0] read-only @@ -14709,8 +14709,8 @@ 0 - u0_plda_pcie_test_out_bridge_479_448 - u0_plda_pcie_test_out_bridge_479_448 + u0_pcie_test_out_bridge_479_448 + u0_pcie_test_out_bridge_479_448 [31:0] read-only @@ -14724,8 +14724,8 @@ 0 - u0_plda_pcie_test_out_bridge_511_480 - u0_plda_pcie_test_out_bridge_511_480 + u0_pcie_test_out_bridge_511_480 + u0_pcie_test_out_bridge_511_480 [31:0] read-only @@ -14739,8 +14739,8 @@ 0 - u0_plda_pcie_test_out_pcie_31_0 - u0_plda_pcie_test_out_pcie_31_0 + u0_pcie_test_out_pcie_31_0 + u0_pcie_test_out_pcie_31_0 [31:0] read-only @@ -14754,8 +14754,8 @@ 0 - u0_plda_pcie_test_out_pcie_63_32 - u0_plda_pcie_test_out_pcie_63_32 + u0_pcie_test_out_pcie_63_32 + u0_pcie_test_out_pcie_63_32 [31:0] read-only @@ -14769,8 +14769,8 @@ 0 - u0_plda_pcie_test_out_pcie_95_64 - u0_plda_pcie_test_out_pcie_95_64 + u0_pcie_test_out_pcie_95_64 + u0_pcie_test_out_pcie_95_64 [31:0] read-only @@ -14784,8 +14784,8 @@ 0 - u0_plda_pcie_test_out_pcie_127_96 - u0_plda_pcie_test_out_pcie_127_96 + u0_pcie_test_out_pcie_127_96 + u0_pcie_test_out_pcie_127_96 [31:0] read-only @@ -14799,8 +14799,8 @@ 0 - u0_plda_pcie_test_out_pcie_159_128 - u0_plda_pcie_test_out_pcie_159_128 + u0_pcie_test_out_pcie_159_128 + u0_pcie_test_out_pcie_159_128 [31:0] read-only @@ -14814,8 +14814,8 @@ 0 - u0_plda_pcie_test_out_pcie_191_160 - u0_plda_pcie_test_out_pcie_191_160 + u0_pcie_test_out_pcie_191_160 + u0_pcie_test_out_pcie_191_160 [31:0] read-only @@ -14829,8 +14829,8 @@ 0 - u0_plda_pcie_test_out_pcie_223_192 - u0_plda_pcie_test_out_pcie_223_192 + u0_pcie_test_out_pcie_223_192 + u0_pcie_test_out_pcie_223_192 [31:0] read-only @@ -14844,8 +14844,8 @@ 0 - u0_plda_pcie_test_out_pcie_255_224 - u0_plda_pcie_test_out_pcie_255_224 + u0_pcie_test_out_pcie_255_224 + u0_pcie_test_out_pcie_255_224 [31:0] read-only @@ -14859,8 +14859,8 @@ 0 - u0_plda_pcie_test_out_pcie_287_256 - u0_plda_pcie_test_out_pcie_287_256 + u0_pcie_test_out_pcie_287_256 + u0_pcie_test_out_pcie_287_256 [31:0] read-only @@ -14874,8 +14874,8 @@ 0 - u0_plda_pcie_test_out_pcie_319_288 - u0_plda_pcie_test_out_pcie_319_288 + u0_pcie_test_out_pcie_319_288 + u0_pcie_test_out_pcie_319_288 [31:0] read-only @@ -14889,8 +14889,8 @@ 0 - u0_plda_pcie_test_out_pcie_351_320 - u0_plda_pcie_test_out_pcie_351_320 + u0_pcie_test_out_pcie_351_320 + u0_pcie_test_out_pcie_351_320 [31:0] read-only @@ -14904,8 +14904,8 @@ 0 - u0_plda_pcie_test_out_pcie_383_352 - u0_plda_pcie_test_out_pcie_383_352 + u0_pcie_test_out_pcie_383_352 + u0_pcie_test_out_pcie_383_352 [31:0] read-only @@ -14919,8 +14919,8 @@ 0 - u0_plda_pcie_test_out_pcie_415_384 - u0_plda_pcie_test_out_pcie_415_384 + u0_pcie_test_out_pcie_415_384 + u0_pcie_test_out_pcie_415_384 [31:0] read-only @@ -14934,8 +14934,8 @@ 0 - u0_plda_pcie_test_out_pcie_447_416 - u0_plda_pcie_test_out_pcie_447_416 + u0_pcie_test_out_pcie_447_416 + u0_pcie_test_out_pcie_447_416 [31:0] read-only @@ -14949,8 +14949,8 @@ 0 - u0_plda_pcie_test_out_pcie_479_448 - u0_plda_pcie_test_out_pcie_479_448 + u0_pcie_test_out_pcie_479_448 + u0_pcie_test_out_pcie_479_448 [31:0] read-only @@ -14964,8 +14964,8 @@ 0 - u0_plda_pcie_test_out_pcie_511_480 - u0_plda_pcie_test_out_pcie_511_480 + u0_pcie_test_out_pcie_511_480 + u0_pcie_test_out_pcie_511_480 [31:0] read-only @@ -14979,14 +14979,14 @@ 0 - u0_plda_pcie_test_sel - u0_plda_pcie_test_sel + u0_pcie_test_sel + u0_pcie_test_sel [3:0] read-write - u0_plda_pcie_tl_clock_freq - u0_plda_pcie_tl_clock_freq + u0_pcie_tl_clock_freq + u0_pcie_tl_clock_freq [25:4] read-write @@ -15000,14 +15000,14 @@ 0 - u0_plda_pcie_tl_ctrl_hotplug - u0_plda_pcie_tl_ctrl_hotplug + u0_pcie_tl_ctrl_hotplug + u0_pcie_tl_ctrl_hotplug [15:0] read-only - u0_plda_pcie_tl_report_hotplug - u0_plda_pcie_tl_report_hotplug + u0_pcie_tl_report_hotplug + u0_pcie_tl_report_hotplug [31:16] read-write @@ -15021,50 +15021,50 @@ 0 - u0_plda_pcie_tx_pattern - u0_plda_pcie_tx_pattern + u0_pcie_tx_pattern + u0_pcie_tx_pattern [1:0] read-write - u0_plda_pcie_usb3_bus_width - u0_plda_pcie_usb3_bus_width + u0_pcie_usb3_bus_width + u0_pcie_usb3_bus_width [3:2] read-write - u0_plda_pcie_usb3_phy_enable - u0_plda_pcie_usb3_phy_enable + u0_pcie_usb3_phy_enable + u0_pcie_usb3_phy_enable [4:4] read-write - u0_plda_pcie_usb3_rate - u0_plda_pcie_usb3_rate + u0_pcie_usb3_rate + u0_pcie_usb3_rate [6:5] read-write - u0_plda_pcie_usb3_rx_standby - u0_plda_pcie_usb3_rx_standby + u0_pcie_usb3_rx_standby + u0_pcie_usb3_rx_standby [7:7] read-write - u0_plda_pcie_xwdecerr - u0_plda_pcie_xwdecerr + u0_pcie_xwdecerr + u0_pcie_xwdecerr [8:8] read-only - u0_plda_pcie_xwerrclr - u0_plda_pcie_xwerrclr + u0_pcie_xwerrclr + u0_pcie_xwerrclr [9:9] read-write - u0_plda_pcie_xwslverr - u0_plda_pcie_xwslverr + u0_pcie_xwslverr + u0_pcie_xwslverr [10:10] read-only @@ -15132,8 +15132,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_31_0 - u0_plda_pcie_axi4_mst0_aratomop_31_0 + u0_pcie_axi4_mst0_aratomop_31_0 + u0_pcie_axi4_mst0_aratomop_31_0 [31:0] read-only @@ -15147,8 +15147,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_63_32 - u0_plda_pcie_axi4_mst0_aratomop_63_32 + u0_pcie_axi4_mst0_aratomop_63_32 + u0_pcie_axi4_mst0_aratomop_63_32 [31:0] read-only @@ -15162,8 +15162,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_95_64 - u0_plda_pcie_axi4_mst0_aratomop_95_64 + u0_pcie_axi4_mst0_aratomop_95_64 + u0_pcie_axi4_mst0_aratomop_95_64 [31:0] read-only @@ -15177,8 +15177,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_127_96 - u0_plda_pcie_axi4_mst0_aratomop_127_96 + u0_pcie_axi4_mst0_aratomop_127_96 + u0_pcie_axi4_mst0_aratomop_127_96 [31:0] read-only @@ -15192,8 +15192,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_159_128 - u0_plda_pcie_axi4_mst0_aratomop_159_128 + u0_pcie_axi4_mst0_aratomop_159_128 + u0_pcie_axi4_mst0_aratomop_159_128 [31:0] read-only @@ -15207,8 +15207,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_191_160 - u0_plda_pcie_axi4_mst0_aratomop_191_160 + u0_pcie_axi4_mst0_aratomop_191_160 + u0_pcie_axi4_mst0_aratomop_191_160 [31:0] read-only @@ -15222,8 +15222,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_223_192 - u0_plda_pcie_axi4_mst0_aratomop_223_192 + u0_pcie_axi4_mst0_aratomop_223_192 + u0_pcie_axi4_mst0_aratomop_223_192 [31:0] read-only @@ -15237,8 +15237,8 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_255_224 - u0_plda_pcie_axi4_mst0_aratomop_255_224 + u0_pcie_axi4_mst0_aratomop_255_224 + u0_pcie_axi4_mst0_aratomop_255_224 [31:0] read-only @@ -15252,20 +15252,20 @@ 0 - u0_plda_pcie_axi4_mst0_aratomop_257_256 - u0_plda_pcie_axi4_mst0_aratomop_257_256 + u0_pcie_axi4_mst0_aratomop_257_256 + u0_pcie_axi4_mst0_aratomop_257_256 [1:0] read-only - u0_plda_pcie_axi4_mst0_arfunc - u0_plda_pcie_axi4_mst0_arfunc + u0_pcie_axi4_mst0_arfunc + u0_pcie_axi4_mst0_arfunc [16:2] read-only - u0_plda_pcie_axi4_mst0_arregion - u0_plda_pcie_axi4_mst0_arregion + u0_pcie_axi4_mst0_arregion + u0_pcie_axi4_mst0_arregion [20:17] read-only @@ -15279,8 +15279,8 @@ 0 - u1_plda_pcie_axi4_mst0_aruser_31_0 - u1_plda_pcie_axi4_mst0_aruser_31_0 + u1_pcie_axi4_mst0_aruser_31_0 + u1_pcie_axi4_mst0_aruser_31_0 [31:0] read-only @@ -15294,8 +15294,8 @@ 0 - u1_plda_pcie_axi4_mst0_aruser_52_32 - u1_plda_pcie_axi4_mst0_aruser_52_32 + u1_pcie_axi4_mst0_aruser_52_32 + u1_pcie_axi4_mst0_aruser_52_32 [20:0] read-only @@ -15309,14 +15309,14 @@ 0 - u1_plda_pcie_axi4_mst0_awfunc - u1_plda_pcie_axi4_mst0_awfunc + u1_pcie_axi4_mst0_awfunc + u1_pcie_axi4_mst0_awfunc [14:0] read-only - u1_plda_pcie_axi4_mst0_awregion - u1_plda_pcie_axi4_mst0_awregion + u1_pcie_axi4_mst0_awregion + u1_pcie_axi4_mst0_awregion [18:15] read-only @@ -15330,8 +15330,8 @@ 0 - u1_plda_pcie_axi4_mst0_awuser_31_0 - u1_plda_pcie_axi4_mst0_awuser_31_0 + u1_pcie_axi4_mst0_awuser_31_0 + u1_pcie_axi4_mst0_awuser_31_0 [31:0] read-only @@ -15345,14 +15345,14 @@ 0 - u1_plda_pcie_axi4_mst0_awuser_42_32 - u1_plda_pcie_axi4_mst0_awuser_42_32 + u1_pcie_axi4_mst0_awuser_42_32 + u1_pcie_axi4_mst0_awuser_42_32 [10:0] read-only - u1_plda_pcie_axi4_mst0_rderr - u1_plda_pcie_axi4_mst0_rderr + u1_pcie_axi4_mst0_rderr + u1_pcie_axi4_mst0_rderr [18:11] read-write @@ -15366,8 +15366,8 @@ 0 - u1_plda_pcie_axi4_mst0_ruser - u1_plda_pcie_axi4_mst0_ruser + u1_pcie_axi4_mst0_ruser + u1_pcie_axi4_mst0_ruser [31:0] read-write @@ -15381,8 +15381,8 @@ 0 - u1_plda_pcie_axi4_mst0_wderr - u1_plda_pcie_axi4_mst0_wderr + u1_pcie_axi4_mst0_wderr + u1_pcie_axi4_mst0_wderr [7:0] read-only @@ -15396,8 +15396,8 @@ 0 - u1_plda_pcie_axi4_slv0_aratomop_31_0 - u1_plda_pcie_axi4_slv0_aratomop_31_0 + u1_pcie_axi4_slv0_aratomop_31_0 + u1_pcie_axi4_slv0_aratomop_31_0 [31:0] read-write @@ -15411,8 +15411,8 @@ 0 - u1_plda_pcie_axi4_slv0_aratomop_63_32 - u1_plda_pcie_axi4_slv0_aratomop_63_32 + u1_pcie_axi4_slv0_aratomop_63_32 + u1_pcie_axi4_slv0_aratomop_63_32 [31:0] read-write @@ -15426,8 +15426,8 @@ 0 - u1_plda_pcie_axi4_slv0_aratomop_95_64 - u1_plda_pcie_axi4_slv0_aratomop_95_64 + u1_pcie_axi4_slv0_aratomop_95_64 + u1_pcie_axi4_slv0_aratomop_95_64 [31:0] read-write @@ -15441,8 +15441,8 @@ 0 - u1_plda_pcie_axi4_slv0_aratomop_127_96 - u1_plda_pcie_axi4_slv0_aratomop_127_96 + u1_pcie_axi4_slv0_aratomop_127_96 + u1_pcie_axi4_slv0_aratomop_127_96 [31:0] read-write @@ -15456,8 +15456,8 @@ 0 - u1_plda_pcie_axi4_slv0_aratomop_159_128 - u1_plda_pcie_axi4_slv0_aratomop_159_128 + u1_pcie_axi4_slv0_aratomop_159_128 + u1_pcie_axi4_slv0_aratomop_159_128 [31:0] read-write @@ -15471,8 +15471,8 @@ 0 - u1_plda_pcie_axi4_slv0_aratomop_191_160 - u1_plda_pcie_axi4_slv0_aratomop_191_160 + u1_pcie_axi4_slv0_aratomop_191_160 + u1_pcie_axi4_slv0_aratomop_191_160 [31:0] read-write @@ -15486,8 +15486,8 @@ 0 - u1_plda_pcie_axi4_slv0_aratomop_223_192 - u1_plda_pcie_axi4_slv0_aratomop_223_192 + u1_pcie_axi4_slv0_aratomop_223_192 + u1_pcie_axi4_slv0_aratomop_223_192 [31:0] read-write @@ -15501,8 +15501,8 @@ 0 - u1_plda_pcie_axi4_slv0_aratomop_255_224 - u1_plda_pcie_axi4_slv0_aratomop_255_224 + u1_pcie_axi4_slv0_aratomop_255_224 + u1_pcie_axi4_slv0_aratomop_255_224 [31:0] read-write @@ -15516,20 +15516,20 @@ 0 - u1_plda_pcie_axi4_mst0_aratomop_257_256 - u1_plda_pcie_axi4_mst0_aratomop_257_256 + u1_pcie_axi4_mst0_aratomop_257_256 + u1_pcie_axi4_mst0_aratomop_257_256 [1:0] read-write - u1_plda_pcie_axi4_slv0_arfunc - u1_plda_pcie_axi4_slv0_arfunc + u1_pcie_axi4_slv0_arfunc + u1_pcie_axi4_slv0_arfunc [16:2] read-write - u1_plda_pcie_axi4_slv0_arregion - u1_plda_pcie_axi4_slv0_arregion + u1_pcie_axi4_slv0_arregion + u1_pcie_axi4_slv0_arregion [20:17] read-write @@ -15543,8 +15543,8 @@ 0 - u1_plda_pcie_axi4_slv0_aruser_31_0 - u1_plda_pcie_axi4_slv0_aruser_31_0 + u1_pcie_axi4_slv0_aruser_31_0 + u1_pcie_axi4_slv0_aruser_31_0 [31:0] read-write @@ -15558,20 +15558,20 @@ 0 - u1_plda_pcie_axi4_slv0_aruser_40_32 - u1_plda_pcie_axi4_slv0_aruser_40_32 + u1_pcie_axi4_slv0_aruser_40_32 + u1_pcie_axi4_slv0_aruser_40_32 [8:0] read-write - u1_plda_pcie_axi4_slv0_awfunc - u1_plda_pcie_axi4_slv0_awfunc + u1_pcie_axi4_slv0_awfunc + u1_pcie_axi4_slv0_awfunc [23:9] read-write - u1_plda_pcie_axi4_slv0_awregion - u1_plda_pcie_axi4_slv0_awregion + u1_pcie_axi4_slv0_awregion + u1_pcie_axi4_slv0_awregion [27:24] read-write @@ -15585,8 +15585,8 @@ 0 - u1_plda_pcie_axi4_slv0_awuser_31_0 - u1_plda_pcie_axi4_slv0_awuser_31_0 + u1_pcie_axi4_slv0_awuser_31_0 + u1_pcie_axi4_slv0_awuser_31_0 [31:0] read-write @@ -15600,14 +15600,14 @@ 0 - u1_plda_pcie_axi4_slv0_awuser_40_32 - u1_plda_pcie_axi4_slv0_awuser_40_32 + u1_pcie_axi4_slv0_awuser_40_32 + u1_pcie_axi4_slv0_awuser_40_32 [8:0] read-write - u1_plda_pcie_axi4_slv0_rderr - u1_plda_pcie_axi4_slv0_rderr + u1_pcie_axi4_slv0_rderr + u1_pcie_axi4_slv0_rderr [16:9] read-only @@ -15621,8 +15621,8 @@ 0 - u1_plda_pcie_axi4_slv0_ruser - u1_plda_pcie_axi4_slv0_ruser + u1_pcie_axi4_slv0_ruser + u1_pcie_axi4_slv0_ruser [31:0] read-only @@ -15636,14 +15636,14 @@ 0 - u1_plda_pcie_axi4_slv0_wderr - u1_plda_pcie_axi4_slv0_wderr + u1_pcie_axi4_slv0_wderr + u1_pcie_axi4_slv0_wderr [7:0] read-write - u1_plda_pcie_axi4_slvl_arfunc - u1_plda_pcie_axi4_slvl_arfunc + u1_pcie_axi4_slvl_arfunc + u1_pcie_axi4_slvl_arfunc [22:8] read-write @@ -15657,38 +15657,38 @@ 0 - u1_plda_pcie_axi4_slvl_awfunc - u1_plda_pcie_axi4_slvl_awfunc + u1_pcie_axi4_slvl_awfunc + u1_pcie_axi4_slvl_awfunc [14:0] read-write - u1_plda_pcie_bus_width_o - u1_plda_pcie_bus_width_o + u1_pcie_bus_width_o + u1_pcie_bus_width_o [16:15] read-only - u1_plda_pcie_bypass_codec - u1_plda_pcie_bypass_codec + u1_pcie_bypass_codec + u1_pcie_bypass_codec [17:17] read-write - u1_plda_pcie_ckref_src - u1_plda_pcie_ckref_src + u1_pcie_ckref_src + u1_pcie_ckref_src [19:18] read-write - u1_plda_pcie_clk_sel - u1_plda_pcie_clk_sel + u1_pcie_clk_sel + u1_pcie_clk_sel [21:20] read-write - u1_plda_pcie_clkreq - u1_plda_pcie_clkreq + u1_pcie_clkreq + u1_pcie_clkreq [22:22] read-write @@ -16092,26 +16092,26 @@ 0 - u1_plda_pcie_k_phyparam_839_832 - u1_plda_pcie_k_phyparam_839_832 + u1_pcie_k_phyparam_839_832 + u1_pcie_k_phyparam_839_832 [7:0] read-write - u1_plda_pcie_k_rp_nep - u1_plda_pcie_k_rp_nep + u1_pcie_k_rp_nep + u1_pcie_k_rp_nep [8:8] read-write - u1_plda_pcie_l1sub_entack - u1_plda_pcie_l1sub_entack + u1_pcie_l1sub_entack + u1_pcie_l1sub_entack [9:9] read-only - u1_plda_pcie_l1sub_entreq - u1_plda_pcie_l1sub_entreq + u1_pcie_l1sub_entreq + u1_pcie_l1sub_entreq [10:10] read-write @@ -16125,8 +16125,8 @@ 0 - u1_plda_pcie_local_interrupt_in - u1_plda_pcie_local_interrupt_in + u1_pcie_local_interrupt_in + u1_pcie_local_interrupt_in [31:0] read-write @@ -16140,38 +16140,38 @@ 0 - u1_plda_pcie_mperstn - u1_plda_pcie_mperstn + u1_pcie_mperstn + u1_pcie_mperstn [0:0] read-write - u1_plda_pcie_pcie_ebuf_mode - u1_plda_pcie_pcie_ebuf_mode + u1_pcie_pcie_ebuf_mode + u1_pcie_pcie_ebuf_mode [1:1] read-write - u1_plda_pcie_pcie_phy_test_cfg - u1_plda_pcie_pcie_phy_test_cfg + u1_pcie_pcie_phy_test_cfg + u1_pcie_pcie_phy_test_cfg [24:2] read-write - u1_plda_pcie_pcie_rx_eq_training - u1_plda_pcie_pcie_rx_eq_training + u1_pcie_pcie_rx_eq_training + u1_pcie_pcie_rx_eq_training [25:25] read-write - u1_plda_pcie_pcie_rxterm_en - u1_plda_pcie_pcie_rxterm_en + u1_pcie_pcie_rxterm_en + u1_pcie_pcie_rxterm_en [26:26] read-write - u1_plda_pcie_pcie_tx_oneszeros - u1_plda_pcie_pcie_tx_oneszeros + u1_pcie_pcie_tx_oneszeros + u1_pcie_pcie_tx_oneszeros [27:27] read-write @@ -16185,8 +16185,8 @@ 0 - u1_plda_pcie_pf0_offset - u1_plda_pcie_pf0_offset + u1_pcie_pf0_offset + u1_pcie_pf0_offset [19:0] read-write @@ -16200,8 +16200,8 @@ 0 - u1_plda_pcie_pf1_offset - u1_plda_pcie_pf1_offset + u1_pcie_pf1_offset + u1_pcie_pf1_offset [19:0] read-write @@ -16215,8 +16215,8 @@ 0 - u1_plda_pcie_pf2_offset - u1_plda_pcie_pf2_offset + u1_pcie_pf2_offset + u1_pcie_pf2_offset [19:0] read-write @@ -16230,38 +16230,38 @@ 0 - u1_plda_pcie_pf3_offset - u1_plda_pcie_pf3_offset + u1_pcie_pf3_offset + u1_pcie_pf3_offset [19:0] read-write - u1_plda_pcie_phy_mode - u1_plda_pcie_phy_mode + u1_pcie_phy_mode + u1_pcie_phy_mode [21:20] read-write - u1_plda_pcie_pl_clkrem_allow - u1_plda_pcie_pl_clkrem_allow + u1_pcie_pl_clkrem_allow + u1_pcie_pl_clkrem_allow [22:22] read-write - u1_plda_pcie_pl_clkreq_oen - u1_plda_pcie_pl_clkreq_oen + u1_pcie_pl_clkreq_oen + u1_pcie_pl_clkreq_oen [23:23] read-only - u1_plda_pcie_pl_equ_phase - u1_plda_pcie_pl_equ_phase + u1_pcie_pl_equ_phase + u1_pcie_pl_equ_phase [25:24] read-only - u1_plda_pcie_pl_ltssm - u1_plda_pcie_pl_ltssm + u1_pcie_pl_ltssm + u1_pcie_pl_ltssm [30:26] read-only @@ -16275,8 +16275,8 @@ 0 - u1_plda_pcie_pl_pclk_rate - u1_plda_pcie_pl_pclk_rate + u1_pcie_pl_pclk_rate + u1_pcie_pl_pclk_rate [4:0] read-only @@ -16290,8 +16290,8 @@ 0 - u1_plda_pcie_pl_sideband_in_31_0 - u1_plda_pcie_pl_sideband_in_31_0 + u1_pcie_pl_sideband_in_31_0 + u1_pcie_pl_sideband_in_31_0 [31:0] read-write @@ -16305,8 +16305,8 @@ 0 - u1_plda_pcie_pl_sideband_in_63_32 - u1_plda_pcie_pl_sideband_in_63_32 + u1_pcie_pl_sideband_in_63_32 + u1_pcie_pl_sideband_in_63_32 [31:0] read-write @@ -16320,8 +16320,8 @@ 0 - u1_plda_pcie_pl_sideband_out_31_0 - u1_plda_pcie_pl_sideband_out_31_0 + u1_pcie_pl_sideband_out_31_0 + u1_pcie_pl_sideband_out_31_0 [31:0] read-write @@ -16335,8 +16335,8 @@ 0 - u1_plda_pcie_pl_sideband_out_63_32 - u1_plda_pcie_pl_sideband_out_63_32 + u1_pcie_pl_sideband_out_63_32 + u1_pcie_pl_sideband_out_63_32 [31:0] read-write @@ -16350,20 +16350,20 @@ 0 - u1_plda_pcie_pl_wake_in - u1_plda_pcie_pl_wake_in + u1_pcie_pl_wake_in + u1_pcie_pl_wake_in [0:0] read-write - u1_plda_pcie_pl_wake_oen - u1_plda_pcie_pl_wake_oen + u1_pcie_pl_wake_oen + u1_pcie_pl_wake_oen [1:1] read-only - u1_plda_pcie_rx_standby_o - u1_plda_pcie_rx_standby_o + u1_pcie_rx_standby_o + u1_pcie_rx_standby_o [2:2] read-only @@ -16377,8 +16377,8 @@ 0 - u1_plda_pcie_test_in_31_0 - u1_plda_pcie_test_in_31_0 + u1_pcie_test_in_31_0 + u1_pcie_test_in_31_0 [31:0] read-write @@ -16392,8 +16392,8 @@ 0 - u1_plda_pcie_test_in_63_32 - u1_plda_pcie_test_in_63_32 + u1_pcie_test_in_63_32 + u1_pcie_test_in_63_32 [31:0] read-write @@ -16407,8 +16407,8 @@ 0 - u1_plda_pcie_test_out_bridge_31_0 - u1_plda_pcie_test_out_bridge_31_0 + u1_pcie_test_out_bridge_31_0 + u1_pcie_test_out_bridge_31_0 [31:0] read-write @@ -16422,8 +16422,8 @@ 0 - u1_plda_pcie_test_out_bridge_63_32 - u1_plda_pcie_test_out_bridge_63_32 + u1_pcie_test_out_bridge_63_32 + u1_pcie_test_out_bridge_63_32 [31:0] read-write @@ -16437,8 +16437,8 @@ 0 - u1_plda_pcie_test_out_bridge_95_64 - u1_plda_pcie_test_out_bridge_95_64 + u1_pcie_test_out_bridge_95_64 + u1_pcie_test_out_bridge_95_64 [31:0] read-write @@ -16452,8 +16452,8 @@ 0 - u1_plda_pcie_test_out_bridge_127_96 - u1_plda_pcie_test_out_bridge_127_96 + u1_pcie_test_out_bridge_127_96 + u1_pcie_test_out_bridge_127_96 [31:0] read-write @@ -16467,8 +16467,8 @@ 0 - u1_plda_pcie_test_out_bridge_159_128 - u1_plda_pcie_test_out_bridge_159_128 + u1_pcie_test_out_bridge_159_128 + u1_pcie_test_out_bridge_159_128 [31:0] read-write @@ -16482,8 +16482,8 @@ 0 - u1_plda_pcie_test_out_bridge_191_160 - u1_plda_pcie_test_out_bridge_191_160 + u1_pcie_test_out_bridge_191_160 + u1_pcie_test_out_bridge_191_160 [31:0] read-write @@ -16497,8 +16497,8 @@ 0 - u1_plda_pcie_test_out_bridge_223_192 - u1_plda_pcie_test_out_bridge_223_192 + u1_pcie_test_out_bridge_223_192 + u1_pcie_test_out_bridge_223_192 [31:0] read-write @@ -16512,8 +16512,8 @@ 0 - u1_plda_pcie_test_out_bridge_255_224 - u1_plda_pcie_test_out_bridge_255_224 + u1_pcie_test_out_bridge_255_224 + u1_pcie_test_out_bridge_255_224 [31:0] read-write @@ -16527,8 +16527,8 @@ 0 - u1_plda_pcie_test_out_bridge_287_256 - u1_plda_pcie_test_out_bridge_287_256 + u1_pcie_test_out_bridge_287_256 + u1_pcie_test_out_bridge_287_256 [31:0] read-write @@ -16542,8 +16542,8 @@ 0 - u1_plda_pcie_test_out_bridge_319_288 - u1_plda_pcie_test_out_bridge_319_288 + u1_pcie_test_out_bridge_319_288 + u1_pcie_test_out_bridge_319_288 [31:0] read-write @@ -16557,8 +16557,8 @@ 0 - u1_plda_pcie_test_out_bridge_351_320 - u1_plda_pcie_test_out_bridge_351_320 + u1_pcie_test_out_bridge_351_320 + u1_pcie_test_out_bridge_351_320 [31:0] read-write @@ -16572,8 +16572,8 @@ 0 - u1_plda_pcie_test_out_bridge_383_352 - u1_plda_pcie_test_out_bridge_383_352 + u1_pcie_test_out_bridge_383_352 + u1_pcie_test_out_bridge_383_352 [31:0] read-write @@ -16587,8 +16587,8 @@ 0 - u1_plda_pcie_test_out_bridge_415_384 - u1_plda_pcie_test_out_bridge_415_384 + u1_pcie_test_out_bridge_415_384 + u1_pcie_test_out_bridge_415_384 [31:0] read-write @@ -16602,8 +16602,8 @@ 0 - u1_plda_pcie_test_out_bridge_447_416 - u1_plda_pcie_test_out_bridge_447_416 + u1_pcie_test_out_bridge_447_416 + u1_pcie_test_out_bridge_447_416 [31:0] read-write @@ -16617,8 +16617,8 @@ 0 - u1_plda_pcie_test_out_bridge_479_448 - u1_plda_pcie_test_out_bridge_479_448 + u1_pcie_test_out_bridge_479_448 + u1_pcie_test_out_bridge_479_448 [31:0] read-write @@ -16632,8 +16632,8 @@ 0 - u1_plda_pcie_test_out_bridge_511_480 - u1_plda_pcie_test_out_bridge_511_480 + u1_pcie_test_out_bridge_511_480 + u1_pcie_test_out_bridge_511_480 [31:0] read-write @@ -16647,8 +16647,8 @@ 0 - u1_plda_pcie_test_out_pcie_31_0 - u1_plda_pcie_test_out_pcie_31_0 + u1_pcie_test_out_pcie_31_0 + u1_pcie_test_out_pcie_31_0 [31:0] read-only @@ -16662,8 +16662,8 @@ 0 - u1_plda_pcie_test_out_pcie_63_32 - u1_plda_pcie_test_out_pcie_63_32 + u1_pcie_test_out_pcie_63_32 + u1_pcie_test_out_pcie_63_32 [31:0] read-only @@ -16677,8 +16677,8 @@ 0 - u1_plda_pcie_test_out_pcie_95_64 - u1_plda_pcie_test_out_pcie_95_64 + u1_pcie_test_out_pcie_95_64 + u1_pcie_test_out_pcie_95_64 [31:0] read-only @@ -16692,8 +16692,8 @@ 0 - u1_plda_pcie_test_out_pcie_127_96 - u1_plda_pcie_test_out_pcie_127_96 + u1_pcie_test_out_pcie_127_96 + u1_pcie_test_out_pcie_127_96 [31:0] read-only @@ -16707,8 +16707,8 @@ 0 - u1_plda_pcie_test_out_pcie_159_128 - u1_plda_pcie_test_out_pcie_159_128 + u1_pcie_test_out_pcie_159_128 + u1_pcie_test_out_pcie_159_128 [31:0] read-only @@ -16722,8 +16722,8 @@ 0 - u1_plda_pcie_test_out_pcie_191_160 - u1_plda_pcie_test_out_pcie_191_160 + u1_pcie_test_out_pcie_191_160 + u1_pcie_test_out_pcie_191_160 [31:0] read-only @@ -16737,8 +16737,8 @@ 0 - u1_plda_pcie_test_out_pcie_223_192 - u1_plda_pcie_test_out_pcie_223_192 + u1_pcie_test_out_pcie_223_192 + u1_pcie_test_out_pcie_223_192 [31:0] read-only @@ -16752,8 +16752,8 @@ 0 - u1_plda_pcie_test_out_pcie_255_224 - u1_plda_pcie_test_out_pcie_255_224 + u1_pcie_test_out_pcie_255_224 + u1_pcie_test_out_pcie_255_224 [31:0] read-only @@ -16767,8 +16767,8 @@ 0 - u1_plda_pcie_test_out_pcie_287_256 - u1_plda_pcie_test_out_pcie_287_256 + u1_pcie_test_out_pcie_287_256 + u1_pcie_test_out_pcie_287_256 [31:0] read-only @@ -16782,8 +16782,8 @@ 0 - u1_plda_pcie_test_out_pcie_319_288 - u1_plda_pcie_test_out_pcie_319_288 + u1_pcie_test_out_pcie_319_288 + u1_pcie_test_out_pcie_319_288 [31:0] read-only @@ -16797,8 +16797,8 @@ 0 - u1_plda_pcie_test_out_pcie_351_320 - u1_plda_pcie_test_out_pcie_351_320 + u1_pcie_test_out_pcie_351_320 + u1_pcie_test_out_pcie_351_320 [31:0] read-only @@ -16812,8 +16812,8 @@ 0 - u1_plda_pcie_test_out_pcie_383_352 - u1_plda_pcie_test_out_pcie_383_352 + u1_pcie_test_out_pcie_383_352 + u1_pcie_test_out_pcie_383_352 [31:0] read-only @@ -16827,8 +16827,8 @@ 0 - u1_plda_pcie_test_out_pcie_415_384 - u1_plda_pcie_test_out_pcie_415_384 + u1_pcie_test_out_pcie_415_384 + u1_pcie_test_out_pcie_415_384 [31:0] read-only @@ -16842,8 +16842,8 @@ 0 - u1_plda_pcie_test_out_pcie_447_416 - u1_plda_pcie_test_out_pcie_447_416 + u1_pcie_test_out_pcie_447_416 + u1_pcie_test_out_pcie_447_416 [31:0] read-only @@ -16857,8 +16857,8 @@ 0 - u1_plda_pcie_test_out_pcie_479_448 - u1_plda_pcie_test_out_pcie_479_448 + u1_pcie_test_out_pcie_479_448 + u1_pcie_test_out_pcie_479_448 [31:0] read-only @@ -16872,8 +16872,8 @@ 0 - u1_plda_pcie_test_out_pcie_511_480 - u1_plda_pcie_test_out_pcie_511_480 + u1_pcie_test_out_pcie_511_480 + u1_pcie_test_out_pcie_511_480 [31:0] read-only @@ -16887,14 +16887,14 @@ 0 - u1_plda_pcie_test_sel - u1_plda_pcie_test_sel + u1_pcie_test_sel + u1_pcie_test_sel [3:0] read-write - u1_plda_pcie_tl_clock_freq - u1_plda_pcie_tl_clock_freq + u1_pcie_tl_clock_freq + u1_pcie_tl_clock_freq [25:4] read-write @@ -16908,14 +16908,14 @@ 0 - u1_plda_pcie_tl_ctrl_hotplug - u1_plda_pcie_tl_ctrl_hotplug + u1_pcie_tl_ctrl_hotplug + u1_pcie_tl_ctrl_hotplug [15:0] read-only - u1_plda_pcie_tl_report_hotplug - u1_plda_pcie_tl_report_hotplug + u1_pcie_tl_report_hotplug + u1_pcie_tl_report_hotplug [31:16] read-write @@ -16929,50 +16929,50 @@ 0 - u1_plda_pcie_tx_pattern - u1_plda_pcie_tx_pattern + u1_pcie_tx_pattern + u1_pcie_tx_pattern [1:0] read-write - u1_plda_pcie_usb3_bus_width - u1_plda_pcie_usb3_bus_width + u1_pcie_usb3_bus_width + u1_pcie_usb3_bus_width [3:2] read-write - u1_plda_pcie_usb3_phy_enable - u1_plda_pcie_usb3_phy_enable + u1_pcie_usb3_phy_enable + u1_pcie_usb3_phy_enable [4:4] read-write - u1_plda_pcie_usb3_rate - u1_plda_pcie_usb3_rate + u1_pcie_usb3_rate + u1_pcie_usb3_rate [6:5] read-write - u1_plda_pcie_usb3_rx_standby - u1_plda_pcie_usb3_rx_standby + u1_pcie_usb3_rx_standby + u1_pcie_usb3_rx_standby [7:7] read-write - u1_plda_pcie_xwdecerr - u1_plda_pcie_xwdecerr + u1_pcie_xwdecerr + u1_pcie_xwdecerr [8:8] read-only - u1_plda_pcie_xwerrclr - u1_plda_pcie_xwerrclr + u1_pcie_xwerrclr + u1_pcie_xwerrclr [9:9] read-write - u1_plda_pcie_xwslverr - u1_plda_pcie_xwslverr + u1_pcie_xwslverr + u1_pcie_xwslverr [10:10] read-only diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_0.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_0.rs index bc34db9..1a0c72e 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_0.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_0.rs @@ -10,68 +10,68 @@ pub type SCFG_HPROT_SD_0_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; pub type SCFG_HPROT_SD_1_R = crate::FieldReader; #[doc = "Field `scfg_hprot_sd_1` writer - scfg_hprot_sd_1"] pub type SCFG_HPROT_SD_1_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `u0_cdn_usb_adp_en` reader - u0_cdn_usb_adp_en"] -pub type U0_CDN_USB_ADP_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_adp_probe_ana` reader - u0_cdn_usb_adp_probe_ana"] -pub type U0_CDN_USB_ADP_PROBE_ANA_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_adp_probe_ana` writer - u0_cdn_usb_adp_probe_ana"] -pub type U0_CDN_USB_ADP_PROBE_ANA_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_adp_probe_en` reader - u0_cdn_usb_adp_probe_en"] -pub type U0_CDN_USB_ADP_PROBE_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_adp_sense_ana` reader - u0_cdn_usb_adp_sense_ana"] -pub type U0_CDN_USB_ADP_SENSE_ANA_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_adp_sense_ana` writer - u0_cdn_usb_adp_sense_ana"] -pub type U0_CDN_USB_ADP_SENSE_ANA_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_adp_sense_en` reader - u0_cdn_usb_adp_sense_en"] -pub type U0_CDN_USB_ADP_SENSE_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_adp_sink_current_en` reader - u0_cdn_usb_adp_sink_current_en"] -pub type U0_CDN_USB_ADP_SINK_CURRENT_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_adp_source_current_en` reader - u0_cdn_usb_adp_source_current_en"] -pub type U0_CDN_USB_ADP_SOURCE_CURRENT_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_bc_en` reader - u0_cdn_usb_bc_en"] -pub type U0_CDN_USB_BC_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_chrg_vbus` reader - u0_cdn_usb_chrg_vbus"] -pub type U0_CDN_USB_CHRG_VBUS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_chrg_vbus` writer - u0_cdn_usb_chrg_vbus"] -pub type U0_CDN_USB_CHRG_VBUS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_dcd_comp_sts` reader - u0_cdn_usb_dcd_comp_sts"] -pub type U0_CDN_USB_DCD_COMP_STS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_dcd_comp_sts` writer - u0_cdn_usb_dcd_comp_sts"] -pub type U0_CDN_USB_DCD_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_dischrg_vbus` reader - u0_cdn_usb_dischrg_vbus"] -pub type U0_CDN_USB_DISCHRG_VBUS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_dischrg_vbus` writer - u0_cdn_usb_dischrg_vbus"] -pub type U0_CDN_USB_DISCHRG_VBUS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_dm_vdat_ref_comp_en` reader - u0_cdn_usb_dm_vdat_ref_comp_en"] -pub type U0_CDN_USB_DM_VDAT_REF_COMP_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_dm_vdat_ref_comp_sts` reader - u0_cdn_usb_dm_vdat_ref_comp_sts"] -pub type U0_CDN_USB_DM_VDAT_REF_COMP_STS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_dm_vdat_ref_comp_sts` writer - u0_cdn_usb_dm_vdat_ref_comp_sts"] -pub type U0_CDN_USB_DM_VDAT_REF_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_dm_vlgc_comp_en` reader - u0_cdn_usb_dm_vlgc_comp_en"] -pub type U0_CDN_USB_DM_VLGC_COMP_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_dm_vlgc_comp_sts` reader - u0_cdn_usb_dm_vlgc_comp_sts"] -pub type U0_CDN_USB_DM_VLGC_COMP_STS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_dm_vlgc_comp_sts` writer - u0_cdn_usb_dm_vlgc_comp_sts"] -pub type U0_CDN_USB_DM_VLGC_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_dp_vdat_ref_comp_en` reader - u0_cdn_usb_dp_vdat_ref_comp_en"] -pub type U0_CDN_USB_DP_VDAT_REF_COMP_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_dp_vdat_ref_comp_sts` reader - u0_cdn_usb_dp_vdat_ref_comp_sts"] -pub type U0_CDN_USB_DP_VDAT_REF_COMP_STS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_dp_vdat_ref_comp_sts` writer - u0_cdn_usb_dp_vdat_ref_comp_sts"] -pub type U0_CDN_USB_DP_VDAT_REF_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_host_system_err` reader - u0_cdn_usb_host_system_err"] -pub type U0_CDN_USB_HOST_SYSTEM_ERR_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_host_system_err` writer - u0_cdn_usb_host_system_err"] -pub type U0_CDN_USB_HOST_SYSTEM_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_hsystem_err_ext` reader - u0_cdn_usb_hsystem_err_ext"] -pub type U0_CDN_USB_HSYSTEM_ERR_EXT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_idm_sink_en` reader - u0_cdn_usb_idm_sink_en"] -pub type U0_CDN_USB_IDM_SINK_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_idp_sink_en` reader - u0_cdn_usb_idp_sink_en"] -pub type U0_CDN_USB_IDP_SINK_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_idp_src_en` reader - u0_cdn_usb_idp_src_en"] -pub type U0_CDN_USB_IDP_SRC_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_adp_en` reader - u0_usb_adp_en"] +pub type U0_USB_ADP_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_adp_probe_ana` reader - u0_usb_adp_probe_ana"] +pub type U0_USB_ADP_PROBE_ANA_R = crate::BitReader; +#[doc = "Field `u0_usb_adp_probe_ana` writer - u0_usb_adp_probe_ana"] +pub type U0_USB_ADP_PROBE_ANA_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_adp_probe_en` reader - u0_usb_adp_probe_en"] +pub type U0_USB_ADP_PROBE_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_adp_sense_ana` reader - u0_usb_adp_sense_ana"] +pub type U0_USB_ADP_SENSE_ANA_R = crate::BitReader; +#[doc = "Field `u0_usb_adp_sense_ana` writer - u0_usb_adp_sense_ana"] +pub type U0_USB_ADP_SENSE_ANA_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_adp_sense_en` reader - u0_usb_adp_sense_en"] +pub type U0_USB_ADP_SENSE_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_adp_sink_current_en` reader - u0_usb_adp_sink_current_en"] +pub type U0_USB_ADP_SINK_CURRENT_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_adp_source_current_en` reader - u0_usb_adp_source_current_en"] +pub type U0_USB_ADP_SOURCE_CURRENT_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_bc_en` reader - u0_usb_bc_en"] +pub type U0_USB_BC_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_chrg_vbus` reader - u0_usb_chrg_vbus"] +pub type U0_USB_CHRG_VBUS_R = crate::BitReader; +#[doc = "Field `u0_usb_chrg_vbus` writer - u0_usb_chrg_vbus"] +pub type U0_USB_CHRG_VBUS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_dcd_comp_sts` reader - u0_usb_dcd_comp_sts"] +pub type U0_USB_DCD_COMP_STS_R = crate::BitReader; +#[doc = "Field `u0_usb_dcd_comp_sts` writer - u0_usb_dcd_comp_sts"] +pub type U0_USB_DCD_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_dischrg_vbus` reader - u0_usb_dischrg_vbus"] +pub type U0_USB_DISCHRG_VBUS_R = crate::BitReader; +#[doc = "Field `u0_usb_dischrg_vbus` writer - u0_usb_dischrg_vbus"] +pub type U0_USB_DISCHRG_VBUS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_dm_vdat_ref_comp_en` reader - u0_usb_dm_vdat_ref_comp_en"] +pub type U0_USB_DM_VDAT_REF_COMP_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_dm_vdat_ref_comp_sts` reader - u0_usb_dm_vdat_ref_comp_sts"] +pub type U0_USB_DM_VDAT_REF_COMP_STS_R = crate::BitReader; +#[doc = "Field `u0_usb_dm_vdat_ref_comp_sts` writer - u0_usb_dm_vdat_ref_comp_sts"] +pub type U0_USB_DM_VDAT_REF_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_dm_vlgc_comp_en` reader - u0_usb_dm_vlgc_comp_en"] +pub type U0_USB_DM_VLGC_COMP_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_dm_vlgc_comp_sts` reader - u0_usb_dm_vlgc_comp_sts"] +pub type U0_USB_DM_VLGC_COMP_STS_R = crate::BitReader; +#[doc = "Field `u0_usb_dm_vlgc_comp_sts` writer - u0_usb_dm_vlgc_comp_sts"] +pub type U0_USB_DM_VLGC_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_dp_vdat_ref_comp_en` reader - u0_usb_dp_vdat_ref_comp_en"] +pub type U0_USB_DP_VDAT_REF_COMP_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_dp_vdat_ref_comp_sts` reader - u0_usb_dp_vdat_ref_comp_sts"] +pub type U0_USB_DP_VDAT_REF_COMP_STS_R = crate::BitReader; +#[doc = "Field `u0_usb_dp_vdat_ref_comp_sts` writer - u0_usb_dp_vdat_ref_comp_sts"] +pub type U0_USB_DP_VDAT_REF_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_host_system_err` reader - u0_usb_host_system_err"] +pub type U0_USB_HOST_SYSTEM_ERR_R = crate::BitReader; +#[doc = "Field `u0_usb_host_system_err` writer - u0_usb_host_system_err"] +pub type U0_USB_HOST_SYSTEM_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_hsystem_err_ext` reader - u0_usb_hsystem_err_ext"] +pub type U0_USB_HSYSTEM_ERR_EXT_R = crate::BitReader; +#[doc = "Field `u0_usb_idm_sink_en` reader - u0_usb_idm_sink_en"] +pub type U0_USB_IDM_SINK_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_idp_sink_en` reader - u0_usb_idp_sink_en"] +pub type U0_USB_IDP_SINK_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_idp_src_en` reader - u0_usb_idp_src_en"] +pub type U0_USB_IDP_SRC_EN_R = crate::BitReader; impl R { #[doc = "Bits 0:3 - scfg_hprot_sd_0"] #[inline(always)] @@ -83,115 +83,115 @@ impl R { pub fn scfg_hprot_sd_1(&self) -> SCFG_HPROT_SD_1_R { SCFG_HPROT_SD_1_R::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bit 8 - u0_cdn_usb_adp_en"] + #[doc = "Bit 8 - u0_usb_adp_en"] #[inline(always)] - pub fn u0_cdn_usb_adp_en(&self) -> U0_CDN_USB_ADP_EN_R { - U0_CDN_USB_ADP_EN_R::new(((self.bits >> 8) & 1) != 0) + pub fn u0_usb_adp_en(&self) -> U0_USB_ADP_EN_R { + U0_USB_ADP_EN_R::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 9 - u0_cdn_usb_adp_probe_ana"] + #[doc = "Bit 9 - u0_usb_adp_probe_ana"] #[inline(always)] - pub fn u0_cdn_usb_adp_probe_ana(&self) -> U0_CDN_USB_ADP_PROBE_ANA_R { - U0_CDN_USB_ADP_PROBE_ANA_R::new(((self.bits >> 9) & 1) != 0) + pub fn u0_usb_adp_probe_ana(&self) -> U0_USB_ADP_PROBE_ANA_R { + U0_USB_ADP_PROBE_ANA_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 10 - u0_cdn_usb_adp_probe_en"] + #[doc = "Bit 10 - u0_usb_adp_probe_en"] #[inline(always)] - pub fn u0_cdn_usb_adp_probe_en(&self) -> U0_CDN_USB_ADP_PROBE_EN_R { - U0_CDN_USB_ADP_PROBE_EN_R::new(((self.bits >> 10) & 1) != 0) + pub fn u0_usb_adp_probe_en(&self) -> U0_USB_ADP_PROBE_EN_R { + U0_USB_ADP_PROBE_EN_R::new(((self.bits >> 10) & 1) != 0) } - #[doc = "Bit 11 - u0_cdn_usb_adp_sense_ana"] + #[doc = "Bit 11 - u0_usb_adp_sense_ana"] #[inline(always)] - pub fn u0_cdn_usb_adp_sense_ana(&self) -> U0_CDN_USB_ADP_SENSE_ANA_R { - U0_CDN_USB_ADP_SENSE_ANA_R::new(((self.bits >> 11) & 1) != 0) + pub fn u0_usb_adp_sense_ana(&self) -> U0_USB_ADP_SENSE_ANA_R { + U0_USB_ADP_SENSE_ANA_R::new(((self.bits >> 11) & 1) != 0) } - #[doc = "Bit 12 - u0_cdn_usb_adp_sense_en"] + #[doc = "Bit 12 - u0_usb_adp_sense_en"] #[inline(always)] - pub fn u0_cdn_usb_adp_sense_en(&self) -> U0_CDN_USB_ADP_SENSE_EN_R { - U0_CDN_USB_ADP_SENSE_EN_R::new(((self.bits >> 12) & 1) != 0) + pub fn u0_usb_adp_sense_en(&self) -> U0_USB_ADP_SENSE_EN_R { + U0_USB_ADP_SENSE_EN_R::new(((self.bits >> 12) & 1) != 0) } - #[doc = "Bit 13 - u0_cdn_usb_adp_sink_current_en"] + #[doc = "Bit 13 - u0_usb_adp_sink_current_en"] #[inline(always)] - pub fn u0_cdn_usb_adp_sink_current_en(&self) -> U0_CDN_USB_ADP_SINK_CURRENT_EN_R { - U0_CDN_USB_ADP_SINK_CURRENT_EN_R::new(((self.bits >> 13) & 1) != 0) + pub fn u0_usb_adp_sink_current_en(&self) -> U0_USB_ADP_SINK_CURRENT_EN_R { + U0_USB_ADP_SINK_CURRENT_EN_R::new(((self.bits >> 13) & 1) != 0) } - #[doc = "Bit 14 - u0_cdn_usb_adp_source_current_en"] + #[doc = "Bit 14 - u0_usb_adp_source_current_en"] #[inline(always)] - pub fn u0_cdn_usb_adp_source_current_en(&self) -> U0_CDN_USB_ADP_SOURCE_CURRENT_EN_R { - U0_CDN_USB_ADP_SOURCE_CURRENT_EN_R::new(((self.bits >> 14) & 1) != 0) + pub fn u0_usb_adp_source_current_en(&self) -> U0_USB_ADP_SOURCE_CURRENT_EN_R { + U0_USB_ADP_SOURCE_CURRENT_EN_R::new(((self.bits >> 14) & 1) != 0) } - #[doc = "Bit 15 - u0_cdn_usb_bc_en"] + #[doc = "Bit 15 - u0_usb_bc_en"] #[inline(always)] - pub fn u0_cdn_usb_bc_en(&self) -> U0_CDN_USB_BC_EN_R { - U0_CDN_USB_BC_EN_R::new(((self.bits >> 15) & 1) != 0) + pub fn u0_usb_bc_en(&self) -> U0_USB_BC_EN_R { + U0_USB_BC_EN_R::new(((self.bits >> 15) & 1) != 0) } - #[doc = "Bit 16 - u0_cdn_usb_chrg_vbus"] + #[doc = "Bit 16 - u0_usb_chrg_vbus"] #[inline(always)] - pub fn u0_cdn_usb_chrg_vbus(&self) -> U0_CDN_USB_CHRG_VBUS_R { - U0_CDN_USB_CHRG_VBUS_R::new(((self.bits >> 16) & 1) != 0) + pub fn u0_usb_chrg_vbus(&self) -> U0_USB_CHRG_VBUS_R { + U0_USB_CHRG_VBUS_R::new(((self.bits >> 16) & 1) != 0) } - #[doc = "Bit 17 - u0_cdn_usb_dcd_comp_sts"] + #[doc = "Bit 17 - u0_usb_dcd_comp_sts"] #[inline(always)] - pub fn u0_cdn_usb_dcd_comp_sts(&self) -> U0_CDN_USB_DCD_COMP_STS_R { - U0_CDN_USB_DCD_COMP_STS_R::new(((self.bits >> 17) & 1) != 0) + pub fn u0_usb_dcd_comp_sts(&self) -> U0_USB_DCD_COMP_STS_R { + U0_USB_DCD_COMP_STS_R::new(((self.bits >> 17) & 1) != 0) } - #[doc = "Bit 18 - u0_cdn_usb_dischrg_vbus"] + #[doc = "Bit 18 - u0_usb_dischrg_vbus"] #[inline(always)] - pub fn u0_cdn_usb_dischrg_vbus(&self) -> U0_CDN_USB_DISCHRG_VBUS_R { - U0_CDN_USB_DISCHRG_VBUS_R::new(((self.bits >> 18) & 1) != 0) + pub fn u0_usb_dischrg_vbus(&self) -> U0_USB_DISCHRG_VBUS_R { + U0_USB_DISCHRG_VBUS_R::new(((self.bits >> 18) & 1) != 0) } - #[doc = "Bit 19 - u0_cdn_usb_dm_vdat_ref_comp_en"] + #[doc = "Bit 19 - u0_usb_dm_vdat_ref_comp_en"] #[inline(always)] - pub fn u0_cdn_usb_dm_vdat_ref_comp_en(&self) -> U0_CDN_USB_DM_VDAT_REF_COMP_EN_R { - U0_CDN_USB_DM_VDAT_REF_COMP_EN_R::new(((self.bits >> 19) & 1) != 0) + pub fn u0_usb_dm_vdat_ref_comp_en(&self) -> U0_USB_DM_VDAT_REF_COMP_EN_R { + U0_USB_DM_VDAT_REF_COMP_EN_R::new(((self.bits >> 19) & 1) != 0) } - #[doc = "Bit 20 - u0_cdn_usb_dm_vdat_ref_comp_sts"] + #[doc = "Bit 20 - u0_usb_dm_vdat_ref_comp_sts"] #[inline(always)] - pub fn u0_cdn_usb_dm_vdat_ref_comp_sts(&self) -> U0_CDN_USB_DM_VDAT_REF_COMP_STS_R { - U0_CDN_USB_DM_VDAT_REF_COMP_STS_R::new(((self.bits >> 20) & 1) != 0) + pub fn u0_usb_dm_vdat_ref_comp_sts(&self) -> U0_USB_DM_VDAT_REF_COMP_STS_R { + U0_USB_DM_VDAT_REF_COMP_STS_R::new(((self.bits >> 20) & 1) != 0) } - #[doc = "Bit 21 - u0_cdn_usb_dm_vlgc_comp_en"] + #[doc = "Bit 21 - u0_usb_dm_vlgc_comp_en"] #[inline(always)] - pub fn u0_cdn_usb_dm_vlgc_comp_en(&self) -> U0_CDN_USB_DM_VLGC_COMP_EN_R { - U0_CDN_USB_DM_VLGC_COMP_EN_R::new(((self.bits >> 21) & 1) != 0) + pub fn u0_usb_dm_vlgc_comp_en(&self) -> U0_USB_DM_VLGC_COMP_EN_R { + U0_USB_DM_VLGC_COMP_EN_R::new(((self.bits >> 21) & 1) != 0) } - #[doc = "Bit 22 - u0_cdn_usb_dm_vlgc_comp_sts"] + #[doc = "Bit 22 - u0_usb_dm_vlgc_comp_sts"] #[inline(always)] - pub fn u0_cdn_usb_dm_vlgc_comp_sts(&self) -> U0_CDN_USB_DM_VLGC_COMP_STS_R { - U0_CDN_USB_DM_VLGC_COMP_STS_R::new(((self.bits >> 22) & 1) != 0) + pub fn u0_usb_dm_vlgc_comp_sts(&self) -> U0_USB_DM_VLGC_COMP_STS_R { + U0_USB_DM_VLGC_COMP_STS_R::new(((self.bits >> 22) & 1) != 0) } - #[doc = "Bit 23 - u0_cdn_usb_dp_vdat_ref_comp_en"] + #[doc = "Bit 23 - u0_usb_dp_vdat_ref_comp_en"] #[inline(always)] - pub fn u0_cdn_usb_dp_vdat_ref_comp_en(&self) -> U0_CDN_USB_DP_VDAT_REF_COMP_EN_R { - U0_CDN_USB_DP_VDAT_REF_COMP_EN_R::new(((self.bits >> 23) & 1) != 0) + pub fn u0_usb_dp_vdat_ref_comp_en(&self) -> U0_USB_DP_VDAT_REF_COMP_EN_R { + U0_USB_DP_VDAT_REF_COMP_EN_R::new(((self.bits >> 23) & 1) != 0) } - #[doc = "Bit 24 - u0_cdn_usb_dp_vdat_ref_comp_sts"] + #[doc = "Bit 24 - u0_usb_dp_vdat_ref_comp_sts"] #[inline(always)] - pub fn u0_cdn_usb_dp_vdat_ref_comp_sts(&self) -> U0_CDN_USB_DP_VDAT_REF_COMP_STS_R { - U0_CDN_USB_DP_VDAT_REF_COMP_STS_R::new(((self.bits >> 24) & 1) != 0) + pub fn u0_usb_dp_vdat_ref_comp_sts(&self) -> U0_USB_DP_VDAT_REF_COMP_STS_R { + U0_USB_DP_VDAT_REF_COMP_STS_R::new(((self.bits >> 24) & 1) != 0) } - #[doc = "Bit 25 - u0_cdn_usb_host_system_err"] + #[doc = "Bit 25 - u0_usb_host_system_err"] #[inline(always)] - pub fn u0_cdn_usb_host_system_err(&self) -> U0_CDN_USB_HOST_SYSTEM_ERR_R { - U0_CDN_USB_HOST_SYSTEM_ERR_R::new(((self.bits >> 25) & 1) != 0) + pub fn u0_usb_host_system_err(&self) -> U0_USB_HOST_SYSTEM_ERR_R { + U0_USB_HOST_SYSTEM_ERR_R::new(((self.bits >> 25) & 1) != 0) } - #[doc = "Bit 26 - u0_cdn_usb_hsystem_err_ext"] + #[doc = "Bit 26 - u0_usb_hsystem_err_ext"] #[inline(always)] - pub fn u0_cdn_usb_hsystem_err_ext(&self) -> U0_CDN_USB_HSYSTEM_ERR_EXT_R { - U0_CDN_USB_HSYSTEM_ERR_EXT_R::new(((self.bits >> 26) & 1) != 0) + pub fn u0_usb_hsystem_err_ext(&self) -> U0_USB_HSYSTEM_ERR_EXT_R { + U0_USB_HSYSTEM_ERR_EXT_R::new(((self.bits >> 26) & 1) != 0) } - #[doc = "Bit 27 - u0_cdn_usb_idm_sink_en"] + #[doc = "Bit 27 - u0_usb_idm_sink_en"] #[inline(always)] - pub fn u0_cdn_usb_idm_sink_en(&self) -> U0_CDN_USB_IDM_SINK_EN_R { - U0_CDN_USB_IDM_SINK_EN_R::new(((self.bits >> 27) & 1) != 0) + pub fn u0_usb_idm_sink_en(&self) -> U0_USB_IDM_SINK_EN_R { + U0_USB_IDM_SINK_EN_R::new(((self.bits >> 27) & 1) != 0) } - #[doc = "Bit 28 - u0_cdn_usb_idp_sink_en"] + #[doc = "Bit 28 - u0_usb_idp_sink_en"] #[inline(always)] - pub fn u0_cdn_usb_idp_sink_en(&self) -> U0_CDN_USB_IDP_SINK_EN_R { - U0_CDN_USB_IDP_SINK_EN_R::new(((self.bits >> 28) & 1) != 0) + pub fn u0_usb_idp_sink_en(&self) -> U0_USB_IDP_SINK_EN_R { + U0_USB_IDP_SINK_EN_R::new(((self.bits >> 28) & 1) != 0) } - #[doc = "Bit 29 - u0_cdn_usb_idp_src_en"] + #[doc = "Bit 29 - u0_usb_idp_src_en"] #[inline(always)] - pub fn u0_cdn_usb_idp_src_en(&self) -> U0_CDN_USB_IDP_SRC_EN_R { - U0_CDN_USB_IDP_SRC_EN_R::new(((self.bits >> 29) & 1) != 0) + pub fn u0_usb_idp_src_en(&self) -> U0_USB_IDP_SRC_EN_R { + U0_USB_IDP_SRC_EN_R::new(((self.bits >> 29) & 1) != 0) } } impl W { @@ -207,67 +207,63 @@ impl W { pub fn scfg_hprot_sd_1(&mut self) -> SCFG_HPROT_SD_1_W { SCFG_HPROT_SD_1_W::new(self, 4) } - #[doc = "Bit 9 - u0_cdn_usb_adp_probe_ana"] + #[doc = "Bit 9 - u0_usb_adp_probe_ana"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_adp_probe_ana(&mut self) -> U0_CDN_USB_ADP_PROBE_ANA_W { - U0_CDN_USB_ADP_PROBE_ANA_W::new(self, 9) + pub fn u0_usb_adp_probe_ana(&mut self) -> U0_USB_ADP_PROBE_ANA_W { + U0_USB_ADP_PROBE_ANA_W::new(self, 9) } - #[doc = "Bit 11 - u0_cdn_usb_adp_sense_ana"] + #[doc = "Bit 11 - u0_usb_adp_sense_ana"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_adp_sense_ana(&mut self) -> U0_CDN_USB_ADP_SENSE_ANA_W { - U0_CDN_USB_ADP_SENSE_ANA_W::new(self, 11) + pub fn u0_usb_adp_sense_ana(&mut self) -> U0_USB_ADP_SENSE_ANA_W { + U0_USB_ADP_SENSE_ANA_W::new(self, 11) } - #[doc = "Bit 16 - u0_cdn_usb_chrg_vbus"] + #[doc = "Bit 16 - u0_usb_chrg_vbus"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_chrg_vbus(&mut self) -> U0_CDN_USB_CHRG_VBUS_W { - U0_CDN_USB_CHRG_VBUS_W::new(self, 16) + pub fn u0_usb_chrg_vbus(&mut self) -> U0_USB_CHRG_VBUS_W { + U0_USB_CHRG_VBUS_W::new(self, 16) } - #[doc = "Bit 17 - u0_cdn_usb_dcd_comp_sts"] + #[doc = "Bit 17 - u0_usb_dcd_comp_sts"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_dcd_comp_sts(&mut self) -> U0_CDN_USB_DCD_COMP_STS_W { - U0_CDN_USB_DCD_COMP_STS_W::new(self, 17) + pub fn u0_usb_dcd_comp_sts(&mut self) -> U0_USB_DCD_COMP_STS_W { + U0_USB_DCD_COMP_STS_W::new(self, 17) } - #[doc = "Bit 18 - u0_cdn_usb_dischrg_vbus"] + #[doc = "Bit 18 - u0_usb_dischrg_vbus"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_dischrg_vbus(&mut self) -> U0_CDN_USB_DISCHRG_VBUS_W { - U0_CDN_USB_DISCHRG_VBUS_W::new(self, 18) + pub fn u0_usb_dischrg_vbus(&mut self) -> U0_USB_DISCHRG_VBUS_W { + U0_USB_DISCHRG_VBUS_W::new(self, 18) } - #[doc = "Bit 20 - u0_cdn_usb_dm_vdat_ref_comp_sts"] + #[doc = "Bit 20 - u0_usb_dm_vdat_ref_comp_sts"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_dm_vdat_ref_comp_sts( + pub fn u0_usb_dm_vdat_ref_comp_sts( &mut self, - ) -> U0_CDN_USB_DM_VDAT_REF_COMP_STS_W { - U0_CDN_USB_DM_VDAT_REF_COMP_STS_W::new(self, 20) + ) -> U0_USB_DM_VDAT_REF_COMP_STS_W { + U0_USB_DM_VDAT_REF_COMP_STS_W::new(self, 20) } - #[doc = "Bit 22 - u0_cdn_usb_dm_vlgc_comp_sts"] + #[doc = "Bit 22 - u0_usb_dm_vlgc_comp_sts"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_dm_vlgc_comp_sts( - &mut self, - ) -> U0_CDN_USB_DM_VLGC_COMP_STS_W { - U0_CDN_USB_DM_VLGC_COMP_STS_W::new(self, 22) + pub fn u0_usb_dm_vlgc_comp_sts(&mut self) -> U0_USB_DM_VLGC_COMP_STS_W { + U0_USB_DM_VLGC_COMP_STS_W::new(self, 22) } - #[doc = "Bit 24 - u0_cdn_usb_dp_vdat_ref_comp_sts"] + #[doc = "Bit 24 - u0_usb_dp_vdat_ref_comp_sts"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_dp_vdat_ref_comp_sts( + pub fn u0_usb_dp_vdat_ref_comp_sts( &mut self, - ) -> U0_CDN_USB_DP_VDAT_REF_COMP_STS_W { - U0_CDN_USB_DP_VDAT_REF_COMP_STS_W::new(self, 24) + ) -> U0_USB_DP_VDAT_REF_COMP_STS_W { + U0_USB_DP_VDAT_REF_COMP_STS_W::new(self, 24) } - #[doc = "Bit 25 - u0_cdn_usb_host_system_err"] + #[doc = "Bit 25 - u0_usb_host_system_err"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_host_system_err( - &mut self, - ) -> U0_CDN_USB_HOST_SYSTEM_ERR_W { - U0_CDN_USB_HOST_SYSTEM_ERR_W::new(self, 25) + pub fn u0_usb_host_system_err(&mut self) -> U0_USB_HOST_SYSTEM_ERR_W { + U0_USB_HOST_SYSTEM_ERR_W::new(self, 25) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_1.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_1.rs index eead8a9..5d0d21f 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_1.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_1.rs @@ -2,42 +2,42 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_1` writer"] pub type W = crate::W; -#[doc = "Field `u0_cdn_usb_lowest_belt` reader - LTM interface to software"] -pub type U0_CDN_USB_LOWEST_BELT_R = crate::FieldReader; -#[doc = "Field `u0_cdn_usb_ltm_host_req` reader - LTM interface to software"] -pub type U0_CDN_USB_LTM_HOST_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_ltm_host_req_halt` reader - LTM interface to software"] -pub type U0_CDN_USB_LTM_HOST_REQ_HALT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_ltm_host_req_halt` writer - LTM interface to software"] -pub type U0_CDN_USB_LTM_HOST_REQ_HALT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_mdctrl_clk_sel` reader - u0_cdn_usb_mdctrl_clk_sel"] -pub type U0_CDN_USB_MDCTRL_CLK_SEL_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_mdctrl_clk_sel` writer - u0_cdn_usb_mdctrl_clk_sel"] -pub type U0_CDN_USB_MDCTRL_CLK_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_mdctrl_clk_status` reader - u0_cdn_usb_mdctrl_clk_status"] -pub type U0_CDN_USB_MDCTRL_CLK_STATUS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_mode_strap` reader - Can onlly be changed when pwrup_rst_n is low"] -pub type U0_CDN_USB_MODE_STRAP_R = crate::FieldReader; -#[doc = "Field `u0_cdn_usb_mode_strap` writer - Can onlly be changed when pwrup_rst_n is low"] -pub type U0_CDN_USB_MODE_STRAP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `u0_cdn_usb_otg_suspendm` reader - u0_cdn_usb_otg_suspendm"] -pub type U0_CDN_USB_OTG_SUSPENDM_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_otg_suspendm` writer - u0_cdn_usb_otg_suspendm"] -pub type U0_CDN_USB_OTG_SUSPENDM_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_otg_suspendm_byps` reader - u0_cdn_usb_otg_suspendm_byps"] -pub type U0_CDN_USB_OTG_SUSPENDM_BYPS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_otg_suspendm_byps` writer - u0_cdn_usb_otg_suspendm_byps"] -pub type U0_CDN_USB_OTG_SUSPENDM_BYPS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_phy_bvalid` reader - u0_cdn_usb_phy_bvalid"] -pub type U0_CDN_USB_PHY_BVALID_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_pll_en` reader - u0_cdn_usb_pll_en"] -pub type U0_CDN_USB_PLL_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_pll_en` writer - u0_cdn_usb_pll_en"] -pub type U0_CDN_USB_PLL_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_refclk_mode` reader - u0_cdn_usb_refclk_mode"] -pub type U0_CDN_USB_REFCLK_MODE_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_refclk_mode` writer - u0_cdn_usb_refclk_mode"] -pub type U0_CDN_USB_REFCLK_MODE_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_lowest_belt` reader - LTM interface to software"] +pub type U0_USB_LOWEST_BELT_R = crate::FieldReader; +#[doc = "Field `u0_usb_ltm_host_req` reader - LTM interface to software"] +pub type U0_USB_LTM_HOST_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_ltm_host_req_halt` reader - LTM interface to software"] +pub type U0_USB_LTM_HOST_REQ_HALT_R = crate::BitReader; +#[doc = "Field `u0_usb_ltm_host_req_halt` writer - LTM interface to software"] +pub type U0_USB_LTM_HOST_REQ_HALT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_mdctrl_clk_sel` reader - u0_usb_mdctrl_clk_sel"] +pub type U0_USB_MDCTRL_CLK_SEL_R = crate::BitReader; +#[doc = "Field `u0_usb_mdctrl_clk_sel` writer - u0_usb_mdctrl_clk_sel"] +pub type U0_USB_MDCTRL_CLK_SEL_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_mdctrl_clk_status` reader - u0_usb_mdctrl_clk_status"] +pub type U0_USB_MDCTRL_CLK_STATUS_R = crate::BitReader; +#[doc = "Field `u0_usb_mode_strap` reader - Can onlly be changed when pwrup_rst_n is low"] +pub type U0_USB_MODE_STRAP_R = crate::FieldReader; +#[doc = "Field `u0_usb_mode_strap` writer - Can onlly be changed when pwrup_rst_n is low"] +pub type U0_USB_MODE_STRAP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +#[doc = "Field `u0_usb_otg_suspendm` reader - u0_usb_otg_suspendm"] +pub type U0_USB_OTG_SUSPENDM_R = crate::BitReader; +#[doc = "Field `u0_usb_otg_suspendm` writer - u0_usb_otg_suspendm"] +pub type U0_USB_OTG_SUSPENDM_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_otg_suspendm_byps` reader - u0_usb_otg_suspendm_byps"] +pub type U0_USB_OTG_SUSPENDM_BYPS_R = crate::BitReader; +#[doc = "Field `u0_usb_otg_suspendm_byps` writer - u0_usb_otg_suspendm_byps"] +pub type U0_USB_OTG_SUSPENDM_BYPS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_phy_bvalid` reader - u0_usb_phy_bvalid"] +pub type U0_USB_PHY_BVALID_R = crate::BitReader; +#[doc = "Field `u0_usb_pll_en` reader - u0_usb_pll_en"] +pub type U0_USB_PLL_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_pll_en` writer - u0_usb_pll_en"] +pub type U0_USB_PLL_EN_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_refclk_mode` reader - u0_usb_refclk_mode"] +pub type U0_USB_REFCLK_MODE_R = crate::BitReader; +#[doc = "Field `u0_usb_refclk_mode` writer - u0_usb_refclk_mode"] +pub type U0_USB_REFCLK_MODE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `u0_cdn_usb_rid_comp_sts_0` reader - u0_cdn_usb_rid_comp_sts_0"] pub type U0_CDN_USB_RID_COMP_STS_0_R = crate::BitReader; #[doc = "Field `u0_cdn_usb_rid_comp_sts_0` writer - u0_cdn_usb_rid_comp_sts_0"] @@ -50,75 +50,75 @@ pub type U0_CDN_USB_RID_COMP_STS_1_W<'a, REG> = crate::BitWriter<'a, REG>; pub type U0_CDN_USB_RID_COMP_STS_2_R = crate::BitReader; #[doc = "Field `u0_cdn_usb_rid_comp_sts_2` writer - u0_cdn_usb_rid_comp_sts_2"] pub type U0_CDN_USB_RID_COMP_STS_2_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_rid_float_comp_en` reader - u0_cdn_usb_rid_float_comp_en"] -pub type U0_CDN_USB_RID_FLOAT_COMP_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_rid_float_comp_sts` reader - u0_cdn_usb_rid_float_comp_sts"] -pub type U0_CDN_USB_RID_FLOAT_COMP_STS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_rid_float_comp_sts` writer - u0_cdn_usb_rid_float_comp_sts"] -pub type U0_CDN_USB_RID_FLOAT_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_rid_gnd_comp_sts` reader - u0_cdn_usb_rid_gnd_comp_sts"] -pub type U0_CDN_USB_RID_GND_COMP_STS_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_rid_gnd_comp_sts` writer - u0_cdn_usb_rid_gnd_comp_sts"] -pub type U0_CDN_USB_RID_GND_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_rid_nonfloat_comp_en` reader - u0_cdn_usb_rid_nonfloat_comp_en"] -pub type U0_CDN_USB_RID_NONFLOAT_COMP_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_rx_dm` reader - u0_cdn_usb_rx_dm"] -pub type U0_CDN_USB_RX_DM_R = crate::BitReader; +#[doc = "Field `u0_usb_rid_float_comp_en` reader - u0_usb_rid_float_comp_en"] +pub type U0_USB_RID_FLOAT_COMP_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_rid_float_comp_sts` reader - u0_usb_rid_float_comp_sts"] +pub type U0_USB_RID_FLOAT_COMP_STS_R = crate::BitReader; +#[doc = "Field `u0_usb_rid_float_comp_sts` writer - u0_usb_rid_float_comp_sts"] +pub type U0_USB_RID_FLOAT_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_rid_gnd_comp_sts` reader - u0_usb_rid_gnd_comp_sts"] +pub type U0_USB_RID_GND_COMP_STS_R = crate::BitReader; +#[doc = "Field `u0_usb_rid_gnd_comp_sts` writer - u0_usb_rid_gnd_comp_sts"] +pub type U0_USB_RID_GND_COMP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_rid_nonfloat_comp_en` reader - u0_usb_rid_nonfloat_comp_en"] +pub type U0_USB_RID_NONFLOAT_COMP_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_rx_dm` reader - u0_usb_rx_dm"] +pub type U0_USB_RX_DM_R = crate::BitReader; impl R { #[doc = "Bits 0:11 - LTM interface to software"] #[inline(always)] - pub fn u0_cdn_usb_lowest_belt(&self) -> U0_CDN_USB_LOWEST_BELT_R { - U0_CDN_USB_LOWEST_BELT_R::new((self.bits & 0x0fff) as u16) + pub fn u0_usb_lowest_belt(&self) -> U0_USB_LOWEST_BELT_R { + U0_USB_LOWEST_BELT_R::new((self.bits & 0x0fff) as u16) } #[doc = "Bit 12 - LTM interface to software"] #[inline(always)] - pub fn u0_cdn_usb_ltm_host_req(&self) -> U0_CDN_USB_LTM_HOST_REQ_R { - U0_CDN_USB_LTM_HOST_REQ_R::new(((self.bits >> 12) & 1) != 0) + pub fn u0_usb_ltm_host_req(&self) -> U0_USB_LTM_HOST_REQ_R { + U0_USB_LTM_HOST_REQ_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - LTM interface to software"] #[inline(always)] - pub fn u0_cdn_usb_ltm_host_req_halt(&self) -> U0_CDN_USB_LTM_HOST_REQ_HALT_R { - U0_CDN_USB_LTM_HOST_REQ_HALT_R::new(((self.bits >> 13) & 1) != 0) + pub fn u0_usb_ltm_host_req_halt(&self) -> U0_USB_LTM_HOST_REQ_HALT_R { + U0_USB_LTM_HOST_REQ_HALT_R::new(((self.bits >> 13) & 1) != 0) } - #[doc = "Bit 14 - u0_cdn_usb_mdctrl_clk_sel"] + #[doc = "Bit 14 - u0_usb_mdctrl_clk_sel"] #[inline(always)] - pub fn u0_cdn_usb_mdctrl_clk_sel(&self) -> U0_CDN_USB_MDCTRL_CLK_SEL_R { - U0_CDN_USB_MDCTRL_CLK_SEL_R::new(((self.bits >> 14) & 1) != 0) + pub fn u0_usb_mdctrl_clk_sel(&self) -> U0_USB_MDCTRL_CLK_SEL_R { + U0_USB_MDCTRL_CLK_SEL_R::new(((self.bits >> 14) & 1) != 0) } - #[doc = "Bit 15 - u0_cdn_usb_mdctrl_clk_status"] + #[doc = "Bit 15 - u0_usb_mdctrl_clk_status"] #[inline(always)] - pub fn u0_cdn_usb_mdctrl_clk_status(&self) -> U0_CDN_USB_MDCTRL_CLK_STATUS_R { - U0_CDN_USB_MDCTRL_CLK_STATUS_R::new(((self.bits >> 15) & 1) != 0) + pub fn u0_usb_mdctrl_clk_status(&self) -> U0_USB_MDCTRL_CLK_STATUS_R { + U0_USB_MDCTRL_CLK_STATUS_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:18 - Can onlly be changed when pwrup_rst_n is low"] #[inline(always)] - pub fn u0_cdn_usb_mode_strap(&self) -> U0_CDN_USB_MODE_STRAP_R { - U0_CDN_USB_MODE_STRAP_R::new(((self.bits >> 16) & 7) as u8) + pub fn u0_usb_mode_strap(&self) -> U0_USB_MODE_STRAP_R { + U0_USB_MODE_STRAP_R::new(((self.bits >> 16) & 7) as u8) } - #[doc = "Bit 19 - u0_cdn_usb_otg_suspendm"] + #[doc = "Bit 19 - u0_usb_otg_suspendm"] #[inline(always)] - pub fn u0_cdn_usb_otg_suspendm(&self) -> U0_CDN_USB_OTG_SUSPENDM_R { - U0_CDN_USB_OTG_SUSPENDM_R::new(((self.bits >> 19) & 1) != 0) + pub fn u0_usb_otg_suspendm(&self) -> U0_USB_OTG_SUSPENDM_R { + U0_USB_OTG_SUSPENDM_R::new(((self.bits >> 19) & 1) != 0) } - #[doc = "Bit 20 - u0_cdn_usb_otg_suspendm_byps"] + #[doc = "Bit 20 - u0_usb_otg_suspendm_byps"] #[inline(always)] - pub fn u0_cdn_usb_otg_suspendm_byps(&self) -> U0_CDN_USB_OTG_SUSPENDM_BYPS_R { - U0_CDN_USB_OTG_SUSPENDM_BYPS_R::new(((self.bits >> 20) & 1) != 0) + pub fn u0_usb_otg_suspendm_byps(&self) -> U0_USB_OTG_SUSPENDM_BYPS_R { + U0_USB_OTG_SUSPENDM_BYPS_R::new(((self.bits >> 20) & 1) != 0) } - #[doc = "Bit 21 - u0_cdn_usb_phy_bvalid"] + #[doc = "Bit 21 - u0_usb_phy_bvalid"] #[inline(always)] - pub fn u0_cdn_usb_phy_bvalid(&self) -> U0_CDN_USB_PHY_BVALID_R { - U0_CDN_USB_PHY_BVALID_R::new(((self.bits >> 21) & 1) != 0) + pub fn u0_usb_phy_bvalid(&self) -> U0_USB_PHY_BVALID_R { + U0_USB_PHY_BVALID_R::new(((self.bits >> 21) & 1) != 0) } - #[doc = "Bit 22 - u0_cdn_usb_pll_en"] + #[doc = "Bit 22 - u0_usb_pll_en"] #[inline(always)] - pub fn u0_cdn_usb_pll_en(&self) -> U0_CDN_USB_PLL_EN_R { - U0_CDN_USB_PLL_EN_R::new(((self.bits >> 22) & 1) != 0) + pub fn u0_usb_pll_en(&self) -> U0_USB_PLL_EN_R { + U0_USB_PLL_EN_R::new(((self.bits >> 22) & 1) != 0) } - #[doc = "Bit 23 - u0_cdn_usb_refclk_mode"] + #[doc = "Bit 23 - u0_usb_refclk_mode"] #[inline(always)] - pub fn u0_cdn_usb_refclk_mode(&self) -> U0_CDN_USB_REFCLK_MODE_R { - U0_CDN_USB_REFCLK_MODE_R::new(((self.bits >> 23) & 1) != 0) + pub fn u0_usb_refclk_mode(&self) -> U0_USB_REFCLK_MODE_R { + U0_USB_REFCLK_MODE_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - u0_cdn_usb_rid_comp_sts_0"] #[inline(always)] @@ -135,78 +135,74 @@ impl R { pub fn u0_cdn_usb_rid_comp_sts_2(&self) -> U0_CDN_USB_RID_COMP_STS_2_R { U0_CDN_USB_RID_COMP_STS_2_R::new(((self.bits >> 26) & 1) != 0) } - #[doc = "Bit 27 - u0_cdn_usb_rid_float_comp_en"] + #[doc = "Bit 27 - u0_usb_rid_float_comp_en"] #[inline(always)] - pub fn u0_cdn_usb_rid_float_comp_en(&self) -> U0_CDN_USB_RID_FLOAT_COMP_EN_R { - U0_CDN_USB_RID_FLOAT_COMP_EN_R::new(((self.bits >> 27) & 1) != 0) + pub fn u0_usb_rid_float_comp_en(&self) -> U0_USB_RID_FLOAT_COMP_EN_R { + U0_USB_RID_FLOAT_COMP_EN_R::new(((self.bits >> 27) & 1) != 0) } - #[doc = "Bit 28 - u0_cdn_usb_rid_float_comp_sts"] + #[doc = "Bit 28 - u0_usb_rid_float_comp_sts"] #[inline(always)] - pub fn u0_cdn_usb_rid_float_comp_sts(&self) -> U0_CDN_USB_RID_FLOAT_COMP_STS_R { - U0_CDN_USB_RID_FLOAT_COMP_STS_R::new(((self.bits >> 28) & 1) != 0) + pub fn u0_usb_rid_float_comp_sts(&self) -> U0_USB_RID_FLOAT_COMP_STS_R { + U0_USB_RID_FLOAT_COMP_STS_R::new(((self.bits >> 28) & 1) != 0) } - #[doc = "Bit 29 - u0_cdn_usb_rid_gnd_comp_sts"] + #[doc = "Bit 29 - u0_usb_rid_gnd_comp_sts"] #[inline(always)] - pub fn u0_cdn_usb_rid_gnd_comp_sts(&self) -> U0_CDN_USB_RID_GND_COMP_STS_R { - U0_CDN_USB_RID_GND_COMP_STS_R::new(((self.bits >> 29) & 1) != 0) + pub fn u0_usb_rid_gnd_comp_sts(&self) -> U0_USB_RID_GND_COMP_STS_R { + U0_USB_RID_GND_COMP_STS_R::new(((self.bits >> 29) & 1) != 0) } - #[doc = "Bit 30 - u0_cdn_usb_rid_nonfloat_comp_en"] + #[doc = "Bit 30 - u0_usb_rid_nonfloat_comp_en"] #[inline(always)] - pub fn u0_cdn_usb_rid_nonfloat_comp_en(&self) -> U0_CDN_USB_RID_NONFLOAT_COMP_EN_R { - U0_CDN_USB_RID_NONFLOAT_COMP_EN_R::new(((self.bits >> 30) & 1) != 0) + pub fn u0_usb_rid_nonfloat_comp_en(&self) -> U0_USB_RID_NONFLOAT_COMP_EN_R { + U0_USB_RID_NONFLOAT_COMP_EN_R::new(((self.bits >> 30) & 1) != 0) } - #[doc = "Bit 31 - u0_cdn_usb_rx_dm"] + #[doc = "Bit 31 - u0_usb_rx_dm"] #[inline(always)] - pub fn u0_cdn_usb_rx_dm(&self) -> U0_CDN_USB_RX_DM_R { - U0_CDN_USB_RX_DM_R::new(((self.bits >> 31) & 1) != 0) + pub fn u0_usb_rx_dm(&self) -> U0_USB_RX_DM_R { + U0_USB_RX_DM_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 13 - LTM interface to software"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_ltm_host_req_halt( - &mut self, - ) -> U0_CDN_USB_LTM_HOST_REQ_HALT_W { - U0_CDN_USB_LTM_HOST_REQ_HALT_W::new(self, 13) + pub fn u0_usb_ltm_host_req_halt(&mut self) -> U0_USB_LTM_HOST_REQ_HALT_W { + U0_USB_LTM_HOST_REQ_HALT_W::new(self, 13) } - #[doc = "Bit 14 - u0_cdn_usb_mdctrl_clk_sel"] + #[doc = "Bit 14 - u0_usb_mdctrl_clk_sel"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_mdctrl_clk_sel(&mut self) -> U0_CDN_USB_MDCTRL_CLK_SEL_W { - U0_CDN_USB_MDCTRL_CLK_SEL_W::new(self, 14) + pub fn u0_usb_mdctrl_clk_sel(&mut self) -> U0_USB_MDCTRL_CLK_SEL_W { + U0_USB_MDCTRL_CLK_SEL_W::new(self, 14) } #[doc = "Bits 16:18 - Can onlly be changed when pwrup_rst_n is low"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_mode_strap(&mut self) -> U0_CDN_USB_MODE_STRAP_W { - U0_CDN_USB_MODE_STRAP_W::new(self, 16) + pub fn u0_usb_mode_strap(&mut self) -> U0_USB_MODE_STRAP_W { + U0_USB_MODE_STRAP_W::new(self, 16) } - #[doc = "Bit 19 - u0_cdn_usb_otg_suspendm"] + #[doc = "Bit 19 - u0_usb_otg_suspendm"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_otg_suspendm(&mut self) -> U0_CDN_USB_OTG_SUSPENDM_W { - U0_CDN_USB_OTG_SUSPENDM_W::new(self, 19) + pub fn u0_usb_otg_suspendm(&mut self) -> U0_USB_OTG_SUSPENDM_W { + U0_USB_OTG_SUSPENDM_W::new(self, 19) } - #[doc = "Bit 20 - u0_cdn_usb_otg_suspendm_byps"] + #[doc = "Bit 20 - u0_usb_otg_suspendm_byps"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_otg_suspendm_byps( - &mut self, - ) -> U0_CDN_USB_OTG_SUSPENDM_BYPS_W { - U0_CDN_USB_OTG_SUSPENDM_BYPS_W::new(self, 20) + pub fn u0_usb_otg_suspendm_byps(&mut self) -> U0_USB_OTG_SUSPENDM_BYPS_W { + U0_USB_OTG_SUSPENDM_BYPS_W::new(self, 20) } - #[doc = "Bit 22 - u0_cdn_usb_pll_en"] + #[doc = "Bit 22 - u0_usb_pll_en"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_pll_en(&mut self) -> U0_CDN_USB_PLL_EN_W { - U0_CDN_USB_PLL_EN_W::new(self, 22) + pub fn u0_usb_pll_en(&mut self) -> U0_USB_PLL_EN_W { + U0_USB_PLL_EN_W::new(self, 22) } - #[doc = "Bit 23 - u0_cdn_usb_refclk_mode"] + #[doc = "Bit 23 - u0_usb_refclk_mode"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_refclk_mode(&mut self) -> U0_CDN_USB_REFCLK_MODE_W { - U0_CDN_USB_REFCLK_MODE_W::new(self, 23) + pub fn u0_usb_refclk_mode(&mut self) -> U0_USB_REFCLK_MODE_W { + U0_USB_REFCLK_MODE_W::new(self, 23) } #[doc = "Bit 24 - u0_cdn_usb_rid_comp_sts_0"] #[inline(always)] @@ -226,21 +222,17 @@ impl W { pub fn u0_cdn_usb_rid_comp_sts_2(&mut self) -> U0_CDN_USB_RID_COMP_STS_2_W { U0_CDN_USB_RID_COMP_STS_2_W::new(self, 26) } - #[doc = "Bit 28 - u0_cdn_usb_rid_float_comp_sts"] + #[doc = "Bit 28 - u0_usb_rid_float_comp_sts"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_rid_float_comp_sts( - &mut self, - ) -> U0_CDN_USB_RID_FLOAT_COMP_STS_W { - U0_CDN_USB_RID_FLOAT_COMP_STS_W::new(self, 28) + pub fn u0_usb_rid_float_comp_sts(&mut self) -> U0_USB_RID_FLOAT_COMP_STS_W { + U0_USB_RID_FLOAT_COMP_STS_W::new(self, 28) } - #[doc = "Bit 29 - u0_cdn_usb_rid_gnd_comp_sts"] + #[doc = "Bit 29 - u0_usb_rid_gnd_comp_sts"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_rid_gnd_comp_sts( - &mut self, - ) -> U0_CDN_USB_RID_GND_COMP_STS_W { - U0_CDN_USB_RID_GND_COMP_STS_W::new(self, 29) + pub fn u0_usb_rid_gnd_comp_sts(&mut self) -> U0_USB_RID_GND_COMP_STS_W { + U0_USB_RID_GND_COMP_STS_W::new(self, 29) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_10.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_10.rs index 210f606..dba8255 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_10.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_10.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_10` writer"] pub type W = crate::W; -#[doc = "Field `u0_e2_sft7110_wfi_from_tile_0` reader - u0_e2_sft7110_wfi_from_tile_0"] -pub type U0_E2_SFT7110_WFI_FROM_TILE_0_R = crate::BitReader; +#[doc = "Field `u0_e2_wfi_from_tile_0` reader - u0_e2_wfi_from_tile_0"] +pub type U0_E2_WFI_FROM_TILE_0_R = crate::BitReader; impl R { - #[doc = "Bit 0 - u0_e2_sft7110_wfi_from_tile_0"] + #[doc = "Bit 0 - u0_e2_wfi_from_tile_0"] #[inline(always)] - pub fn u0_e2_sft7110_wfi_from_tile_0(&self) -> U0_E2_SFT7110_WFI_FROM_TILE_0_R { - U0_E2_SFT7110_WFI_FROM_TILE_0_R::new((self.bits & 1) != 0) + pub fn u0_e2_wfi_from_tile_0(&self) -> U0_E2_WFI_FROM_TILE_0_R { + U0_E2_WFI_FROM_TILE_0_R::new((self.bits & 1) != 0) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_100.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_100.rs index 8750bbd..0247a4b 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_100.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_100.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_100` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_319_288` reader - u0_plda_pcie_test_out_bridge_319_288"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_319_288` reader - u0_pcie_test_out_bridge_319_288"] +pub type U0_PCIE_TEST_OUT_BRIDGE_319_288_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_319_288"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_319_288"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_319_288(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_319_288(&self) -> U0_PCIE_TEST_OUT_BRIDGE_319_288_R { + U0_PCIE_TEST_OUT_BRIDGE_319_288_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_101.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_101.rs index 2333d31..64f19a5 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_101.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_101.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_101` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_351_320` reader - u0_plda_pcie_test_out_bridge_351_320"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_351_320` reader - u0_pcie_test_out_bridge_351_320"] +pub type U0_PCIE_TEST_OUT_BRIDGE_351_320_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_351_320"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_351_320"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_351_320(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_351_320(&self) -> U0_PCIE_TEST_OUT_BRIDGE_351_320_R { + U0_PCIE_TEST_OUT_BRIDGE_351_320_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_102.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_102.rs index 404cd9c..de202da 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_102.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_102.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_102` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_383_352` reader - u0_plda_pcie_test_out_bridge_383_352"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_383_352` reader - u0_pcie_test_out_bridge_383_352"] +pub type U0_PCIE_TEST_OUT_BRIDGE_383_352_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_383_352"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_383_352"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_383_352(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_383_352(&self) -> U0_PCIE_TEST_OUT_BRIDGE_383_352_R { + U0_PCIE_TEST_OUT_BRIDGE_383_352_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_103.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_103.rs index d8e4c01..8e72459 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_103.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_103.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_103` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_415_384` reader - u0_plda_pcie_test_out_bridge_415_384"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_415_384` reader - u0_pcie_test_out_bridge_415_384"] +pub type U0_PCIE_TEST_OUT_BRIDGE_415_384_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_415_384"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_415_384"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_415_384(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_415_384(&self) -> U0_PCIE_TEST_OUT_BRIDGE_415_384_R { + U0_PCIE_TEST_OUT_BRIDGE_415_384_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_104.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_104.rs index 27e82db..ed2db9b 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_104.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_104.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_104` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_447_416` reader - u0_plda_pcie_test_out_bridge_447_416"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_447_416` reader - u0_pcie_test_out_bridge_447_416"] +pub type U0_PCIE_TEST_OUT_BRIDGE_447_416_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_447_416"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_447_416"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_447_416(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_447_416(&self) -> U0_PCIE_TEST_OUT_BRIDGE_447_416_R { + U0_PCIE_TEST_OUT_BRIDGE_447_416_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_105.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_105.rs index 7ceab98..ab6c5b3 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_105.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_105.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_105` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_479_448` reader - u0_plda_pcie_test_out_bridge_479_448"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_479_448` reader - u0_pcie_test_out_bridge_479_448"] +pub type U0_PCIE_TEST_OUT_BRIDGE_479_448_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_479_448"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_479_448"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_479_448(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_479_448(&self) -> U0_PCIE_TEST_OUT_BRIDGE_479_448_R { + U0_PCIE_TEST_OUT_BRIDGE_479_448_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_106.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_106.rs index dfc9843..bafde18 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_106.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_106.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_106` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_511_480` reader - u0_plda_pcie_test_out_bridge_511_480"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_511_480` reader - u0_pcie_test_out_bridge_511_480"] +pub type U0_PCIE_TEST_OUT_BRIDGE_511_480_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_511_480"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_511_480"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_511_480(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_511_480(&self) -> U0_PCIE_TEST_OUT_BRIDGE_511_480_R { + U0_PCIE_TEST_OUT_BRIDGE_511_480_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_107.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_107.rs index 46faaaa..7acdda8 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_107.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_107.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_107` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_31_0` reader - u0_plda_pcie_test_out_pcie_31_0"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_31_0` reader - u0_pcie_test_out_pcie_31_0"] +pub type U0_PCIE_TEST_OUT_PCIE_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_31_0"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_31_0"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_31_0(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_31_0_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_31_0_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_31_0(&self) -> U0_PCIE_TEST_OUT_PCIE_31_0_R { + U0_PCIE_TEST_OUT_PCIE_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_108.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_108.rs index 7d44fbc..ceafc14 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_108.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_108.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_108` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_63_32` reader - u0_plda_pcie_test_out_pcie_63_32"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_63_32` reader - u0_pcie_test_out_pcie_63_32"] +pub type U0_PCIE_TEST_OUT_PCIE_63_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_63_32"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_63_32"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_63_32(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_63_32_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_63_32_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_63_32(&self) -> U0_PCIE_TEST_OUT_PCIE_63_32_R { + U0_PCIE_TEST_OUT_PCIE_63_32_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_109.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_109.rs index c56e431..3fe8a19 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_109.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_109.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_109` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_95_64` reader - u0_plda_pcie_test_out_pcie_95_64"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_95_64_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_95_64` reader - u0_pcie_test_out_pcie_95_64"] +pub type U0_PCIE_TEST_OUT_PCIE_95_64_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_95_64"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_95_64"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_95_64(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_95_64_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_95_64_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_95_64(&self) -> U0_PCIE_TEST_OUT_PCIE_95_64_R { + U0_PCIE_TEST_OUT_PCIE_95_64_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_110.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_110.rs index 9303229..37b280c 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_110.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_110.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_110` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_127_96` reader - u0_plda_pcie_test_out_pcie_127_96"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_127_96_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_127_96` reader - u0_pcie_test_out_pcie_127_96"] +pub type U0_PCIE_TEST_OUT_PCIE_127_96_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_127_96"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_127_96"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_127_96(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_127_96_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_127_96_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_127_96(&self) -> U0_PCIE_TEST_OUT_PCIE_127_96_R { + U0_PCIE_TEST_OUT_PCIE_127_96_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_111.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_111.rs index cdbee0d..a89b1dd 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_111.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_111.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_111` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_159_128` reader - u0_plda_pcie_test_out_pcie_159_128"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_159_128_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_159_128` reader - u0_pcie_test_out_pcie_159_128"] +pub type U0_PCIE_TEST_OUT_PCIE_159_128_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_159_128"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_159_128"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_159_128(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_159_128_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_159_128_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_159_128(&self) -> U0_PCIE_TEST_OUT_PCIE_159_128_R { + U0_PCIE_TEST_OUT_PCIE_159_128_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_112.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_112.rs index e00d374..3ca4816 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_112.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_112.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_112` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_191_160` reader - u0_plda_pcie_test_out_pcie_191_160"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_191_160_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_191_160` reader - u0_pcie_test_out_pcie_191_160"] +pub type U0_PCIE_TEST_OUT_PCIE_191_160_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_191_160"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_191_160"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_191_160(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_191_160_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_191_160_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_191_160(&self) -> U0_PCIE_TEST_OUT_PCIE_191_160_R { + U0_PCIE_TEST_OUT_PCIE_191_160_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_113.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_113.rs index 07d16a3..a6be3aa 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_113.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_113.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_113` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_223_192` reader - u0_plda_pcie_test_out_pcie_223_192"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_223_192_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_223_192` reader - u0_pcie_test_out_pcie_223_192"] +pub type U0_PCIE_TEST_OUT_PCIE_223_192_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_223_192"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_223_192"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_223_192(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_223_192_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_223_192_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_223_192(&self) -> U0_PCIE_TEST_OUT_PCIE_223_192_R { + U0_PCIE_TEST_OUT_PCIE_223_192_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_114.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_114.rs index eb1db31..c217b3e 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_114.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_114.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_114` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_255_224` reader - u0_plda_pcie_test_out_pcie_255_224"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_255_224_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_255_224` reader - u0_pcie_test_out_pcie_255_224"] +pub type U0_PCIE_TEST_OUT_PCIE_255_224_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_255_224"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_255_224"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_255_224(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_255_224_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_255_224_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_255_224(&self) -> U0_PCIE_TEST_OUT_PCIE_255_224_R { + U0_PCIE_TEST_OUT_PCIE_255_224_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_115.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_115.rs index 9e0c834..add89ef 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_115.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_115.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_115` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_287_256` reader - u0_plda_pcie_test_out_pcie_287_256"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_287_256_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_287_256` reader - u0_pcie_test_out_pcie_287_256"] +pub type U0_PCIE_TEST_OUT_PCIE_287_256_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_287_256"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_287_256"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_287_256(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_287_256_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_287_256_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_287_256(&self) -> U0_PCIE_TEST_OUT_PCIE_287_256_R { + U0_PCIE_TEST_OUT_PCIE_287_256_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_116.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_116.rs index 5f8ae41..e1517f6 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_116.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_116.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_116` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_319_288` reader - u0_plda_pcie_test_out_pcie_319_288"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_319_288_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_319_288` reader - u0_pcie_test_out_pcie_319_288"] +pub type U0_PCIE_TEST_OUT_PCIE_319_288_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_319_288"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_319_288"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_319_288(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_319_288_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_319_288_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_319_288(&self) -> U0_PCIE_TEST_OUT_PCIE_319_288_R { + U0_PCIE_TEST_OUT_PCIE_319_288_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_117.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_117.rs index e92ea28..130197a 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_117.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_117.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_117` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_351_320` reader - u0_plda_pcie_test_out_pcie_351_320"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_351_320_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_351_320` reader - u0_pcie_test_out_pcie_351_320"] +pub type U0_PCIE_TEST_OUT_PCIE_351_320_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_351_320"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_351_320"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_351_320(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_351_320_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_351_320_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_351_320(&self) -> U0_PCIE_TEST_OUT_PCIE_351_320_R { + U0_PCIE_TEST_OUT_PCIE_351_320_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_118.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_118.rs index 4127b44..c593942 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_118.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_118.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_118` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_383_352` reader - u0_plda_pcie_test_out_pcie_383_352"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_383_352_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_383_352` reader - u0_pcie_test_out_pcie_383_352"] +pub type U0_PCIE_TEST_OUT_PCIE_383_352_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_383_352"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_383_352"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_383_352(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_383_352_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_383_352_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_383_352(&self) -> U0_PCIE_TEST_OUT_PCIE_383_352_R { + U0_PCIE_TEST_OUT_PCIE_383_352_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_119.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_119.rs index 0c62e2c..c945ca9 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_119.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_119.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_119` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_415_384` reader - u0_plda_pcie_test_out_pcie_415_384"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_415_384_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_415_384` reader - u0_pcie_test_out_pcie_415_384"] +pub type U0_PCIE_TEST_OUT_PCIE_415_384_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_415_384"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_415_384"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_415_384(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_415_384_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_415_384_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_415_384(&self) -> U0_PCIE_TEST_OUT_PCIE_415_384_R { + U0_PCIE_TEST_OUT_PCIE_415_384_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_120.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_120.rs index 10927a7..bf06b45 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_120.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_120.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_120` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_447_416` reader - u0_plda_pcie_test_out_pcie_447_416"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_447_416_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_447_416` reader - u0_pcie_test_out_pcie_447_416"] +pub type U0_PCIE_TEST_OUT_PCIE_447_416_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_447_416"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_447_416"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_447_416(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_447_416_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_447_416_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_447_416(&self) -> U0_PCIE_TEST_OUT_PCIE_447_416_R { + U0_PCIE_TEST_OUT_PCIE_447_416_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_121.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_121.rs index 79a277b..85f1285 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_121.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_121.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_121` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_479_448` reader - u0_plda_pcie_test_out_pcie_479_448"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_479_448_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_479_448` reader - u0_pcie_test_out_pcie_479_448"] +pub type U0_PCIE_TEST_OUT_PCIE_479_448_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_479_448"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_479_448"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_479_448(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_479_448_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_479_448_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_479_448(&self) -> U0_PCIE_TEST_OUT_PCIE_479_448_R { + U0_PCIE_TEST_OUT_PCIE_479_448_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_122.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_122.rs index bae7133..65882fc 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_122.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_122.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_122` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_pcie_511_480` reader - u0_plda_pcie_test_out_pcie_511_480"] -pub type U0_PLDA_PCIE_TEST_OUT_PCIE_511_480_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_pcie_511_480` reader - u0_pcie_test_out_pcie_511_480"] +pub type U0_PCIE_TEST_OUT_PCIE_511_480_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_pcie_511_480"] + #[doc = "Bits 0:31 - u0_pcie_test_out_pcie_511_480"] #[inline(always)] - pub fn u0_plda_pcie_test_out_pcie_511_480(&self) -> U0_PLDA_PCIE_TEST_OUT_PCIE_511_480_R { - U0_PLDA_PCIE_TEST_OUT_PCIE_511_480_R::new(self.bits) + pub fn u0_pcie_test_out_pcie_511_480(&self) -> U0_PCIE_TEST_OUT_PCIE_511_480_R { + U0_PCIE_TEST_OUT_PCIE_511_480_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_123.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_123.rs index f629c33..d8bc7f3 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_123.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_123.rs @@ -2,40 +2,38 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_123` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_sel` reader - u0_plda_pcie_test_sel"] -pub type U0_PLDA_PCIE_TEST_SEL_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_test_sel` writer - u0_plda_pcie_test_sel"] -pub type U0_PLDA_PCIE_TEST_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `u0_plda_pcie_tl_clock_freq` reader - u0_plda_pcie_tl_clock_freq"] -pub type U0_PLDA_PCIE_TL_CLOCK_FREQ_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_tl_clock_freq` writer - u0_plda_pcie_tl_clock_freq"] -pub type U0_PLDA_PCIE_TL_CLOCK_FREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>; +#[doc = "Field `u0_pcie_test_sel` reader - u0_pcie_test_sel"] +pub type U0_PCIE_TEST_SEL_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_sel` writer - u0_pcie_test_sel"] +pub type U0_PCIE_TEST_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `u0_pcie_tl_clock_freq` reader - u0_pcie_tl_clock_freq"] +pub type U0_PCIE_TL_CLOCK_FREQ_R = crate::FieldReader; +#[doc = "Field `u0_pcie_tl_clock_freq` writer - u0_pcie_tl_clock_freq"] +pub type U0_PCIE_TL_CLOCK_FREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>; impl R { - #[doc = "Bits 0:3 - u0_plda_pcie_test_sel"] + #[doc = "Bits 0:3 - u0_pcie_test_sel"] #[inline(always)] - pub fn u0_plda_pcie_test_sel(&self) -> U0_PLDA_PCIE_TEST_SEL_R { - U0_PLDA_PCIE_TEST_SEL_R::new((self.bits & 0x0f) as u8) + pub fn u0_pcie_test_sel(&self) -> U0_PCIE_TEST_SEL_R { + U0_PCIE_TEST_SEL_R::new((self.bits & 0x0f) as u8) } - #[doc = "Bits 4:25 - u0_plda_pcie_tl_clock_freq"] + #[doc = "Bits 4:25 - u0_pcie_tl_clock_freq"] #[inline(always)] - pub fn u0_plda_pcie_tl_clock_freq(&self) -> U0_PLDA_PCIE_TL_CLOCK_FREQ_R { - U0_PLDA_PCIE_TL_CLOCK_FREQ_R::new((self.bits >> 4) & 0x003f_ffff) + pub fn u0_pcie_tl_clock_freq(&self) -> U0_PCIE_TL_CLOCK_FREQ_R { + U0_PCIE_TL_CLOCK_FREQ_R::new((self.bits >> 4) & 0x003f_ffff) } } impl W { - #[doc = "Bits 0:3 - u0_plda_pcie_test_sel"] + #[doc = "Bits 0:3 - u0_pcie_test_sel"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_test_sel(&mut self) -> U0_PLDA_PCIE_TEST_SEL_W { - U0_PLDA_PCIE_TEST_SEL_W::new(self, 0) + pub fn u0_pcie_test_sel(&mut self) -> U0_PCIE_TEST_SEL_W { + U0_PCIE_TEST_SEL_W::new(self, 0) } - #[doc = "Bits 4:25 - u0_plda_pcie_tl_clock_freq"] + #[doc = "Bits 4:25 - u0_pcie_tl_clock_freq"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_tl_clock_freq( - &mut self, - ) -> U0_PLDA_PCIE_TL_CLOCK_FREQ_W { - U0_PLDA_PCIE_TL_CLOCK_FREQ_W::new(self, 4) + pub fn u0_pcie_tl_clock_freq(&mut self) -> U0_PCIE_TL_CLOCK_FREQ_W { + U0_PCIE_TL_CLOCK_FREQ_W::new(self, 4) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_124.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_124.rs index b1e0c89..6591905 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_124.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_124.rs @@ -2,32 +2,32 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_124` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_tl_ctrl_hotplug` reader - u0_plda_pcie_tl_ctrl_hotplug"] -pub type U0_PLDA_PCIE_TL_CTRL_HOTPLUG_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_tl_report_hotplug` reader - u0_plda_pcie_tl_report_hotplug"] -pub type U0_PLDA_PCIE_TL_REPORT_HOTPLUG_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_tl_report_hotplug` writer - u0_plda_pcie_tl_report_hotplug"] -pub type U0_PLDA_PCIE_TL_REPORT_HOTPLUG_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +#[doc = "Field `u0_pcie_tl_ctrl_hotplug` reader - u0_pcie_tl_ctrl_hotplug"] +pub type U0_PCIE_TL_CTRL_HOTPLUG_R = crate::FieldReader; +#[doc = "Field `u0_pcie_tl_report_hotplug` reader - u0_pcie_tl_report_hotplug"] +pub type U0_PCIE_TL_REPORT_HOTPLUG_R = crate::FieldReader; +#[doc = "Field `u0_pcie_tl_report_hotplug` writer - u0_pcie_tl_report_hotplug"] +pub type U0_PCIE_TL_REPORT_HOTPLUG_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { - #[doc = "Bits 0:15 - u0_plda_pcie_tl_ctrl_hotplug"] + #[doc = "Bits 0:15 - u0_pcie_tl_ctrl_hotplug"] #[inline(always)] - pub fn u0_plda_pcie_tl_ctrl_hotplug(&self) -> U0_PLDA_PCIE_TL_CTRL_HOTPLUG_R { - U0_PLDA_PCIE_TL_CTRL_HOTPLUG_R::new((self.bits & 0xffff) as u16) + pub fn u0_pcie_tl_ctrl_hotplug(&self) -> U0_PCIE_TL_CTRL_HOTPLUG_R { + U0_PCIE_TL_CTRL_HOTPLUG_R::new((self.bits & 0xffff) as u16) } - #[doc = "Bits 16:31 - u0_plda_pcie_tl_report_hotplug"] + #[doc = "Bits 16:31 - u0_pcie_tl_report_hotplug"] #[inline(always)] - pub fn u0_plda_pcie_tl_report_hotplug(&self) -> U0_PLDA_PCIE_TL_REPORT_HOTPLUG_R { - U0_PLDA_PCIE_TL_REPORT_HOTPLUG_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn u0_pcie_tl_report_hotplug(&self) -> U0_PCIE_TL_REPORT_HOTPLUG_R { + U0_PCIE_TL_REPORT_HOTPLUG_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { - #[doc = "Bits 16:31 - u0_plda_pcie_tl_report_hotplug"] + #[doc = "Bits 16:31 - u0_pcie_tl_report_hotplug"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_tl_report_hotplug( + pub fn u0_pcie_tl_report_hotplug( &mut self, - ) -> U0_PLDA_PCIE_TL_REPORT_HOTPLUG_W { - U0_PLDA_PCIE_TL_REPORT_HOTPLUG_W::new(self, 16) + ) -> U0_PCIE_TL_REPORT_HOTPLUG_W { + U0_PCIE_TL_REPORT_HOTPLUG_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_125.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_125.rs index b3eb15b..2de4526 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_125.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_125.rs @@ -2,34 +2,34 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_125` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_tx_pattern` reader - u0_plda_pcie_tx_pattern"] -pub type U0_PLDA_PCIE_TX_PATTERN_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_tx_pattern` writer - u0_plda_pcie_tx_pattern"] -pub type U0_PLDA_PCIE_TX_PATTERN_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_plda_pcie_usb3_bus_width` reader - u0_plda_pcie_usb3_bus_width"] -pub type U0_PLDA_PCIE_USB3_BUS_WIDTH_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_usb3_bus_width` writer - u0_plda_pcie_usb3_bus_width"] -pub type U0_PLDA_PCIE_USB3_BUS_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_plda_pcie_usb3_phy_enable` reader - u0_plda_pcie_usb3_phy_enable"] -pub type U0_PLDA_PCIE_USB3_PHY_ENABLE_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_usb3_phy_enable` writer - u0_plda_pcie_usb3_phy_enable"] -pub type U0_PLDA_PCIE_USB3_PHY_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_usb3_rate` reader - u0_plda_pcie_usb3_rate"] -pub type U0_PLDA_PCIE_USB3_RATE_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_usb3_rate` writer - u0_plda_pcie_usb3_rate"] -pub type U0_PLDA_PCIE_USB3_RATE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_plda_pcie_usb3_rx_standby` reader - u0_plda_pcie_usb3_rx_standby"] -pub type U0_PLDA_PCIE_USB3_RX_STANDBY_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_usb3_rx_standby` writer - u0_plda_pcie_usb3_rx_standby"] -pub type U0_PLDA_PCIE_USB3_RX_STANDBY_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_xwdecerr` reader - u0_plda_pcie_xwdecerr"] -pub type U0_PLDA_PCIE_XWDECERR_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_xwerrclr` reader - u0_plda_pcie_xwerrclr"] -pub type U0_PLDA_PCIE_XWERRCLR_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_xwerrclr` writer - u0_plda_pcie_xwerrclr"] -pub type U0_PLDA_PCIE_XWERRCLR_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_xwslverr` reader - u0_plda_pcie_xwslverr"] -pub type U0_PLDA_PCIE_XWSLVERR_R = crate::BitReader; +#[doc = "Field `u0_pcie_tx_pattern` reader - u0_pcie_tx_pattern"] +pub type U0_PCIE_TX_PATTERN_R = crate::FieldReader; +#[doc = "Field `u0_pcie_tx_pattern` writer - u0_pcie_tx_pattern"] +pub type U0_PCIE_TX_PATTERN_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_pcie_usb3_bus_width` reader - u0_pcie_usb3_bus_width"] +pub type U0_PCIE_USB3_BUS_WIDTH_R = crate::FieldReader; +#[doc = "Field `u0_pcie_usb3_bus_width` writer - u0_pcie_usb3_bus_width"] +pub type U0_PCIE_USB3_BUS_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_pcie_usb3_phy_enable` reader - u0_pcie_usb3_phy_enable"] +pub type U0_PCIE_USB3_PHY_ENABLE_R = crate::BitReader; +#[doc = "Field `u0_pcie_usb3_phy_enable` writer - u0_pcie_usb3_phy_enable"] +pub type U0_PCIE_USB3_PHY_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_usb3_rate` reader - u0_pcie_usb3_rate"] +pub type U0_PCIE_USB3_RATE_R = crate::FieldReader; +#[doc = "Field `u0_pcie_usb3_rate` writer - u0_pcie_usb3_rate"] +pub type U0_PCIE_USB3_RATE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_pcie_usb3_rx_standby` reader - u0_pcie_usb3_rx_standby"] +pub type U0_PCIE_USB3_RX_STANDBY_R = crate::BitReader; +#[doc = "Field `u0_pcie_usb3_rx_standby` writer - u0_pcie_usb3_rx_standby"] +pub type U0_PCIE_USB3_RX_STANDBY_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_xwdecerr` reader - u0_pcie_xwdecerr"] +pub type U0_PCIE_XWDECERR_R = crate::BitReader; +#[doc = "Field `u0_pcie_xwerrclr` reader - u0_pcie_xwerrclr"] +pub type U0_PCIE_XWERRCLR_R = crate::BitReader; +#[doc = "Field `u0_pcie_xwerrclr` writer - u0_pcie_xwerrclr"] +pub type U0_PCIE_XWERRCLR_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_xwslverr` reader - u0_pcie_xwslverr"] +pub type U0_PCIE_XWSLVERR_R = crate::BitReader; #[doc = "Field `u0_sec_top_sramcfg_slp` reader - SRAM/ROM configuration. SLP: sleep enable, high active, default is low."] pub type U0_SEC_TOP_SRAMCFG_SLP_R = crate::BitReader; #[doc = "Field `u0_sec_top_sramcfg_slp` writer - SRAM/ROM configuration. SLP: sleep enable, high active, default is low."] @@ -65,45 +65,45 @@ pub type U0_SEC_TOP_SRAMCFG_VG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `u0_plda_pcie_align_detect` reader - u0_plda_pcie_align_detect"] pub type U0_PLDA_PCIE_ALIGN_DETECT_R = crate::BitReader; impl R { - #[doc = "Bits 0:1 - u0_plda_pcie_tx_pattern"] + #[doc = "Bits 0:1 - u0_pcie_tx_pattern"] #[inline(always)] - pub fn u0_plda_pcie_tx_pattern(&self) -> U0_PLDA_PCIE_TX_PATTERN_R { - U0_PLDA_PCIE_TX_PATTERN_R::new((self.bits & 3) as u8) + pub fn u0_pcie_tx_pattern(&self) -> U0_PCIE_TX_PATTERN_R { + U0_PCIE_TX_PATTERN_R::new((self.bits & 3) as u8) } - #[doc = "Bits 2:3 - u0_plda_pcie_usb3_bus_width"] + #[doc = "Bits 2:3 - u0_pcie_usb3_bus_width"] #[inline(always)] - pub fn u0_plda_pcie_usb3_bus_width(&self) -> U0_PLDA_PCIE_USB3_BUS_WIDTH_R { - U0_PLDA_PCIE_USB3_BUS_WIDTH_R::new(((self.bits >> 2) & 3) as u8) + pub fn u0_pcie_usb3_bus_width(&self) -> U0_PCIE_USB3_BUS_WIDTH_R { + U0_PCIE_USB3_BUS_WIDTH_R::new(((self.bits >> 2) & 3) as u8) } - #[doc = "Bit 4 - u0_plda_pcie_usb3_phy_enable"] + #[doc = "Bit 4 - u0_pcie_usb3_phy_enable"] #[inline(always)] - pub fn u0_plda_pcie_usb3_phy_enable(&self) -> U0_PLDA_PCIE_USB3_PHY_ENABLE_R { - U0_PLDA_PCIE_USB3_PHY_ENABLE_R::new(((self.bits >> 4) & 1) != 0) + pub fn u0_pcie_usb3_phy_enable(&self) -> U0_PCIE_USB3_PHY_ENABLE_R { + U0_PCIE_USB3_PHY_ENABLE_R::new(((self.bits >> 4) & 1) != 0) } - #[doc = "Bits 5:6 - u0_plda_pcie_usb3_rate"] + #[doc = "Bits 5:6 - u0_pcie_usb3_rate"] #[inline(always)] - pub fn u0_plda_pcie_usb3_rate(&self) -> U0_PLDA_PCIE_USB3_RATE_R { - U0_PLDA_PCIE_USB3_RATE_R::new(((self.bits >> 5) & 3) as u8) + pub fn u0_pcie_usb3_rate(&self) -> U0_PCIE_USB3_RATE_R { + U0_PCIE_USB3_RATE_R::new(((self.bits >> 5) & 3) as u8) } - #[doc = "Bit 7 - u0_plda_pcie_usb3_rx_standby"] + #[doc = "Bit 7 - u0_pcie_usb3_rx_standby"] #[inline(always)] - pub fn u0_plda_pcie_usb3_rx_standby(&self) -> U0_PLDA_PCIE_USB3_RX_STANDBY_R { - U0_PLDA_PCIE_USB3_RX_STANDBY_R::new(((self.bits >> 7) & 1) != 0) + pub fn u0_pcie_usb3_rx_standby(&self) -> U0_PCIE_USB3_RX_STANDBY_R { + U0_PCIE_USB3_RX_STANDBY_R::new(((self.bits >> 7) & 1) != 0) } - #[doc = "Bit 8 - u0_plda_pcie_xwdecerr"] + #[doc = "Bit 8 - u0_pcie_xwdecerr"] #[inline(always)] - pub fn u0_plda_pcie_xwdecerr(&self) -> U0_PLDA_PCIE_XWDECERR_R { - U0_PLDA_PCIE_XWDECERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn u0_pcie_xwdecerr(&self) -> U0_PCIE_XWDECERR_R { + U0_PCIE_XWDECERR_R::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 9 - u0_plda_pcie_xwerrclr"] + #[doc = "Bit 9 - u0_pcie_xwerrclr"] #[inline(always)] - pub fn u0_plda_pcie_xwerrclr(&self) -> U0_PLDA_PCIE_XWERRCLR_R { - U0_PLDA_PCIE_XWERRCLR_R::new(((self.bits >> 9) & 1) != 0) + pub fn u0_pcie_xwerrclr(&self) -> U0_PCIE_XWERRCLR_R { + U0_PCIE_XWERRCLR_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 10 - u0_plda_pcie_xwslverr"] + #[doc = "Bit 10 - u0_pcie_xwslverr"] #[inline(always)] - pub fn u0_plda_pcie_xwslverr(&self) -> U0_PLDA_PCIE_XWSLVERR_R { - U0_PLDA_PCIE_XWSLVERR_R::new(((self.bits >> 10) & 1) != 0) + pub fn u0_pcie_xwslverr(&self) -> U0_PCIE_XWSLVERR_R { + U0_PCIE_XWSLVERR_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - SRAM/ROM configuration. SLP: sleep enable, high active, default is low."] #[inline(always)] @@ -152,47 +152,41 @@ impl R { } } impl W { - #[doc = "Bits 0:1 - u0_plda_pcie_tx_pattern"] + #[doc = "Bits 0:1 - u0_pcie_tx_pattern"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_tx_pattern(&mut self) -> U0_PLDA_PCIE_TX_PATTERN_W { - U0_PLDA_PCIE_TX_PATTERN_W::new(self, 0) + pub fn u0_pcie_tx_pattern(&mut self) -> U0_PCIE_TX_PATTERN_W { + U0_PCIE_TX_PATTERN_W::new(self, 0) } - #[doc = "Bits 2:3 - u0_plda_pcie_usb3_bus_width"] + #[doc = "Bits 2:3 - u0_pcie_usb3_bus_width"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_usb3_bus_width( - &mut self, - ) -> U0_PLDA_PCIE_USB3_BUS_WIDTH_W { - U0_PLDA_PCIE_USB3_BUS_WIDTH_W::new(self, 2) + pub fn u0_pcie_usb3_bus_width(&mut self) -> U0_PCIE_USB3_BUS_WIDTH_W { + U0_PCIE_USB3_BUS_WIDTH_W::new(self, 2) } - #[doc = "Bit 4 - u0_plda_pcie_usb3_phy_enable"] + #[doc = "Bit 4 - u0_pcie_usb3_phy_enable"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_usb3_phy_enable( - &mut self, - ) -> U0_PLDA_PCIE_USB3_PHY_ENABLE_W { - U0_PLDA_PCIE_USB3_PHY_ENABLE_W::new(self, 4) + pub fn u0_pcie_usb3_phy_enable(&mut self) -> U0_PCIE_USB3_PHY_ENABLE_W { + U0_PCIE_USB3_PHY_ENABLE_W::new(self, 4) } - #[doc = "Bits 5:6 - u0_plda_pcie_usb3_rate"] + #[doc = "Bits 5:6 - u0_pcie_usb3_rate"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_usb3_rate(&mut self) -> U0_PLDA_PCIE_USB3_RATE_W { - U0_PLDA_PCIE_USB3_RATE_W::new(self, 5) + pub fn u0_pcie_usb3_rate(&mut self) -> U0_PCIE_USB3_RATE_W { + U0_PCIE_USB3_RATE_W::new(self, 5) } - #[doc = "Bit 7 - u0_plda_pcie_usb3_rx_standby"] + #[doc = "Bit 7 - u0_pcie_usb3_rx_standby"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_usb3_rx_standby( - &mut self, - ) -> U0_PLDA_PCIE_USB3_RX_STANDBY_W { - U0_PLDA_PCIE_USB3_RX_STANDBY_W::new(self, 7) + pub fn u0_pcie_usb3_rx_standby(&mut self) -> U0_PCIE_USB3_RX_STANDBY_W { + U0_PCIE_USB3_RX_STANDBY_W::new(self, 7) } - #[doc = "Bit 9 - u0_plda_pcie_xwerrclr"] + #[doc = "Bit 9 - u0_pcie_xwerrclr"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_xwerrclr(&mut self) -> U0_PLDA_PCIE_XWERRCLR_W { - U0_PLDA_PCIE_XWERRCLR_W::new(self, 9) + pub fn u0_pcie_xwerrclr(&mut self) -> U0_PCIE_XWERRCLR_W { + U0_PCIE_XWERRCLR_W::new(self, 9) } #[doc = "Bit 11 - SRAM/ROM configuration. SLP: sleep enable, high active, default is low."] #[inline(always)] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_126.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_126.rs index 1a604cc..8caed29 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_126.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_126.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_126` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_31_0` reader - u0_plda_pcie_axi4_mst0_aratomop_31_0"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_31_0` reader - u0_pcie_axi4_mst0_aratomop_31_0"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_31_0"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_31_0(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_31_0_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_31_0_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_31_0(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_31_0_R { + U0_PCIE_AXI4_MST0_ARATOMOP_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_127.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_127.rs index 18d3661..5ed7e5d 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_127.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_127.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_127` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_63_32` reader - u0_plda_pcie_axi4_mst0_aratomop_63_32"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_63_32` reader - u0_pcie_axi4_mst0_aratomop_63_32"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_63_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_63_32"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_63_32"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_63_32(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_63_32_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_63_32_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_63_32(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_63_32_R { + U0_PCIE_AXI4_MST0_ARATOMOP_63_32_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_128.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_128.rs index 2d51555..ee71d1a 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_128.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_128.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_128` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_95_64` reader - u0_plda_pcie_axi4_mst0_aratomop_95_64"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_95_64_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_95_64` reader - u0_pcie_axi4_mst0_aratomop_95_64"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_95_64_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_95_64"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_95_64"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_95_64(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_95_64_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_95_64_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_95_64(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_95_64_R { + U0_PCIE_AXI4_MST0_ARATOMOP_95_64_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_129.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_129.rs index 1345486..b2247f9 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_129.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_129.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_129` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_127_96` reader - u0_plda_pcie_axi4_mst0_aratomop_127_96"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_127_96_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_127_96` reader - u0_pcie_axi4_mst0_aratomop_127_96"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_127_96_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_127_96"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_127_96"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_127_96( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_127_96_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_127_96_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_127_96(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_127_96_R { + U0_PCIE_AXI4_MST0_ARATOMOP_127_96_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_130.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_130.rs index 2952230..f037850 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_130.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_130.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_130` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_159_128` reader - u0_plda_pcie_axi4_mst0_aratomop_159_128"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_159_128_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_159_128` reader - u0_pcie_axi4_mst0_aratomop_159_128"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_159_128_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_159_128"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_159_128"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_159_128( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_159_128_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_159_128_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_159_128(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_159_128_R { + U0_PCIE_AXI4_MST0_ARATOMOP_159_128_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_131.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_131.rs index 8975915..5a68d91 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_131.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_131.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_131` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_191_160` reader - u0_plda_pcie_axi4_mst0_aratomop_191_160"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_191_160_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_191_160` reader - u0_pcie_axi4_mst0_aratomop_191_160"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_191_160_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_191_160"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_191_160"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_191_160( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_191_160_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_191_160_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_191_160(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_191_160_R { + U0_PCIE_AXI4_MST0_ARATOMOP_191_160_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_132.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_132.rs index 307a1c6..00b6725 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_132.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_132.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_132` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_223_192` reader - u0_plda_pcie_axi4_mst0_aratomop_223_192"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_223_192_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_223_192` reader - u0_pcie_axi4_mst0_aratomop_223_192"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_223_192_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_223_192"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_223_192"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_223_192( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_223_192_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_223_192_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_223_192(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_223_192_R { + U0_PCIE_AXI4_MST0_ARATOMOP_223_192_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_133.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_133.rs index c77b84c..80ddfcf 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_133.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_133.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_133` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_255_224` reader - u0_plda_pcie_axi4_mst0_aratomop_255_224"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_255_224_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_255_224` reader - u0_pcie_axi4_mst0_aratomop_255_224"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_255_224_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_255_224"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_255_224"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_255_224( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_255_224_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_255_224_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_255_224(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_255_224_R { + U0_PCIE_AXI4_MST0_ARATOMOP_255_224_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_134.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_134.rs index 9d396f0..8ac3892 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_134.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_134.rs @@ -2,29 +2,27 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_134` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_257_256` reader - u0_plda_pcie_axi4_mst0_aratomop_257_256"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_mst0_arfunc` reader - u0_plda_pcie_axi4_mst0_arfunc"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARFUNC_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_mst0_arregion` reader - u0_plda_pcie_axi4_mst0_arregion"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARREGION_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_257_256` reader - u0_pcie_axi4_mst0_aratomop_257_256"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_257_256_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_arfunc` reader - u0_pcie_axi4_mst0_arfunc"] +pub type U0_PCIE_AXI4_MST0_ARFUNC_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_arregion` reader - u0_pcie_axi4_mst0_arregion"] +pub type U0_PCIE_AXI4_MST0_ARREGION_R = crate::FieldReader; impl R { - #[doc = "Bits 0:1 - u0_plda_pcie_axi4_mst0_aratomop_257_256"] + #[doc = "Bits 0:1 - u0_pcie_axi4_mst0_aratomop_257_256"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_257_256( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R::new((self.bits & 3) as u8) + pub fn u0_pcie_axi4_mst0_aratomop_257_256(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_257_256_R { + U0_PCIE_AXI4_MST0_ARATOMOP_257_256_R::new((self.bits & 3) as u8) } - #[doc = "Bits 2:16 - u0_plda_pcie_axi4_mst0_arfunc"] + #[doc = "Bits 2:16 - u0_pcie_axi4_mst0_arfunc"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_arfunc(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARFUNC_R { - U0_PLDA_PCIE_AXI4_MST0_ARFUNC_R::new(((self.bits >> 2) & 0x7fff) as u16) + pub fn u0_pcie_axi4_mst0_arfunc(&self) -> U0_PCIE_AXI4_MST0_ARFUNC_R { + U0_PCIE_AXI4_MST0_ARFUNC_R::new(((self.bits >> 2) & 0x7fff) as u16) } - #[doc = "Bits 17:20 - u0_plda_pcie_axi4_mst0_arregion"] + #[doc = "Bits 17:20 - u0_pcie_axi4_mst0_arregion"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_arregion(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARREGION_R { - U0_PLDA_PCIE_AXI4_MST0_ARREGION_R::new(((self.bits >> 17) & 0x0f) as u8) + pub fn u0_pcie_axi4_mst0_arregion(&self) -> U0_PCIE_AXI4_MST0_ARREGION_R { + U0_PCIE_AXI4_MST0_ARREGION_R::new(((self.bits >> 17) & 0x0f) as u8) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_135.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_135.rs index 7365234..81f5058 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_135.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_135.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_135` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_mst0_aruser_31_0` reader - u1_plda_pcie_axi4_mst0_aruser_31_0"] -pub type U1_PLDA_PCIE_AXI4_MST0_ARUSER_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_aruser_31_0` reader - u1_pcie_axi4_mst0_aruser_31_0"] +pub type U1_PCIE_AXI4_MST0_ARUSER_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_mst0_aruser_31_0"] + #[doc = "Bits 0:31 - u1_pcie_axi4_mst0_aruser_31_0"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_aruser_31_0(&self) -> U1_PLDA_PCIE_AXI4_MST0_ARUSER_31_0_R { - U1_PLDA_PCIE_AXI4_MST0_ARUSER_31_0_R::new(self.bits) + pub fn u1_pcie_axi4_mst0_aruser_31_0(&self) -> U1_PCIE_AXI4_MST0_ARUSER_31_0_R { + U1_PCIE_AXI4_MST0_ARUSER_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_136.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_136.rs index c00f7a3..ef48fbf 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_136.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_136.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_136` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_mst0_aruser_52_32` reader - u1_plda_pcie_axi4_mst0_aruser_52_32"] -pub type U1_PLDA_PCIE_AXI4_MST0_ARUSER_52_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_aruser_52_32` reader - u1_pcie_axi4_mst0_aruser_52_32"] +pub type U1_PCIE_AXI4_MST0_ARUSER_52_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:20 - u1_plda_pcie_axi4_mst0_aruser_52_32"] + #[doc = "Bits 0:20 - u1_pcie_axi4_mst0_aruser_52_32"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_aruser_52_32(&self) -> U1_PLDA_PCIE_AXI4_MST0_ARUSER_52_32_R { - U1_PLDA_PCIE_AXI4_MST0_ARUSER_52_32_R::new(self.bits & 0x001f_ffff) + pub fn u1_pcie_axi4_mst0_aruser_52_32(&self) -> U1_PCIE_AXI4_MST0_ARUSER_52_32_R { + U1_PCIE_AXI4_MST0_ARUSER_52_32_R::new(self.bits & 0x001f_ffff) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_137.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_137.rs index afe29ff..c809471 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_137.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_137.rs @@ -2,20 +2,20 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_137` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_mst0_awfunc` reader - u1_plda_pcie_axi4_mst0_awfunc"] -pub type U1_PLDA_PCIE_AXI4_MST0_AWFUNC_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_mst0_awregion` reader - u1_plda_pcie_axi4_mst0_awregion"] -pub type U1_PLDA_PCIE_AXI4_MST0_AWREGION_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_awfunc` reader - u1_pcie_axi4_mst0_awfunc"] +pub type U1_PCIE_AXI4_MST0_AWFUNC_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_awregion` reader - u1_pcie_axi4_mst0_awregion"] +pub type U1_PCIE_AXI4_MST0_AWREGION_R = crate::FieldReader; impl R { - #[doc = "Bits 0:14 - u1_plda_pcie_axi4_mst0_awfunc"] + #[doc = "Bits 0:14 - u1_pcie_axi4_mst0_awfunc"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_awfunc(&self) -> U1_PLDA_PCIE_AXI4_MST0_AWFUNC_R { - U1_PLDA_PCIE_AXI4_MST0_AWFUNC_R::new((self.bits & 0x7fff) as u16) + pub fn u1_pcie_axi4_mst0_awfunc(&self) -> U1_PCIE_AXI4_MST0_AWFUNC_R { + U1_PCIE_AXI4_MST0_AWFUNC_R::new((self.bits & 0x7fff) as u16) } - #[doc = "Bits 15:18 - u1_plda_pcie_axi4_mst0_awregion"] + #[doc = "Bits 15:18 - u1_pcie_axi4_mst0_awregion"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_awregion(&self) -> U1_PLDA_PCIE_AXI4_MST0_AWREGION_R { - U1_PLDA_PCIE_AXI4_MST0_AWREGION_R::new(((self.bits >> 15) & 0x0f) as u8) + pub fn u1_pcie_axi4_mst0_awregion(&self) -> U1_PCIE_AXI4_MST0_AWREGION_R { + U1_PCIE_AXI4_MST0_AWREGION_R::new(((self.bits >> 15) & 0x0f) as u8) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_138.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_138.rs index ce7dc4b..eb91417 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_138.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_138.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_138` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_mst0_awuser_31_0` reader - u1_plda_pcie_axi4_mst0_awuser_31_0"] -pub type U1_PLDA_PCIE_AXI4_MST0_AWUSER_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_awuser_31_0` reader - u1_pcie_axi4_mst0_awuser_31_0"] +pub type U1_PCIE_AXI4_MST0_AWUSER_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_mst0_awuser_31_0"] + #[doc = "Bits 0:31 - u1_pcie_axi4_mst0_awuser_31_0"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_awuser_31_0(&self) -> U1_PLDA_PCIE_AXI4_MST0_AWUSER_31_0_R { - U1_PLDA_PCIE_AXI4_MST0_AWUSER_31_0_R::new(self.bits) + pub fn u1_pcie_axi4_mst0_awuser_31_0(&self) -> U1_PCIE_AXI4_MST0_AWUSER_31_0_R { + U1_PCIE_AXI4_MST0_AWUSER_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_139.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_139.rs index 014a548..7c3fa4c 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_139.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_139.rs @@ -2,32 +2,30 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_139` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_mst0_awuser_42_32` reader - u1_plda_pcie_axi4_mst0_awuser_42_32"] -pub type U1_PLDA_PCIE_AXI4_MST0_AWUSER_42_32_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_mst0_rderr` reader - u1_plda_pcie_axi4_mst0_rderr"] -pub type U1_PLDA_PCIE_AXI4_MST0_RDERR_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_mst0_rderr` writer - u1_plda_pcie_axi4_mst0_rderr"] -pub type U1_PLDA_PCIE_AXI4_MST0_RDERR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `u1_pcie_axi4_mst0_awuser_42_32` reader - u1_pcie_axi4_mst0_awuser_42_32"] +pub type U1_PCIE_AXI4_MST0_AWUSER_42_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_rderr` reader - u1_pcie_axi4_mst0_rderr"] +pub type U1_PCIE_AXI4_MST0_RDERR_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_rderr` writer - u1_pcie_axi4_mst0_rderr"] +pub type U1_PCIE_AXI4_MST0_RDERR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 0:10 - u1_plda_pcie_axi4_mst0_awuser_42_32"] + #[doc = "Bits 0:10 - u1_pcie_axi4_mst0_awuser_42_32"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_awuser_42_32(&self) -> U1_PLDA_PCIE_AXI4_MST0_AWUSER_42_32_R { - U1_PLDA_PCIE_AXI4_MST0_AWUSER_42_32_R::new((self.bits & 0x07ff) as u16) + pub fn u1_pcie_axi4_mst0_awuser_42_32(&self) -> U1_PCIE_AXI4_MST0_AWUSER_42_32_R { + U1_PCIE_AXI4_MST0_AWUSER_42_32_R::new((self.bits & 0x07ff) as u16) } - #[doc = "Bits 11:18 - u1_plda_pcie_axi4_mst0_rderr"] + #[doc = "Bits 11:18 - u1_pcie_axi4_mst0_rderr"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_rderr(&self) -> U1_PLDA_PCIE_AXI4_MST0_RDERR_R { - U1_PLDA_PCIE_AXI4_MST0_RDERR_R::new(((self.bits >> 11) & 0xff) as u8) + pub fn u1_pcie_axi4_mst0_rderr(&self) -> U1_PCIE_AXI4_MST0_RDERR_R { + U1_PCIE_AXI4_MST0_RDERR_R::new(((self.bits >> 11) & 0xff) as u8) } } impl W { - #[doc = "Bits 11:18 - u1_plda_pcie_axi4_mst0_rderr"] + #[doc = "Bits 11:18 - u1_pcie_axi4_mst0_rderr"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_mst0_rderr( - &mut self, - ) -> U1_PLDA_PCIE_AXI4_MST0_RDERR_W { - U1_PLDA_PCIE_AXI4_MST0_RDERR_W::new(self, 11) + pub fn u1_pcie_axi4_mst0_rderr(&mut self) -> U1_PCIE_AXI4_MST0_RDERR_W { + U1_PCIE_AXI4_MST0_RDERR_W::new(self, 11) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_140.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_140.rs index 64e433e..81b9601 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_140.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_140.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_140` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_mst0_ruser` reader - u1_plda_pcie_axi4_mst0_ruser"] -pub type U1_PLDA_PCIE_AXI4_MST0_RUSER_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_mst0_ruser` writer - u1_plda_pcie_axi4_mst0_ruser"] -pub type U1_PLDA_PCIE_AXI4_MST0_RUSER_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_mst0_ruser` reader - u1_pcie_axi4_mst0_ruser"] +pub type U1_PCIE_AXI4_MST0_RUSER_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_ruser` writer - u1_pcie_axi4_mst0_ruser"] +pub type U1_PCIE_AXI4_MST0_RUSER_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_mst0_ruser"] + #[doc = "Bits 0:31 - u1_pcie_axi4_mst0_ruser"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_ruser(&self) -> U1_PLDA_PCIE_AXI4_MST0_RUSER_R { - U1_PLDA_PCIE_AXI4_MST0_RUSER_R::new(self.bits) + pub fn u1_pcie_axi4_mst0_ruser(&self) -> U1_PCIE_AXI4_MST0_RUSER_R { + U1_PCIE_AXI4_MST0_RUSER_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_mst0_ruser"] + #[doc = "Bits 0:31 - u1_pcie_axi4_mst0_ruser"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_mst0_ruser( - &mut self, - ) -> U1_PLDA_PCIE_AXI4_MST0_RUSER_W { - U1_PLDA_PCIE_AXI4_MST0_RUSER_W::new(self, 0) + pub fn u1_pcie_axi4_mst0_ruser(&mut self) -> U1_PCIE_AXI4_MST0_RUSER_W { + U1_PCIE_AXI4_MST0_RUSER_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_141.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_141.rs index fef40c9..4279fa5 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_141.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_141.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_141` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_mst0_wderr` reader - u1_plda_pcie_axi4_mst0_wderr"] -pub type U1_PLDA_PCIE_AXI4_MST0_WDERR_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_wderr` reader - u1_pcie_axi4_mst0_wderr"] +pub type U1_PCIE_AXI4_MST0_WDERR_R = crate::FieldReader; impl R { - #[doc = "Bits 0:7 - u1_plda_pcie_axi4_mst0_wderr"] + #[doc = "Bits 0:7 - u1_pcie_axi4_mst0_wderr"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_wderr(&self) -> U1_PLDA_PCIE_AXI4_MST0_WDERR_R { - U1_PLDA_PCIE_AXI4_MST0_WDERR_R::new((self.bits & 0xff) as u8) + pub fn u1_pcie_axi4_mst0_wderr(&self) -> U1_PCIE_AXI4_MST0_WDERR_R { + U1_PCIE_AXI4_MST0_WDERR_R::new((self.bits & 0xff) as u8) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_142.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_142.rs index da2fa35..f8b3204 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_142.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_142.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_142` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_31_0` reader - u1_plda_pcie_axi4_slv0_aratomop_31_0"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_31_0` writer - u1_plda_pcie_axi4_slv0_aratomop_31_0"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_31_0` reader - u1_pcie_axi4_slv0_aratomop_31_0"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_31_0` writer - u1_pcie_axi4_slv0_aratomop_31_0"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_31_0"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_31_0"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aratomop_31_0(&self) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_R { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aratomop_31_0(&self) -> U1_PCIE_AXI4_SLV0_ARATOMOP_31_0_R { + U1_PCIE_AXI4_SLV0_ARATOMOP_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_31_0"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_31_0"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aratomop_31_0( + pub fn u1_pcie_axi4_slv0_aratomop_31_0( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_W { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARATOMOP_31_0_W { + U1_PCIE_AXI4_SLV0_ARATOMOP_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_143.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_143.rs index ef5d288..2e7d0b4 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_143.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_143.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_143` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_63_32` reader - u1_plda_pcie_axi4_slv0_aratomop_63_32"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_63_32` writer - u1_plda_pcie_axi4_slv0_aratomop_63_32"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_63_32` reader - u1_pcie_axi4_slv0_aratomop_63_32"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_63_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_63_32` writer - u1_pcie_axi4_slv0_aratomop_63_32"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_63_32"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_63_32"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aratomop_63_32(&self) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_R { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aratomop_63_32(&self) -> U1_PCIE_AXI4_SLV0_ARATOMOP_63_32_R { + U1_PCIE_AXI4_SLV0_ARATOMOP_63_32_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_63_32"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_63_32"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aratomop_63_32( + pub fn u1_pcie_axi4_slv0_aratomop_63_32( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_W { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARATOMOP_63_32_W { + U1_PCIE_AXI4_SLV0_ARATOMOP_63_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_144.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_144.rs index 4d8e7f8..e977883 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_144.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_144.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_144` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_95_64` reader - u1_plda_pcie_axi4_slv0_aratomop_95_64"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_95_64` writer - u1_plda_pcie_axi4_slv0_aratomop_95_64"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_95_64` reader - u1_pcie_axi4_slv0_aratomop_95_64"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_95_64_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_95_64` writer - u1_pcie_axi4_slv0_aratomop_95_64"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_95_64_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_95_64"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_95_64"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aratomop_95_64(&self) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_R { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aratomop_95_64(&self) -> U1_PCIE_AXI4_SLV0_ARATOMOP_95_64_R { + U1_PCIE_AXI4_SLV0_ARATOMOP_95_64_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_95_64"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_95_64"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aratomop_95_64( + pub fn u1_pcie_axi4_slv0_aratomop_95_64( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_W { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARATOMOP_95_64_W { + U1_PCIE_AXI4_SLV0_ARATOMOP_95_64_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_145.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_145.rs index f6f170f..65f6eac 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_145.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_145.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_145` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_127_96` reader - u1_plda_pcie_axi4_slv0_aratomop_127_96"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_127_96` writer - u1_plda_pcie_axi4_slv0_aratomop_127_96"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_127_96` reader - u1_pcie_axi4_slv0_aratomop_127_96"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_127_96_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_127_96` writer - u1_pcie_axi4_slv0_aratomop_127_96"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_127_96_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_127_96"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_127_96"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aratomop_127_96( - &self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_R { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aratomop_127_96(&self) -> U1_PCIE_AXI4_SLV0_ARATOMOP_127_96_R { + U1_PCIE_AXI4_SLV0_ARATOMOP_127_96_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_127_96"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_127_96"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aratomop_127_96( + pub fn u1_pcie_axi4_slv0_aratomop_127_96( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_W { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARATOMOP_127_96_W { + U1_PCIE_AXI4_SLV0_ARATOMOP_127_96_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_146.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_146.rs index 37638f7..fd4b9c9 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_146.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_146.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_146` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_159_128` reader - u1_plda_pcie_axi4_slv0_aratomop_159_128"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_159_128` writer - u1_plda_pcie_axi4_slv0_aratomop_159_128"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_159_128` reader - u1_pcie_axi4_slv0_aratomop_159_128"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_159_128_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_159_128` writer - u1_pcie_axi4_slv0_aratomop_159_128"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_159_128_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_159_128"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_159_128"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aratomop_159_128( - &self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_R { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aratomop_159_128(&self) -> U1_PCIE_AXI4_SLV0_ARATOMOP_159_128_R { + U1_PCIE_AXI4_SLV0_ARATOMOP_159_128_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_159_128"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_159_128"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aratomop_159_128( + pub fn u1_pcie_axi4_slv0_aratomop_159_128( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_W { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARATOMOP_159_128_W { + U1_PCIE_AXI4_SLV0_ARATOMOP_159_128_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_147.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_147.rs index 4e7493d..44c67ea 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_147.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_147.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_147` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_191_160` reader - u1_plda_pcie_axi4_slv0_aratomop_191_160"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_191_160` writer - u1_plda_pcie_axi4_slv0_aratomop_191_160"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_191_160` reader - u1_pcie_axi4_slv0_aratomop_191_160"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_191_160_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_191_160` writer - u1_pcie_axi4_slv0_aratomop_191_160"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_191_160_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_191_160"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_191_160"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aratomop_191_160( - &self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_R { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aratomop_191_160(&self) -> U1_PCIE_AXI4_SLV0_ARATOMOP_191_160_R { + U1_PCIE_AXI4_SLV0_ARATOMOP_191_160_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_191_160"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_191_160"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aratomop_191_160( + pub fn u1_pcie_axi4_slv0_aratomop_191_160( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_W { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARATOMOP_191_160_W { + U1_PCIE_AXI4_SLV0_ARATOMOP_191_160_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_148.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_148.rs index ec9e41e..ba4cf65 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_148.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_148.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_148` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_223_192` reader - u1_plda_pcie_axi4_slv0_aratomop_223_192"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_223_192` writer - u1_plda_pcie_axi4_slv0_aratomop_223_192"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_223_192` reader - u1_pcie_axi4_slv0_aratomop_223_192"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_223_192_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_223_192` writer - u1_pcie_axi4_slv0_aratomop_223_192"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_223_192_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_223_192"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_223_192"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aratomop_223_192( - &self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_R { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aratomop_223_192(&self) -> U1_PCIE_AXI4_SLV0_ARATOMOP_223_192_R { + U1_PCIE_AXI4_SLV0_ARATOMOP_223_192_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_223_192"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_223_192"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aratomop_223_192( + pub fn u1_pcie_axi4_slv0_aratomop_223_192( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_W { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARATOMOP_223_192_W { + U1_PCIE_AXI4_SLV0_ARATOMOP_223_192_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_149.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_149.rs index ac250d8..c4b07c0 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_149.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_149.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_149` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_255_224` reader - u1_plda_pcie_axi4_slv0_aratomop_255_224"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aratomop_255_224` writer - u1_plda_pcie_axi4_slv0_aratomop_255_224"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_255_224` reader - u1_pcie_axi4_slv0_aratomop_255_224"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_255_224_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aratomop_255_224` writer - u1_pcie_axi4_slv0_aratomop_255_224"] +pub type U1_PCIE_AXI4_SLV0_ARATOMOP_255_224_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_255_224"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_255_224"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aratomop_255_224( - &self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_R { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aratomop_255_224(&self) -> U1_PCIE_AXI4_SLV0_ARATOMOP_255_224_R { + U1_PCIE_AXI4_SLV0_ARATOMOP_255_224_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aratomop_255_224"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aratomop_255_224"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aratomop_255_224( + pub fn u1_pcie_axi4_slv0_aratomop_255_224( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_W { - U1_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARATOMOP_255_224_W { + U1_PCIE_AXI4_SLV0_ARATOMOP_255_224_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_150.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_150.rs index 62681b0..cf1d775 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_150.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_150.rs @@ -2,61 +2,57 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_150` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_mst0_aratomop_257_256` reader - u1_plda_pcie_axi4_mst0_aratomop_257_256"] -pub type U1_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_mst0_aratomop_257_256` writer - u1_plda_pcie_axi4_mst0_aratomop_257_256"] -pub type U1_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u1_plda_pcie_axi4_slv0_arfunc` reader - u1_plda_pcie_axi4_slv0_arfunc"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARFUNC_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_arfunc` writer - u1_plda_pcie_axi4_slv0_arfunc"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; -#[doc = "Field `u1_plda_pcie_axi4_slv0_arregion` reader - u1_plda_pcie_axi4_slv0_arregion"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARREGION_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_arregion` writer - u1_plda_pcie_axi4_slv0_arregion"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARREGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `u1_pcie_axi4_mst0_aratomop_257_256` reader - u1_pcie_axi4_mst0_aratomop_257_256"] +pub type U1_PCIE_AXI4_MST0_ARATOMOP_257_256_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_mst0_aratomop_257_256` writer - u1_pcie_axi4_mst0_aratomop_257_256"] +pub type U1_PCIE_AXI4_MST0_ARATOMOP_257_256_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u1_pcie_axi4_slv0_arfunc` reader - u1_pcie_axi4_slv0_arfunc"] +pub type U1_PCIE_AXI4_SLV0_ARFUNC_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_arfunc` writer - u1_pcie_axi4_slv0_arfunc"] +pub type U1_PCIE_AXI4_SLV0_ARFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `u1_pcie_axi4_slv0_arregion` reader - u1_pcie_axi4_slv0_arregion"] +pub type U1_PCIE_AXI4_SLV0_ARREGION_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_arregion` writer - u1_pcie_axi4_slv0_arregion"] +pub type U1_PCIE_AXI4_SLV0_ARREGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 0:1 - u1_plda_pcie_axi4_mst0_aratomop_257_256"] + #[doc = "Bits 0:1 - u1_pcie_axi4_mst0_aratomop_257_256"] #[inline(always)] - pub fn u1_plda_pcie_axi4_mst0_aratomop_257_256( - &self, - ) -> U1_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R { - U1_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R::new((self.bits & 3) as u8) + pub fn u1_pcie_axi4_mst0_aratomop_257_256(&self) -> U1_PCIE_AXI4_MST0_ARATOMOP_257_256_R { + U1_PCIE_AXI4_MST0_ARATOMOP_257_256_R::new((self.bits & 3) as u8) } - #[doc = "Bits 2:16 - u1_plda_pcie_axi4_slv0_arfunc"] + #[doc = "Bits 2:16 - u1_pcie_axi4_slv0_arfunc"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_arfunc(&self) -> U1_PLDA_PCIE_AXI4_SLV0_ARFUNC_R { - U1_PLDA_PCIE_AXI4_SLV0_ARFUNC_R::new(((self.bits >> 2) & 0x7fff) as u16) + pub fn u1_pcie_axi4_slv0_arfunc(&self) -> U1_PCIE_AXI4_SLV0_ARFUNC_R { + U1_PCIE_AXI4_SLV0_ARFUNC_R::new(((self.bits >> 2) & 0x7fff) as u16) } - #[doc = "Bits 17:20 - u1_plda_pcie_axi4_slv0_arregion"] + #[doc = "Bits 17:20 - u1_pcie_axi4_slv0_arregion"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_arregion(&self) -> U1_PLDA_PCIE_AXI4_SLV0_ARREGION_R { - U1_PLDA_PCIE_AXI4_SLV0_ARREGION_R::new(((self.bits >> 17) & 0x0f) as u8) + pub fn u1_pcie_axi4_slv0_arregion(&self) -> U1_PCIE_AXI4_SLV0_ARREGION_R { + U1_PCIE_AXI4_SLV0_ARREGION_R::new(((self.bits >> 17) & 0x0f) as u8) } } impl W { - #[doc = "Bits 0:1 - u1_plda_pcie_axi4_mst0_aratomop_257_256"] + #[doc = "Bits 0:1 - u1_pcie_axi4_mst0_aratomop_257_256"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_mst0_aratomop_257_256( + pub fn u1_pcie_axi4_mst0_aratomop_257_256( &mut self, - ) -> U1_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_W { - U1_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_W::new(self, 0) + ) -> U1_PCIE_AXI4_MST0_ARATOMOP_257_256_W { + U1_PCIE_AXI4_MST0_ARATOMOP_257_256_W::new(self, 0) } - #[doc = "Bits 2:16 - u1_plda_pcie_axi4_slv0_arfunc"] + #[doc = "Bits 2:16 - u1_pcie_axi4_slv0_arfunc"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_arfunc( - &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARFUNC_W { - U1_PLDA_PCIE_AXI4_SLV0_ARFUNC_W::new(self, 2) + pub fn u1_pcie_axi4_slv0_arfunc(&mut self) -> U1_PCIE_AXI4_SLV0_ARFUNC_W { + U1_PCIE_AXI4_SLV0_ARFUNC_W::new(self, 2) } - #[doc = "Bits 17:20 - u1_plda_pcie_axi4_slv0_arregion"] + #[doc = "Bits 17:20 - u1_pcie_axi4_slv0_arregion"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_arregion( + pub fn u1_pcie_axi4_slv0_arregion( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARREGION_W { - U1_PLDA_PCIE_AXI4_SLV0_ARREGION_W::new(self, 17) + ) -> U1_PCIE_AXI4_SLV0_ARREGION_W { + U1_PCIE_AXI4_SLV0_ARREGION_W::new(self, 17) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_151.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_151.rs index 83cfb9e..86eb52e 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_151.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_151.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_151` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aruser_31_0` reader - u1_plda_pcie_axi4_slv0_aruser_31_0"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aruser_31_0` writer - u1_plda_pcie_axi4_slv0_aruser_31_0"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_aruser_31_0` reader - u1_pcie_axi4_slv0_aruser_31_0"] +pub type U1_PCIE_AXI4_SLV0_ARUSER_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aruser_31_0` writer - u1_pcie_axi4_slv0_aruser_31_0"] +pub type U1_PCIE_AXI4_SLV0_ARUSER_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aruser_31_0"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aruser_31_0"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aruser_31_0(&self) -> U1_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_R { - U1_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_aruser_31_0(&self) -> U1_PCIE_AXI4_SLV0_ARUSER_31_0_R { + U1_PCIE_AXI4_SLV0_ARUSER_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_aruser_31_0"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_aruser_31_0"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aruser_31_0( + pub fn u1_pcie_axi4_slv0_aruser_31_0( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_W { - U1_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARUSER_31_0_W { + U1_PCIE_AXI4_SLV0_ARUSER_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_152.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_152.rs index c20917f..b7b7a71 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_152.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_152.rs @@ -2,59 +2,57 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_152` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aruser_40_32` reader - u1_plda_pcie_axi4_slv0_aruser_40_32"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_aruser_40_32` writer - u1_plda_pcie_axi4_slv0_aruser_40_32"] -pub type U1_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; -#[doc = "Field `u1_plda_pcie_axi4_slv0_awfunc` reader - u1_plda_pcie_axi4_slv0_awfunc"] -pub type U1_PLDA_PCIE_AXI4_SLV0_AWFUNC_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_awfunc` writer - u1_plda_pcie_axi4_slv0_awfunc"] -pub type U1_PLDA_PCIE_AXI4_SLV0_AWFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; -#[doc = "Field `u1_plda_pcie_axi4_slv0_awregion` reader - u1_plda_pcie_axi4_slv0_awregion"] -pub type U1_PLDA_PCIE_AXI4_SLV0_AWREGION_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_awregion` writer - u1_plda_pcie_axi4_slv0_awregion"] -pub type U1_PLDA_PCIE_AXI4_SLV0_AWREGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `u1_pcie_axi4_slv0_aruser_40_32` reader - u1_pcie_axi4_slv0_aruser_40_32"] +pub type U1_PCIE_AXI4_SLV0_ARUSER_40_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_aruser_40_32` writer - u1_pcie_axi4_slv0_aruser_40_32"] +pub type U1_PCIE_AXI4_SLV0_ARUSER_40_32_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; +#[doc = "Field `u1_pcie_axi4_slv0_awfunc` reader - u1_pcie_axi4_slv0_awfunc"] +pub type U1_PCIE_AXI4_SLV0_AWFUNC_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_awfunc` writer - u1_pcie_axi4_slv0_awfunc"] +pub type U1_PCIE_AXI4_SLV0_AWFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `u1_pcie_axi4_slv0_awregion` reader - u1_pcie_axi4_slv0_awregion"] +pub type U1_PCIE_AXI4_SLV0_AWREGION_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_awregion` writer - u1_pcie_axi4_slv0_awregion"] +pub type U1_PCIE_AXI4_SLV0_AWREGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 0:8 - u1_plda_pcie_axi4_slv0_aruser_40_32"] + #[doc = "Bits 0:8 - u1_pcie_axi4_slv0_aruser_40_32"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_aruser_40_32(&self) -> U1_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_R { - U1_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_R::new((self.bits & 0x01ff) as u16) + pub fn u1_pcie_axi4_slv0_aruser_40_32(&self) -> U1_PCIE_AXI4_SLV0_ARUSER_40_32_R { + U1_PCIE_AXI4_SLV0_ARUSER_40_32_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:23 - u1_plda_pcie_axi4_slv0_awfunc"] + #[doc = "Bits 9:23 - u1_pcie_axi4_slv0_awfunc"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_awfunc(&self) -> U1_PLDA_PCIE_AXI4_SLV0_AWFUNC_R { - U1_PLDA_PCIE_AXI4_SLV0_AWFUNC_R::new(((self.bits >> 9) & 0x7fff) as u16) + pub fn u1_pcie_axi4_slv0_awfunc(&self) -> U1_PCIE_AXI4_SLV0_AWFUNC_R { + U1_PCIE_AXI4_SLV0_AWFUNC_R::new(((self.bits >> 9) & 0x7fff) as u16) } - #[doc = "Bits 24:27 - u1_plda_pcie_axi4_slv0_awregion"] + #[doc = "Bits 24:27 - u1_pcie_axi4_slv0_awregion"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_awregion(&self) -> U1_PLDA_PCIE_AXI4_SLV0_AWREGION_R { - U1_PLDA_PCIE_AXI4_SLV0_AWREGION_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn u1_pcie_axi4_slv0_awregion(&self) -> U1_PCIE_AXI4_SLV0_AWREGION_R { + U1_PCIE_AXI4_SLV0_AWREGION_R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { - #[doc = "Bits 0:8 - u1_plda_pcie_axi4_slv0_aruser_40_32"] + #[doc = "Bits 0:8 - u1_pcie_axi4_slv0_aruser_40_32"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_aruser_40_32( + pub fn u1_pcie_axi4_slv0_aruser_40_32( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_W { - U1_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_ARUSER_40_32_W { + U1_PCIE_AXI4_SLV0_ARUSER_40_32_W::new(self, 0) } - #[doc = "Bits 9:23 - u1_plda_pcie_axi4_slv0_awfunc"] + #[doc = "Bits 9:23 - u1_pcie_axi4_slv0_awfunc"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_awfunc( - &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_AWFUNC_W { - U1_PLDA_PCIE_AXI4_SLV0_AWFUNC_W::new(self, 9) + pub fn u1_pcie_axi4_slv0_awfunc(&mut self) -> U1_PCIE_AXI4_SLV0_AWFUNC_W { + U1_PCIE_AXI4_SLV0_AWFUNC_W::new(self, 9) } - #[doc = "Bits 24:27 - u1_plda_pcie_axi4_slv0_awregion"] + #[doc = "Bits 24:27 - u1_pcie_axi4_slv0_awregion"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_awregion( + pub fn u1_pcie_axi4_slv0_awregion( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_AWREGION_W { - U1_PLDA_PCIE_AXI4_SLV0_AWREGION_W::new(self, 24) + ) -> U1_PCIE_AXI4_SLV0_AWREGION_W { + U1_PCIE_AXI4_SLV0_AWREGION_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_153.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_153.rs index bee94f3..68f3958 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_153.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_153.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_153` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_awuser_31_0` reader - u1_plda_pcie_axi4_slv0_awuser_31_0"] -pub type U1_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_awuser_31_0` writer - u1_plda_pcie_axi4_slv0_awuser_31_0"] -pub type U1_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_axi4_slv0_awuser_31_0` reader - u1_pcie_axi4_slv0_awuser_31_0"] +pub type U1_PCIE_AXI4_SLV0_AWUSER_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_awuser_31_0` writer - u1_pcie_axi4_slv0_awuser_31_0"] +pub type U1_PCIE_AXI4_SLV0_AWUSER_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_awuser_31_0"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_awuser_31_0"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_awuser_31_0(&self) -> U1_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_R { - U1_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_awuser_31_0(&self) -> U1_PCIE_AXI4_SLV0_AWUSER_31_0_R { + U1_PCIE_AXI4_SLV0_AWUSER_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_awuser_31_0"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_awuser_31_0"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_awuser_31_0( + pub fn u1_pcie_axi4_slv0_awuser_31_0( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_W { - U1_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_AWUSER_31_0_W { + U1_PCIE_AXI4_SLV0_AWUSER_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_154.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_154.rs index 21bb1e4..7339e15 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_154.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_154.rs @@ -2,32 +2,32 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_154` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_awuser_40_32` reader - u1_plda_pcie_axi4_slv0_awuser_40_32"] -pub type U1_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_awuser_40_32` writer - u1_plda_pcie_axi4_slv0_awuser_40_32"] -pub type U1_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; -#[doc = "Field `u1_plda_pcie_axi4_slv0_rderr` reader - u1_plda_pcie_axi4_slv0_rderr"] -pub type U1_PLDA_PCIE_AXI4_SLV0_RDERR_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_awuser_40_32` reader - u1_pcie_axi4_slv0_awuser_40_32"] +pub type U1_PCIE_AXI4_SLV0_AWUSER_40_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_awuser_40_32` writer - u1_pcie_axi4_slv0_awuser_40_32"] +pub type U1_PCIE_AXI4_SLV0_AWUSER_40_32_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; +#[doc = "Field `u1_pcie_axi4_slv0_rderr` reader - u1_pcie_axi4_slv0_rderr"] +pub type U1_PCIE_AXI4_SLV0_RDERR_R = crate::FieldReader; impl R { - #[doc = "Bits 0:8 - u1_plda_pcie_axi4_slv0_awuser_40_32"] + #[doc = "Bits 0:8 - u1_pcie_axi4_slv0_awuser_40_32"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_awuser_40_32(&self) -> U1_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_R { - U1_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_R::new((self.bits & 0x01ff) as u16) + pub fn u1_pcie_axi4_slv0_awuser_40_32(&self) -> U1_PCIE_AXI4_SLV0_AWUSER_40_32_R { + U1_PCIE_AXI4_SLV0_AWUSER_40_32_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:16 - u1_plda_pcie_axi4_slv0_rderr"] + #[doc = "Bits 9:16 - u1_pcie_axi4_slv0_rderr"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_rderr(&self) -> U1_PLDA_PCIE_AXI4_SLV0_RDERR_R { - U1_PLDA_PCIE_AXI4_SLV0_RDERR_R::new(((self.bits >> 9) & 0xff) as u8) + pub fn u1_pcie_axi4_slv0_rderr(&self) -> U1_PCIE_AXI4_SLV0_RDERR_R { + U1_PCIE_AXI4_SLV0_RDERR_R::new(((self.bits >> 9) & 0xff) as u8) } } impl W { - #[doc = "Bits 0:8 - u1_plda_pcie_axi4_slv0_awuser_40_32"] + #[doc = "Bits 0:8 - u1_pcie_axi4_slv0_awuser_40_32"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_awuser_40_32( + pub fn u1_pcie_axi4_slv0_awuser_40_32( &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_W { - U1_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_W::new(self, 0) + ) -> U1_PCIE_AXI4_SLV0_AWUSER_40_32_W { + U1_PCIE_AXI4_SLV0_AWUSER_40_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_155.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_155.rs index 126f18e..836ffd4 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_155.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_155.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_155` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_ruser` reader - u1_plda_pcie_axi4_slv0_ruser"] -pub type U1_PLDA_PCIE_AXI4_SLV0_RUSER_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_ruser` reader - u1_pcie_axi4_slv0_ruser"] +pub type U1_PCIE_AXI4_SLV0_RUSER_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_axi4_slv0_ruser"] + #[doc = "Bits 0:31 - u1_pcie_axi4_slv0_ruser"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_ruser(&self) -> U1_PLDA_PCIE_AXI4_SLV0_RUSER_R { - U1_PLDA_PCIE_AXI4_SLV0_RUSER_R::new(self.bits) + pub fn u1_pcie_axi4_slv0_ruser(&self) -> U1_PCIE_AXI4_SLV0_RUSER_R { + U1_PCIE_AXI4_SLV0_RUSER_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_156.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_156.rs index 0b34e2f..b583e15 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_156.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_156.rs @@ -2,42 +2,38 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_156` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slv0_wderr` reader - u1_plda_pcie_axi4_slv0_wderr"] -pub type U1_PLDA_PCIE_AXI4_SLV0_WDERR_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slv0_wderr` writer - u1_plda_pcie_axi4_slv0_wderr"] -pub type U1_PLDA_PCIE_AXI4_SLV0_WDERR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `u1_plda_pcie_axi4_slvl_arfunc` reader - u1_plda_pcie_axi4_slvl_arfunc"] -pub type U1_PLDA_PCIE_AXI4_SLVL_ARFUNC_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slvl_arfunc` writer - u1_plda_pcie_axi4_slvl_arfunc"] -pub type U1_PLDA_PCIE_AXI4_SLVL_ARFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `u1_pcie_axi4_slv0_wderr` reader - u1_pcie_axi4_slv0_wderr"] +pub type U1_PCIE_AXI4_SLV0_WDERR_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slv0_wderr` writer - u1_pcie_axi4_slv0_wderr"] +pub type U1_PCIE_AXI4_SLV0_WDERR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `u1_pcie_axi4_slvl_arfunc` reader - u1_pcie_axi4_slvl_arfunc"] +pub type U1_PCIE_AXI4_SLVL_ARFUNC_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slvl_arfunc` writer - u1_pcie_axi4_slvl_arfunc"] +pub type U1_PCIE_AXI4_SLVL_ARFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; impl R { - #[doc = "Bits 0:7 - u1_plda_pcie_axi4_slv0_wderr"] + #[doc = "Bits 0:7 - u1_pcie_axi4_slv0_wderr"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slv0_wderr(&self) -> U1_PLDA_PCIE_AXI4_SLV0_WDERR_R { - U1_PLDA_PCIE_AXI4_SLV0_WDERR_R::new((self.bits & 0xff) as u8) + pub fn u1_pcie_axi4_slv0_wderr(&self) -> U1_PCIE_AXI4_SLV0_WDERR_R { + U1_PCIE_AXI4_SLV0_WDERR_R::new((self.bits & 0xff) as u8) } - #[doc = "Bits 8:22 - u1_plda_pcie_axi4_slvl_arfunc"] + #[doc = "Bits 8:22 - u1_pcie_axi4_slvl_arfunc"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slvl_arfunc(&self) -> U1_PLDA_PCIE_AXI4_SLVL_ARFUNC_R { - U1_PLDA_PCIE_AXI4_SLVL_ARFUNC_R::new(((self.bits >> 8) & 0x7fff) as u16) + pub fn u1_pcie_axi4_slvl_arfunc(&self) -> U1_PCIE_AXI4_SLVL_ARFUNC_R { + U1_PCIE_AXI4_SLVL_ARFUNC_R::new(((self.bits >> 8) & 0x7fff) as u16) } } impl W { - #[doc = "Bits 0:7 - u1_plda_pcie_axi4_slv0_wderr"] + #[doc = "Bits 0:7 - u1_pcie_axi4_slv0_wderr"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slv0_wderr( - &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLV0_WDERR_W { - U1_PLDA_PCIE_AXI4_SLV0_WDERR_W::new(self, 0) + pub fn u1_pcie_axi4_slv0_wderr(&mut self) -> U1_PCIE_AXI4_SLV0_WDERR_W { + U1_PCIE_AXI4_SLV0_WDERR_W::new(self, 0) } - #[doc = "Bits 8:22 - u1_plda_pcie_axi4_slvl_arfunc"] + #[doc = "Bits 8:22 - u1_pcie_axi4_slvl_arfunc"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slvl_arfunc( - &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLVL_ARFUNC_W { - U1_PLDA_PCIE_AXI4_SLVL_ARFUNC_W::new(self, 8) + pub fn u1_pcie_axi4_slvl_arfunc(&mut self) -> U1_PCIE_AXI4_SLVL_ARFUNC_W { + U1_PCIE_AXI4_SLVL_ARFUNC_W::new(self, 8) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_157.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_157.rs index f310957..7f0785e 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_157.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_157.rs @@ -2,94 +2,90 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_157` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_axi4_slvl_awfunc` reader - u1_plda_pcie_axi4_slvl_awfunc"] -pub type U1_PLDA_PCIE_AXI4_SLVL_AWFUNC_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_axi4_slvl_awfunc` writer - u1_plda_pcie_axi4_slvl_awfunc"] -pub type U1_PLDA_PCIE_AXI4_SLVL_AWFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; -#[doc = "Field `u1_plda_pcie_bus_width_o` reader - u1_plda_pcie_bus_width_o"] -pub type U1_PLDA_PCIE_BUS_WIDTH_O_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_bypass_codec` reader - u1_plda_pcie_bypass_codec"] -pub type U1_PLDA_PCIE_BYPASS_CODEC_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_bypass_codec` writer - u1_plda_pcie_bypass_codec"] -pub type U1_PLDA_PCIE_BYPASS_CODEC_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_ckref_src` reader - u1_plda_pcie_ckref_src"] -pub type U1_PLDA_PCIE_CKREF_SRC_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_ckref_src` writer - u1_plda_pcie_ckref_src"] -pub type U1_PLDA_PCIE_CKREF_SRC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u1_plda_pcie_clk_sel` reader - u1_plda_pcie_clk_sel"] -pub type U1_PLDA_PCIE_CLK_SEL_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_clk_sel` writer - u1_plda_pcie_clk_sel"] -pub type U1_PLDA_PCIE_CLK_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u1_plda_pcie_clkreq` reader - u1_plda_pcie_clkreq"] -pub type U1_PLDA_PCIE_CLKREQ_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_clkreq` writer - u1_plda_pcie_clkreq"] -pub type U1_PLDA_PCIE_CLKREQ_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_axi4_slvl_awfunc` reader - u1_pcie_axi4_slvl_awfunc"] +pub type U1_PCIE_AXI4_SLVL_AWFUNC_R = crate::FieldReader; +#[doc = "Field `u1_pcie_axi4_slvl_awfunc` writer - u1_pcie_axi4_slvl_awfunc"] +pub type U1_PCIE_AXI4_SLVL_AWFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `u1_pcie_bus_width_o` reader - u1_pcie_bus_width_o"] +pub type U1_PCIE_BUS_WIDTH_O_R = crate::FieldReader; +#[doc = "Field `u1_pcie_bypass_codec` reader - u1_pcie_bypass_codec"] +pub type U1_PCIE_BYPASS_CODEC_R = crate::BitReader; +#[doc = "Field `u1_pcie_bypass_codec` writer - u1_pcie_bypass_codec"] +pub type U1_PCIE_BYPASS_CODEC_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_ckref_src` reader - u1_pcie_ckref_src"] +pub type U1_PCIE_CKREF_SRC_R = crate::FieldReader; +#[doc = "Field `u1_pcie_ckref_src` writer - u1_pcie_ckref_src"] +pub type U1_PCIE_CKREF_SRC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u1_pcie_clk_sel` reader - u1_pcie_clk_sel"] +pub type U1_PCIE_CLK_SEL_R = crate::FieldReader; +#[doc = "Field `u1_pcie_clk_sel` writer - u1_pcie_clk_sel"] +pub type U1_PCIE_CLK_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u1_pcie_clkreq` reader - u1_pcie_clkreq"] +pub type U1_PCIE_CLKREQ_R = crate::BitReader; +#[doc = "Field `u1_pcie_clkreq` writer - u1_pcie_clkreq"] +pub type U1_PCIE_CLKREQ_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bits 0:14 - u1_plda_pcie_axi4_slvl_awfunc"] + #[doc = "Bits 0:14 - u1_pcie_axi4_slvl_awfunc"] #[inline(always)] - pub fn u1_plda_pcie_axi4_slvl_awfunc(&self) -> U1_PLDA_PCIE_AXI4_SLVL_AWFUNC_R { - U1_PLDA_PCIE_AXI4_SLVL_AWFUNC_R::new((self.bits & 0x7fff) as u16) + pub fn u1_pcie_axi4_slvl_awfunc(&self) -> U1_PCIE_AXI4_SLVL_AWFUNC_R { + U1_PCIE_AXI4_SLVL_AWFUNC_R::new((self.bits & 0x7fff) as u16) } - #[doc = "Bits 15:16 - u1_plda_pcie_bus_width_o"] + #[doc = "Bits 15:16 - u1_pcie_bus_width_o"] #[inline(always)] - pub fn u1_plda_pcie_bus_width_o(&self) -> U1_PLDA_PCIE_BUS_WIDTH_O_R { - U1_PLDA_PCIE_BUS_WIDTH_O_R::new(((self.bits >> 15) & 3) as u8) + pub fn u1_pcie_bus_width_o(&self) -> U1_PCIE_BUS_WIDTH_O_R { + U1_PCIE_BUS_WIDTH_O_R::new(((self.bits >> 15) & 3) as u8) } - #[doc = "Bit 17 - u1_plda_pcie_bypass_codec"] + #[doc = "Bit 17 - u1_pcie_bypass_codec"] #[inline(always)] - pub fn u1_plda_pcie_bypass_codec(&self) -> U1_PLDA_PCIE_BYPASS_CODEC_R { - U1_PLDA_PCIE_BYPASS_CODEC_R::new(((self.bits >> 17) & 1) != 0) + pub fn u1_pcie_bypass_codec(&self) -> U1_PCIE_BYPASS_CODEC_R { + U1_PCIE_BYPASS_CODEC_R::new(((self.bits >> 17) & 1) != 0) } - #[doc = "Bits 18:19 - u1_plda_pcie_ckref_src"] + #[doc = "Bits 18:19 - u1_pcie_ckref_src"] #[inline(always)] - pub fn u1_plda_pcie_ckref_src(&self) -> U1_PLDA_PCIE_CKREF_SRC_R { - U1_PLDA_PCIE_CKREF_SRC_R::new(((self.bits >> 18) & 3) as u8) + pub fn u1_pcie_ckref_src(&self) -> U1_PCIE_CKREF_SRC_R { + U1_PCIE_CKREF_SRC_R::new(((self.bits >> 18) & 3) as u8) } - #[doc = "Bits 20:21 - u1_plda_pcie_clk_sel"] + #[doc = "Bits 20:21 - u1_pcie_clk_sel"] #[inline(always)] - pub fn u1_plda_pcie_clk_sel(&self) -> U1_PLDA_PCIE_CLK_SEL_R { - U1_PLDA_PCIE_CLK_SEL_R::new(((self.bits >> 20) & 3) as u8) + pub fn u1_pcie_clk_sel(&self) -> U1_PCIE_CLK_SEL_R { + U1_PCIE_CLK_SEL_R::new(((self.bits >> 20) & 3) as u8) } - #[doc = "Bit 22 - u1_plda_pcie_clkreq"] + #[doc = "Bit 22 - u1_pcie_clkreq"] #[inline(always)] - pub fn u1_plda_pcie_clkreq(&self) -> U1_PLDA_PCIE_CLKREQ_R { - U1_PLDA_PCIE_CLKREQ_R::new(((self.bits >> 22) & 1) != 0) + pub fn u1_pcie_clkreq(&self) -> U1_PCIE_CLKREQ_R { + U1_PCIE_CLKREQ_R::new(((self.bits >> 22) & 1) != 0) } } impl W { - #[doc = "Bits 0:14 - u1_plda_pcie_axi4_slvl_awfunc"] + #[doc = "Bits 0:14 - u1_pcie_axi4_slvl_awfunc"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_axi4_slvl_awfunc( - &mut self, - ) -> U1_PLDA_PCIE_AXI4_SLVL_AWFUNC_W { - U1_PLDA_PCIE_AXI4_SLVL_AWFUNC_W::new(self, 0) + pub fn u1_pcie_axi4_slvl_awfunc(&mut self) -> U1_PCIE_AXI4_SLVL_AWFUNC_W { + U1_PCIE_AXI4_SLVL_AWFUNC_W::new(self, 0) } - #[doc = "Bit 17 - u1_plda_pcie_bypass_codec"] + #[doc = "Bit 17 - u1_pcie_bypass_codec"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_bypass_codec( - &mut self, - ) -> U1_PLDA_PCIE_BYPASS_CODEC_W { - U1_PLDA_PCIE_BYPASS_CODEC_W::new(self, 17) + pub fn u1_pcie_bypass_codec(&mut self) -> U1_PCIE_BYPASS_CODEC_W { + U1_PCIE_BYPASS_CODEC_W::new(self, 17) } - #[doc = "Bits 18:19 - u1_plda_pcie_ckref_src"] + #[doc = "Bits 18:19 - u1_pcie_ckref_src"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_ckref_src(&mut self) -> U1_PLDA_PCIE_CKREF_SRC_W { - U1_PLDA_PCIE_CKREF_SRC_W::new(self, 18) + pub fn u1_pcie_ckref_src(&mut self) -> U1_PCIE_CKREF_SRC_W { + U1_PCIE_CKREF_SRC_W::new(self, 18) } - #[doc = "Bits 20:21 - u1_plda_pcie_clk_sel"] + #[doc = "Bits 20:21 - u1_pcie_clk_sel"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_clk_sel(&mut self) -> U1_PLDA_PCIE_CLK_SEL_W { - U1_PLDA_PCIE_CLK_SEL_W::new(self, 20) + pub fn u1_pcie_clk_sel(&mut self) -> U1_PCIE_CLK_SEL_W { + U1_PCIE_CLK_SEL_W::new(self, 20) } - #[doc = "Bit 22 - u1_plda_pcie_clkreq"] + #[doc = "Bit 22 - u1_pcie_clkreq"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_clkreq(&mut self) -> U1_PLDA_PCIE_CLKREQ_W { - U1_PLDA_PCIE_CLKREQ_W::new(self, 22) + pub fn u1_pcie_clkreq(&mut self) -> U1_PCIE_CLKREQ_W { + U1_PCIE_CLKREQ_W::new(self, 22) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_17.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_17.rs index a38ddcf..fd6de00 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_17.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_17.rs @@ -46,8 +46,8 @@ pub type U0_HIFI4_TRIGIN_IDMA_W<'a, REG> = crate::BitWriter<'a, REG>; pub type U0_HIFI4_TRIGOUT_IDMA_R = crate::BitReader; #[doc = "Field `u0_hifi4_xocdmode` reader - Debug signal"] pub type U0_HIFI4_XOCDMODE_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_align_detect` reader - u0_plda_pcie_align_detect"] -pub type U0_PLDA_PCIE_ALIGN_DETECT_R = crate::BitReader; +#[doc = "Field `u0_pcie_align_detect` reader - u0_pcie_align_detect"] +pub type U0_PCIE_ALIGN_DETECT_R = crate::BitReader; impl R { #[doc = "Bit 0 - SRAM/ROM configuration. SLP: sleep enable, high active, default is low."] #[inline(always)] @@ -109,10 +109,10 @@ impl R { pub fn u0_hifi4_xocdmode(&self) -> U0_HIFI4_XOCDMODE_R { U0_HIFI4_XOCDMODE_R::new(((self.bits >> 15) & 1) != 0) } - #[doc = "Bit 16 - u0_plda_pcie_align_detect"] + #[doc = "Bit 16 - u0_pcie_align_detect"] #[inline(always)] - pub fn u0_plda_pcie_align_detect(&self) -> U0_PLDA_PCIE_ALIGN_DETECT_R { - U0_PLDA_PCIE_ALIGN_DETECT_R::new(((self.bits >> 16) & 1) != 0) + pub fn u0_pcie_align_detect(&self) -> U0_PCIE_ALIGN_DETECT_R { + U0_PCIE_ALIGN_DETECT_R::new(((self.bits >> 16) & 1) != 0) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_18.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_18.rs index d6716ff..e78e003 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_18.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_18.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_18` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_31_0` reader - u0_plda_pcie_axi4_mst0_aratomop_31_0"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_31_0` reader - u0_pcie_axi4_mst0_aratomop_31_0"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_31_0"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_31_0(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_31_0_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_31_0_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_31_0(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_31_0_R { + U0_PCIE_AXI4_MST0_ARATOMOP_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_184.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_184.rs index 64eb35b..211263a 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_184.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_184.rs @@ -2,64 +2,62 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_184` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_k_phyparam_839_832` reader - u1_plda_pcie_k_phyparam_839_832"] -pub type U1_PLDA_PCIE_K_PHYPARAM_839_832_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_k_phyparam_839_832` writer - u1_plda_pcie_k_phyparam_839_832"] -pub type U1_PLDA_PCIE_K_PHYPARAM_839_832_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `u1_plda_pcie_k_rp_nep` reader - u1_plda_pcie_k_rp_nep"] -pub type U1_PLDA_PCIE_K_RP_NEP_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_k_rp_nep` writer - u1_plda_pcie_k_rp_nep"] -pub type U1_PLDA_PCIE_K_RP_NEP_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_l1sub_entack` reader - u1_plda_pcie_l1sub_entack"] -pub type U1_PLDA_PCIE_L1SUB_ENTACK_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_l1sub_entreq` reader - u1_plda_pcie_l1sub_entreq"] -pub type U1_PLDA_PCIE_L1SUB_ENTREQ_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_l1sub_entreq` writer - u1_plda_pcie_l1sub_entreq"] -pub type U1_PLDA_PCIE_L1SUB_ENTREQ_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_k_phyparam_839_832` reader - u1_pcie_k_phyparam_839_832"] +pub type U1_PCIE_K_PHYPARAM_839_832_R = crate::FieldReader; +#[doc = "Field `u1_pcie_k_phyparam_839_832` writer - u1_pcie_k_phyparam_839_832"] +pub type U1_PCIE_K_PHYPARAM_839_832_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `u1_pcie_k_rp_nep` reader - u1_pcie_k_rp_nep"] +pub type U1_PCIE_K_RP_NEP_R = crate::BitReader; +#[doc = "Field `u1_pcie_k_rp_nep` writer - u1_pcie_k_rp_nep"] +pub type U1_PCIE_K_RP_NEP_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_l1sub_entack` reader - u1_pcie_l1sub_entack"] +pub type U1_PCIE_L1SUB_ENTACK_R = crate::BitReader; +#[doc = "Field `u1_pcie_l1sub_entreq` reader - u1_pcie_l1sub_entreq"] +pub type U1_PCIE_L1SUB_ENTREQ_R = crate::BitReader; +#[doc = "Field `u1_pcie_l1sub_entreq` writer - u1_pcie_l1sub_entreq"] +pub type U1_PCIE_L1SUB_ENTREQ_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bits 0:7 - u1_plda_pcie_k_phyparam_839_832"] + #[doc = "Bits 0:7 - u1_pcie_k_phyparam_839_832"] #[inline(always)] - pub fn u1_plda_pcie_k_phyparam_839_832(&self) -> U1_PLDA_PCIE_K_PHYPARAM_839_832_R { - U1_PLDA_PCIE_K_PHYPARAM_839_832_R::new((self.bits & 0xff) as u8) + pub fn u1_pcie_k_phyparam_839_832(&self) -> U1_PCIE_K_PHYPARAM_839_832_R { + U1_PCIE_K_PHYPARAM_839_832_R::new((self.bits & 0xff) as u8) } - #[doc = "Bit 8 - u1_plda_pcie_k_rp_nep"] + #[doc = "Bit 8 - u1_pcie_k_rp_nep"] #[inline(always)] - pub fn u1_plda_pcie_k_rp_nep(&self) -> U1_PLDA_PCIE_K_RP_NEP_R { - U1_PLDA_PCIE_K_RP_NEP_R::new(((self.bits >> 8) & 1) != 0) + pub fn u1_pcie_k_rp_nep(&self) -> U1_PCIE_K_RP_NEP_R { + U1_PCIE_K_RP_NEP_R::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 9 - u1_plda_pcie_l1sub_entack"] + #[doc = "Bit 9 - u1_pcie_l1sub_entack"] #[inline(always)] - pub fn u1_plda_pcie_l1sub_entack(&self) -> U1_PLDA_PCIE_L1SUB_ENTACK_R { - U1_PLDA_PCIE_L1SUB_ENTACK_R::new(((self.bits >> 9) & 1) != 0) + pub fn u1_pcie_l1sub_entack(&self) -> U1_PCIE_L1SUB_ENTACK_R { + U1_PCIE_L1SUB_ENTACK_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 10 - u1_plda_pcie_l1sub_entreq"] + #[doc = "Bit 10 - u1_pcie_l1sub_entreq"] #[inline(always)] - pub fn u1_plda_pcie_l1sub_entreq(&self) -> U1_PLDA_PCIE_L1SUB_ENTREQ_R { - U1_PLDA_PCIE_L1SUB_ENTREQ_R::new(((self.bits >> 10) & 1) != 0) + pub fn u1_pcie_l1sub_entreq(&self) -> U1_PCIE_L1SUB_ENTREQ_R { + U1_PCIE_L1SUB_ENTREQ_R::new(((self.bits >> 10) & 1) != 0) } } impl W { - #[doc = "Bits 0:7 - u1_plda_pcie_k_phyparam_839_832"] + #[doc = "Bits 0:7 - u1_pcie_k_phyparam_839_832"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_k_phyparam_839_832( + pub fn u1_pcie_k_phyparam_839_832( &mut self, - ) -> U1_PLDA_PCIE_K_PHYPARAM_839_832_W { - U1_PLDA_PCIE_K_PHYPARAM_839_832_W::new(self, 0) + ) -> U1_PCIE_K_PHYPARAM_839_832_W { + U1_PCIE_K_PHYPARAM_839_832_W::new(self, 0) } - #[doc = "Bit 8 - u1_plda_pcie_k_rp_nep"] + #[doc = "Bit 8 - u1_pcie_k_rp_nep"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_k_rp_nep(&mut self) -> U1_PLDA_PCIE_K_RP_NEP_W { - U1_PLDA_PCIE_K_RP_NEP_W::new(self, 8) + pub fn u1_pcie_k_rp_nep(&mut self) -> U1_PCIE_K_RP_NEP_W { + U1_PCIE_K_RP_NEP_W::new(self, 8) } - #[doc = "Bit 10 - u1_plda_pcie_l1sub_entreq"] + #[doc = "Bit 10 - u1_pcie_l1sub_entreq"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_l1sub_entreq( - &mut self, - ) -> U1_PLDA_PCIE_L1SUB_ENTREQ_W { - U1_PLDA_PCIE_L1SUB_ENTREQ_W::new(self, 10) + pub fn u1_pcie_l1sub_entreq(&mut self) -> U1_PCIE_L1SUB_ENTREQ_W { + U1_PCIE_L1SUB_ENTREQ_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_185.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_185.rs index 06c87fb..07d6d26 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_185.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_185.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_185` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_local_interrupt_in` reader - u1_plda_pcie_local_interrupt_in"] -pub type U1_PLDA_PCIE_LOCAL_INTERRUPT_IN_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_local_interrupt_in` writer - u1_plda_pcie_local_interrupt_in"] -pub type U1_PLDA_PCIE_LOCAL_INTERRUPT_IN_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_local_interrupt_in` reader - u1_pcie_local_interrupt_in"] +pub type U1_PCIE_LOCAL_INTERRUPT_IN_R = crate::FieldReader; +#[doc = "Field `u1_pcie_local_interrupt_in` writer - u1_pcie_local_interrupt_in"] +pub type U1_PCIE_LOCAL_INTERRUPT_IN_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_local_interrupt_in"] + #[doc = "Bits 0:31 - u1_pcie_local_interrupt_in"] #[inline(always)] - pub fn u1_plda_pcie_local_interrupt_in(&self) -> U1_PLDA_PCIE_LOCAL_INTERRUPT_IN_R { - U1_PLDA_PCIE_LOCAL_INTERRUPT_IN_R::new(self.bits) + pub fn u1_pcie_local_interrupt_in(&self) -> U1_PCIE_LOCAL_INTERRUPT_IN_R { + U1_PCIE_LOCAL_INTERRUPT_IN_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_local_interrupt_in"] + #[doc = "Bits 0:31 - u1_pcie_local_interrupt_in"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_local_interrupt_in( + pub fn u1_pcie_local_interrupt_in( &mut self, - ) -> U1_PLDA_PCIE_LOCAL_INTERRUPT_IN_W { - U1_PLDA_PCIE_LOCAL_INTERRUPT_IN_W::new(self, 0) + ) -> U1_PCIE_LOCAL_INTERRUPT_IN_W { + U1_PCIE_LOCAL_INTERRUPT_IN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_186.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_186.rs index 7428383..80758bb 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_186.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_186.rs @@ -2,108 +2,104 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_186` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_mperstn` reader - u1_plda_pcie_mperstn"] -pub type U1_PLDA_PCIE_MPERSTN_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_mperstn` writer - u1_plda_pcie_mperstn"] -pub type U1_PLDA_PCIE_MPERSTN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_pcie_ebuf_mode` reader - u1_plda_pcie_pcie_ebuf_mode"] -pub type U1_PLDA_PCIE_PCIE_EBUF_MODE_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_pcie_ebuf_mode` writer - u1_plda_pcie_pcie_ebuf_mode"] -pub type U1_PLDA_PCIE_PCIE_EBUF_MODE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_pcie_phy_test_cfg` reader - u1_plda_pcie_pcie_phy_test_cfg"] -pub type U1_PLDA_PCIE_PCIE_PHY_TEST_CFG_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pcie_phy_test_cfg` writer - u1_plda_pcie_pcie_phy_test_cfg"] -pub type U1_PLDA_PCIE_PCIE_PHY_TEST_CFG_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; -#[doc = "Field `u1_plda_pcie_pcie_rx_eq_training` reader - u1_plda_pcie_pcie_rx_eq_training"] -pub type U1_PLDA_PCIE_PCIE_RX_EQ_TRAINING_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_pcie_rx_eq_training` writer - u1_plda_pcie_pcie_rx_eq_training"] -pub type U1_PLDA_PCIE_PCIE_RX_EQ_TRAINING_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_pcie_rxterm_en` reader - u1_plda_pcie_pcie_rxterm_en"] -pub type U1_PLDA_PCIE_PCIE_RXTERM_EN_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_pcie_rxterm_en` writer - u1_plda_pcie_pcie_rxterm_en"] -pub type U1_PLDA_PCIE_PCIE_RXTERM_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_pcie_tx_oneszeros` reader - u1_plda_pcie_pcie_tx_oneszeros"] -pub type U1_PLDA_PCIE_PCIE_TX_ONESZEROS_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_pcie_tx_oneszeros` writer - u1_plda_pcie_pcie_tx_oneszeros"] -pub type U1_PLDA_PCIE_PCIE_TX_ONESZEROS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_mperstn` reader - u1_pcie_mperstn"] +pub type U1_PCIE_MPERSTN_R = crate::BitReader; +#[doc = "Field `u1_pcie_mperstn` writer - u1_pcie_mperstn"] +pub type U1_PCIE_MPERSTN_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_pcie_ebuf_mode` reader - u1_pcie_pcie_ebuf_mode"] +pub type U1_PCIE_PCIE_EBUF_MODE_R = crate::BitReader; +#[doc = "Field `u1_pcie_pcie_ebuf_mode` writer - u1_pcie_pcie_ebuf_mode"] +pub type U1_PCIE_PCIE_EBUF_MODE_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_pcie_phy_test_cfg` reader - u1_pcie_pcie_phy_test_cfg"] +pub type U1_PCIE_PCIE_PHY_TEST_CFG_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pcie_phy_test_cfg` writer - u1_pcie_pcie_phy_test_cfg"] +pub type U1_PCIE_PCIE_PHY_TEST_CFG_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; +#[doc = "Field `u1_pcie_pcie_rx_eq_training` reader - u1_pcie_pcie_rx_eq_training"] +pub type U1_PCIE_PCIE_RX_EQ_TRAINING_R = crate::BitReader; +#[doc = "Field `u1_pcie_pcie_rx_eq_training` writer - u1_pcie_pcie_rx_eq_training"] +pub type U1_PCIE_PCIE_RX_EQ_TRAINING_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_pcie_rxterm_en` reader - u1_pcie_pcie_rxterm_en"] +pub type U1_PCIE_PCIE_RXTERM_EN_R = crate::BitReader; +#[doc = "Field `u1_pcie_pcie_rxterm_en` writer - u1_pcie_pcie_rxterm_en"] +pub type U1_PCIE_PCIE_RXTERM_EN_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_pcie_tx_oneszeros` reader - u1_pcie_pcie_tx_oneszeros"] +pub type U1_PCIE_PCIE_TX_ONESZEROS_R = crate::BitReader; +#[doc = "Field `u1_pcie_pcie_tx_oneszeros` writer - u1_pcie_pcie_tx_oneszeros"] +pub type U1_PCIE_PCIE_TX_ONESZEROS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 0 - u1_plda_pcie_mperstn"] + #[doc = "Bit 0 - u1_pcie_mperstn"] #[inline(always)] - pub fn u1_plda_pcie_mperstn(&self) -> U1_PLDA_PCIE_MPERSTN_R { - U1_PLDA_PCIE_MPERSTN_R::new((self.bits & 1) != 0) + pub fn u1_pcie_mperstn(&self) -> U1_PCIE_MPERSTN_R { + U1_PCIE_MPERSTN_R::new((self.bits & 1) != 0) } - #[doc = "Bit 1 - u1_plda_pcie_pcie_ebuf_mode"] + #[doc = "Bit 1 - u1_pcie_pcie_ebuf_mode"] #[inline(always)] - pub fn u1_plda_pcie_pcie_ebuf_mode(&self) -> U1_PLDA_PCIE_PCIE_EBUF_MODE_R { - U1_PLDA_PCIE_PCIE_EBUF_MODE_R::new(((self.bits >> 1) & 1) != 0) + pub fn u1_pcie_pcie_ebuf_mode(&self) -> U1_PCIE_PCIE_EBUF_MODE_R { + U1_PCIE_PCIE_EBUF_MODE_R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bits 2:24 - u1_plda_pcie_pcie_phy_test_cfg"] + #[doc = "Bits 2:24 - u1_pcie_pcie_phy_test_cfg"] #[inline(always)] - pub fn u1_plda_pcie_pcie_phy_test_cfg(&self) -> U1_PLDA_PCIE_PCIE_PHY_TEST_CFG_R { - U1_PLDA_PCIE_PCIE_PHY_TEST_CFG_R::new((self.bits >> 2) & 0x007f_ffff) + pub fn u1_pcie_pcie_phy_test_cfg(&self) -> U1_PCIE_PCIE_PHY_TEST_CFG_R { + U1_PCIE_PCIE_PHY_TEST_CFG_R::new((self.bits >> 2) & 0x007f_ffff) } - #[doc = "Bit 25 - u1_plda_pcie_pcie_rx_eq_training"] + #[doc = "Bit 25 - u1_pcie_pcie_rx_eq_training"] #[inline(always)] - pub fn u1_plda_pcie_pcie_rx_eq_training(&self) -> U1_PLDA_PCIE_PCIE_RX_EQ_TRAINING_R { - U1_PLDA_PCIE_PCIE_RX_EQ_TRAINING_R::new(((self.bits >> 25) & 1) != 0) + pub fn u1_pcie_pcie_rx_eq_training(&self) -> U1_PCIE_PCIE_RX_EQ_TRAINING_R { + U1_PCIE_PCIE_RX_EQ_TRAINING_R::new(((self.bits >> 25) & 1) != 0) } - #[doc = "Bit 26 - u1_plda_pcie_pcie_rxterm_en"] + #[doc = "Bit 26 - u1_pcie_pcie_rxterm_en"] #[inline(always)] - pub fn u1_plda_pcie_pcie_rxterm_en(&self) -> U1_PLDA_PCIE_PCIE_RXTERM_EN_R { - U1_PLDA_PCIE_PCIE_RXTERM_EN_R::new(((self.bits >> 26) & 1) != 0) + pub fn u1_pcie_pcie_rxterm_en(&self) -> U1_PCIE_PCIE_RXTERM_EN_R { + U1_PCIE_PCIE_RXTERM_EN_R::new(((self.bits >> 26) & 1) != 0) } - #[doc = "Bit 27 - u1_plda_pcie_pcie_tx_oneszeros"] + #[doc = "Bit 27 - u1_pcie_pcie_tx_oneszeros"] #[inline(always)] - pub fn u1_plda_pcie_pcie_tx_oneszeros(&self) -> U1_PLDA_PCIE_PCIE_TX_ONESZEROS_R { - U1_PLDA_PCIE_PCIE_TX_ONESZEROS_R::new(((self.bits >> 27) & 1) != 0) + pub fn u1_pcie_pcie_tx_oneszeros(&self) -> U1_PCIE_PCIE_TX_ONESZEROS_R { + U1_PCIE_PCIE_TX_ONESZEROS_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bit 0 - u1_plda_pcie_mperstn"] + #[doc = "Bit 0 - u1_pcie_mperstn"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_mperstn(&mut self) -> U1_PLDA_PCIE_MPERSTN_W { - U1_PLDA_PCIE_MPERSTN_W::new(self, 0) + pub fn u1_pcie_mperstn(&mut self) -> U1_PCIE_MPERSTN_W { + U1_PCIE_MPERSTN_W::new(self, 0) } - #[doc = "Bit 1 - u1_plda_pcie_pcie_ebuf_mode"] + #[doc = "Bit 1 - u1_pcie_pcie_ebuf_mode"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pcie_ebuf_mode( - &mut self, - ) -> U1_PLDA_PCIE_PCIE_EBUF_MODE_W { - U1_PLDA_PCIE_PCIE_EBUF_MODE_W::new(self, 1) + pub fn u1_pcie_pcie_ebuf_mode(&mut self) -> U1_PCIE_PCIE_EBUF_MODE_W { + U1_PCIE_PCIE_EBUF_MODE_W::new(self, 1) } - #[doc = "Bits 2:24 - u1_plda_pcie_pcie_phy_test_cfg"] + #[doc = "Bits 2:24 - u1_pcie_pcie_phy_test_cfg"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pcie_phy_test_cfg( + pub fn u1_pcie_pcie_phy_test_cfg( &mut self, - ) -> U1_PLDA_PCIE_PCIE_PHY_TEST_CFG_W { - U1_PLDA_PCIE_PCIE_PHY_TEST_CFG_W::new(self, 2) + ) -> U1_PCIE_PCIE_PHY_TEST_CFG_W { + U1_PCIE_PCIE_PHY_TEST_CFG_W::new(self, 2) } - #[doc = "Bit 25 - u1_plda_pcie_pcie_rx_eq_training"] + #[doc = "Bit 25 - u1_pcie_pcie_rx_eq_training"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pcie_rx_eq_training( + pub fn u1_pcie_pcie_rx_eq_training( &mut self, - ) -> U1_PLDA_PCIE_PCIE_RX_EQ_TRAINING_W { - U1_PLDA_PCIE_PCIE_RX_EQ_TRAINING_W::new(self, 25) + ) -> U1_PCIE_PCIE_RX_EQ_TRAINING_W { + U1_PCIE_PCIE_RX_EQ_TRAINING_W::new(self, 25) } - #[doc = "Bit 26 - u1_plda_pcie_pcie_rxterm_en"] + #[doc = "Bit 26 - u1_pcie_pcie_rxterm_en"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pcie_rxterm_en( - &mut self, - ) -> U1_PLDA_PCIE_PCIE_RXTERM_EN_W { - U1_PLDA_PCIE_PCIE_RXTERM_EN_W::new(self, 26) + pub fn u1_pcie_pcie_rxterm_en(&mut self) -> U1_PCIE_PCIE_RXTERM_EN_W { + U1_PCIE_PCIE_RXTERM_EN_W::new(self, 26) } - #[doc = "Bit 27 - u1_plda_pcie_pcie_tx_oneszeros"] + #[doc = "Bit 27 - u1_pcie_pcie_tx_oneszeros"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pcie_tx_oneszeros( + pub fn u1_pcie_pcie_tx_oneszeros( &mut self, - ) -> U1_PLDA_PCIE_PCIE_TX_ONESZEROS_W { - U1_PLDA_PCIE_PCIE_TX_ONESZEROS_W::new(self, 27) + ) -> U1_PCIE_PCIE_TX_ONESZEROS_W { + U1_PCIE_PCIE_TX_ONESZEROS_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_187.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_187.rs index 854c965..11393a3 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_187.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_187.rs @@ -2,23 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_187` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pf0_offset` reader - u1_plda_pcie_pf0_offset"] -pub type U1_PLDA_PCIE_PF0_OFFSET_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pf0_offset` writer - u1_plda_pcie_pf0_offset"] -pub type U1_PLDA_PCIE_PF0_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `u1_pcie_pf0_offset` reader - u1_pcie_pf0_offset"] +pub type U1_PCIE_PF0_OFFSET_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pf0_offset` writer - u1_pcie_pf0_offset"] +pub type U1_PCIE_PF0_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { - #[doc = "Bits 0:19 - u1_plda_pcie_pf0_offset"] + #[doc = "Bits 0:19 - u1_pcie_pf0_offset"] #[inline(always)] - pub fn u1_plda_pcie_pf0_offset(&self) -> U1_PLDA_PCIE_PF0_OFFSET_R { - U1_PLDA_PCIE_PF0_OFFSET_R::new(self.bits & 0x000f_ffff) + pub fn u1_pcie_pf0_offset(&self) -> U1_PCIE_PF0_OFFSET_R { + U1_PCIE_PF0_OFFSET_R::new(self.bits & 0x000f_ffff) } } impl W { - #[doc = "Bits 0:19 - u1_plda_pcie_pf0_offset"] + #[doc = "Bits 0:19 - u1_pcie_pf0_offset"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pf0_offset(&mut self) -> U1_PLDA_PCIE_PF0_OFFSET_W { - U1_PLDA_PCIE_PF0_OFFSET_W::new(self, 0) + pub fn u1_pcie_pf0_offset(&mut self) -> U1_PCIE_PF0_OFFSET_W { + U1_PCIE_PF0_OFFSET_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_188.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_188.rs index b8561b9..120e902 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_188.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_188.rs @@ -2,23 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_188` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pf1_offset` reader - u1_plda_pcie_pf1_offset"] -pub type U1_PLDA_PCIE_PF1_OFFSET_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pf1_offset` writer - u1_plda_pcie_pf1_offset"] -pub type U1_PLDA_PCIE_PF1_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `u1_pcie_pf1_offset` reader - u1_pcie_pf1_offset"] +pub type U1_PCIE_PF1_OFFSET_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pf1_offset` writer - u1_pcie_pf1_offset"] +pub type U1_PCIE_PF1_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { - #[doc = "Bits 0:19 - u1_plda_pcie_pf1_offset"] + #[doc = "Bits 0:19 - u1_pcie_pf1_offset"] #[inline(always)] - pub fn u1_plda_pcie_pf1_offset(&self) -> U1_PLDA_PCIE_PF1_OFFSET_R { - U1_PLDA_PCIE_PF1_OFFSET_R::new(self.bits & 0x000f_ffff) + pub fn u1_pcie_pf1_offset(&self) -> U1_PCIE_PF1_OFFSET_R { + U1_PCIE_PF1_OFFSET_R::new(self.bits & 0x000f_ffff) } } impl W { - #[doc = "Bits 0:19 - u1_plda_pcie_pf1_offset"] + #[doc = "Bits 0:19 - u1_pcie_pf1_offset"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pf1_offset(&mut self) -> U1_PLDA_PCIE_PF1_OFFSET_W { - U1_PLDA_PCIE_PF1_OFFSET_W::new(self, 0) + pub fn u1_pcie_pf1_offset(&mut self) -> U1_PCIE_PF1_OFFSET_W { + U1_PCIE_PF1_OFFSET_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_189.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_189.rs index a3ada7d..f10628c 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_189.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_189.rs @@ -2,23 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_189` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pf2_offset` reader - u1_plda_pcie_pf2_offset"] -pub type U1_PLDA_PCIE_PF2_OFFSET_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pf2_offset` writer - u1_plda_pcie_pf2_offset"] -pub type U1_PLDA_PCIE_PF2_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `u1_pcie_pf2_offset` reader - u1_pcie_pf2_offset"] +pub type U1_PCIE_PF2_OFFSET_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pf2_offset` writer - u1_pcie_pf2_offset"] +pub type U1_PCIE_PF2_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { - #[doc = "Bits 0:19 - u1_plda_pcie_pf2_offset"] + #[doc = "Bits 0:19 - u1_pcie_pf2_offset"] #[inline(always)] - pub fn u1_plda_pcie_pf2_offset(&self) -> U1_PLDA_PCIE_PF2_OFFSET_R { - U1_PLDA_PCIE_PF2_OFFSET_R::new(self.bits & 0x000f_ffff) + pub fn u1_pcie_pf2_offset(&self) -> U1_PCIE_PF2_OFFSET_R { + U1_PCIE_PF2_OFFSET_R::new(self.bits & 0x000f_ffff) } } impl W { - #[doc = "Bits 0:19 - u1_plda_pcie_pf2_offset"] + #[doc = "Bits 0:19 - u1_pcie_pf2_offset"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pf2_offset(&mut self) -> U1_PLDA_PCIE_PF2_OFFSET_W { - U1_PLDA_PCIE_PF2_OFFSET_W::new(self, 0) + pub fn u1_pcie_pf2_offset(&mut self) -> U1_PCIE_PF2_OFFSET_W { + U1_PCIE_PF2_OFFSET_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_19.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_19.rs index 1267450..fc629a3 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_19.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_19.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_19` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_63_32` reader - u0_plda_pcie_axi4_mst0_aratomop_63_32"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_63_32` reader - u0_pcie_axi4_mst0_aratomop_63_32"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_63_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_63_32"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_63_32"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_63_32(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_63_32_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_63_32_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_63_32(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_63_32_R { + U0_PCIE_AXI4_MST0_ARATOMOP_63_32_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_190.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_190.rs index e648bbf..b624841 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_190.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_190.rs @@ -2,76 +2,74 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_190` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pf3_offset` reader - u1_plda_pcie_pf3_offset"] -pub type U1_PLDA_PCIE_PF3_OFFSET_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pf3_offset` writer - u1_plda_pcie_pf3_offset"] -pub type U1_PLDA_PCIE_PF3_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; -#[doc = "Field `u1_plda_pcie_phy_mode` reader - u1_plda_pcie_phy_mode"] -pub type U1_PLDA_PCIE_PHY_MODE_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_phy_mode` writer - u1_plda_pcie_phy_mode"] -pub type U1_PLDA_PCIE_PHY_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u1_plda_pcie_pl_clkrem_allow` reader - u1_plda_pcie_pl_clkrem_allow"] -pub type U1_PLDA_PCIE_PL_CLKREM_ALLOW_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_pl_clkrem_allow` writer - u1_plda_pcie_pl_clkrem_allow"] -pub type U1_PLDA_PCIE_PL_CLKREM_ALLOW_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_pl_clkreq_oen` reader - u1_plda_pcie_pl_clkreq_oen"] -pub type U1_PLDA_PCIE_PL_CLKREQ_OEN_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_pl_equ_phase` reader - u1_plda_pcie_pl_equ_phase"] -pub type U1_PLDA_PCIE_PL_EQU_PHASE_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pl_ltssm` reader - u1_plda_pcie_pl_ltssm"] -pub type U1_PLDA_PCIE_PL_LTSSM_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pf3_offset` reader - u1_pcie_pf3_offset"] +pub type U1_PCIE_PF3_OFFSET_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pf3_offset` writer - u1_pcie_pf3_offset"] +pub type U1_PCIE_PF3_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `u1_pcie_phy_mode` reader - u1_pcie_phy_mode"] +pub type U1_PCIE_PHY_MODE_R = crate::FieldReader; +#[doc = "Field `u1_pcie_phy_mode` writer - u1_pcie_phy_mode"] +pub type U1_PCIE_PHY_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u1_pcie_pl_clkrem_allow` reader - u1_pcie_pl_clkrem_allow"] +pub type U1_PCIE_PL_CLKREM_ALLOW_R = crate::BitReader; +#[doc = "Field `u1_pcie_pl_clkrem_allow` writer - u1_pcie_pl_clkrem_allow"] +pub type U1_PCIE_PL_CLKREM_ALLOW_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_pl_clkreq_oen` reader - u1_pcie_pl_clkreq_oen"] +pub type U1_PCIE_PL_CLKREQ_OEN_R = crate::BitReader; +#[doc = "Field `u1_pcie_pl_equ_phase` reader - u1_pcie_pl_equ_phase"] +pub type U1_PCIE_PL_EQU_PHASE_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pl_ltssm` reader - u1_pcie_pl_ltssm"] +pub type U1_PCIE_PL_LTSSM_R = crate::FieldReader; impl R { - #[doc = "Bits 0:19 - u1_plda_pcie_pf3_offset"] + #[doc = "Bits 0:19 - u1_pcie_pf3_offset"] #[inline(always)] - pub fn u1_plda_pcie_pf3_offset(&self) -> U1_PLDA_PCIE_PF3_OFFSET_R { - U1_PLDA_PCIE_PF3_OFFSET_R::new(self.bits & 0x000f_ffff) + pub fn u1_pcie_pf3_offset(&self) -> U1_PCIE_PF3_OFFSET_R { + U1_PCIE_PF3_OFFSET_R::new(self.bits & 0x000f_ffff) } - #[doc = "Bits 20:21 - u1_plda_pcie_phy_mode"] + #[doc = "Bits 20:21 - u1_pcie_phy_mode"] #[inline(always)] - pub fn u1_plda_pcie_phy_mode(&self) -> U1_PLDA_PCIE_PHY_MODE_R { - U1_PLDA_PCIE_PHY_MODE_R::new(((self.bits >> 20) & 3) as u8) + pub fn u1_pcie_phy_mode(&self) -> U1_PCIE_PHY_MODE_R { + U1_PCIE_PHY_MODE_R::new(((self.bits >> 20) & 3) as u8) } - #[doc = "Bit 22 - u1_plda_pcie_pl_clkrem_allow"] + #[doc = "Bit 22 - u1_pcie_pl_clkrem_allow"] #[inline(always)] - pub fn u1_plda_pcie_pl_clkrem_allow(&self) -> U1_PLDA_PCIE_PL_CLKREM_ALLOW_R { - U1_PLDA_PCIE_PL_CLKREM_ALLOW_R::new(((self.bits >> 22) & 1) != 0) + pub fn u1_pcie_pl_clkrem_allow(&self) -> U1_PCIE_PL_CLKREM_ALLOW_R { + U1_PCIE_PL_CLKREM_ALLOW_R::new(((self.bits >> 22) & 1) != 0) } - #[doc = "Bit 23 - u1_plda_pcie_pl_clkreq_oen"] + #[doc = "Bit 23 - u1_pcie_pl_clkreq_oen"] #[inline(always)] - pub fn u1_plda_pcie_pl_clkreq_oen(&self) -> U1_PLDA_PCIE_PL_CLKREQ_OEN_R { - U1_PLDA_PCIE_PL_CLKREQ_OEN_R::new(((self.bits >> 23) & 1) != 0) + pub fn u1_pcie_pl_clkreq_oen(&self) -> U1_PCIE_PL_CLKREQ_OEN_R { + U1_PCIE_PL_CLKREQ_OEN_R::new(((self.bits >> 23) & 1) != 0) } - #[doc = "Bits 24:25 - u1_plda_pcie_pl_equ_phase"] + #[doc = "Bits 24:25 - u1_pcie_pl_equ_phase"] #[inline(always)] - pub fn u1_plda_pcie_pl_equ_phase(&self) -> U1_PLDA_PCIE_PL_EQU_PHASE_R { - U1_PLDA_PCIE_PL_EQU_PHASE_R::new(((self.bits >> 24) & 3) as u8) + pub fn u1_pcie_pl_equ_phase(&self) -> U1_PCIE_PL_EQU_PHASE_R { + U1_PCIE_PL_EQU_PHASE_R::new(((self.bits >> 24) & 3) as u8) } - #[doc = "Bits 26:30 - u1_plda_pcie_pl_ltssm"] + #[doc = "Bits 26:30 - u1_pcie_pl_ltssm"] #[inline(always)] - pub fn u1_plda_pcie_pl_ltssm(&self) -> U1_PLDA_PCIE_PL_LTSSM_R { - U1_PLDA_PCIE_PL_LTSSM_R::new(((self.bits >> 26) & 0x1f) as u8) + pub fn u1_pcie_pl_ltssm(&self) -> U1_PCIE_PL_LTSSM_R { + U1_PCIE_PL_LTSSM_R::new(((self.bits >> 26) & 0x1f) as u8) } } impl W { - #[doc = "Bits 0:19 - u1_plda_pcie_pf3_offset"] + #[doc = "Bits 0:19 - u1_pcie_pf3_offset"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pf3_offset(&mut self) -> U1_PLDA_PCIE_PF3_OFFSET_W { - U1_PLDA_PCIE_PF3_OFFSET_W::new(self, 0) + pub fn u1_pcie_pf3_offset(&mut self) -> U1_PCIE_PF3_OFFSET_W { + U1_PCIE_PF3_OFFSET_W::new(self, 0) } - #[doc = "Bits 20:21 - u1_plda_pcie_phy_mode"] + #[doc = "Bits 20:21 - u1_pcie_phy_mode"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_phy_mode(&mut self) -> U1_PLDA_PCIE_PHY_MODE_W { - U1_PLDA_PCIE_PHY_MODE_W::new(self, 20) + pub fn u1_pcie_phy_mode(&mut self) -> U1_PCIE_PHY_MODE_W { + U1_PCIE_PHY_MODE_W::new(self, 20) } - #[doc = "Bit 22 - u1_plda_pcie_pl_clkrem_allow"] + #[doc = "Bit 22 - u1_pcie_pl_clkrem_allow"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pl_clkrem_allow( - &mut self, - ) -> U1_PLDA_PCIE_PL_CLKREM_ALLOW_W { - U1_PLDA_PCIE_PL_CLKREM_ALLOW_W::new(self, 22) + pub fn u1_pcie_pl_clkrem_allow(&mut self) -> U1_PCIE_PL_CLKREM_ALLOW_W { + U1_PCIE_PL_CLKREM_ALLOW_W::new(self, 22) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_191.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_191.rs index 6cfb277..8fb0cab 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_191.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_191.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_191` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pl_pclk_rate` reader - u1_plda_pcie_pl_pclk_rate"] -pub type U1_PLDA_PCIE_PL_PCLK_RATE_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pl_pclk_rate` reader - u1_pcie_pl_pclk_rate"] +pub type U1_PCIE_PL_PCLK_RATE_R = crate::FieldReader; impl R { - #[doc = "Bits 0:4 - u1_plda_pcie_pl_pclk_rate"] + #[doc = "Bits 0:4 - u1_pcie_pl_pclk_rate"] #[inline(always)] - pub fn u1_plda_pcie_pl_pclk_rate(&self) -> U1_PLDA_PCIE_PL_PCLK_RATE_R { - U1_PLDA_PCIE_PL_PCLK_RATE_R::new((self.bits & 0x1f) as u8) + pub fn u1_pcie_pl_pclk_rate(&self) -> U1_PCIE_PL_PCLK_RATE_R { + U1_PCIE_PL_PCLK_RATE_R::new((self.bits & 0x1f) as u8) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_192.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_192.rs index 894eb90..9a5c661 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_192.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_192.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_192` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pl_sideband_in_31_0` reader - u1_plda_pcie_pl_sideband_in_31_0"] -pub type U1_PLDA_PCIE_PL_SIDEBAND_IN_31_0_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pl_sideband_in_31_0` writer - u1_plda_pcie_pl_sideband_in_31_0"] -pub type U1_PLDA_PCIE_PL_SIDEBAND_IN_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_pl_sideband_in_31_0` reader - u1_pcie_pl_sideband_in_31_0"] +pub type U1_PCIE_PL_SIDEBAND_IN_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pl_sideband_in_31_0` writer - u1_pcie_pl_sideband_in_31_0"] +pub type U1_PCIE_PL_SIDEBAND_IN_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_pl_sideband_in_31_0"] + #[doc = "Bits 0:31 - u1_pcie_pl_sideband_in_31_0"] #[inline(always)] - pub fn u1_plda_pcie_pl_sideband_in_31_0(&self) -> U1_PLDA_PCIE_PL_SIDEBAND_IN_31_0_R { - U1_PLDA_PCIE_PL_SIDEBAND_IN_31_0_R::new(self.bits) + pub fn u1_pcie_pl_sideband_in_31_0(&self) -> U1_PCIE_PL_SIDEBAND_IN_31_0_R { + U1_PCIE_PL_SIDEBAND_IN_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_pl_sideband_in_31_0"] + #[doc = "Bits 0:31 - u1_pcie_pl_sideband_in_31_0"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pl_sideband_in_31_0( + pub fn u1_pcie_pl_sideband_in_31_0( &mut self, - ) -> U1_PLDA_PCIE_PL_SIDEBAND_IN_31_0_W { - U1_PLDA_PCIE_PL_SIDEBAND_IN_31_0_W::new(self, 0) + ) -> U1_PCIE_PL_SIDEBAND_IN_31_0_W { + U1_PCIE_PL_SIDEBAND_IN_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_193.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_193.rs index 441cb6f..043d8aa 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_193.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_193.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_193` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pl_sideband_in_63_32` reader - u1_plda_pcie_pl_sideband_in_63_32"] -pub type U1_PLDA_PCIE_PL_SIDEBAND_IN_63_32_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pl_sideband_in_63_32` writer - u1_plda_pcie_pl_sideband_in_63_32"] -pub type U1_PLDA_PCIE_PL_SIDEBAND_IN_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_pl_sideband_in_63_32` reader - u1_pcie_pl_sideband_in_63_32"] +pub type U1_PCIE_PL_SIDEBAND_IN_63_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pl_sideband_in_63_32` writer - u1_pcie_pl_sideband_in_63_32"] +pub type U1_PCIE_PL_SIDEBAND_IN_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_pl_sideband_in_63_32"] + #[doc = "Bits 0:31 - u1_pcie_pl_sideband_in_63_32"] #[inline(always)] - pub fn u1_plda_pcie_pl_sideband_in_63_32(&self) -> U1_PLDA_PCIE_PL_SIDEBAND_IN_63_32_R { - U1_PLDA_PCIE_PL_SIDEBAND_IN_63_32_R::new(self.bits) + pub fn u1_pcie_pl_sideband_in_63_32(&self) -> U1_PCIE_PL_SIDEBAND_IN_63_32_R { + U1_PCIE_PL_SIDEBAND_IN_63_32_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_pl_sideband_in_63_32"] + #[doc = "Bits 0:31 - u1_pcie_pl_sideband_in_63_32"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pl_sideband_in_63_32( + pub fn u1_pcie_pl_sideband_in_63_32( &mut self, - ) -> U1_PLDA_PCIE_PL_SIDEBAND_IN_63_32_W { - U1_PLDA_PCIE_PL_SIDEBAND_IN_63_32_W::new(self, 0) + ) -> U1_PCIE_PL_SIDEBAND_IN_63_32_W { + U1_PCIE_PL_SIDEBAND_IN_63_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_194.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_194.rs index dc77cd0..9b68f15 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_194.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_194.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_194` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pl_sideband_out_31_0` reader - u1_plda_pcie_pl_sideband_out_31_0"] -pub type U1_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pl_sideband_out_31_0` writer - u1_plda_pcie_pl_sideband_out_31_0"] -pub type U1_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_pl_sideband_out_31_0` reader - u1_pcie_pl_sideband_out_31_0"] +pub type U1_PCIE_PL_SIDEBAND_OUT_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pl_sideband_out_31_0` writer - u1_pcie_pl_sideband_out_31_0"] +pub type U1_PCIE_PL_SIDEBAND_OUT_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_pl_sideband_out_31_0"] + #[doc = "Bits 0:31 - u1_pcie_pl_sideband_out_31_0"] #[inline(always)] - pub fn u1_plda_pcie_pl_sideband_out_31_0(&self) -> U1_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_R { - U1_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_R::new(self.bits) + pub fn u1_pcie_pl_sideband_out_31_0(&self) -> U1_PCIE_PL_SIDEBAND_OUT_31_0_R { + U1_PCIE_PL_SIDEBAND_OUT_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_pl_sideband_out_31_0"] + #[doc = "Bits 0:31 - u1_pcie_pl_sideband_out_31_0"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pl_sideband_out_31_0( + pub fn u1_pcie_pl_sideband_out_31_0( &mut self, - ) -> U1_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_W { - U1_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_W::new(self, 0) + ) -> U1_PCIE_PL_SIDEBAND_OUT_31_0_W { + U1_PCIE_PL_SIDEBAND_OUT_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_195.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_195.rs index ea60358..47c7200 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_195.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_195.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_195` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pl_sideband_out_63_32` reader - u1_plda_pcie_pl_sideband_out_63_32"] -pub type U1_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_pl_sideband_out_63_32` writer - u1_plda_pcie_pl_sideband_out_63_32"] -pub type U1_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_pl_sideband_out_63_32` reader - u1_pcie_pl_sideband_out_63_32"] +pub type U1_PCIE_PL_SIDEBAND_OUT_63_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_pl_sideband_out_63_32` writer - u1_pcie_pl_sideband_out_63_32"] +pub type U1_PCIE_PL_SIDEBAND_OUT_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_pl_sideband_out_63_32"] + #[doc = "Bits 0:31 - u1_pcie_pl_sideband_out_63_32"] #[inline(always)] - pub fn u1_plda_pcie_pl_sideband_out_63_32(&self) -> U1_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_R { - U1_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_R::new(self.bits) + pub fn u1_pcie_pl_sideband_out_63_32(&self) -> U1_PCIE_PL_SIDEBAND_OUT_63_32_R { + U1_PCIE_PL_SIDEBAND_OUT_63_32_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_pl_sideband_out_63_32"] + #[doc = "Bits 0:31 - u1_pcie_pl_sideband_out_63_32"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pl_sideband_out_63_32( + pub fn u1_pcie_pl_sideband_out_63_32( &mut self, - ) -> U1_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_W { - U1_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_W::new(self, 0) + ) -> U1_PCIE_PL_SIDEBAND_OUT_63_32_W { + U1_PCIE_PL_SIDEBAND_OUT_63_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_196.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_196.rs index 488ef1d..3ab71d3 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_196.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_196.rs @@ -2,37 +2,37 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_196` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_pl_wake_in` reader - u1_plda_pcie_pl_wake_in"] -pub type U1_PLDA_PCIE_PL_WAKE_IN_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_pl_wake_in` writer - u1_plda_pcie_pl_wake_in"] -pub type U1_PLDA_PCIE_PL_WAKE_IN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_pl_wake_oen` reader - u1_plda_pcie_pl_wake_oen"] -pub type U1_PLDA_PCIE_PL_WAKE_OEN_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_rx_standby_o` reader - u1_plda_pcie_rx_standby_o"] -pub type U1_PLDA_PCIE_RX_STANDBY_O_R = crate::BitReader; +#[doc = "Field `u1_pcie_pl_wake_in` reader - u1_pcie_pl_wake_in"] +pub type U1_PCIE_PL_WAKE_IN_R = crate::BitReader; +#[doc = "Field `u1_pcie_pl_wake_in` writer - u1_pcie_pl_wake_in"] +pub type U1_PCIE_PL_WAKE_IN_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_pl_wake_oen` reader - u1_pcie_pl_wake_oen"] +pub type U1_PCIE_PL_WAKE_OEN_R = crate::BitReader; +#[doc = "Field `u1_pcie_rx_standby_o` reader - u1_pcie_rx_standby_o"] +pub type U1_PCIE_RX_STANDBY_O_R = crate::BitReader; impl R { - #[doc = "Bit 0 - u1_plda_pcie_pl_wake_in"] + #[doc = "Bit 0 - u1_pcie_pl_wake_in"] #[inline(always)] - pub fn u1_plda_pcie_pl_wake_in(&self) -> U1_PLDA_PCIE_PL_WAKE_IN_R { - U1_PLDA_PCIE_PL_WAKE_IN_R::new((self.bits & 1) != 0) + pub fn u1_pcie_pl_wake_in(&self) -> U1_PCIE_PL_WAKE_IN_R { + U1_PCIE_PL_WAKE_IN_R::new((self.bits & 1) != 0) } - #[doc = "Bit 1 - u1_plda_pcie_pl_wake_oen"] + #[doc = "Bit 1 - u1_pcie_pl_wake_oen"] #[inline(always)] - pub fn u1_plda_pcie_pl_wake_oen(&self) -> U1_PLDA_PCIE_PL_WAKE_OEN_R { - U1_PLDA_PCIE_PL_WAKE_OEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn u1_pcie_pl_wake_oen(&self) -> U1_PCIE_PL_WAKE_OEN_R { + U1_PCIE_PL_WAKE_OEN_R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 2 - u1_plda_pcie_rx_standby_o"] + #[doc = "Bit 2 - u1_pcie_rx_standby_o"] #[inline(always)] - pub fn u1_plda_pcie_rx_standby_o(&self) -> U1_PLDA_PCIE_RX_STANDBY_O_R { - U1_PLDA_PCIE_RX_STANDBY_O_R::new(((self.bits >> 2) & 1) != 0) + pub fn u1_pcie_rx_standby_o(&self) -> U1_PCIE_RX_STANDBY_O_R { + U1_PCIE_RX_STANDBY_O_R::new(((self.bits >> 2) & 1) != 0) } } impl W { - #[doc = "Bit 0 - u1_plda_pcie_pl_wake_in"] + #[doc = "Bit 0 - u1_pcie_pl_wake_in"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_pl_wake_in(&mut self) -> U1_PLDA_PCIE_PL_WAKE_IN_W { - U1_PLDA_PCIE_PL_WAKE_IN_W::new(self, 0) + pub fn u1_pcie_pl_wake_in(&mut self) -> U1_PCIE_PL_WAKE_IN_W { + U1_PCIE_PL_WAKE_IN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_197.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_197.rs index 44f7c59..fa2a501 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_197.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_197.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_197` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_in_31_0` reader - u1_plda_pcie_test_in_31_0"] -pub type U1_PLDA_PCIE_TEST_IN_31_0_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_in_31_0` writer - u1_plda_pcie_test_in_31_0"] -pub type U1_PLDA_PCIE_TEST_IN_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_in_31_0` reader - u1_pcie_test_in_31_0"] +pub type U1_PCIE_TEST_IN_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_in_31_0` writer - u1_pcie_test_in_31_0"] +pub type U1_PCIE_TEST_IN_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_in_31_0"] + #[doc = "Bits 0:31 - u1_pcie_test_in_31_0"] #[inline(always)] - pub fn u1_plda_pcie_test_in_31_0(&self) -> U1_PLDA_PCIE_TEST_IN_31_0_R { - U1_PLDA_PCIE_TEST_IN_31_0_R::new(self.bits) + pub fn u1_pcie_test_in_31_0(&self) -> U1_PCIE_TEST_IN_31_0_R { + U1_PCIE_TEST_IN_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_in_31_0"] + #[doc = "Bits 0:31 - u1_pcie_test_in_31_0"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_in_31_0( - &mut self, - ) -> U1_PLDA_PCIE_TEST_IN_31_0_W { - U1_PLDA_PCIE_TEST_IN_31_0_W::new(self, 0) + pub fn u1_pcie_test_in_31_0(&mut self) -> U1_PCIE_TEST_IN_31_0_W { + U1_PCIE_TEST_IN_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_198.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_198.rs index f0e2ecf..3f0ba5b 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_198.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_198.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_198` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_in_63_32` reader - u1_plda_pcie_test_in_63_32"] -pub type U1_PLDA_PCIE_TEST_IN_63_32_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_in_63_32` writer - u1_plda_pcie_test_in_63_32"] -pub type U1_PLDA_PCIE_TEST_IN_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_in_63_32` reader - u1_pcie_test_in_63_32"] +pub type U1_PCIE_TEST_IN_63_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_in_63_32` writer - u1_pcie_test_in_63_32"] +pub type U1_PCIE_TEST_IN_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_in_63_32"] + #[doc = "Bits 0:31 - u1_pcie_test_in_63_32"] #[inline(always)] - pub fn u1_plda_pcie_test_in_63_32(&self) -> U1_PLDA_PCIE_TEST_IN_63_32_R { - U1_PLDA_PCIE_TEST_IN_63_32_R::new(self.bits) + pub fn u1_pcie_test_in_63_32(&self) -> U1_PCIE_TEST_IN_63_32_R { + U1_PCIE_TEST_IN_63_32_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_in_63_32"] + #[doc = "Bits 0:31 - u1_pcie_test_in_63_32"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_in_63_32( - &mut self, - ) -> U1_PLDA_PCIE_TEST_IN_63_32_W { - U1_PLDA_PCIE_TEST_IN_63_32_W::new(self, 0) + pub fn u1_pcie_test_in_63_32(&mut self) -> U1_PCIE_TEST_IN_63_32_W { + U1_PCIE_TEST_IN_63_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_199.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_199.rs index 03c3450..d0bb787 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_199.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_199.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_199` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_31_0` reader - u1_plda_pcie_test_out_bridge_31_0"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_31_0` writer - u1_plda_pcie_test_out_bridge_31_0"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_31_0` reader - u1_pcie_test_out_bridge_31_0"] +pub type U1_PCIE_TEST_OUT_BRIDGE_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_31_0` writer - u1_pcie_test_out_bridge_31_0"] +pub type U1_PCIE_TEST_OUT_BRIDGE_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_31_0"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_31_0"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_31_0(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_31_0(&self) -> U1_PCIE_TEST_OUT_BRIDGE_31_0_R { + U1_PCIE_TEST_OUT_BRIDGE_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_31_0"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_31_0"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_31_0( + pub fn u1_pcie_test_out_bridge_31_0( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_31_0_W { + U1_PCIE_TEST_OUT_BRIDGE_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_2.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_2.rs index 6fdeb3c..5fdfc73 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_2.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_2.rs @@ -2,318 +2,312 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_2` writer"] pub type W = crate::W; -#[doc = "Field `u0_cdn_usb_rx_dp` reader - u0_cdn_usb_rx_dp"] -pub type U0_CDN_USB_RX_DP_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_rx_rcv` reader - u0_cdn_usb_rx_rcv"] -pub type U0_CDN_USB_RX_RCV_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_self_test` reader - For software bist_test"] -pub type U0_CDN_USB_SELF_TEST_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_self_test` writer - For software bist_test"] -pub type U0_CDN_USB_SELF_TEST_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_sessend` reader - u0_cdn_usb_sessend"] -pub type U0_CDN_USB_SESSEND_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_sessvalid` reader - u0_cdn_usb_sessvalid"] -pub type U0_CDN_USB_SESSVALID_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_sof` reader - u0_cdn_usb_sof"] -pub type U0_CDN_USB_SOF_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_test_bist` reader - For software bist_test"] -pub type U0_CDN_USB_TEST_BIST_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_main_power_off_ack` reader - u0_cdn_usb_usbdev_main_power_off_ack"] -pub type U0_CDN_USB_USBDEV_MAIN_POWER_OFF_ACK_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_main_power_off_ready` reader - u0_cdn_usb_usbdev_main_power_off_ready"] -pub type U0_CDN_USB_USBDEV_MAIN_POWER_OFF_READY_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_main_power_off_req` reader - u0_cdn_usb_usbdev_main_power_off_req"] -pub type U0_CDN_USB_USBDEV_MAIN_POWER_OFF_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_main_power_off_req` writer - u0_cdn_usb_usbdev_main_power_off_req"] -pub type U0_CDN_USB_USBDEV_MAIN_POWER_OFF_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_usbdev_main_power_on_ready` reader - u0_cdn_usb_usbdev_main_power_on_ready"] -pub type U0_CDN_USB_USBDEV_MAIN_POWER_ON_READY_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_main_power_on_req` reader - u0_cdn_usb_usbdev_main_power_on_req"] -pub type U0_CDN_USB_USBDEV_MAIN_POWER_ON_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_main_power_on_valid` reader - u0_cdn_usb_usbdev_main_power_on_valid"] -pub type U0_CDN_USB_USBDEV_MAIN_POWER_ON_VALID_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_main_power_on_valid` writer - u0_cdn_usb_usbdev_main_power_on_valid"] -pub type U0_CDN_USB_USBDEV_MAIN_POWER_ON_VALID_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_usbdev_power_off_ack` reader - u0_cdn_usb_usbdev_power_off_ack"] -pub type U0_CDN_USB_USBDEV_POWER_OFF_ACK_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_power_off_ready` reader - u0_cdn_usb_usbdev_power_off_ready"] -pub type U0_CDN_USB_USBDEV_POWER_OFF_READY_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_power_off_req` reader - u0_cdn_usb_usbdev_power_off_req"] -pub type U0_CDN_USB_USBDEV_POWER_OFF_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_power_off_req` writer - u0_cdn_usb_usbdev_power_off_req"] -pub type U0_CDN_USB_USBDEV_POWER_OFF_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_usbdev_power_on_ready` reader - u0_cdn_usb_usbdev_power_on_ready"] -pub type U0_CDN_USB_USBDEV_POWER_ON_READY_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_power_on_req` reader - u0_cdn_usb_usbdev_power_on_req"] -pub type U0_CDN_USB_USBDEV_POWER_ON_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_power_on_valid` reader - u0_cdn_usb_usbdev_power_on_valid"] -pub type U0_CDN_USB_USBDEV_POWER_ON_VALID_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_usbdev_power_on_valid` writer - u0_cdn_usb_usbdev_power_on_valid"] -pub type U0_CDN_USB_USBDEV_POWER_ON_VALID_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_dmpulldown_sit` reader - u0_cdn_usb_utmi_dmpulldown_sit"] -pub type U0_CDN_USB_UTMI_DMPULLDOWN_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_dmpulldown_sit` writer - u0_cdn_usb_utmi_dmpulldown_sit"] -pub type U0_CDN_USB_UTMI_DMPULLDOWN_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_dppulldown_sit` reader - u0_cdn_usb_utmi_dppulldown_sit"] -pub type U0_CDN_USB_UTMI_DPPULLDOWN_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_dppulldown_sit` writer - u0_cdn_usb_utmi_dppulldown_sit"] -pub type U0_CDN_USB_UTMI_DPPULLDOWN_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_fslsserialmode_sit` reader - u0_cdn_usb_utmi_fslsserialmode_sit"] -pub type U0_CDN_USB_UTMI_FSLSSERIALMODE_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_fslsserialmode_sit` writer - u0_cdn_usb_utmi_fslsserialmode_sit"] -pub type U0_CDN_USB_UTMI_FSLSSERIALMODE_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_hostdisconnect_sit` reader - u0_cdn_usb_utmi_hostdisconnect_sit"] -pub type U0_CDN_USB_UTMI_HOSTDISCONNECT_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_iddig_sit` reader - u0_cdn_usb_utmi_iddig_sit"] -pub type U0_CDN_USB_UTMI_IDDIG_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_idpullup_sit` reader - u0_cdn_usb_utmi_idpullup_sit"] -pub type U0_CDN_USB_UTMI_IDPULLUP_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_idpullup_sit` writer - u0_cdn_usb_utmi_idpullup_sit"] -pub type U0_CDN_USB_UTMI_IDPULLUP_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_linestate_sit` reader - u0_cdn_usb_utmi_linestate_sit"] -pub type U0_CDN_USB_UTMI_LINESTATE_SIT_R = crate::FieldReader; -#[doc = "Field `u0_cdn_usb_utmi_opmode_sit` reader - u0_cdn_usb_utmi_opmode_sit"] -pub type U0_CDN_USB_UTMI_OPMODE_SIT_R = crate::FieldReader; -#[doc = "Field `u0_cdn_usb_utmi_opmode_sit` writer - u0_cdn_usb_utmi_opmode_sit"] -pub type U0_CDN_USB_UTMI_OPMODE_SIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_cdn_usb_utmi_rxactive_sit` reader - u0_cdn_usb_utmi_rxactive_sit"] -pub type U0_CDN_USB_UTMI_RXACTIVE_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_rxerror_sit` reader - u0_cdn_usb_utmi_rxerror_sit"] -pub type U0_CDN_USB_UTMI_RXERROR_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_rxvalid_sit` reader - u0_cdn_usb_utmi_rxvalid_sit"] -pub type U0_CDN_USB_UTMI_RXVALID_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_rx_dp` reader - u0_usb_rx_dp"] +pub type U0_USB_RX_DP_R = crate::BitReader; +#[doc = "Field `u0_usb_rx_rcv` reader - u0_usb_rx_rcv"] +pub type U0_USB_RX_RCV_R = crate::BitReader; +#[doc = "Field `u0_usb_self_test` reader - For software bist_test"] +pub type U0_USB_SELF_TEST_R = crate::BitReader; +#[doc = "Field `u0_usb_self_test` writer - For software bist_test"] +pub type U0_USB_SELF_TEST_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_sessend` reader - u0_usb_sessend"] +pub type U0_USB_SESSEND_R = crate::BitReader; +#[doc = "Field `u0_usb_sessvalid` reader - u0_usb_sessvalid"] +pub type U0_USB_SESSVALID_R = crate::BitReader; +#[doc = "Field `u0_usb_sof` reader - u0_usb_sof"] +pub type U0_USB_SOF_R = crate::BitReader; +#[doc = "Field `u0_usb_test_bist` reader - For software bist_test"] +pub type U0_USB_TEST_BIST_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_main_power_off_ack` reader - u0_usb_usbdev_main_power_off_ack"] +pub type U0_USB_USBDEV_MAIN_POWER_OFF_ACK_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_main_power_off_ready` reader - u0_usb_usbdev_main_power_off_ready"] +pub type U0_USB_USBDEV_MAIN_POWER_OFF_READY_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_main_power_off_req` reader - u0_usb_usbdev_main_power_off_req"] +pub type U0_USB_USBDEV_MAIN_POWER_OFF_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_main_power_off_req` writer - u0_usb_usbdev_main_power_off_req"] +pub type U0_USB_USBDEV_MAIN_POWER_OFF_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_usbdev_main_power_on_ready` reader - u0_usb_usbdev_main_power_on_ready"] +pub type U0_USB_USBDEV_MAIN_POWER_ON_READY_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_main_power_on_req` reader - u0_usb_usbdev_main_power_on_req"] +pub type U0_USB_USBDEV_MAIN_POWER_ON_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_main_power_on_valid` reader - u0_usb_usbdev_main_power_on_valid"] +pub type U0_USB_USBDEV_MAIN_POWER_ON_VALID_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_main_power_on_valid` writer - u0_usb_usbdev_main_power_on_valid"] +pub type U0_USB_USBDEV_MAIN_POWER_ON_VALID_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_usbdev_power_off_ack` reader - u0_usb_usbdev_power_off_ack"] +pub type U0_USB_USBDEV_POWER_OFF_ACK_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_power_off_ready` reader - u0_usb_usbdev_power_off_ready"] +pub type U0_USB_USBDEV_POWER_OFF_READY_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_power_off_req` reader - u0_usb_usbdev_power_off_req"] +pub type U0_USB_USBDEV_POWER_OFF_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_power_off_req` writer - u0_usb_usbdev_power_off_req"] +pub type U0_USB_USBDEV_POWER_OFF_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_usbdev_power_on_ready` reader - u0_usb_usbdev_power_on_ready"] +pub type U0_USB_USBDEV_POWER_ON_READY_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_power_on_req` reader - u0_usb_usbdev_power_on_req"] +pub type U0_USB_USBDEV_POWER_ON_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_power_on_valid` reader - u0_usb_usbdev_power_on_valid"] +pub type U0_USB_USBDEV_POWER_ON_VALID_R = crate::BitReader; +#[doc = "Field `u0_usb_usbdev_power_on_valid` writer - u0_usb_usbdev_power_on_valid"] +pub type U0_USB_USBDEV_POWER_ON_VALID_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_dmpulldown_sit` reader - u0_usb_utmi_dmpulldown_sit"] +pub type U0_USB_UTMI_DMPULLDOWN_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_dmpulldown_sit` writer - u0_usb_utmi_dmpulldown_sit"] +pub type U0_USB_UTMI_DMPULLDOWN_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_dppulldown_sit` reader - u0_usb_utmi_dppulldown_sit"] +pub type U0_USB_UTMI_DPPULLDOWN_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_dppulldown_sit` writer - u0_usb_utmi_dppulldown_sit"] +pub type U0_USB_UTMI_DPPULLDOWN_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_fslsserialmode_sit` reader - u0_usb_utmi_fslsserialmode_sit"] +pub type U0_USB_UTMI_FSLSSERIALMODE_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_fslsserialmode_sit` writer - u0_usb_utmi_fslsserialmode_sit"] +pub type U0_USB_UTMI_FSLSSERIALMODE_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_hostdisconnect_sit` reader - u0_usb_utmi_hostdisconnect_sit"] +pub type U0_USB_UTMI_HOSTDISCONNECT_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_iddig_sit` reader - u0_usb_utmi_iddig_sit"] +pub type U0_USB_UTMI_IDDIG_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_idpullup_sit` reader - u0_usb_utmi_idpullup_sit"] +pub type U0_USB_UTMI_IDPULLUP_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_idpullup_sit` writer - u0_usb_utmi_idpullup_sit"] +pub type U0_USB_UTMI_IDPULLUP_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_linestate_sit` reader - u0_usb_utmi_linestate_sit"] +pub type U0_USB_UTMI_LINESTATE_SIT_R = crate::FieldReader; +#[doc = "Field `u0_usb_utmi_opmode_sit` reader - u0_usb_utmi_opmode_sit"] +pub type U0_USB_UTMI_OPMODE_SIT_R = crate::FieldReader; +#[doc = "Field `u0_usb_utmi_opmode_sit` writer - u0_usb_utmi_opmode_sit"] +pub type U0_USB_UTMI_OPMODE_SIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_usb_utmi_rxactive_sit` reader - u0_usb_utmi_rxactive_sit"] +pub type U0_USB_UTMI_RXACTIVE_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_rxerror_sit` reader - u0_usb_utmi_rxerror_sit"] +pub type U0_USB_UTMI_RXERROR_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_rxvalid_sit` reader - u0_usb_utmi_rxvalid_sit"] +pub type U0_USB_UTMI_RXVALID_SIT_R = crate::BitReader; impl R { - #[doc = "Bit 0 - u0_cdn_usb_rx_dp"] + #[doc = "Bit 0 - u0_usb_rx_dp"] #[inline(always)] - pub fn u0_cdn_usb_rx_dp(&self) -> U0_CDN_USB_RX_DP_R { - U0_CDN_USB_RX_DP_R::new((self.bits & 1) != 0) + pub fn u0_usb_rx_dp(&self) -> U0_USB_RX_DP_R { + U0_USB_RX_DP_R::new((self.bits & 1) != 0) } - #[doc = "Bit 1 - u0_cdn_usb_rx_rcv"] + #[doc = "Bit 1 - u0_usb_rx_rcv"] #[inline(always)] - pub fn u0_cdn_usb_rx_rcv(&self) -> U0_CDN_USB_RX_RCV_R { - U0_CDN_USB_RX_RCV_R::new(((self.bits >> 1) & 1) != 0) + pub fn u0_usb_rx_rcv(&self) -> U0_USB_RX_RCV_R { + U0_USB_RX_RCV_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - For software bist_test"] #[inline(always)] - pub fn u0_cdn_usb_self_test(&self) -> U0_CDN_USB_SELF_TEST_R { - U0_CDN_USB_SELF_TEST_R::new(((self.bits >> 2) & 1) != 0) + pub fn u0_usb_self_test(&self) -> U0_USB_SELF_TEST_R { + U0_USB_SELF_TEST_R::new(((self.bits >> 2) & 1) != 0) } - #[doc = "Bit 3 - u0_cdn_usb_sessend"] + #[doc = "Bit 3 - u0_usb_sessend"] #[inline(always)] - pub fn u0_cdn_usb_sessend(&self) -> U0_CDN_USB_SESSEND_R { - U0_CDN_USB_SESSEND_R::new(((self.bits >> 3) & 1) != 0) + pub fn u0_usb_sessend(&self) -> U0_USB_SESSEND_R { + U0_USB_SESSEND_R::new(((self.bits >> 3) & 1) != 0) } - #[doc = "Bit 4 - u0_cdn_usb_sessvalid"] + #[doc = "Bit 4 - u0_usb_sessvalid"] #[inline(always)] - pub fn u0_cdn_usb_sessvalid(&self) -> U0_CDN_USB_SESSVALID_R { - U0_CDN_USB_SESSVALID_R::new(((self.bits >> 4) & 1) != 0) + pub fn u0_usb_sessvalid(&self) -> U0_USB_SESSVALID_R { + U0_USB_SESSVALID_R::new(((self.bits >> 4) & 1) != 0) } - #[doc = "Bit 5 - u0_cdn_usb_sof"] + #[doc = "Bit 5 - u0_usb_sof"] #[inline(always)] - pub fn u0_cdn_usb_sof(&self) -> U0_CDN_USB_SOF_R { - U0_CDN_USB_SOF_R::new(((self.bits >> 5) & 1) != 0) + pub fn u0_usb_sof(&self) -> U0_USB_SOF_R { + U0_USB_SOF_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - For software bist_test"] #[inline(always)] - pub fn u0_cdn_usb_test_bist(&self) -> U0_CDN_USB_TEST_BIST_R { - U0_CDN_USB_TEST_BIST_R::new(((self.bits >> 6) & 1) != 0) + pub fn u0_usb_test_bist(&self) -> U0_USB_TEST_BIST_R { + U0_USB_TEST_BIST_R::new(((self.bits >> 6) & 1) != 0) } - #[doc = "Bit 7 - u0_cdn_usb_usbdev_main_power_off_ack"] + #[doc = "Bit 7 - u0_usb_usbdev_main_power_off_ack"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_main_power_off_ack(&self) -> U0_CDN_USB_USBDEV_MAIN_POWER_OFF_ACK_R { - U0_CDN_USB_USBDEV_MAIN_POWER_OFF_ACK_R::new(((self.bits >> 7) & 1) != 0) + pub fn u0_usb_usbdev_main_power_off_ack(&self) -> U0_USB_USBDEV_MAIN_POWER_OFF_ACK_R { + U0_USB_USBDEV_MAIN_POWER_OFF_ACK_R::new(((self.bits >> 7) & 1) != 0) } - #[doc = "Bit 8 - u0_cdn_usb_usbdev_main_power_off_ready"] + #[doc = "Bit 8 - u0_usb_usbdev_main_power_off_ready"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_main_power_off_ready( - &self, - ) -> U0_CDN_USB_USBDEV_MAIN_POWER_OFF_READY_R { - U0_CDN_USB_USBDEV_MAIN_POWER_OFF_READY_R::new(((self.bits >> 8) & 1) != 0) + pub fn u0_usb_usbdev_main_power_off_ready(&self) -> U0_USB_USBDEV_MAIN_POWER_OFF_READY_R { + U0_USB_USBDEV_MAIN_POWER_OFF_READY_R::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 9 - u0_cdn_usb_usbdev_main_power_off_req"] + #[doc = "Bit 9 - u0_usb_usbdev_main_power_off_req"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_main_power_off_req(&self) -> U0_CDN_USB_USBDEV_MAIN_POWER_OFF_REQ_R { - U0_CDN_USB_USBDEV_MAIN_POWER_OFF_REQ_R::new(((self.bits >> 9) & 1) != 0) + pub fn u0_usb_usbdev_main_power_off_req(&self) -> U0_USB_USBDEV_MAIN_POWER_OFF_REQ_R { + U0_USB_USBDEV_MAIN_POWER_OFF_REQ_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 10 - u0_cdn_usb_usbdev_main_power_on_ready"] + #[doc = "Bit 10 - u0_usb_usbdev_main_power_on_ready"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_main_power_on_ready(&self) -> U0_CDN_USB_USBDEV_MAIN_POWER_ON_READY_R { - U0_CDN_USB_USBDEV_MAIN_POWER_ON_READY_R::new(((self.bits >> 10) & 1) != 0) + pub fn u0_usb_usbdev_main_power_on_ready(&self) -> U0_USB_USBDEV_MAIN_POWER_ON_READY_R { + U0_USB_USBDEV_MAIN_POWER_ON_READY_R::new(((self.bits >> 10) & 1) != 0) } - #[doc = "Bit 11 - u0_cdn_usb_usbdev_main_power_on_req"] + #[doc = "Bit 11 - u0_usb_usbdev_main_power_on_req"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_main_power_on_req(&self) -> U0_CDN_USB_USBDEV_MAIN_POWER_ON_REQ_R { - U0_CDN_USB_USBDEV_MAIN_POWER_ON_REQ_R::new(((self.bits >> 11) & 1) != 0) + pub fn u0_usb_usbdev_main_power_on_req(&self) -> U0_USB_USBDEV_MAIN_POWER_ON_REQ_R { + U0_USB_USBDEV_MAIN_POWER_ON_REQ_R::new(((self.bits >> 11) & 1) != 0) } - #[doc = "Bit 12 - u0_cdn_usb_usbdev_main_power_on_valid"] + #[doc = "Bit 12 - u0_usb_usbdev_main_power_on_valid"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_main_power_on_valid(&self) -> U0_CDN_USB_USBDEV_MAIN_POWER_ON_VALID_R { - U0_CDN_USB_USBDEV_MAIN_POWER_ON_VALID_R::new(((self.bits >> 12) & 1) != 0) + pub fn u0_usb_usbdev_main_power_on_valid(&self) -> U0_USB_USBDEV_MAIN_POWER_ON_VALID_R { + U0_USB_USBDEV_MAIN_POWER_ON_VALID_R::new(((self.bits >> 12) & 1) != 0) } - #[doc = "Bit 13 - u0_cdn_usb_usbdev_power_off_ack"] + #[doc = "Bit 13 - u0_usb_usbdev_power_off_ack"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_power_off_ack(&self) -> U0_CDN_USB_USBDEV_POWER_OFF_ACK_R { - U0_CDN_USB_USBDEV_POWER_OFF_ACK_R::new(((self.bits >> 13) & 1) != 0) + pub fn u0_usb_usbdev_power_off_ack(&self) -> U0_USB_USBDEV_POWER_OFF_ACK_R { + U0_USB_USBDEV_POWER_OFF_ACK_R::new(((self.bits >> 13) & 1) != 0) } - #[doc = "Bit 14 - u0_cdn_usb_usbdev_power_off_ready"] + #[doc = "Bit 14 - u0_usb_usbdev_power_off_ready"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_power_off_ready(&self) -> U0_CDN_USB_USBDEV_POWER_OFF_READY_R { - U0_CDN_USB_USBDEV_POWER_OFF_READY_R::new(((self.bits >> 14) & 1) != 0) + pub fn u0_usb_usbdev_power_off_ready(&self) -> U0_USB_USBDEV_POWER_OFF_READY_R { + U0_USB_USBDEV_POWER_OFF_READY_R::new(((self.bits >> 14) & 1) != 0) } - #[doc = "Bit 15 - u0_cdn_usb_usbdev_power_off_req"] + #[doc = "Bit 15 - u0_usb_usbdev_power_off_req"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_power_off_req(&self) -> U0_CDN_USB_USBDEV_POWER_OFF_REQ_R { - U0_CDN_USB_USBDEV_POWER_OFF_REQ_R::new(((self.bits >> 15) & 1) != 0) + pub fn u0_usb_usbdev_power_off_req(&self) -> U0_USB_USBDEV_POWER_OFF_REQ_R { + U0_USB_USBDEV_POWER_OFF_REQ_R::new(((self.bits >> 15) & 1) != 0) } - #[doc = "Bit 16 - u0_cdn_usb_usbdev_power_on_ready"] + #[doc = "Bit 16 - u0_usb_usbdev_power_on_ready"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_power_on_ready(&self) -> U0_CDN_USB_USBDEV_POWER_ON_READY_R { - U0_CDN_USB_USBDEV_POWER_ON_READY_R::new(((self.bits >> 16) & 1) != 0) + pub fn u0_usb_usbdev_power_on_ready(&self) -> U0_USB_USBDEV_POWER_ON_READY_R { + U0_USB_USBDEV_POWER_ON_READY_R::new(((self.bits >> 16) & 1) != 0) } - #[doc = "Bit 17 - u0_cdn_usb_usbdev_power_on_req"] + #[doc = "Bit 17 - u0_usb_usbdev_power_on_req"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_power_on_req(&self) -> U0_CDN_USB_USBDEV_POWER_ON_REQ_R { - U0_CDN_USB_USBDEV_POWER_ON_REQ_R::new(((self.bits >> 17) & 1) != 0) + pub fn u0_usb_usbdev_power_on_req(&self) -> U0_USB_USBDEV_POWER_ON_REQ_R { + U0_USB_USBDEV_POWER_ON_REQ_R::new(((self.bits >> 17) & 1) != 0) } - #[doc = "Bit 18 - u0_cdn_usb_usbdev_power_on_valid"] + #[doc = "Bit 18 - u0_usb_usbdev_power_on_valid"] #[inline(always)] - pub fn u0_cdn_usb_usbdev_power_on_valid(&self) -> U0_CDN_USB_USBDEV_POWER_ON_VALID_R { - U0_CDN_USB_USBDEV_POWER_ON_VALID_R::new(((self.bits >> 18) & 1) != 0) + pub fn u0_usb_usbdev_power_on_valid(&self) -> U0_USB_USBDEV_POWER_ON_VALID_R { + U0_USB_USBDEV_POWER_ON_VALID_R::new(((self.bits >> 18) & 1) != 0) } - #[doc = "Bit 19 - u0_cdn_usb_utmi_dmpulldown_sit"] + #[doc = "Bit 19 - u0_usb_utmi_dmpulldown_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_dmpulldown_sit(&self) -> U0_CDN_USB_UTMI_DMPULLDOWN_SIT_R { - U0_CDN_USB_UTMI_DMPULLDOWN_SIT_R::new(((self.bits >> 19) & 1) != 0) + pub fn u0_usb_utmi_dmpulldown_sit(&self) -> U0_USB_UTMI_DMPULLDOWN_SIT_R { + U0_USB_UTMI_DMPULLDOWN_SIT_R::new(((self.bits >> 19) & 1) != 0) } - #[doc = "Bit 20 - u0_cdn_usb_utmi_dppulldown_sit"] + #[doc = "Bit 20 - u0_usb_utmi_dppulldown_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_dppulldown_sit(&self) -> U0_CDN_USB_UTMI_DPPULLDOWN_SIT_R { - U0_CDN_USB_UTMI_DPPULLDOWN_SIT_R::new(((self.bits >> 20) & 1) != 0) + pub fn u0_usb_utmi_dppulldown_sit(&self) -> U0_USB_UTMI_DPPULLDOWN_SIT_R { + U0_USB_UTMI_DPPULLDOWN_SIT_R::new(((self.bits >> 20) & 1) != 0) } - #[doc = "Bit 21 - u0_cdn_usb_utmi_fslsserialmode_sit"] + #[doc = "Bit 21 - u0_usb_utmi_fslsserialmode_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_fslsserialmode_sit(&self) -> U0_CDN_USB_UTMI_FSLSSERIALMODE_SIT_R { - U0_CDN_USB_UTMI_FSLSSERIALMODE_SIT_R::new(((self.bits >> 21) & 1) != 0) + pub fn u0_usb_utmi_fslsserialmode_sit(&self) -> U0_USB_UTMI_FSLSSERIALMODE_SIT_R { + U0_USB_UTMI_FSLSSERIALMODE_SIT_R::new(((self.bits >> 21) & 1) != 0) } - #[doc = "Bit 22 - u0_cdn_usb_utmi_hostdisconnect_sit"] + #[doc = "Bit 22 - u0_usb_utmi_hostdisconnect_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_hostdisconnect_sit(&self) -> U0_CDN_USB_UTMI_HOSTDISCONNECT_SIT_R { - U0_CDN_USB_UTMI_HOSTDISCONNECT_SIT_R::new(((self.bits >> 22) & 1) != 0) + pub fn u0_usb_utmi_hostdisconnect_sit(&self) -> U0_USB_UTMI_HOSTDISCONNECT_SIT_R { + U0_USB_UTMI_HOSTDISCONNECT_SIT_R::new(((self.bits >> 22) & 1) != 0) } - #[doc = "Bit 23 - u0_cdn_usb_utmi_iddig_sit"] + #[doc = "Bit 23 - u0_usb_utmi_iddig_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_iddig_sit(&self) -> U0_CDN_USB_UTMI_IDDIG_SIT_R { - U0_CDN_USB_UTMI_IDDIG_SIT_R::new(((self.bits >> 23) & 1) != 0) + pub fn u0_usb_utmi_iddig_sit(&self) -> U0_USB_UTMI_IDDIG_SIT_R { + U0_USB_UTMI_IDDIG_SIT_R::new(((self.bits >> 23) & 1) != 0) } - #[doc = "Bit 24 - u0_cdn_usb_utmi_idpullup_sit"] + #[doc = "Bit 24 - u0_usb_utmi_idpullup_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_idpullup_sit(&self) -> U0_CDN_USB_UTMI_IDPULLUP_SIT_R { - U0_CDN_USB_UTMI_IDPULLUP_SIT_R::new(((self.bits >> 24) & 1) != 0) + pub fn u0_usb_utmi_idpullup_sit(&self) -> U0_USB_UTMI_IDPULLUP_SIT_R { + U0_USB_UTMI_IDPULLUP_SIT_R::new(((self.bits >> 24) & 1) != 0) } - #[doc = "Bits 25:26 - u0_cdn_usb_utmi_linestate_sit"] + #[doc = "Bits 25:26 - u0_usb_utmi_linestate_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_linestate_sit(&self) -> U0_CDN_USB_UTMI_LINESTATE_SIT_R { - U0_CDN_USB_UTMI_LINESTATE_SIT_R::new(((self.bits >> 25) & 3) as u8) + pub fn u0_usb_utmi_linestate_sit(&self) -> U0_USB_UTMI_LINESTATE_SIT_R { + U0_USB_UTMI_LINESTATE_SIT_R::new(((self.bits >> 25) & 3) as u8) } - #[doc = "Bits 27:28 - u0_cdn_usb_utmi_opmode_sit"] + #[doc = "Bits 27:28 - u0_usb_utmi_opmode_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_opmode_sit(&self) -> U0_CDN_USB_UTMI_OPMODE_SIT_R { - U0_CDN_USB_UTMI_OPMODE_SIT_R::new(((self.bits >> 27) & 3) as u8) + pub fn u0_usb_utmi_opmode_sit(&self) -> U0_USB_UTMI_OPMODE_SIT_R { + U0_USB_UTMI_OPMODE_SIT_R::new(((self.bits >> 27) & 3) as u8) } - #[doc = "Bit 29 - u0_cdn_usb_utmi_rxactive_sit"] + #[doc = "Bit 29 - u0_usb_utmi_rxactive_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_rxactive_sit(&self) -> U0_CDN_USB_UTMI_RXACTIVE_SIT_R { - U0_CDN_USB_UTMI_RXACTIVE_SIT_R::new(((self.bits >> 29) & 1) != 0) + pub fn u0_usb_utmi_rxactive_sit(&self) -> U0_USB_UTMI_RXACTIVE_SIT_R { + U0_USB_UTMI_RXACTIVE_SIT_R::new(((self.bits >> 29) & 1) != 0) } - #[doc = "Bit 30 - u0_cdn_usb_utmi_rxerror_sit"] + #[doc = "Bit 30 - u0_usb_utmi_rxerror_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_rxerror_sit(&self) -> U0_CDN_USB_UTMI_RXERROR_SIT_R { - U0_CDN_USB_UTMI_RXERROR_SIT_R::new(((self.bits >> 30) & 1) != 0) + pub fn u0_usb_utmi_rxerror_sit(&self) -> U0_USB_UTMI_RXERROR_SIT_R { + U0_USB_UTMI_RXERROR_SIT_R::new(((self.bits >> 30) & 1) != 0) } - #[doc = "Bit 31 - u0_cdn_usb_utmi_rxvalid_sit"] + #[doc = "Bit 31 - u0_usb_utmi_rxvalid_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_rxvalid_sit(&self) -> U0_CDN_USB_UTMI_RXVALID_SIT_R { - U0_CDN_USB_UTMI_RXVALID_SIT_R::new(((self.bits >> 31) & 1) != 0) + pub fn u0_usb_utmi_rxvalid_sit(&self) -> U0_USB_UTMI_RXVALID_SIT_R { + U0_USB_UTMI_RXVALID_SIT_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 2 - For software bist_test"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_self_test(&mut self) -> U0_CDN_USB_SELF_TEST_W { - U0_CDN_USB_SELF_TEST_W::new(self, 2) + pub fn u0_usb_self_test(&mut self) -> U0_USB_SELF_TEST_W { + U0_USB_SELF_TEST_W::new(self, 2) } - #[doc = "Bit 9 - u0_cdn_usb_usbdev_main_power_off_req"] + #[doc = "Bit 9 - u0_usb_usbdev_main_power_off_req"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_usbdev_main_power_off_req( + pub fn u0_usb_usbdev_main_power_off_req( &mut self, - ) -> U0_CDN_USB_USBDEV_MAIN_POWER_OFF_REQ_W { - U0_CDN_USB_USBDEV_MAIN_POWER_OFF_REQ_W::new(self, 9) + ) -> U0_USB_USBDEV_MAIN_POWER_OFF_REQ_W { + U0_USB_USBDEV_MAIN_POWER_OFF_REQ_W::new(self, 9) } - #[doc = "Bit 12 - u0_cdn_usb_usbdev_main_power_on_valid"] + #[doc = "Bit 12 - u0_usb_usbdev_main_power_on_valid"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_usbdev_main_power_on_valid( + pub fn u0_usb_usbdev_main_power_on_valid( &mut self, - ) -> U0_CDN_USB_USBDEV_MAIN_POWER_ON_VALID_W { - U0_CDN_USB_USBDEV_MAIN_POWER_ON_VALID_W::new(self, 12) + ) -> U0_USB_USBDEV_MAIN_POWER_ON_VALID_W { + U0_USB_USBDEV_MAIN_POWER_ON_VALID_W::new(self, 12) } - #[doc = "Bit 15 - u0_cdn_usb_usbdev_power_off_req"] + #[doc = "Bit 15 - u0_usb_usbdev_power_off_req"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_usbdev_power_off_req( + pub fn u0_usb_usbdev_power_off_req( &mut self, - ) -> U0_CDN_USB_USBDEV_POWER_OFF_REQ_W { - U0_CDN_USB_USBDEV_POWER_OFF_REQ_W::new(self, 15) + ) -> U0_USB_USBDEV_POWER_OFF_REQ_W { + U0_USB_USBDEV_POWER_OFF_REQ_W::new(self, 15) } - #[doc = "Bit 18 - u0_cdn_usb_usbdev_power_on_valid"] + #[doc = "Bit 18 - u0_usb_usbdev_power_on_valid"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_usbdev_power_on_valid( + pub fn u0_usb_usbdev_power_on_valid( &mut self, - ) -> U0_CDN_USB_USBDEV_POWER_ON_VALID_W { - U0_CDN_USB_USBDEV_POWER_ON_VALID_W::new(self, 18) + ) -> U0_USB_USBDEV_POWER_ON_VALID_W { + U0_USB_USBDEV_POWER_ON_VALID_W::new(self, 18) } - #[doc = "Bit 19 - u0_cdn_usb_utmi_dmpulldown_sit"] + #[doc = "Bit 19 - u0_usb_utmi_dmpulldown_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_dmpulldown_sit( + pub fn u0_usb_utmi_dmpulldown_sit( &mut self, - ) -> U0_CDN_USB_UTMI_DMPULLDOWN_SIT_W { - U0_CDN_USB_UTMI_DMPULLDOWN_SIT_W::new(self, 19) + ) -> U0_USB_UTMI_DMPULLDOWN_SIT_W { + U0_USB_UTMI_DMPULLDOWN_SIT_W::new(self, 19) } - #[doc = "Bit 20 - u0_cdn_usb_utmi_dppulldown_sit"] + #[doc = "Bit 20 - u0_usb_utmi_dppulldown_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_dppulldown_sit( + pub fn u0_usb_utmi_dppulldown_sit( &mut self, - ) -> U0_CDN_USB_UTMI_DPPULLDOWN_SIT_W { - U0_CDN_USB_UTMI_DPPULLDOWN_SIT_W::new(self, 20) + ) -> U0_USB_UTMI_DPPULLDOWN_SIT_W { + U0_USB_UTMI_DPPULLDOWN_SIT_W::new(self, 20) } - #[doc = "Bit 21 - u0_cdn_usb_utmi_fslsserialmode_sit"] + #[doc = "Bit 21 - u0_usb_utmi_fslsserialmode_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_fslsserialmode_sit( + pub fn u0_usb_utmi_fslsserialmode_sit( &mut self, - ) -> U0_CDN_USB_UTMI_FSLSSERIALMODE_SIT_W { - U0_CDN_USB_UTMI_FSLSSERIALMODE_SIT_W::new(self, 21) + ) -> U0_USB_UTMI_FSLSSERIALMODE_SIT_W { + U0_USB_UTMI_FSLSSERIALMODE_SIT_W::new(self, 21) } - #[doc = "Bit 24 - u0_cdn_usb_utmi_idpullup_sit"] + #[doc = "Bit 24 - u0_usb_utmi_idpullup_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_idpullup_sit( - &mut self, - ) -> U0_CDN_USB_UTMI_IDPULLUP_SIT_W { - U0_CDN_USB_UTMI_IDPULLUP_SIT_W::new(self, 24) + pub fn u0_usb_utmi_idpullup_sit(&mut self) -> U0_USB_UTMI_IDPULLUP_SIT_W { + U0_USB_UTMI_IDPULLUP_SIT_W::new(self, 24) } - #[doc = "Bits 27:28 - u0_cdn_usb_utmi_opmode_sit"] + #[doc = "Bits 27:28 - u0_usb_utmi_opmode_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_opmode_sit( - &mut self, - ) -> U0_CDN_USB_UTMI_OPMODE_SIT_W { - U0_CDN_USB_UTMI_OPMODE_SIT_W::new(self, 27) + pub fn u0_usb_utmi_opmode_sit(&mut self) -> U0_USB_UTMI_OPMODE_SIT_W { + U0_USB_UTMI_OPMODE_SIT_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_20.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_20.rs index ec7d4ba..e8aa053 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_20.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_20.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_20` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_95_64` reader - u0_plda_pcie_axi4_mst0_aratomop_95_64"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_95_64_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_95_64` reader - u0_pcie_axi4_mst0_aratomop_95_64"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_95_64_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_95_64"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_95_64"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_95_64(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_95_64_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_95_64_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_95_64(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_95_64_R { + U0_PCIE_AXI4_MST0_ARATOMOP_95_64_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_200.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_200.rs index 10befbf..e0d3688 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_200.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_200.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_200` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_63_32` reader - u1_plda_pcie_test_out_bridge_63_32"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_63_32` writer - u1_plda_pcie_test_out_bridge_63_32"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_63_32` reader - u1_pcie_test_out_bridge_63_32"] +pub type U1_PCIE_TEST_OUT_BRIDGE_63_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_63_32` writer - u1_pcie_test_out_bridge_63_32"] +pub type U1_PCIE_TEST_OUT_BRIDGE_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_63_32"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_63_32"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_63_32(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_63_32(&self) -> U1_PCIE_TEST_OUT_BRIDGE_63_32_R { + U1_PCIE_TEST_OUT_BRIDGE_63_32_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_63_32"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_63_32"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_63_32( + pub fn u1_pcie_test_out_bridge_63_32( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_63_32_W { + U1_PCIE_TEST_OUT_BRIDGE_63_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_201.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_201.rs index 852cd72..1ecd6dc 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_201.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_201.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_201` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_95_64` reader - u1_plda_pcie_test_out_bridge_95_64"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_95_64` writer - u1_plda_pcie_test_out_bridge_95_64"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_95_64` reader - u1_pcie_test_out_bridge_95_64"] +pub type U1_PCIE_TEST_OUT_BRIDGE_95_64_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_95_64` writer - u1_pcie_test_out_bridge_95_64"] +pub type U1_PCIE_TEST_OUT_BRIDGE_95_64_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_95_64"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_95_64"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_95_64(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_95_64(&self) -> U1_PCIE_TEST_OUT_BRIDGE_95_64_R { + U1_PCIE_TEST_OUT_BRIDGE_95_64_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_95_64"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_95_64"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_95_64( + pub fn u1_pcie_test_out_bridge_95_64( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_95_64_W { + U1_PCIE_TEST_OUT_BRIDGE_95_64_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_202.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_202.rs index e2132af..e6d489d 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_202.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_202.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_202` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_127_96` reader - u1_plda_pcie_test_out_bridge_127_96"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_127_96` writer - u1_plda_pcie_test_out_bridge_127_96"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_127_96` reader - u1_pcie_test_out_bridge_127_96"] +pub type U1_PCIE_TEST_OUT_BRIDGE_127_96_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_127_96` writer - u1_pcie_test_out_bridge_127_96"] +pub type U1_PCIE_TEST_OUT_BRIDGE_127_96_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_127_96"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_127_96"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_127_96(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_127_96(&self) -> U1_PCIE_TEST_OUT_BRIDGE_127_96_R { + U1_PCIE_TEST_OUT_BRIDGE_127_96_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_127_96"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_127_96"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_127_96( + pub fn u1_pcie_test_out_bridge_127_96( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_127_96_W { + U1_PCIE_TEST_OUT_BRIDGE_127_96_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_203.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_203.rs index 91cdc15..ae6c56e 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_203.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_203.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_203` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_159_128` reader - u1_plda_pcie_test_out_bridge_159_128"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_159_128` writer - u1_plda_pcie_test_out_bridge_159_128"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_159_128` reader - u1_pcie_test_out_bridge_159_128"] +pub type U1_PCIE_TEST_OUT_BRIDGE_159_128_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_159_128` writer - u1_pcie_test_out_bridge_159_128"] +pub type U1_PCIE_TEST_OUT_BRIDGE_159_128_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_159_128"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_159_128"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_159_128(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_159_128(&self) -> U1_PCIE_TEST_OUT_BRIDGE_159_128_R { + U1_PCIE_TEST_OUT_BRIDGE_159_128_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_159_128"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_159_128"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_159_128( + pub fn u1_pcie_test_out_bridge_159_128( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_159_128_W { + U1_PCIE_TEST_OUT_BRIDGE_159_128_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_204.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_204.rs index 82b540e..d2c0ff9 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_204.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_204.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_204` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_191_160` reader - u1_plda_pcie_test_out_bridge_191_160"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_191_160` writer - u1_plda_pcie_test_out_bridge_191_160"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_191_160` reader - u1_pcie_test_out_bridge_191_160"] +pub type U1_PCIE_TEST_OUT_BRIDGE_191_160_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_191_160` writer - u1_pcie_test_out_bridge_191_160"] +pub type U1_PCIE_TEST_OUT_BRIDGE_191_160_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_191_160"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_191_160"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_191_160(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_191_160(&self) -> U1_PCIE_TEST_OUT_BRIDGE_191_160_R { + U1_PCIE_TEST_OUT_BRIDGE_191_160_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_191_160"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_191_160"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_191_160( + pub fn u1_pcie_test_out_bridge_191_160( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_191_160_W { + U1_PCIE_TEST_OUT_BRIDGE_191_160_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_205.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_205.rs index 871e7d3..2c69e0b 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_205.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_205.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_205` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_223_192` reader - u1_plda_pcie_test_out_bridge_223_192"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_223_192` writer - u1_plda_pcie_test_out_bridge_223_192"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_223_192` reader - u1_pcie_test_out_bridge_223_192"] +pub type U1_PCIE_TEST_OUT_BRIDGE_223_192_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_223_192` writer - u1_pcie_test_out_bridge_223_192"] +pub type U1_PCIE_TEST_OUT_BRIDGE_223_192_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_223_192"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_223_192"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_223_192(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_223_192(&self) -> U1_PCIE_TEST_OUT_BRIDGE_223_192_R { + U1_PCIE_TEST_OUT_BRIDGE_223_192_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_223_192"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_223_192"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_223_192( + pub fn u1_pcie_test_out_bridge_223_192( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_223_192_W { + U1_PCIE_TEST_OUT_BRIDGE_223_192_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_206.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_206.rs index b926deb..0a365a8 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_206.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_206.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_206` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_255_224` reader - u1_plda_pcie_test_out_bridge_255_224"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_255_224` writer - u1_plda_pcie_test_out_bridge_255_224"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_255_224` reader - u1_pcie_test_out_bridge_255_224"] +pub type U1_PCIE_TEST_OUT_BRIDGE_255_224_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_255_224` writer - u1_pcie_test_out_bridge_255_224"] +pub type U1_PCIE_TEST_OUT_BRIDGE_255_224_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_255_224"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_255_224"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_255_224(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_255_224(&self) -> U1_PCIE_TEST_OUT_BRIDGE_255_224_R { + U1_PCIE_TEST_OUT_BRIDGE_255_224_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_255_224"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_255_224"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_255_224( + pub fn u1_pcie_test_out_bridge_255_224( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_255_224_W { + U1_PCIE_TEST_OUT_BRIDGE_255_224_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_207.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_207.rs index c18add1..662e9c9 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_207.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_207.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_207` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_287_256` reader - u1_plda_pcie_test_out_bridge_287_256"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_287_256` writer - u1_plda_pcie_test_out_bridge_287_256"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_287_256` reader - u1_pcie_test_out_bridge_287_256"] +pub type U1_PCIE_TEST_OUT_BRIDGE_287_256_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_287_256` writer - u1_pcie_test_out_bridge_287_256"] +pub type U1_PCIE_TEST_OUT_BRIDGE_287_256_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_287_256"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_287_256"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_287_256(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_287_256(&self) -> U1_PCIE_TEST_OUT_BRIDGE_287_256_R { + U1_PCIE_TEST_OUT_BRIDGE_287_256_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_287_256"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_287_256"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_287_256( + pub fn u1_pcie_test_out_bridge_287_256( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_287_256_W { + U1_PCIE_TEST_OUT_BRIDGE_287_256_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_208.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_208.rs index 7fc8221..4e4ab4e 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_208.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_208.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_208` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_319_288` reader - u1_plda_pcie_test_out_bridge_319_288"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_319_288` writer - u1_plda_pcie_test_out_bridge_319_288"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_319_288` reader - u1_pcie_test_out_bridge_319_288"] +pub type U1_PCIE_TEST_OUT_BRIDGE_319_288_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_319_288` writer - u1_pcie_test_out_bridge_319_288"] +pub type U1_PCIE_TEST_OUT_BRIDGE_319_288_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_319_288"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_319_288"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_319_288(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_319_288(&self) -> U1_PCIE_TEST_OUT_BRIDGE_319_288_R { + U1_PCIE_TEST_OUT_BRIDGE_319_288_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_319_288"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_319_288"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_319_288( + pub fn u1_pcie_test_out_bridge_319_288( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_319_288_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_319_288_W { + U1_PCIE_TEST_OUT_BRIDGE_319_288_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_209.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_209.rs index 35144be..674c45b 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_209.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_209.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_209` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_351_320` reader - u1_plda_pcie_test_out_bridge_351_320"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_351_320` writer - u1_plda_pcie_test_out_bridge_351_320"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_351_320` reader - u1_pcie_test_out_bridge_351_320"] +pub type U1_PCIE_TEST_OUT_BRIDGE_351_320_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_351_320` writer - u1_pcie_test_out_bridge_351_320"] +pub type U1_PCIE_TEST_OUT_BRIDGE_351_320_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_351_320"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_351_320"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_351_320(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_351_320(&self) -> U1_PCIE_TEST_OUT_BRIDGE_351_320_R { + U1_PCIE_TEST_OUT_BRIDGE_351_320_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_351_320"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_351_320"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_351_320( + pub fn u1_pcie_test_out_bridge_351_320( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_351_320_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_351_320_W { + U1_PCIE_TEST_OUT_BRIDGE_351_320_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_21.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_21.rs index fb9cbc3..4111c2c 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_21.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_21.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_21` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_127_96` reader - u0_plda_pcie_axi4_mst0_aratomop_127_96"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_127_96_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_127_96` reader - u0_pcie_axi4_mst0_aratomop_127_96"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_127_96_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_127_96"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_127_96"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_127_96( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_127_96_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_127_96_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_127_96(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_127_96_R { + U0_PCIE_AXI4_MST0_ARATOMOP_127_96_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_210.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_210.rs index a764235..328f957 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_210.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_210.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_210` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_383_352` reader - u1_plda_pcie_test_out_bridge_383_352"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_383_352` writer - u1_plda_pcie_test_out_bridge_383_352"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_383_352` reader - u1_pcie_test_out_bridge_383_352"] +pub type U1_PCIE_TEST_OUT_BRIDGE_383_352_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_383_352` writer - u1_pcie_test_out_bridge_383_352"] +pub type U1_PCIE_TEST_OUT_BRIDGE_383_352_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_383_352"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_383_352"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_383_352(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_383_352(&self) -> U1_PCIE_TEST_OUT_BRIDGE_383_352_R { + U1_PCIE_TEST_OUT_BRIDGE_383_352_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_383_352"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_383_352"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_383_352( + pub fn u1_pcie_test_out_bridge_383_352( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_383_352_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_383_352_W { + U1_PCIE_TEST_OUT_BRIDGE_383_352_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_211.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_211.rs index ed1d43e..cc516f1 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_211.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_211.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_211` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_415_384` reader - u1_plda_pcie_test_out_bridge_415_384"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_415_384` writer - u1_plda_pcie_test_out_bridge_415_384"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_415_384` reader - u1_pcie_test_out_bridge_415_384"] +pub type U1_PCIE_TEST_OUT_BRIDGE_415_384_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_415_384` writer - u1_pcie_test_out_bridge_415_384"] +pub type U1_PCIE_TEST_OUT_BRIDGE_415_384_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_415_384"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_415_384"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_415_384(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_415_384(&self) -> U1_PCIE_TEST_OUT_BRIDGE_415_384_R { + U1_PCIE_TEST_OUT_BRIDGE_415_384_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_415_384"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_415_384"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_415_384( + pub fn u1_pcie_test_out_bridge_415_384( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_415_384_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_415_384_W { + U1_PCIE_TEST_OUT_BRIDGE_415_384_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_212.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_212.rs index 1c5f014..a90d1ab 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_212.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_212.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_212` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_447_416` reader - u1_plda_pcie_test_out_bridge_447_416"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_447_416` writer - u1_plda_pcie_test_out_bridge_447_416"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_447_416` reader - u1_pcie_test_out_bridge_447_416"] +pub type U1_PCIE_TEST_OUT_BRIDGE_447_416_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_447_416` writer - u1_pcie_test_out_bridge_447_416"] +pub type U1_PCIE_TEST_OUT_BRIDGE_447_416_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_447_416"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_447_416"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_447_416(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_447_416(&self) -> U1_PCIE_TEST_OUT_BRIDGE_447_416_R { + U1_PCIE_TEST_OUT_BRIDGE_447_416_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_447_416"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_447_416"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_447_416( + pub fn u1_pcie_test_out_bridge_447_416( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_447_416_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_447_416_W { + U1_PCIE_TEST_OUT_BRIDGE_447_416_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_213.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_213.rs index bdedeef..dded075 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_213.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_213.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_213` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_479_448` reader - u1_plda_pcie_test_out_bridge_479_448"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_479_448` writer - u1_plda_pcie_test_out_bridge_479_448"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_479_448` reader - u1_pcie_test_out_bridge_479_448"] +pub type U1_PCIE_TEST_OUT_BRIDGE_479_448_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_479_448` writer - u1_pcie_test_out_bridge_479_448"] +pub type U1_PCIE_TEST_OUT_BRIDGE_479_448_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_479_448"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_479_448"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_479_448(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_479_448(&self) -> U1_PCIE_TEST_OUT_BRIDGE_479_448_R { + U1_PCIE_TEST_OUT_BRIDGE_479_448_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_479_448"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_479_448"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_479_448( + pub fn u1_pcie_test_out_bridge_479_448( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_479_448_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_479_448_W { + U1_PCIE_TEST_OUT_BRIDGE_479_448_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_214.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_214.rs index 02473ea..cbeeb6b 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_214.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_214.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_214` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_bridge_511_480` reader - u1_plda_pcie_test_out_bridge_511_480"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_out_bridge_511_480` writer - u1_plda_pcie_test_out_bridge_511_480"] -pub type U1_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u1_pcie_test_out_bridge_511_480` reader - u1_pcie_test_out_bridge_511_480"] +pub type U1_PCIE_TEST_OUT_BRIDGE_511_480_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_bridge_511_480` writer - u1_pcie_test_out_bridge_511_480"] +pub type U1_PCIE_TEST_OUT_BRIDGE_511_480_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_511_480"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_511_480"] #[inline(always)] - pub fn u1_plda_pcie_test_out_bridge_511_480(&self) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_R { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_R::new(self.bits) + pub fn u1_pcie_test_out_bridge_511_480(&self) -> U1_PCIE_TEST_OUT_BRIDGE_511_480_R { + U1_PCIE_TEST_OUT_BRIDGE_511_480_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_bridge_511_480"] + #[doc = "Bits 0:31 - u1_pcie_test_out_bridge_511_480"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_out_bridge_511_480( + pub fn u1_pcie_test_out_bridge_511_480( &mut self, - ) -> U1_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_W { - U1_PLDA_PCIE_TEST_OUT_BRIDGE_511_480_W::new(self, 0) + ) -> U1_PCIE_TEST_OUT_BRIDGE_511_480_W { + U1_PCIE_TEST_OUT_BRIDGE_511_480_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_215.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_215.rs index 2ae03da..64eeb93 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_215.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_215.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_215` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_31_0` reader - u1_plda_pcie_test_out_pcie_31_0"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_31_0_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_31_0` reader - u1_pcie_test_out_pcie_31_0"] +pub type U1_PCIE_TEST_OUT_PCIE_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_31_0"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_31_0"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_31_0(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_31_0_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_31_0_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_31_0(&self) -> U1_PCIE_TEST_OUT_PCIE_31_0_R { + U1_PCIE_TEST_OUT_PCIE_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_216.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_216.rs index 544c9dd..3dbaa3b 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_216.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_216.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_216` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_63_32` reader - u1_plda_pcie_test_out_pcie_63_32"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_63_32_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_63_32` reader - u1_pcie_test_out_pcie_63_32"] +pub type U1_PCIE_TEST_OUT_PCIE_63_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_63_32"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_63_32"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_63_32(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_63_32_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_63_32_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_63_32(&self) -> U1_PCIE_TEST_OUT_PCIE_63_32_R { + U1_PCIE_TEST_OUT_PCIE_63_32_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_217.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_217.rs index 650720f..04e096e 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_217.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_217.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_217` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_95_64` reader - u1_plda_pcie_test_out_pcie_95_64"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_95_64_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_95_64` reader - u1_pcie_test_out_pcie_95_64"] +pub type U1_PCIE_TEST_OUT_PCIE_95_64_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_95_64"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_95_64"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_95_64(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_95_64_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_95_64_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_95_64(&self) -> U1_PCIE_TEST_OUT_PCIE_95_64_R { + U1_PCIE_TEST_OUT_PCIE_95_64_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_218.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_218.rs index 8bc6000..729c38c 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_218.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_218.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_218` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_127_96` reader - u1_plda_pcie_test_out_pcie_127_96"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_127_96_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_127_96` reader - u1_pcie_test_out_pcie_127_96"] +pub type U1_PCIE_TEST_OUT_PCIE_127_96_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_127_96"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_127_96"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_127_96(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_127_96_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_127_96_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_127_96(&self) -> U1_PCIE_TEST_OUT_PCIE_127_96_R { + U1_PCIE_TEST_OUT_PCIE_127_96_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_219.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_219.rs index 63807fe..2ceda44 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_219.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_219.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_219` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_159_128` reader - u1_plda_pcie_test_out_pcie_159_128"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_159_128_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_159_128` reader - u1_pcie_test_out_pcie_159_128"] +pub type U1_PCIE_TEST_OUT_PCIE_159_128_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_159_128"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_159_128"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_159_128(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_159_128_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_159_128_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_159_128(&self) -> U1_PCIE_TEST_OUT_PCIE_159_128_R { + U1_PCIE_TEST_OUT_PCIE_159_128_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_22.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_22.rs index 606c1e3..8559726 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_22.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_22.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_22` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_159_128` reader - u0_plda_pcie_axi4_mst0_aratomop_159_128"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_159_128_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_159_128` reader - u0_pcie_axi4_mst0_aratomop_159_128"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_159_128_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_159_128"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_159_128"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_159_128( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_159_128_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_159_128_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_159_128(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_159_128_R { + U0_PCIE_AXI4_MST0_ARATOMOP_159_128_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_220.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_220.rs index c8b1025..de5f513 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_220.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_220.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_220` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_191_160` reader - u1_plda_pcie_test_out_pcie_191_160"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_191_160_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_191_160` reader - u1_pcie_test_out_pcie_191_160"] +pub type U1_PCIE_TEST_OUT_PCIE_191_160_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_191_160"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_191_160"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_191_160(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_191_160_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_191_160_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_191_160(&self) -> U1_PCIE_TEST_OUT_PCIE_191_160_R { + U1_PCIE_TEST_OUT_PCIE_191_160_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_221.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_221.rs index fbabe56..98d4a76 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_221.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_221.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_221` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_223_192` reader - u1_plda_pcie_test_out_pcie_223_192"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_223_192_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_223_192` reader - u1_pcie_test_out_pcie_223_192"] +pub type U1_PCIE_TEST_OUT_PCIE_223_192_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_223_192"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_223_192"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_223_192(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_223_192_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_223_192_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_223_192(&self) -> U1_PCIE_TEST_OUT_PCIE_223_192_R { + U1_PCIE_TEST_OUT_PCIE_223_192_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_222.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_222.rs index 8852283..54cf1f4 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_222.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_222.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_222` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_255_224` reader - u1_plda_pcie_test_out_pcie_255_224"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_255_224_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_255_224` reader - u1_pcie_test_out_pcie_255_224"] +pub type U1_PCIE_TEST_OUT_PCIE_255_224_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_255_224"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_255_224"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_255_224(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_255_224_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_255_224_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_255_224(&self) -> U1_PCIE_TEST_OUT_PCIE_255_224_R { + U1_PCIE_TEST_OUT_PCIE_255_224_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_223.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_223.rs index c18cd40..96a3aa3 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_223.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_223.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_223` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_287_256` reader - u1_plda_pcie_test_out_pcie_287_256"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_287_256_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_287_256` reader - u1_pcie_test_out_pcie_287_256"] +pub type U1_PCIE_TEST_OUT_PCIE_287_256_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_287_256"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_287_256"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_287_256(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_287_256_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_287_256_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_287_256(&self) -> U1_PCIE_TEST_OUT_PCIE_287_256_R { + U1_PCIE_TEST_OUT_PCIE_287_256_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_224.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_224.rs index d7ccde7..c86d684 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_224.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_224.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_224` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_319_288` reader - u1_plda_pcie_test_out_pcie_319_288"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_319_288_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_319_288` reader - u1_pcie_test_out_pcie_319_288"] +pub type U1_PCIE_TEST_OUT_PCIE_319_288_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_319_288"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_319_288"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_319_288(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_319_288_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_319_288_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_319_288(&self) -> U1_PCIE_TEST_OUT_PCIE_319_288_R { + U1_PCIE_TEST_OUT_PCIE_319_288_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_225.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_225.rs index 341e390..bf24932 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_225.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_225.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_225` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_351_320` reader - u1_plda_pcie_test_out_pcie_351_320"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_351_320_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_351_320` reader - u1_pcie_test_out_pcie_351_320"] +pub type U1_PCIE_TEST_OUT_PCIE_351_320_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_351_320"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_351_320"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_351_320(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_351_320_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_351_320_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_351_320(&self) -> U1_PCIE_TEST_OUT_PCIE_351_320_R { + U1_PCIE_TEST_OUT_PCIE_351_320_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_226.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_226.rs index cc3423a..d2105f6 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_226.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_226.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_226` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_383_352` reader - u1_plda_pcie_test_out_pcie_383_352"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_383_352_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_383_352` reader - u1_pcie_test_out_pcie_383_352"] +pub type U1_PCIE_TEST_OUT_PCIE_383_352_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_383_352"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_383_352"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_383_352(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_383_352_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_383_352_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_383_352(&self) -> U1_PCIE_TEST_OUT_PCIE_383_352_R { + U1_PCIE_TEST_OUT_PCIE_383_352_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_227.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_227.rs index 5a0d794..0ab17f0 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_227.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_227.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_227` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_415_384` reader - u1_plda_pcie_test_out_pcie_415_384"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_415_384_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_415_384` reader - u1_pcie_test_out_pcie_415_384"] +pub type U1_PCIE_TEST_OUT_PCIE_415_384_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_415_384"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_415_384"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_415_384(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_415_384_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_415_384_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_415_384(&self) -> U1_PCIE_TEST_OUT_PCIE_415_384_R { + U1_PCIE_TEST_OUT_PCIE_415_384_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_228.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_228.rs index 1a3095c..7949674 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_228.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_228.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_228` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_447_416` reader - u1_plda_pcie_test_out_pcie_447_416"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_447_416_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_447_416` reader - u1_pcie_test_out_pcie_447_416"] +pub type U1_PCIE_TEST_OUT_PCIE_447_416_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_447_416"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_447_416"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_447_416(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_447_416_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_447_416_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_447_416(&self) -> U1_PCIE_TEST_OUT_PCIE_447_416_R { + U1_PCIE_TEST_OUT_PCIE_447_416_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_229.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_229.rs index ca5e408..cca2dd0 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_229.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_229.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_229` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_479_448` reader - u1_plda_pcie_test_out_pcie_479_448"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_479_448_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_479_448` reader - u1_pcie_test_out_pcie_479_448"] +pub type U1_PCIE_TEST_OUT_PCIE_479_448_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_479_448"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_479_448"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_479_448(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_479_448_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_479_448_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_479_448(&self) -> U1_PCIE_TEST_OUT_PCIE_479_448_R { + U1_PCIE_TEST_OUT_PCIE_479_448_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_23.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_23.rs index ae6f668..fa87403 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_23.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_23.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_23` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_191_160` reader - u0_plda_pcie_axi4_mst0_aratomop_191_160"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_191_160_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_191_160` reader - u0_pcie_axi4_mst0_aratomop_191_160"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_191_160_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_191_160"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_191_160"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_191_160( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_191_160_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_191_160_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_191_160(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_191_160_R { + U0_PCIE_AXI4_MST0_ARATOMOP_191_160_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_230.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_230.rs index 3fffa00..040b921 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_230.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_230.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_230` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_out_pcie_511_480` reader - u1_plda_pcie_test_out_pcie_511_480"] -pub type U1_PLDA_PCIE_TEST_OUT_PCIE_511_480_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_out_pcie_511_480` reader - u1_pcie_test_out_pcie_511_480"] +pub type U1_PCIE_TEST_OUT_PCIE_511_480_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u1_plda_pcie_test_out_pcie_511_480"] + #[doc = "Bits 0:31 - u1_pcie_test_out_pcie_511_480"] #[inline(always)] - pub fn u1_plda_pcie_test_out_pcie_511_480(&self) -> U1_PLDA_PCIE_TEST_OUT_PCIE_511_480_R { - U1_PLDA_PCIE_TEST_OUT_PCIE_511_480_R::new(self.bits) + pub fn u1_pcie_test_out_pcie_511_480(&self) -> U1_PCIE_TEST_OUT_PCIE_511_480_R { + U1_PCIE_TEST_OUT_PCIE_511_480_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_231.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_231.rs index f1141e8..ebe8587 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_231.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_231.rs @@ -2,40 +2,38 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_231` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_test_sel` reader - u1_plda_pcie_test_sel"] -pub type U1_PLDA_PCIE_TEST_SEL_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_test_sel` writer - u1_plda_pcie_test_sel"] -pub type U1_PLDA_PCIE_TEST_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `u1_plda_pcie_tl_clock_freq` reader - u1_plda_pcie_tl_clock_freq"] -pub type U1_PLDA_PCIE_TL_CLOCK_FREQ_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_tl_clock_freq` writer - u1_plda_pcie_tl_clock_freq"] -pub type U1_PLDA_PCIE_TL_CLOCK_FREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>; +#[doc = "Field `u1_pcie_test_sel` reader - u1_pcie_test_sel"] +pub type U1_PCIE_TEST_SEL_R = crate::FieldReader; +#[doc = "Field `u1_pcie_test_sel` writer - u1_pcie_test_sel"] +pub type U1_PCIE_TEST_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `u1_pcie_tl_clock_freq` reader - u1_pcie_tl_clock_freq"] +pub type U1_PCIE_TL_CLOCK_FREQ_R = crate::FieldReader; +#[doc = "Field `u1_pcie_tl_clock_freq` writer - u1_pcie_tl_clock_freq"] +pub type U1_PCIE_TL_CLOCK_FREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>; impl R { - #[doc = "Bits 0:3 - u1_plda_pcie_test_sel"] + #[doc = "Bits 0:3 - u1_pcie_test_sel"] #[inline(always)] - pub fn u1_plda_pcie_test_sel(&self) -> U1_PLDA_PCIE_TEST_SEL_R { - U1_PLDA_PCIE_TEST_SEL_R::new((self.bits & 0x0f) as u8) + pub fn u1_pcie_test_sel(&self) -> U1_PCIE_TEST_SEL_R { + U1_PCIE_TEST_SEL_R::new((self.bits & 0x0f) as u8) } - #[doc = "Bits 4:25 - u1_plda_pcie_tl_clock_freq"] + #[doc = "Bits 4:25 - u1_pcie_tl_clock_freq"] #[inline(always)] - pub fn u1_plda_pcie_tl_clock_freq(&self) -> U1_PLDA_PCIE_TL_CLOCK_FREQ_R { - U1_PLDA_PCIE_TL_CLOCK_FREQ_R::new((self.bits >> 4) & 0x003f_ffff) + pub fn u1_pcie_tl_clock_freq(&self) -> U1_PCIE_TL_CLOCK_FREQ_R { + U1_PCIE_TL_CLOCK_FREQ_R::new((self.bits >> 4) & 0x003f_ffff) } } impl W { - #[doc = "Bits 0:3 - u1_plda_pcie_test_sel"] + #[doc = "Bits 0:3 - u1_pcie_test_sel"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_test_sel(&mut self) -> U1_PLDA_PCIE_TEST_SEL_W { - U1_PLDA_PCIE_TEST_SEL_W::new(self, 0) + pub fn u1_pcie_test_sel(&mut self) -> U1_PCIE_TEST_SEL_W { + U1_PCIE_TEST_SEL_W::new(self, 0) } - #[doc = "Bits 4:25 - u1_plda_pcie_tl_clock_freq"] + #[doc = "Bits 4:25 - u1_pcie_tl_clock_freq"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_tl_clock_freq( - &mut self, - ) -> U1_PLDA_PCIE_TL_CLOCK_FREQ_W { - U1_PLDA_PCIE_TL_CLOCK_FREQ_W::new(self, 4) + pub fn u1_pcie_tl_clock_freq(&mut self) -> U1_PCIE_TL_CLOCK_FREQ_W { + U1_PCIE_TL_CLOCK_FREQ_W::new(self, 4) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_232.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_232.rs index 8145114..7c171a6 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_232.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_232.rs @@ -2,32 +2,32 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_232` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_tl_ctrl_hotplug` reader - u1_plda_pcie_tl_ctrl_hotplug"] -pub type U1_PLDA_PCIE_TL_CTRL_HOTPLUG_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_tl_report_hotplug` reader - u1_plda_pcie_tl_report_hotplug"] -pub type U1_PLDA_PCIE_TL_REPORT_HOTPLUG_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_tl_report_hotplug` writer - u1_plda_pcie_tl_report_hotplug"] -pub type U1_PLDA_PCIE_TL_REPORT_HOTPLUG_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +#[doc = "Field `u1_pcie_tl_ctrl_hotplug` reader - u1_pcie_tl_ctrl_hotplug"] +pub type U1_PCIE_TL_CTRL_HOTPLUG_R = crate::FieldReader; +#[doc = "Field `u1_pcie_tl_report_hotplug` reader - u1_pcie_tl_report_hotplug"] +pub type U1_PCIE_TL_REPORT_HOTPLUG_R = crate::FieldReader; +#[doc = "Field `u1_pcie_tl_report_hotplug` writer - u1_pcie_tl_report_hotplug"] +pub type U1_PCIE_TL_REPORT_HOTPLUG_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { - #[doc = "Bits 0:15 - u1_plda_pcie_tl_ctrl_hotplug"] + #[doc = "Bits 0:15 - u1_pcie_tl_ctrl_hotplug"] #[inline(always)] - pub fn u1_plda_pcie_tl_ctrl_hotplug(&self) -> U1_PLDA_PCIE_TL_CTRL_HOTPLUG_R { - U1_PLDA_PCIE_TL_CTRL_HOTPLUG_R::new((self.bits & 0xffff) as u16) + pub fn u1_pcie_tl_ctrl_hotplug(&self) -> U1_PCIE_TL_CTRL_HOTPLUG_R { + U1_PCIE_TL_CTRL_HOTPLUG_R::new((self.bits & 0xffff) as u16) } - #[doc = "Bits 16:31 - u1_plda_pcie_tl_report_hotplug"] + #[doc = "Bits 16:31 - u1_pcie_tl_report_hotplug"] #[inline(always)] - pub fn u1_plda_pcie_tl_report_hotplug(&self) -> U1_PLDA_PCIE_TL_REPORT_HOTPLUG_R { - U1_PLDA_PCIE_TL_REPORT_HOTPLUG_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn u1_pcie_tl_report_hotplug(&self) -> U1_PCIE_TL_REPORT_HOTPLUG_R { + U1_PCIE_TL_REPORT_HOTPLUG_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { - #[doc = "Bits 16:31 - u1_plda_pcie_tl_report_hotplug"] + #[doc = "Bits 16:31 - u1_pcie_tl_report_hotplug"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_tl_report_hotplug( + pub fn u1_pcie_tl_report_hotplug( &mut self, - ) -> U1_PLDA_PCIE_TL_REPORT_HOTPLUG_W { - U1_PLDA_PCIE_TL_REPORT_HOTPLUG_W::new(self, 16) + ) -> U1_PCIE_TL_REPORT_HOTPLUG_W { + U1_PCIE_TL_REPORT_HOTPLUG_W::new(self, 16) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_233.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_233.rs index e85ba1f..9ea2d73 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_233.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_233.rs @@ -2,118 +2,112 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_233` writer"] pub type W = crate::W; -#[doc = "Field `u1_plda_pcie_tx_pattern` reader - u1_plda_pcie_tx_pattern"] -pub type U1_PLDA_PCIE_TX_PATTERN_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_tx_pattern` writer - u1_plda_pcie_tx_pattern"] -pub type U1_PLDA_PCIE_TX_PATTERN_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u1_plda_pcie_usb3_bus_width` reader - u1_plda_pcie_usb3_bus_width"] -pub type U1_PLDA_PCIE_USB3_BUS_WIDTH_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_usb3_bus_width` writer - u1_plda_pcie_usb3_bus_width"] -pub type U1_PLDA_PCIE_USB3_BUS_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u1_plda_pcie_usb3_phy_enable` reader - u1_plda_pcie_usb3_phy_enable"] -pub type U1_PLDA_PCIE_USB3_PHY_ENABLE_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_usb3_phy_enable` writer - u1_plda_pcie_usb3_phy_enable"] -pub type U1_PLDA_PCIE_USB3_PHY_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_usb3_rate` reader - u1_plda_pcie_usb3_rate"] -pub type U1_PLDA_PCIE_USB3_RATE_R = crate::FieldReader; -#[doc = "Field `u1_plda_pcie_usb3_rate` writer - u1_plda_pcie_usb3_rate"] -pub type U1_PLDA_PCIE_USB3_RATE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u1_plda_pcie_usb3_rx_standby` reader - u1_plda_pcie_usb3_rx_standby"] -pub type U1_PLDA_PCIE_USB3_RX_STANDBY_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_usb3_rx_standby` writer - u1_plda_pcie_usb3_rx_standby"] -pub type U1_PLDA_PCIE_USB3_RX_STANDBY_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_xwdecerr` reader - u1_plda_pcie_xwdecerr"] -pub type U1_PLDA_PCIE_XWDECERR_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_xwerrclr` reader - u1_plda_pcie_xwerrclr"] -pub type U1_PLDA_PCIE_XWERRCLR_R = crate::BitReader; -#[doc = "Field `u1_plda_pcie_xwerrclr` writer - u1_plda_pcie_xwerrclr"] -pub type U1_PLDA_PCIE_XWERRCLR_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u1_plda_pcie_xwslverr` reader - u1_plda_pcie_xwslverr"] -pub type U1_PLDA_PCIE_XWSLVERR_R = crate::BitReader; +#[doc = "Field `u1_pcie_tx_pattern` reader - u1_pcie_tx_pattern"] +pub type U1_PCIE_TX_PATTERN_R = crate::FieldReader; +#[doc = "Field `u1_pcie_tx_pattern` writer - u1_pcie_tx_pattern"] +pub type U1_PCIE_TX_PATTERN_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u1_pcie_usb3_bus_width` reader - u1_pcie_usb3_bus_width"] +pub type U1_PCIE_USB3_BUS_WIDTH_R = crate::FieldReader; +#[doc = "Field `u1_pcie_usb3_bus_width` writer - u1_pcie_usb3_bus_width"] +pub type U1_PCIE_USB3_BUS_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u1_pcie_usb3_phy_enable` reader - u1_pcie_usb3_phy_enable"] +pub type U1_PCIE_USB3_PHY_ENABLE_R = crate::BitReader; +#[doc = "Field `u1_pcie_usb3_phy_enable` writer - u1_pcie_usb3_phy_enable"] +pub type U1_PCIE_USB3_PHY_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_usb3_rate` reader - u1_pcie_usb3_rate"] +pub type U1_PCIE_USB3_RATE_R = crate::FieldReader; +#[doc = "Field `u1_pcie_usb3_rate` writer - u1_pcie_usb3_rate"] +pub type U1_PCIE_USB3_RATE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u1_pcie_usb3_rx_standby` reader - u1_pcie_usb3_rx_standby"] +pub type U1_PCIE_USB3_RX_STANDBY_R = crate::BitReader; +#[doc = "Field `u1_pcie_usb3_rx_standby` writer - u1_pcie_usb3_rx_standby"] +pub type U1_PCIE_USB3_RX_STANDBY_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_xwdecerr` reader - u1_pcie_xwdecerr"] +pub type U1_PCIE_XWDECERR_R = crate::BitReader; +#[doc = "Field `u1_pcie_xwerrclr` reader - u1_pcie_xwerrclr"] +pub type U1_PCIE_XWERRCLR_R = crate::BitReader; +#[doc = "Field `u1_pcie_xwerrclr` writer - u1_pcie_xwerrclr"] +pub type U1_PCIE_XWERRCLR_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u1_pcie_xwslverr` reader - u1_pcie_xwslverr"] +pub type U1_PCIE_XWSLVERR_R = crate::BitReader; impl R { - #[doc = "Bits 0:1 - u1_plda_pcie_tx_pattern"] + #[doc = "Bits 0:1 - u1_pcie_tx_pattern"] #[inline(always)] - pub fn u1_plda_pcie_tx_pattern(&self) -> U1_PLDA_PCIE_TX_PATTERN_R { - U1_PLDA_PCIE_TX_PATTERN_R::new((self.bits & 3) as u8) + pub fn u1_pcie_tx_pattern(&self) -> U1_PCIE_TX_PATTERN_R { + U1_PCIE_TX_PATTERN_R::new((self.bits & 3) as u8) } - #[doc = "Bits 2:3 - u1_plda_pcie_usb3_bus_width"] + #[doc = "Bits 2:3 - u1_pcie_usb3_bus_width"] #[inline(always)] - pub fn u1_plda_pcie_usb3_bus_width(&self) -> U1_PLDA_PCIE_USB3_BUS_WIDTH_R { - U1_PLDA_PCIE_USB3_BUS_WIDTH_R::new(((self.bits >> 2) & 3) as u8) + pub fn u1_pcie_usb3_bus_width(&self) -> U1_PCIE_USB3_BUS_WIDTH_R { + U1_PCIE_USB3_BUS_WIDTH_R::new(((self.bits >> 2) & 3) as u8) } - #[doc = "Bit 4 - u1_plda_pcie_usb3_phy_enable"] + #[doc = "Bit 4 - u1_pcie_usb3_phy_enable"] #[inline(always)] - pub fn u1_plda_pcie_usb3_phy_enable(&self) -> U1_PLDA_PCIE_USB3_PHY_ENABLE_R { - U1_PLDA_PCIE_USB3_PHY_ENABLE_R::new(((self.bits >> 4) & 1) != 0) + pub fn u1_pcie_usb3_phy_enable(&self) -> U1_PCIE_USB3_PHY_ENABLE_R { + U1_PCIE_USB3_PHY_ENABLE_R::new(((self.bits >> 4) & 1) != 0) } - #[doc = "Bits 5:6 - u1_plda_pcie_usb3_rate"] + #[doc = "Bits 5:6 - u1_pcie_usb3_rate"] #[inline(always)] - pub fn u1_plda_pcie_usb3_rate(&self) -> U1_PLDA_PCIE_USB3_RATE_R { - U1_PLDA_PCIE_USB3_RATE_R::new(((self.bits >> 5) & 3) as u8) + pub fn u1_pcie_usb3_rate(&self) -> U1_PCIE_USB3_RATE_R { + U1_PCIE_USB3_RATE_R::new(((self.bits >> 5) & 3) as u8) } - #[doc = "Bit 7 - u1_plda_pcie_usb3_rx_standby"] + #[doc = "Bit 7 - u1_pcie_usb3_rx_standby"] #[inline(always)] - pub fn u1_plda_pcie_usb3_rx_standby(&self) -> U1_PLDA_PCIE_USB3_RX_STANDBY_R { - U1_PLDA_PCIE_USB3_RX_STANDBY_R::new(((self.bits >> 7) & 1) != 0) + pub fn u1_pcie_usb3_rx_standby(&self) -> U1_PCIE_USB3_RX_STANDBY_R { + U1_PCIE_USB3_RX_STANDBY_R::new(((self.bits >> 7) & 1) != 0) } - #[doc = "Bit 8 - u1_plda_pcie_xwdecerr"] + #[doc = "Bit 8 - u1_pcie_xwdecerr"] #[inline(always)] - pub fn u1_plda_pcie_xwdecerr(&self) -> U1_PLDA_PCIE_XWDECERR_R { - U1_PLDA_PCIE_XWDECERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn u1_pcie_xwdecerr(&self) -> U1_PCIE_XWDECERR_R { + U1_PCIE_XWDECERR_R::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 9 - u1_plda_pcie_xwerrclr"] + #[doc = "Bit 9 - u1_pcie_xwerrclr"] #[inline(always)] - pub fn u1_plda_pcie_xwerrclr(&self) -> U1_PLDA_PCIE_XWERRCLR_R { - U1_PLDA_PCIE_XWERRCLR_R::new(((self.bits >> 9) & 1) != 0) + pub fn u1_pcie_xwerrclr(&self) -> U1_PCIE_XWERRCLR_R { + U1_PCIE_XWERRCLR_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 10 - u1_plda_pcie_xwslverr"] + #[doc = "Bit 10 - u1_pcie_xwslverr"] #[inline(always)] - pub fn u1_plda_pcie_xwslverr(&self) -> U1_PLDA_PCIE_XWSLVERR_R { - U1_PLDA_PCIE_XWSLVERR_R::new(((self.bits >> 10) & 1) != 0) + pub fn u1_pcie_xwslverr(&self) -> U1_PCIE_XWSLVERR_R { + U1_PCIE_XWSLVERR_R::new(((self.bits >> 10) & 1) != 0) } } impl W { - #[doc = "Bits 0:1 - u1_plda_pcie_tx_pattern"] + #[doc = "Bits 0:1 - u1_pcie_tx_pattern"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_tx_pattern(&mut self) -> U1_PLDA_PCIE_TX_PATTERN_W { - U1_PLDA_PCIE_TX_PATTERN_W::new(self, 0) + pub fn u1_pcie_tx_pattern(&mut self) -> U1_PCIE_TX_PATTERN_W { + U1_PCIE_TX_PATTERN_W::new(self, 0) } - #[doc = "Bits 2:3 - u1_plda_pcie_usb3_bus_width"] + #[doc = "Bits 2:3 - u1_pcie_usb3_bus_width"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_usb3_bus_width( - &mut self, - ) -> U1_PLDA_PCIE_USB3_BUS_WIDTH_W { - U1_PLDA_PCIE_USB3_BUS_WIDTH_W::new(self, 2) + pub fn u1_pcie_usb3_bus_width(&mut self) -> U1_PCIE_USB3_BUS_WIDTH_W { + U1_PCIE_USB3_BUS_WIDTH_W::new(self, 2) } - #[doc = "Bit 4 - u1_plda_pcie_usb3_phy_enable"] + #[doc = "Bit 4 - u1_pcie_usb3_phy_enable"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_usb3_phy_enable( - &mut self, - ) -> U1_PLDA_PCIE_USB3_PHY_ENABLE_W { - U1_PLDA_PCIE_USB3_PHY_ENABLE_W::new(self, 4) + pub fn u1_pcie_usb3_phy_enable(&mut self) -> U1_PCIE_USB3_PHY_ENABLE_W { + U1_PCIE_USB3_PHY_ENABLE_W::new(self, 4) } - #[doc = "Bits 5:6 - u1_plda_pcie_usb3_rate"] + #[doc = "Bits 5:6 - u1_pcie_usb3_rate"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_usb3_rate(&mut self) -> U1_PLDA_PCIE_USB3_RATE_W { - U1_PLDA_PCIE_USB3_RATE_W::new(self, 5) + pub fn u1_pcie_usb3_rate(&mut self) -> U1_PCIE_USB3_RATE_W { + U1_PCIE_USB3_RATE_W::new(self, 5) } - #[doc = "Bit 7 - u1_plda_pcie_usb3_rx_standby"] + #[doc = "Bit 7 - u1_pcie_usb3_rx_standby"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_usb3_rx_standby( - &mut self, - ) -> U1_PLDA_PCIE_USB3_RX_STANDBY_W { - U1_PLDA_PCIE_USB3_RX_STANDBY_W::new(self, 7) + pub fn u1_pcie_usb3_rx_standby(&mut self) -> U1_PCIE_USB3_RX_STANDBY_W { + U1_PCIE_USB3_RX_STANDBY_W::new(self, 7) } - #[doc = "Bit 9 - u1_plda_pcie_xwerrclr"] + #[doc = "Bit 9 - u1_pcie_xwerrclr"] #[inline(always)] #[must_use] - pub fn u1_plda_pcie_xwerrclr(&mut self) -> U1_PLDA_PCIE_XWERRCLR_W { - U1_PLDA_PCIE_XWERRCLR_W::new(self, 9) + pub fn u1_pcie_xwerrclr(&mut self) -> U1_PCIE_XWERRCLR_W { + U1_PCIE_XWERRCLR_W::new(self, 9) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_24.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_24.rs index bce3b49..da4298c 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_24.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_24.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_24` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_223_192` reader - u0_plda_pcie_axi4_mst0_aratomop_223_192"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_223_192_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_223_192` reader - u0_pcie_axi4_mst0_aratomop_223_192"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_223_192_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_223_192"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_223_192"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_223_192( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_223_192_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_223_192_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_223_192(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_223_192_R { + U0_PCIE_AXI4_MST0_ARATOMOP_223_192_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_25.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_25.rs index 1656db0..c87ecc0 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_25.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_25.rs @@ -2,15 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_25` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_255_224` reader - u0_plda_pcie_axi4_mst0_aratomop_255_224"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_255_224_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_255_224` reader - u0_pcie_axi4_mst0_aratomop_255_224"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_255_224_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aratomop_255_224"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aratomop_255_224"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_255_224( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_255_224_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_255_224_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aratomop_255_224(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_255_224_R { + U0_PCIE_AXI4_MST0_ARATOMOP_255_224_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_26.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_26.rs index ec4babe..24f1779 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_26.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_26.rs @@ -2,29 +2,27 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_26` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aratomop_257_256` reader - u0_plda_pcie_axi4_mst0_aratomop_257_256"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_mst0_arfunc` reader - u0_plda_pcie_axi4_mst0_arfunc"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARFUNC_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_mst0_arregion` reader - u0_plda_pcie_axi4_mst0_arregion"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARREGION_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aratomop_257_256` reader - u0_pcie_axi4_mst0_aratomop_257_256"] +pub type U0_PCIE_AXI4_MST0_ARATOMOP_257_256_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_arfunc` reader - u0_pcie_axi4_mst0_arfunc"] +pub type U0_PCIE_AXI4_MST0_ARFUNC_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_arregion` reader - u0_pcie_axi4_mst0_arregion"] +pub type U0_PCIE_AXI4_MST0_ARREGION_R = crate::FieldReader; impl R { - #[doc = "Bits 0:1 - u0_plda_pcie_axi4_mst0_aratomop_257_256"] + #[doc = "Bits 0:1 - u0_pcie_axi4_mst0_aratomop_257_256"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aratomop_257_256( - &self, - ) -> U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R { - U0_PLDA_PCIE_AXI4_MST0_ARATOMOP_257_256_R::new((self.bits & 3) as u8) + pub fn u0_pcie_axi4_mst0_aratomop_257_256(&self) -> U0_PCIE_AXI4_MST0_ARATOMOP_257_256_R { + U0_PCIE_AXI4_MST0_ARATOMOP_257_256_R::new((self.bits & 3) as u8) } - #[doc = "Bits 2:16 - u0_plda_pcie_axi4_mst0_arfunc"] + #[doc = "Bits 2:16 - u0_pcie_axi4_mst0_arfunc"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_arfunc(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARFUNC_R { - U0_PLDA_PCIE_AXI4_MST0_ARFUNC_R::new(((self.bits >> 2) & 0x7fff) as u16) + pub fn u0_pcie_axi4_mst0_arfunc(&self) -> U0_PCIE_AXI4_MST0_ARFUNC_R { + U0_PCIE_AXI4_MST0_ARFUNC_R::new(((self.bits >> 2) & 0x7fff) as u16) } - #[doc = "Bits 17:20 - u0_plda_pcie_axi4_mst0_arregion"] + #[doc = "Bits 17:20 - u0_pcie_axi4_mst0_arregion"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_arregion(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARREGION_R { - U0_PLDA_PCIE_AXI4_MST0_ARREGION_R::new(((self.bits >> 17) & 0x0f) as u8) + pub fn u0_pcie_axi4_mst0_arregion(&self) -> U0_PCIE_AXI4_MST0_ARREGION_R { + U0_PCIE_AXI4_MST0_ARREGION_R::new(((self.bits >> 17) & 0x0f) as u8) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_27.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_27.rs index 02b2c57..4fb1200 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_27.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_27.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_27` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aruser_31_0` reader - u0_plda_pcie_axi4_mst0_aruser_31_0"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARUSER_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aruser_31_0` reader - u0_pcie_axi4_mst0_aruser_31_0"] +pub type U0_PCIE_AXI4_MST0_ARUSER_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aruser_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aruser_31_0"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aruser_31_0(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARUSER_31_0_R { - U0_PLDA_PCIE_AXI4_MST0_ARUSER_31_0_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aruser_31_0(&self) -> U0_PCIE_AXI4_MST0_ARUSER_31_0_R { + U0_PCIE_AXI4_MST0_ARUSER_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_28.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_28.rs index b278f78..809f5ee 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_28.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_28.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_28` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_aruser_63_32` reader - u0_plda_pcie_axi4_mst0_aruser_63_32"] -pub type U0_PLDA_PCIE_AXI4_MST0_ARUSER_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_aruser_63_32` reader - u0_pcie_axi4_mst0_aruser_63_32"] +pub type U0_PCIE_AXI4_MST0_ARUSER_63_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_aruser_63_32"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_aruser_63_32"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_aruser_63_32(&self) -> U0_PLDA_PCIE_AXI4_MST0_ARUSER_63_32_R { - U0_PLDA_PCIE_AXI4_MST0_ARUSER_63_32_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_aruser_63_32(&self) -> U0_PCIE_AXI4_MST0_ARUSER_63_32_R { + U0_PCIE_AXI4_MST0_ARUSER_63_32_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_29.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_29.rs index dde83db..7d9562b 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_29.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_29.rs @@ -2,20 +2,20 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_29` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_awfunc` reader - u0_plda_pcie_axi4_mst0_awfunc"] -pub type U0_PLDA_PCIE_AXI4_MST0_AWFUNC_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_mst0_awregion` reader - u0_plda_pcie_axi4_mst0_awregion"] -pub type U0_PLDA_PCIE_AXI4_MST0_AWREGION_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_awfunc` reader - u0_pcie_axi4_mst0_awfunc"] +pub type U0_PCIE_AXI4_MST0_AWFUNC_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_awregion` reader - u0_pcie_axi4_mst0_awregion"] +pub type U0_PCIE_AXI4_MST0_AWREGION_R = crate::FieldReader; impl R { - #[doc = "Bits 0:14 - u0_plda_pcie_axi4_mst0_awfunc"] + #[doc = "Bits 0:14 - u0_pcie_axi4_mst0_awfunc"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_awfunc(&self) -> U0_PLDA_PCIE_AXI4_MST0_AWFUNC_R { - U0_PLDA_PCIE_AXI4_MST0_AWFUNC_R::new((self.bits & 0x7fff) as u16) + pub fn u0_pcie_axi4_mst0_awfunc(&self) -> U0_PCIE_AXI4_MST0_AWFUNC_R { + U0_PCIE_AXI4_MST0_AWFUNC_R::new((self.bits & 0x7fff) as u16) } - #[doc = "Bits 15:18 - u0_plda_pcie_axi4_mst0_awregion"] + #[doc = "Bits 15:18 - u0_pcie_axi4_mst0_awregion"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_awregion(&self) -> U0_PLDA_PCIE_AXI4_MST0_AWREGION_R { - U0_PLDA_PCIE_AXI4_MST0_AWREGION_R::new(((self.bits >> 15) & 0x0f) as u8) + pub fn u0_pcie_axi4_mst0_awregion(&self) -> U0_PCIE_AXI4_MST0_AWREGION_R { + U0_PCIE_AXI4_MST0_AWREGION_R::new(((self.bits >> 15) & 0x0f) as u8) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_3.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_3.rs index 2cb2380..6d09059 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_3.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_3.rs @@ -2,231 +2,223 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_3` writer"] pub type W = crate::W; -#[doc = "Field `u0_cdn_usb_utmi_rxvalidh_sit` reader - u0_cdn_usb_utmi_rxvalidh_sit"] -pub type U0_CDN_USB_UTMI_RXVALIDH_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_sessvld` reader - u0_cdn_usb_utmi_sessvld"] -pub type U0_CDN_USB_UTMI_SESSVLD_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_sessvld` writer - u0_cdn_usb_utmi_sessvld"] -pub type U0_CDN_USB_UTMI_SESSVLD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_termselect_sit` reader - u0_cdn_usb_utmi_termselect_sit"] -pub type U0_CDN_USB_UTMI_TERMSELECT_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_termselect_sit` writer - u0_cdn_usb_utmi_termselect_sit"] -pub type U0_CDN_USB_UTMI_TERMSELECT_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_tx_dat_sit` reader - u0_cdn_usb_utmi_tx_dat_sit"] -pub type U0_CDN_USB_UTMI_TX_DAT_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_tx_dat_sit` writer - u0_cdn_usb_utmi_tx_dat_sit"] -pub type U0_CDN_USB_UTMI_TX_DAT_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_tx_enable_n_sit` reader - u0_cdn_usb_utmi_tx_enable_n_sit"] -pub type U0_CDN_USB_UTMI_TX_ENABLE_N_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_tx_enable_n_sit` writer - u0_cdn_usb_utmi_tx_enable_n_sit"] -pub type U0_CDN_USB_UTMI_TX_ENABLE_N_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_tx_se0_sit` reader - u0_cdn_usb_utmi_tx_se0_sit"] -pub type U0_CDN_USB_UTMI_TX_SE0_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_tx_se0_sit` writer - u0_cdn_usb_utmi_tx_se0_sit"] -pub type U0_CDN_USB_UTMI_TX_SE0_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_txbitstuffenable_sit` reader - u0_cdn_usb_utmi_txbitstuffenable_sit"] -pub type U0_CDN_USB_UTMI_TXBITSTUFFENABLE_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_txbitstuffenable_sit` writer - u0_cdn_usb_utmi_txbitstuffenable_sit"] -pub type U0_CDN_USB_UTMI_TXBITSTUFFENABLE_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_txready_sit` reader - u0_cdn_usb_utmi_txready_sit"] -pub type U0_CDN_USB_UTMI_TXREADY_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_txvalid_sit` reader - u0_cdn_usb_utmi_txvalid_sit"] -pub type U0_CDN_USB_UTMI_TXVALID_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_txvalid_sit` writer - u0_cdn_usb_utmi_txvalid_sit"] -pub type U0_CDN_USB_UTMI_TXVALID_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_txvalidh_sit` reader - u0_cdn_usb_utmi_txvalidh_sit"] -pub type U0_CDN_USB_UTMI_TXVALIDH_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_txvalidh_sit` writer - u0_cdn_usb_utmi_txvalidh_sit"] -pub type U0_CDN_USB_UTMI_TXVALIDH_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_utmi_vbusvalid_sit` reader - u0_cdn_usb_utmi_vbusvalid_sit"] -pub type U0_CDN_USB_UTMI_VBUSVALID_SIT_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_xcvrselect_sit` reader - u0_cdn_usb_utmi_xcvrselect_sit"] -pub type U0_CDN_USB_UTMI_XCVRSELECT_SIT_R = crate::FieldReader; -#[doc = "Field `u0_cdn_usb_utmi_xcvrselect_sit` writer - u0_cdn_usb_utmi_xcvrselect_sit"] -pub type U0_CDN_USB_UTMI_XCVRSELECT_SIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_cdn_usb_utmi_vdm_src_en` reader - u0_cdn_usb_utmi_vdm_src_en"] -pub type U0_CDN_USB_UTMI_VDM_SRC_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_utmi_vdp_src_en` reader - u0_cdn_usb_utmi_vdp_src_en"] -pub type U0_CDN_USB_UTMI_VDP_SRC_EN_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_wakeup` reader - u0_cdn_usb_wakeup"] -pub type U0_CDN_USB_WAKEUP_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_wakeup` writer - u0_cdn_usb_wakeup"] -pub type U0_CDN_USB_WAKEUP_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_xhc_d0_ack` reader - u0_cdn_usb_xhc_d0_ack"] -pub type U0_CDN_USB_XHC_D0_ACK_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhc_d0_req` reader - u0_cdn_usb_xhc_d0_req"] -pub type U0_CDN_USB_XHC_D0_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhc_d0_req` writer - u0_cdn_usb_xhc_d0_req"] -pub type U0_CDN_USB_XHC_D0_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_rxvalidh_sit` reader - u0_usb_utmi_rxvalidh_sit"] +pub type U0_USB_UTMI_RXVALIDH_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_sessvld` reader - u0_usb_utmi_sessvld"] +pub type U0_USB_UTMI_SESSVLD_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_sessvld` writer - u0_usb_utmi_sessvld"] +pub type U0_USB_UTMI_SESSVLD_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_termselect_sit` reader - u0_usb_utmi_termselect_sit"] +pub type U0_USB_UTMI_TERMSELECT_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_termselect_sit` writer - u0_usb_utmi_termselect_sit"] +pub type U0_USB_UTMI_TERMSELECT_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_tx_dat_sit` reader - u0_usb_utmi_tx_dat_sit"] +pub type U0_USB_UTMI_TX_DAT_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_tx_dat_sit` writer - u0_usb_utmi_tx_dat_sit"] +pub type U0_USB_UTMI_TX_DAT_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_tx_enable_n_sit` reader - u0_usb_utmi_tx_enable_n_sit"] +pub type U0_USB_UTMI_TX_ENABLE_N_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_tx_enable_n_sit` writer - u0_usb_utmi_tx_enable_n_sit"] +pub type U0_USB_UTMI_TX_ENABLE_N_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_tx_se0_sit` reader - u0_usb_utmi_tx_se0_sit"] +pub type U0_USB_UTMI_TX_SE0_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_tx_se0_sit` writer - u0_usb_utmi_tx_se0_sit"] +pub type U0_USB_UTMI_TX_SE0_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_txbitstuffenable_sit` reader - u0_usb_utmi_txbitstuffenable_sit"] +pub type U0_USB_UTMI_TXBITSTUFFENABLE_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_txbitstuffenable_sit` writer - u0_usb_utmi_txbitstuffenable_sit"] +pub type U0_USB_UTMI_TXBITSTUFFENABLE_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_txready_sit` reader - u0_usb_utmi_txready_sit"] +pub type U0_USB_UTMI_TXREADY_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_txvalid_sit` reader - u0_usb_utmi_txvalid_sit"] +pub type U0_USB_UTMI_TXVALID_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_txvalid_sit` writer - u0_usb_utmi_txvalid_sit"] +pub type U0_USB_UTMI_TXVALID_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_txvalidh_sit` reader - u0_usb_utmi_txvalidh_sit"] +pub type U0_USB_UTMI_TXVALIDH_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_txvalidh_sit` writer - u0_usb_utmi_txvalidh_sit"] +pub type U0_USB_UTMI_TXVALIDH_SIT_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_utmi_vbusvalid_sit` reader - u0_usb_utmi_vbusvalid_sit"] +pub type U0_USB_UTMI_VBUSVALID_SIT_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_xcvrselect_sit` reader - u0_usb_utmi_xcvrselect_sit"] +pub type U0_USB_UTMI_XCVRSELECT_SIT_R = crate::FieldReader; +#[doc = "Field `u0_usb_utmi_xcvrselect_sit` writer - u0_usb_utmi_xcvrselect_sit"] +pub type U0_USB_UTMI_XCVRSELECT_SIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_usb_utmi_vdm_src_en` reader - u0_usb_utmi_vdm_src_en"] +pub type U0_USB_UTMI_VDM_SRC_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_utmi_vdp_src_en` reader - u0_usb_utmi_vdp_src_en"] +pub type U0_USB_UTMI_VDP_SRC_EN_R = crate::BitReader; +#[doc = "Field `u0_usb_wakeup` reader - u0_usb_wakeup"] +pub type U0_USB_WAKEUP_R = crate::BitReader; +#[doc = "Field `u0_usb_wakeup` writer - u0_usb_wakeup"] +pub type U0_USB_WAKEUP_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_xhc_d0_ack` reader - u0_usb_xhc_d0_ack"] +pub type U0_USB_XHC_D0_ACK_R = crate::BitReader; +#[doc = "Field `u0_usb_xhc_d0_req` reader - u0_usb_xhc_d0_req"] +pub type U0_USB_XHC_D0_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_xhc_d0_req` writer - u0_usb_xhc_d0_req"] +pub type U0_USB_XHC_D0_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 0 - u0_cdn_usb_utmi_rxvalidh_sit"] + #[doc = "Bit 0 - u0_usb_utmi_rxvalidh_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_rxvalidh_sit(&self) -> U0_CDN_USB_UTMI_RXVALIDH_SIT_R { - U0_CDN_USB_UTMI_RXVALIDH_SIT_R::new((self.bits & 1) != 0) + pub fn u0_usb_utmi_rxvalidh_sit(&self) -> U0_USB_UTMI_RXVALIDH_SIT_R { + U0_USB_UTMI_RXVALIDH_SIT_R::new((self.bits & 1) != 0) } - #[doc = "Bit 1 - u0_cdn_usb_utmi_sessvld"] + #[doc = "Bit 1 - u0_usb_utmi_sessvld"] #[inline(always)] - pub fn u0_cdn_usb_utmi_sessvld(&self) -> U0_CDN_USB_UTMI_SESSVLD_R { - U0_CDN_USB_UTMI_SESSVLD_R::new(((self.bits >> 1) & 1) != 0) + pub fn u0_usb_utmi_sessvld(&self) -> U0_USB_UTMI_SESSVLD_R { + U0_USB_UTMI_SESSVLD_R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 2 - u0_cdn_usb_utmi_termselect_sit"] + #[doc = "Bit 2 - u0_usb_utmi_termselect_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_termselect_sit(&self) -> U0_CDN_USB_UTMI_TERMSELECT_SIT_R { - U0_CDN_USB_UTMI_TERMSELECT_SIT_R::new(((self.bits >> 2) & 1) != 0) + pub fn u0_usb_utmi_termselect_sit(&self) -> U0_USB_UTMI_TERMSELECT_SIT_R { + U0_USB_UTMI_TERMSELECT_SIT_R::new(((self.bits >> 2) & 1) != 0) } - #[doc = "Bit 3 - u0_cdn_usb_utmi_tx_dat_sit"] + #[doc = "Bit 3 - u0_usb_utmi_tx_dat_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_tx_dat_sit(&self) -> U0_CDN_USB_UTMI_TX_DAT_SIT_R { - U0_CDN_USB_UTMI_TX_DAT_SIT_R::new(((self.bits >> 3) & 1) != 0) + pub fn u0_usb_utmi_tx_dat_sit(&self) -> U0_USB_UTMI_TX_DAT_SIT_R { + U0_USB_UTMI_TX_DAT_SIT_R::new(((self.bits >> 3) & 1) != 0) } - #[doc = "Bit 4 - u0_cdn_usb_utmi_tx_enable_n_sit"] + #[doc = "Bit 4 - u0_usb_utmi_tx_enable_n_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_tx_enable_n_sit(&self) -> U0_CDN_USB_UTMI_TX_ENABLE_N_SIT_R { - U0_CDN_USB_UTMI_TX_ENABLE_N_SIT_R::new(((self.bits >> 4) & 1) != 0) + pub fn u0_usb_utmi_tx_enable_n_sit(&self) -> U0_USB_UTMI_TX_ENABLE_N_SIT_R { + U0_USB_UTMI_TX_ENABLE_N_SIT_R::new(((self.bits >> 4) & 1) != 0) } - #[doc = "Bit 5 - u0_cdn_usb_utmi_tx_se0_sit"] + #[doc = "Bit 5 - u0_usb_utmi_tx_se0_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_tx_se0_sit(&self) -> U0_CDN_USB_UTMI_TX_SE0_SIT_R { - U0_CDN_USB_UTMI_TX_SE0_SIT_R::new(((self.bits >> 5) & 1) != 0) + pub fn u0_usb_utmi_tx_se0_sit(&self) -> U0_USB_UTMI_TX_SE0_SIT_R { + U0_USB_UTMI_TX_SE0_SIT_R::new(((self.bits >> 5) & 1) != 0) } - #[doc = "Bit 6 - u0_cdn_usb_utmi_txbitstuffenable_sit"] + #[doc = "Bit 6 - u0_usb_utmi_txbitstuffenable_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_txbitstuffenable_sit(&self) -> U0_CDN_USB_UTMI_TXBITSTUFFENABLE_SIT_R { - U0_CDN_USB_UTMI_TXBITSTUFFENABLE_SIT_R::new(((self.bits >> 6) & 1) != 0) + pub fn u0_usb_utmi_txbitstuffenable_sit(&self) -> U0_USB_UTMI_TXBITSTUFFENABLE_SIT_R { + U0_USB_UTMI_TXBITSTUFFENABLE_SIT_R::new(((self.bits >> 6) & 1) != 0) } - #[doc = "Bit 7 - u0_cdn_usb_utmi_txready_sit"] + #[doc = "Bit 7 - u0_usb_utmi_txready_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_txready_sit(&self) -> U0_CDN_USB_UTMI_TXREADY_SIT_R { - U0_CDN_USB_UTMI_TXREADY_SIT_R::new(((self.bits >> 7) & 1) != 0) + pub fn u0_usb_utmi_txready_sit(&self) -> U0_USB_UTMI_TXREADY_SIT_R { + U0_USB_UTMI_TXREADY_SIT_R::new(((self.bits >> 7) & 1) != 0) } - #[doc = "Bit 8 - u0_cdn_usb_utmi_txvalid_sit"] + #[doc = "Bit 8 - u0_usb_utmi_txvalid_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_txvalid_sit(&self) -> U0_CDN_USB_UTMI_TXVALID_SIT_R { - U0_CDN_USB_UTMI_TXVALID_SIT_R::new(((self.bits >> 8) & 1) != 0) + pub fn u0_usb_utmi_txvalid_sit(&self) -> U0_USB_UTMI_TXVALID_SIT_R { + U0_USB_UTMI_TXVALID_SIT_R::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 9 - u0_cdn_usb_utmi_txvalidh_sit"] + #[doc = "Bit 9 - u0_usb_utmi_txvalidh_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_txvalidh_sit(&self) -> U0_CDN_USB_UTMI_TXVALIDH_SIT_R { - U0_CDN_USB_UTMI_TXVALIDH_SIT_R::new(((self.bits >> 9) & 1) != 0) + pub fn u0_usb_utmi_txvalidh_sit(&self) -> U0_USB_UTMI_TXVALIDH_SIT_R { + U0_USB_UTMI_TXVALIDH_SIT_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 10 - u0_cdn_usb_utmi_vbusvalid_sit"] + #[doc = "Bit 10 - u0_usb_utmi_vbusvalid_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_vbusvalid_sit(&self) -> U0_CDN_USB_UTMI_VBUSVALID_SIT_R { - U0_CDN_USB_UTMI_VBUSVALID_SIT_R::new(((self.bits >> 10) & 1) != 0) + pub fn u0_usb_utmi_vbusvalid_sit(&self) -> U0_USB_UTMI_VBUSVALID_SIT_R { + U0_USB_UTMI_VBUSVALID_SIT_R::new(((self.bits >> 10) & 1) != 0) } - #[doc = "Bits 11:12 - u0_cdn_usb_utmi_xcvrselect_sit"] + #[doc = "Bits 11:12 - u0_usb_utmi_xcvrselect_sit"] #[inline(always)] - pub fn u0_cdn_usb_utmi_xcvrselect_sit(&self) -> U0_CDN_USB_UTMI_XCVRSELECT_SIT_R { - U0_CDN_USB_UTMI_XCVRSELECT_SIT_R::new(((self.bits >> 11) & 3) as u8) + pub fn u0_usb_utmi_xcvrselect_sit(&self) -> U0_USB_UTMI_XCVRSELECT_SIT_R { + U0_USB_UTMI_XCVRSELECT_SIT_R::new(((self.bits >> 11) & 3) as u8) } - #[doc = "Bit 13 - u0_cdn_usb_utmi_vdm_src_en"] + #[doc = "Bit 13 - u0_usb_utmi_vdm_src_en"] #[inline(always)] - pub fn u0_cdn_usb_utmi_vdm_src_en(&self) -> U0_CDN_USB_UTMI_VDM_SRC_EN_R { - U0_CDN_USB_UTMI_VDM_SRC_EN_R::new(((self.bits >> 13) & 1) != 0) + pub fn u0_usb_utmi_vdm_src_en(&self) -> U0_USB_UTMI_VDM_SRC_EN_R { + U0_USB_UTMI_VDM_SRC_EN_R::new(((self.bits >> 13) & 1) != 0) } - #[doc = "Bit 14 - u0_cdn_usb_utmi_vdp_src_en"] + #[doc = "Bit 14 - u0_usb_utmi_vdp_src_en"] #[inline(always)] - pub fn u0_cdn_usb_utmi_vdp_src_en(&self) -> U0_CDN_USB_UTMI_VDP_SRC_EN_R { - U0_CDN_USB_UTMI_VDP_SRC_EN_R::new(((self.bits >> 14) & 1) != 0) + pub fn u0_usb_utmi_vdp_src_en(&self) -> U0_USB_UTMI_VDP_SRC_EN_R { + U0_USB_UTMI_VDP_SRC_EN_R::new(((self.bits >> 14) & 1) != 0) } - #[doc = "Bit 15 - u0_cdn_usb_wakeup"] + #[doc = "Bit 15 - u0_usb_wakeup"] #[inline(always)] - pub fn u0_cdn_usb_wakeup(&self) -> U0_CDN_USB_WAKEUP_R { - U0_CDN_USB_WAKEUP_R::new(((self.bits >> 15) & 1) != 0) + pub fn u0_usb_wakeup(&self) -> U0_USB_WAKEUP_R { + U0_USB_WAKEUP_R::new(((self.bits >> 15) & 1) != 0) } - #[doc = "Bit 16 - u0_cdn_usb_xhc_d0_ack"] + #[doc = "Bit 16 - u0_usb_xhc_d0_ack"] #[inline(always)] - pub fn u0_cdn_usb_xhc_d0_ack(&self) -> U0_CDN_USB_XHC_D0_ACK_R { - U0_CDN_USB_XHC_D0_ACK_R::new(((self.bits >> 16) & 1) != 0) + pub fn u0_usb_xhc_d0_ack(&self) -> U0_USB_XHC_D0_ACK_R { + U0_USB_XHC_D0_ACK_R::new(((self.bits >> 16) & 1) != 0) } - #[doc = "Bit 17 - u0_cdn_usb_xhc_d0_req"] + #[doc = "Bit 17 - u0_usb_xhc_d0_req"] #[inline(always)] - pub fn u0_cdn_usb_xhc_d0_req(&self) -> U0_CDN_USB_XHC_D0_REQ_R { - U0_CDN_USB_XHC_D0_REQ_R::new(((self.bits >> 17) & 1) != 0) + pub fn u0_usb_xhc_d0_req(&self) -> U0_USB_XHC_D0_REQ_R { + U0_USB_XHC_D0_REQ_R::new(((self.bits >> 17) & 1) != 0) } } impl W { - #[doc = "Bit 1 - u0_cdn_usb_utmi_sessvld"] + #[doc = "Bit 1 - u0_usb_utmi_sessvld"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_sessvld(&mut self) -> U0_CDN_USB_UTMI_SESSVLD_W { - U0_CDN_USB_UTMI_SESSVLD_W::new(self, 1) + pub fn u0_usb_utmi_sessvld(&mut self) -> U0_USB_UTMI_SESSVLD_W { + U0_USB_UTMI_SESSVLD_W::new(self, 1) } - #[doc = "Bit 2 - u0_cdn_usb_utmi_termselect_sit"] + #[doc = "Bit 2 - u0_usb_utmi_termselect_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_termselect_sit( + pub fn u0_usb_utmi_termselect_sit( &mut self, - ) -> U0_CDN_USB_UTMI_TERMSELECT_SIT_W { - U0_CDN_USB_UTMI_TERMSELECT_SIT_W::new(self, 2) + ) -> U0_USB_UTMI_TERMSELECT_SIT_W { + U0_USB_UTMI_TERMSELECT_SIT_W::new(self, 2) } - #[doc = "Bit 3 - u0_cdn_usb_utmi_tx_dat_sit"] + #[doc = "Bit 3 - u0_usb_utmi_tx_dat_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_tx_dat_sit( - &mut self, - ) -> U0_CDN_USB_UTMI_TX_DAT_SIT_W { - U0_CDN_USB_UTMI_TX_DAT_SIT_W::new(self, 3) + pub fn u0_usb_utmi_tx_dat_sit(&mut self) -> U0_USB_UTMI_TX_DAT_SIT_W { + U0_USB_UTMI_TX_DAT_SIT_W::new(self, 3) } - #[doc = "Bit 4 - u0_cdn_usb_utmi_tx_enable_n_sit"] + #[doc = "Bit 4 - u0_usb_utmi_tx_enable_n_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_tx_enable_n_sit( + pub fn u0_usb_utmi_tx_enable_n_sit( &mut self, - ) -> U0_CDN_USB_UTMI_TX_ENABLE_N_SIT_W { - U0_CDN_USB_UTMI_TX_ENABLE_N_SIT_W::new(self, 4) + ) -> U0_USB_UTMI_TX_ENABLE_N_SIT_W { + U0_USB_UTMI_TX_ENABLE_N_SIT_W::new(self, 4) } - #[doc = "Bit 5 - u0_cdn_usb_utmi_tx_se0_sit"] + #[doc = "Bit 5 - u0_usb_utmi_tx_se0_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_tx_se0_sit( - &mut self, - ) -> U0_CDN_USB_UTMI_TX_SE0_SIT_W { - U0_CDN_USB_UTMI_TX_SE0_SIT_W::new(self, 5) + pub fn u0_usb_utmi_tx_se0_sit(&mut self) -> U0_USB_UTMI_TX_SE0_SIT_W { + U0_USB_UTMI_TX_SE0_SIT_W::new(self, 5) } - #[doc = "Bit 6 - u0_cdn_usb_utmi_txbitstuffenable_sit"] + #[doc = "Bit 6 - u0_usb_utmi_txbitstuffenable_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_txbitstuffenable_sit( + pub fn u0_usb_utmi_txbitstuffenable_sit( &mut self, - ) -> U0_CDN_USB_UTMI_TXBITSTUFFENABLE_SIT_W { - U0_CDN_USB_UTMI_TXBITSTUFFENABLE_SIT_W::new(self, 6) + ) -> U0_USB_UTMI_TXBITSTUFFENABLE_SIT_W { + U0_USB_UTMI_TXBITSTUFFENABLE_SIT_W::new(self, 6) } - #[doc = "Bit 8 - u0_cdn_usb_utmi_txvalid_sit"] + #[doc = "Bit 8 - u0_usb_utmi_txvalid_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_txvalid_sit( - &mut self, - ) -> U0_CDN_USB_UTMI_TXVALID_SIT_W { - U0_CDN_USB_UTMI_TXVALID_SIT_W::new(self, 8) + pub fn u0_usb_utmi_txvalid_sit(&mut self) -> U0_USB_UTMI_TXVALID_SIT_W { + U0_USB_UTMI_TXVALID_SIT_W::new(self, 8) } - #[doc = "Bit 9 - u0_cdn_usb_utmi_txvalidh_sit"] + #[doc = "Bit 9 - u0_usb_utmi_txvalidh_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_txvalidh_sit( - &mut self, - ) -> U0_CDN_USB_UTMI_TXVALIDH_SIT_W { - U0_CDN_USB_UTMI_TXVALIDH_SIT_W::new(self, 9) + pub fn u0_usb_utmi_txvalidh_sit(&mut self) -> U0_USB_UTMI_TXVALIDH_SIT_W { + U0_USB_UTMI_TXVALIDH_SIT_W::new(self, 9) } - #[doc = "Bits 11:12 - u0_cdn_usb_utmi_xcvrselect_sit"] + #[doc = "Bits 11:12 - u0_usb_utmi_xcvrselect_sit"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_utmi_xcvrselect_sit( + pub fn u0_usb_utmi_xcvrselect_sit( &mut self, - ) -> U0_CDN_USB_UTMI_XCVRSELECT_SIT_W { - U0_CDN_USB_UTMI_XCVRSELECT_SIT_W::new(self, 11) + ) -> U0_USB_UTMI_XCVRSELECT_SIT_W { + U0_USB_UTMI_XCVRSELECT_SIT_W::new(self, 11) } - #[doc = "Bit 15 - u0_cdn_usb_wakeup"] + #[doc = "Bit 15 - u0_usb_wakeup"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_wakeup(&mut self) -> U0_CDN_USB_WAKEUP_W { - U0_CDN_USB_WAKEUP_W::new(self, 15) + pub fn u0_usb_wakeup(&mut self) -> U0_USB_WAKEUP_W { + U0_USB_WAKEUP_W::new(self, 15) } - #[doc = "Bit 17 - u0_cdn_usb_xhc_d0_req"] + #[doc = "Bit 17 - u0_usb_xhc_d0_req"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_xhc_d0_req(&mut self) -> U0_CDN_USB_XHC_D0_REQ_W { - U0_CDN_USB_XHC_D0_REQ_W::new(self, 17) + pub fn u0_usb_xhc_d0_req(&mut self) -> U0_USB_XHC_D0_REQ_W { + U0_USB_XHC_D0_REQ_W::new(self, 17) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_30.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_30.rs index e1081c1..284fd4a 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_30.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_30.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_30` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_a2user_31_0` reader - u0_plda_pcie_axi4_mst0_a2user_31_0"] -pub type U0_PLDA_PCIE_AXI4_MST0_A2USER_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_a2user_31_0` reader - u0_pcie_axi4_mst0_a2user_31_0"] +pub type U0_PCIE_AXI4_MST0_A2USER_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_a2user_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_a2user_31_0"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_a2user_31_0(&self) -> U0_PLDA_PCIE_AXI4_MST0_A2USER_31_0_R { - U0_PLDA_PCIE_AXI4_MST0_A2USER_31_0_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_a2user_31_0(&self) -> U0_PCIE_AXI4_MST0_A2USER_31_0_R { + U0_PCIE_AXI4_MST0_A2USER_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_31.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_31.rs index dc8cc83..9e9f997 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_31.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_31.rs @@ -2,32 +2,30 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_31` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_awuser_42_32` reader - u0_plda_pcie_axi4_mst0_awuser_42_32"] -pub type U0_PLDA_PCIE_AXI4_MST0_AWUSER_42_32_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_mst0_rderr` reader - u0_plda_pcie_axi4_mst0_rderr"] -pub type U0_PLDA_PCIE_AXI4_MST0_RDERR_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_mst0_rderr` writer - u0_plda_pcie_axi4_mst0_rderr"] -pub type U0_PLDA_PCIE_AXI4_MST0_RDERR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `u0_pcie_axi4_mst0_awuser_42_32` reader - u0_pcie_axi4_mst0_awuser_42_32"] +pub type U0_PCIE_AXI4_MST0_AWUSER_42_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_rderr` reader - u0_pcie_axi4_mst0_rderr"] +pub type U0_PCIE_AXI4_MST0_RDERR_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_rderr` writer - u0_pcie_axi4_mst0_rderr"] +pub type U0_PCIE_AXI4_MST0_RDERR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { - #[doc = "Bits 0:10 - u0_plda_pcie_axi4_mst0_awuser_42_32"] + #[doc = "Bits 0:10 - u0_pcie_axi4_mst0_awuser_42_32"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_awuser_42_32(&self) -> U0_PLDA_PCIE_AXI4_MST0_AWUSER_42_32_R { - U0_PLDA_PCIE_AXI4_MST0_AWUSER_42_32_R::new((self.bits & 0x07ff) as u16) + pub fn u0_pcie_axi4_mst0_awuser_42_32(&self) -> U0_PCIE_AXI4_MST0_AWUSER_42_32_R { + U0_PCIE_AXI4_MST0_AWUSER_42_32_R::new((self.bits & 0x07ff) as u16) } - #[doc = "Bits 11:18 - u0_plda_pcie_axi4_mst0_rderr"] + #[doc = "Bits 11:18 - u0_pcie_axi4_mst0_rderr"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_rderr(&self) -> U0_PLDA_PCIE_AXI4_MST0_RDERR_R { - U0_PLDA_PCIE_AXI4_MST0_RDERR_R::new(((self.bits >> 11) & 0xff) as u8) + pub fn u0_pcie_axi4_mst0_rderr(&self) -> U0_PCIE_AXI4_MST0_RDERR_R { + U0_PCIE_AXI4_MST0_RDERR_R::new(((self.bits >> 11) & 0xff) as u8) } } impl W { - #[doc = "Bits 11:18 - u0_plda_pcie_axi4_mst0_rderr"] + #[doc = "Bits 11:18 - u0_pcie_axi4_mst0_rderr"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_mst0_rderr( - &mut self, - ) -> U0_PLDA_PCIE_AXI4_MST0_RDERR_W { - U0_PLDA_PCIE_AXI4_MST0_RDERR_W::new(self, 11) + pub fn u0_pcie_axi4_mst0_rderr(&mut self) -> U0_PCIE_AXI4_MST0_RDERR_W { + U0_PCIE_AXI4_MST0_RDERR_W::new(self, 11) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_32.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_32.rs index 1d0dd4a..ea7098b 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_32.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_32.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_32` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_ruser` reader - u0_plda_pcie_axi4_mst0_ruser"] -pub type U0_PLDA_PCIE_AXI4_MST0_RUSER_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_mst0_ruser` writer - u0_plda_pcie_axi4_mst0_ruser"] -pub type U0_PLDA_PCIE_AXI4_MST0_RUSER_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_mst0_ruser` reader - u0_pcie_axi4_mst0_ruser"] +pub type U0_PCIE_AXI4_MST0_RUSER_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_ruser` writer - u0_pcie_axi4_mst0_ruser"] +pub type U0_PCIE_AXI4_MST0_RUSER_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_ruser"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_ruser"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_ruser(&self) -> U0_PLDA_PCIE_AXI4_MST0_RUSER_R { - U0_PLDA_PCIE_AXI4_MST0_RUSER_R::new(self.bits) + pub fn u0_pcie_axi4_mst0_ruser(&self) -> U0_PCIE_AXI4_MST0_RUSER_R { + U0_PCIE_AXI4_MST0_RUSER_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_mst0_ruser"] + #[doc = "Bits 0:31 - u0_pcie_axi4_mst0_ruser"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_mst0_ruser( - &mut self, - ) -> U0_PLDA_PCIE_AXI4_MST0_RUSER_W { - U0_PLDA_PCIE_AXI4_MST0_RUSER_W::new(self, 0) + pub fn u0_pcie_axi4_mst0_ruser(&mut self) -> U0_PCIE_AXI4_MST0_RUSER_W { + U0_PCIE_AXI4_MST0_RUSER_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_33.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_33.rs index c2f7be9..8440681 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_33.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_33.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_33` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_mst0_wderr` reader - u0_plda_pcie_axi4_mst0_wderr"] -pub type U0_PLDA_PCIE_AXI4_MST0_WDERR_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_mst0_wderr` reader - u0_pcie_axi4_mst0_wderr"] +pub type U0_PCIE_AXI4_MST0_WDERR_R = crate::FieldReader; impl R { - #[doc = "Bits 0:7 - u0_plda_pcie_axi4_mst0_wderr"] + #[doc = "Bits 0:7 - u0_pcie_axi4_mst0_wderr"] #[inline(always)] - pub fn u0_plda_pcie_axi4_mst0_wderr(&self) -> U0_PLDA_PCIE_AXI4_MST0_WDERR_R { - U0_PLDA_PCIE_AXI4_MST0_WDERR_R::new((self.bits & 0xff) as u8) + pub fn u0_pcie_axi4_mst0_wderr(&self) -> U0_PCIE_AXI4_MST0_WDERR_R { + U0_PCIE_AXI4_MST0_WDERR_R::new((self.bits & 0xff) as u8) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_34.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_34.rs index 75393f2..ee9443f 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_34.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_34.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_34` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_31_0` reader - u0_plda_pcie_axi4_slv0_aratomop_31_0"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_31_0` writer - u0_plda_pcie_axi4_slv0_aratomop_31_0"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_31_0` reader - u0_pcie_axi4_slv0_aratomop_31_0"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_31_0` writer - u0_pcie_axi4_slv0_aratomop_31_0"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_31_0"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_31_0(&self) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aratomop_31_0(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_31_0_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_31_0"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_31_0( + pub fn u0_pcie_axi4_slv0_aratomop_31_0( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_31_0_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_31_0_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_35.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_35.rs index a929d1b..bff7eff 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_35.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_35.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_35` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_63_32` reader - u0_plda_pcie_axi4_slv0_aratomop_63_32"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_63_32` writer - u0_plda_pcie_axi4_slv0_aratomop_63_32"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_63_32` reader - u0_pcie_axi4_slv0_aratomop_63_32"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_63_32` writer - u0_pcie_axi4_slv0_aratomop_63_32"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_63_32"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_63_32"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_63_32(&self) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aratomop_63_32(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_63_32_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_63_32_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_63_32"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_63_32"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_63_32( + pub fn u0_pcie_axi4_slv0_aratomop_63_32( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_63_32_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_63_32_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_63_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_36.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_36.rs index 03c8f49..be34933 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_36.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_36.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_36` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_95_64` reader - u0_plda_pcie_axi4_slv0_aratomop_95_64"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_95_64` writer - u0_plda_pcie_axi4_slv0_aratomop_95_64"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_95_64` reader - u0_pcie_axi4_slv0_aratomop_95_64"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_95_64_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_95_64` writer - u0_pcie_axi4_slv0_aratomop_95_64"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_95_64_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_95_64"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_95_64"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_95_64(&self) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aratomop_95_64(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_95_64_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_95_64_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_95_64"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_95_64"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_95_64( + pub fn u0_pcie_axi4_slv0_aratomop_95_64( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_95_64_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_95_64_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_95_64_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_37.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_37.rs index 3bb72af..e116b63 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_37.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_37.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_37` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_127_96` reader - u0_plda_pcie_axi4_slv0_aratomop_127_96"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_127_96` writer - u0_plda_pcie_axi4_slv0_aratomop_127_96"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_127_96` reader - u0_pcie_axi4_slv0_aratomop_127_96"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_127_96_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_127_96` writer - u0_pcie_axi4_slv0_aratomop_127_96"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_127_96_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_127_96"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_127_96"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_127_96( - &self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aratomop_127_96(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_127_96_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_127_96_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_127_96"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_127_96"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_127_96( + pub fn u0_pcie_axi4_slv0_aratomop_127_96( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_127_96_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_127_96_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_127_96_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_38.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_38.rs index ea4c583..183de6a 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_38.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_38.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_38` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_159_128` reader - u0_plda_pcie_axi4_slv0_aratomop_159_128"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_159_128` writer - u0_plda_pcie_axi4_slv0_aratomop_159_128"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_159_128` reader - u0_pcie_axi4_slv0_aratomop_159_128"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_159_128_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_159_128` writer - u0_pcie_axi4_slv0_aratomop_159_128"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_159_128_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_159_128"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_159_128"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_159_128( - &self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aratomop_159_128(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_159_128_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_159_128_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_159_128"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_159_128"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_159_128( + pub fn u0_pcie_axi4_slv0_aratomop_159_128( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_159_128_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_159_128_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_159_128_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_39.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_39.rs index 3ce2f85..6750c53 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_39.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_39.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_39` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_191_160` reader - u0_plda_pcie_axi4_slv0_aratomop_191_160"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_191_160` writer - u0_plda_pcie_axi4_slv0_aratomop_191_160"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_191_160` reader - u0_pcie_axi4_slv0_aratomop_191_160"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_191_160_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_191_160` writer - u0_pcie_axi4_slv0_aratomop_191_160"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_191_160_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_191_160"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_191_160"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_191_160( - &self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aratomop_191_160(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_191_160_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_191_160_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_191_160"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_191_160"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_191_160( + pub fn u0_pcie_axi4_slv0_aratomop_191_160( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_191_160_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_191_160_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_191_160_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_4.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_4.rs index ef68b01..7f602fb 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_4.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_4.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_4` writer"] pub type W = crate::W; -#[doc = "Field `u0_cdn_usb_xhci_debug_bus` reader - u0_cdn_usb_xhci_debug_bus"] -pub type U0_CDN_USB_XHCI_DEBUG_BUS_R = crate::FieldReader; +#[doc = "Field `u0_usb_xhci_debug_bus` reader - u0_usb_xhci_debug_bus"] +pub type U0_USB_XHCI_DEBUG_BUS_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_cdn_usb_xhci_debug_bus"] + #[doc = "Bits 0:31 - u0_usb_xhci_debug_bus"] #[inline(always)] - pub fn u0_cdn_usb_xhci_debug_bus(&self) -> U0_CDN_USB_XHCI_DEBUG_BUS_R { - U0_CDN_USB_XHCI_DEBUG_BUS_R::new(self.bits) + pub fn u0_usb_xhci_debug_bus(&self) -> U0_USB_XHCI_DEBUG_BUS_R { + U0_USB_XHCI_DEBUG_BUS_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_40.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_40.rs index a503153..e79049c 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_40.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_40.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_40` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_223_192` reader - u0_plda_pcie_axi4_slv0_aratomop_223_192"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_223_192` writer - u0_plda_pcie_axi4_slv0_aratomop_223_192"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_223_192` reader - u0_pcie_axi4_slv0_aratomop_223_192"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_223_192_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_223_192` writer - u0_pcie_axi4_slv0_aratomop_223_192"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_223_192_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_223_192"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_223_192"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_223_192( - &self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aratomop_223_192(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_223_192_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_223_192_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_223_192"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_223_192"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_223_192( + pub fn u0_pcie_axi4_slv0_aratomop_223_192( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_223_192_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_223_192_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_223_192_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_41.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_41.rs index af5e0f4..63a7978 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_41.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_41.rs @@ -2,27 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_41` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_255_224` reader - u0_plda_pcie_axi4_slv0_aratomop_255_224"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_255_224` writer - u0_plda_pcie_axi4_slv0_aratomop_255_224"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_255_224` reader - u0_pcie_axi4_slv0_aratomop_255_224"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_255_224_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_255_224` writer - u0_pcie_axi4_slv0_aratomop_255_224"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_255_224_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_255_224"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_255_224"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_255_224( - &self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aratomop_255_224(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_255_224_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_255_224_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aratomop_255_224"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aratomop_255_224"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_255_224( + pub fn u0_pcie_axi4_slv0_aratomop_255_224( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_255_224_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_255_224_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_255_224_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_42.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_42.rs index 25b76e1..dd03698 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_42.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_42.rs @@ -2,61 +2,57 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_42` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_257_256` reader - u0_plda_pcie_axi4_slv0_aratomop_257_256"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_257_256_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aratomop_257_256` writer - u0_plda_pcie_axi4_slv0_aratomop_257_256"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_257_256_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_plda_pcie_axi4_slv0_arfunc` reader - u0_plda_pcie_axi4_slv0_arfunc"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARFUNC_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_arfunc` writer - u0_plda_pcie_axi4_slv0_arfunc"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; -#[doc = "Field `u0_plda_pcie_axi4_slv0_arregion` reader - u0_plda_pcie_axi4_slv0_arregion"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARREGION_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_arregion` writer - u0_plda_pcie_axi4_slv0_arregion"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARREGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_257_256` reader - u0_pcie_axi4_slv0_aratomop_257_256"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_257_256_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aratomop_257_256` writer - u0_pcie_axi4_slv0_aratomop_257_256"] +pub type U0_PCIE_AXI4_SLV0_ARATOMOP_257_256_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_pcie_axi4_slv0_arfunc` reader - u0_pcie_axi4_slv0_arfunc"] +pub type U0_PCIE_AXI4_SLV0_ARFUNC_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_arfunc` writer - u0_pcie_axi4_slv0_arfunc"] +pub type U0_PCIE_AXI4_SLV0_ARFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `u0_pcie_axi4_slv0_arregion` reader - u0_pcie_axi4_slv0_arregion"] +pub type U0_PCIE_AXI4_SLV0_ARREGION_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_arregion` writer - u0_pcie_axi4_slv0_arregion"] +pub type U0_PCIE_AXI4_SLV0_ARREGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 0:1 - u0_plda_pcie_axi4_slv0_aratomop_257_256"] + #[doc = "Bits 0:1 - u0_pcie_axi4_slv0_aratomop_257_256"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aratomop_257_256( - &self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_257_256_R { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_257_256_R::new((self.bits & 3) as u8) + pub fn u0_pcie_axi4_slv0_aratomop_257_256(&self) -> U0_PCIE_AXI4_SLV0_ARATOMOP_257_256_R { + U0_PCIE_AXI4_SLV0_ARATOMOP_257_256_R::new((self.bits & 3) as u8) } - #[doc = "Bits 2:16 - u0_plda_pcie_axi4_slv0_arfunc"] + #[doc = "Bits 2:16 - u0_pcie_axi4_slv0_arfunc"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_arfunc(&self) -> U0_PLDA_PCIE_AXI4_SLV0_ARFUNC_R { - U0_PLDA_PCIE_AXI4_SLV0_ARFUNC_R::new(((self.bits >> 2) & 0x7fff) as u16) + pub fn u0_pcie_axi4_slv0_arfunc(&self) -> U0_PCIE_AXI4_SLV0_ARFUNC_R { + U0_PCIE_AXI4_SLV0_ARFUNC_R::new(((self.bits >> 2) & 0x7fff) as u16) } - #[doc = "Bits 17:20 - u0_plda_pcie_axi4_slv0_arregion"] + #[doc = "Bits 17:20 - u0_pcie_axi4_slv0_arregion"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_arregion(&self) -> U0_PLDA_PCIE_AXI4_SLV0_ARREGION_R { - U0_PLDA_PCIE_AXI4_SLV0_ARREGION_R::new(((self.bits >> 17) & 0x0f) as u8) + pub fn u0_pcie_axi4_slv0_arregion(&self) -> U0_PCIE_AXI4_SLV0_ARREGION_R { + U0_PCIE_AXI4_SLV0_ARREGION_R::new(((self.bits >> 17) & 0x0f) as u8) } } impl W { - #[doc = "Bits 0:1 - u0_plda_pcie_axi4_slv0_aratomop_257_256"] + #[doc = "Bits 0:1 - u0_pcie_axi4_slv0_aratomop_257_256"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aratomop_257_256( + pub fn u0_pcie_axi4_slv0_aratomop_257_256( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_257_256_W { - U0_PLDA_PCIE_AXI4_SLV0_ARATOMOP_257_256_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARATOMOP_257_256_W { + U0_PCIE_AXI4_SLV0_ARATOMOP_257_256_W::new(self, 0) } - #[doc = "Bits 2:16 - u0_plda_pcie_axi4_slv0_arfunc"] + #[doc = "Bits 2:16 - u0_pcie_axi4_slv0_arfunc"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_arfunc( - &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARFUNC_W { - U0_PLDA_PCIE_AXI4_SLV0_ARFUNC_W::new(self, 2) + pub fn u0_pcie_axi4_slv0_arfunc(&mut self) -> U0_PCIE_AXI4_SLV0_ARFUNC_W { + U0_PCIE_AXI4_SLV0_ARFUNC_W::new(self, 2) } - #[doc = "Bits 17:20 - u0_plda_pcie_axi4_slv0_arregion"] + #[doc = "Bits 17:20 - u0_pcie_axi4_slv0_arregion"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_arregion( + pub fn u0_pcie_axi4_slv0_arregion( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARREGION_W { - U0_PLDA_PCIE_AXI4_SLV0_ARREGION_W::new(self, 17) + ) -> U0_PCIE_AXI4_SLV0_ARREGION_W { + U0_PCIE_AXI4_SLV0_ARREGION_W::new(self, 17) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_43.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_43.rs index 82871fb..4f789df 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_43.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_43.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_43` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aruser_31_0` reader - u0_plda_pcie_axi4_slv0_aruser_31_0"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aruser_31_0` writer - u0_plda_pcie_axi4_slv0_aruser_31_0"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_aruser_31_0` reader - u0_pcie_axi4_slv0_aruser_31_0"] +pub type U0_PCIE_AXI4_SLV0_ARUSER_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aruser_31_0` writer - u0_pcie_axi4_slv0_aruser_31_0"] +pub type U0_PCIE_AXI4_SLV0_ARUSER_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aruser_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aruser_31_0"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aruser_31_0(&self) -> U0_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_R { - U0_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_aruser_31_0(&self) -> U0_PCIE_AXI4_SLV0_ARUSER_31_0_R { + U0_PCIE_AXI4_SLV0_ARUSER_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_aruser_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_aruser_31_0"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aruser_31_0( + pub fn u0_pcie_axi4_slv0_aruser_31_0( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_W { - U0_PLDA_PCIE_AXI4_SLV0_ARUSER_31_0_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARUSER_31_0_W { + U0_PCIE_AXI4_SLV0_ARUSER_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_44.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_44.rs index e3acd5d..e2a9a47 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_44.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_44.rs @@ -2,59 +2,57 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_44` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aruser_40_32` reader - u0_plda_pcie_axi4_slv0_aruser_40_32"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_aruser_40_32` writer - u0_plda_pcie_axi4_slv0_aruser_40_32"] -pub type U0_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; -#[doc = "Field `u0_plda_pcie_axi4_slv0_awfunc` reader - u0_plda_pcie_axi4_slv0_awfunc"] -pub type U0_PLDA_PCIE_AXI4_SLV0_AWFUNC_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_awfunc` writer - u0_plda_pcie_axi4_slv0_awfunc"] -pub type U0_PLDA_PCIE_AXI4_SLV0_AWFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; -#[doc = "Field `u0_plda_pcie_axi4_slv0_awregion` reader - u0_plda_pcie_axi4_slv0_awregion"] -pub type U0_PLDA_PCIE_AXI4_SLV0_AWREGION_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_awregion` writer - u0_plda_pcie_axi4_slv0_awregion"] -pub type U0_PLDA_PCIE_AXI4_SLV0_AWREGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +#[doc = "Field `u0_pcie_axi4_slv0_aruser_40_32` reader - u0_pcie_axi4_slv0_aruser_40_32"] +pub type U0_PCIE_AXI4_SLV0_ARUSER_40_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_aruser_40_32` writer - u0_pcie_axi4_slv0_aruser_40_32"] +pub type U0_PCIE_AXI4_SLV0_ARUSER_40_32_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; +#[doc = "Field `u0_pcie_axi4_slv0_awfunc` reader - u0_pcie_axi4_slv0_awfunc"] +pub type U0_PCIE_AXI4_SLV0_AWFUNC_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_awfunc` writer - u0_pcie_axi4_slv0_awfunc"] +pub type U0_PCIE_AXI4_SLV0_AWFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `u0_pcie_axi4_slv0_awregion` reader - u0_pcie_axi4_slv0_awregion"] +pub type U0_PCIE_AXI4_SLV0_AWREGION_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_awregion` writer - u0_pcie_axi4_slv0_awregion"] +pub type U0_PCIE_AXI4_SLV0_AWREGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { - #[doc = "Bits 0:8 - u0_plda_pcie_axi4_slv0_aruser_40_32"] + #[doc = "Bits 0:8 - u0_pcie_axi4_slv0_aruser_40_32"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_aruser_40_32(&self) -> U0_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_R { - U0_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_R::new((self.bits & 0x01ff) as u16) + pub fn u0_pcie_axi4_slv0_aruser_40_32(&self) -> U0_PCIE_AXI4_SLV0_ARUSER_40_32_R { + U0_PCIE_AXI4_SLV0_ARUSER_40_32_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:23 - u0_plda_pcie_axi4_slv0_awfunc"] + #[doc = "Bits 9:23 - u0_pcie_axi4_slv0_awfunc"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_awfunc(&self) -> U0_PLDA_PCIE_AXI4_SLV0_AWFUNC_R { - U0_PLDA_PCIE_AXI4_SLV0_AWFUNC_R::new(((self.bits >> 9) & 0x7fff) as u16) + pub fn u0_pcie_axi4_slv0_awfunc(&self) -> U0_PCIE_AXI4_SLV0_AWFUNC_R { + U0_PCIE_AXI4_SLV0_AWFUNC_R::new(((self.bits >> 9) & 0x7fff) as u16) } - #[doc = "Bits 24:27 - u0_plda_pcie_axi4_slv0_awregion"] + #[doc = "Bits 24:27 - u0_pcie_axi4_slv0_awregion"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_awregion(&self) -> U0_PLDA_PCIE_AXI4_SLV0_AWREGION_R { - U0_PLDA_PCIE_AXI4_SLV0_AWREGION_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn u0_pcie_axi4_slv0_awregion(&self) -> U0_PCIE_AXI4_SLV0_AWREGION_R { + U0_PCIE_AXI4_SLV0_AWREGION_R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { - #[doc = "Bits 0:8 - u0_plda_pcie_axi4_slv0_aruser_40_32"] + #[doc = "Bits 0:8 - u0_pcie_axi4_slv0_aruser_40_32"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_aruser_40_32( + pub fn u0_pcie_axi4_slv0_aruser_40_32( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_W { - U0_PLDA_PCIE_AXI4_SLV0_ARUSER_40_32_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_ARUSER_40_32_W { + U0_PCIE_AXI4_SLV0_ARUSER_40_32_W::new(self, 0) } - #[doc = "Bits 9:23 - u0_plda_pcie_axi4_slv0_awfunc"] + #[doc = "Bits 9:23 - u0_pcie_axi4_slv0_awfunc"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_awfunc( - &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_AWFUNC_W { - U0_PLDA_PCIE_AXI4_SLV0_AWFUNC_W::new(self, 9) + pub fn u0_pcie_axi4_slv0_awfunc(&mut self) -> U0_PCIE_AXI4_SLV0_AWFUNC_W { + U0_PCIE_AXI4_SLV0_AWFUNC_W::new(self, 9) } - #[doc = "Bits 24:27 - u0_plda_pcie_axi4_slv0_awregion"] + #[doc = "Bits 24:27 - u0_pcie_axi4_slv0_awregion"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_awregion( + pub fn u0_pcie_axi4_slv0_awregion( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_AWREGION_W { - U0_PLDA_PCIE_AXI4_SLV0_AWREGION_W::new(self, 24) + ) -> U0_PCIE_AXI4_SLV0_AWREGION_W { + U0_PCIE_AXI4_SLV0_AWREGION_W::new(self, 24) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_45.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_45.rs index 979fd1c..87fdc82 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_45.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_45.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_45` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_awuser_31_0` reader - u0_plda_pcie_axi4_slv0_awuser_31_0"] -pub type U0_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_awuser_31_0` writer - u0_plda_pcie_axi4_slv0_awuser_31_0"] -pub type U0_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_axi4_slv0_awuser_31_0` reader - u0_pcie_axi4_slv0_awuser_31_0"] +pub type U0_PCIE_AXI4_SLV0_AWUSER_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_awuser_31_0` writer - u0_pcie_axi4_slv0_awuser_31_0"] +pub type U0_PCIE_AXI4_SLV0_AWUSER_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_awuser_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_awuser_31_0"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_awuser_31_0(&self) -> U0_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_R { - U0_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_awuser_31_0(&self) -> U0_PCIE_AXI4_SLV0_AWUSER_31_0_R { + U0_PCIE_AXI4_SLV0_AWUSER_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_awuser_31_0"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_awuser_31_0"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_awuser_31_0( + pub fn u0_pcie_axi4_slv0_awuser_31_0( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_W { - U0_PLDA_PCIE_AXI4_SLV0_AWUSER_31_0_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_AWUSER_31_0_W { + U0_PCIE_AXI4_SLV0_AWUSER_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_46.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_46.rs index d925b27..d64973a 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_46.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_46.rs @@ -2,32 +2,32 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_46` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_awuser_40_32` reader - u0_plda_pcie_axi4_slv0_awuser_40_32"] -pub type U0_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_awuser_40_32` writer - u0_plda_pcie_axi4_slv0_awuser_40_32"] -pub type U0_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; -#[doc = "Field `u0_plda_pcie_axi4_slv0_rderr` reader - u0_plda_pcie_axi4_slv0_rderr"] -pub type U0_PLDA_PCIE_AXI4_SLV0_RDERR_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_awuser_40_32` reader - u0_pcie_axi4_slv0_awuser_40_32"] +pub type U0_PCIE_AXI4_SLV0_AWUSER_40_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_awuser_40_32` writer - u0_pcie_axi4_slv0_awuser_40_32"] +pub type U0_PCIE_AXI4_SLV0_AWUSER_40_32_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; +#[doc = "Field `u0_pcie_axi4_slv0_rderr` reader - u0_pcie_axi4_slv0_rderr"] +pub type U0_PCIE_AXI4_SLV0_RDERR_R = crate::FieldReader; impl R { - #[doc = "Bits 0:8 - u0_plda_pcie_axi4_slv0_awuser_40_32"] + #[doc = "Bits 0:8 - u0_pcie_axi4_slv0_awuser_40_32"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_awuser_40_32(&self) -> U0_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_R { - U0_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_R::new((self.bits & 0x01ff) as u16) + pub fn u0_pcie_axi4_slv0_awuser_40_32(&self) -> U0_PCIE_AXI4_SLV0_AWUSER_40_32_R { + U0_PCIE_AXI4_SLV0_AWUSER_40_32_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:16 - u0_plda_pcie_axi4_slv0_rderr"] + #[doc = "Bits 9:16 - u0_pcie_axi4_slv0_rderr"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_rderr(&self) -> U0_PLDA_PCIE_AXI4_SLV0_RDERR_R { - U0_PLDA_PCIE_AXI4_SLV0_RDERR_R::new(((self.bits >> 9) & 0xff) as u8) + pub fn u0_pcie_axi4_slv0_rderr(&self) -> U0_PCIE_AXI4_SLV0_RDERR_R { + U0_PCIE_AXI4_SLV0_RDERR_R::new(((self.bits >> 9) & 0xff) as u8) } } impl W { - #[doc = "Bits 0:8 - u0_plda_pcie_axi4_slv0_awuser_40_32"] + #[doc = "Bits 0:8 - u0_pcie_axi4_slv0_awuser_40_32"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_awuser_40_32( + pub fn u0_pcie_axi4_slv0_awuser_40_32( &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_W { - U0_PLDA_PCIE_AXI4_SLV0_AWUSER_40_32_W::new(self, 0) + ) -> U0_PCIE_AXI4_SLV0_AWUSER_40_32_W { + U0_PCIE_AXI4_SLV0_AWUSER_40_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_47.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_47.rs index 59ebd2b..8ab20f3 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_47.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_47.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_47` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_ruser` reader - u0_plda_pcie_axi4_slv0_ruser"] -pub type U0_PLDA_PCIE_AXI4_SLV0_RUSER_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_ruser` reader - u0_pcie_axi4_slv0_ruser"] +pub type U0_PCIE_AXI4_SLV0_RUSER_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_axi4_slv0_ruser"] + #[doc = "Bits 0:31 - u0_pcie_axi4_slv0_ruser"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_ruser(&self) -> U0_PLDA_PCIE_AXI4_SLV0_RUSER_R { - U0_PLDA_PCIE_AXI4_SLV0_RUSER_R::new(self.bits) + pub fn u0_pcie_axi4_slv0_ruser(&self) -> U0_PCIE_AXI4_SLV0_RUSER_R { + U0_PCIE_AXI4_SLV0_RUSER_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_48.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_48.rs index 54120a4..28661d8 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_48.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_48.rs @@ -2,32 +2,30 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_48` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slv0_wderr` reader - u0_plda_pcie_axi4_slv0_wderr"] -pub type U0_PLDA_PCIE_AXI4_SLV0_WDERR_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slv0_wderr` writer - u0_plda_pcie_axi4_slv0_wderr"] -pub type U0_PLDA_PCIE_AXI4_SLV0_WDERR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `u0_plda_pcie_axi4_slvl_arfunc` reader - u0_plda_pcie_axi4_slvl_arfunc"] -pub type U0_PLDA_PCIE_AXI4_SLVL_ARFUNC_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_wderr` reader - u0_pcie_axi4_slv0_wderr"] +pub type U0_PCIE_AXI4_SLV0_WDERR_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slv0_wderr` writer - u0_pcie_axi4_slv0_wderr"] +pub type U0_PCIE_AXI4_SLV0_WDERR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `u0_pcie_axi4_slvl_arfunc` reader - u0_pcie_axi4_slvl_arfunc"] +pub type U0_PCIE_AXI4_SLVL_ARFUNC_R = crate::FieldReader; impl R { - #[doc = "Bits 0:7 - u0_plda_pcie_axi4_slv0_wderr"] + #[doc = "Bits 0:7 - u0_pcie_axi4_slv0_wderr"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slv0_wderr(&self) -> U0_PLDA_PCIE_AXI4_SLV0_WDERR_R { - U0_PLDA_PCIE_AXI4_SLV0_WDERR_R::new((self.bits & 0xff) as u8) + pub fn u0_pcie_axi4_slv0_wderr(&self) -> U0_PCIE_AXI4_SLV0_WDERR_R { + U0_PCIE_AXI4_SLV0_WDERR_R::new((self.bits & 0xff) as u8) } - #[doc = "Bits 8:22 - u0_plda_pcie_axi4_slvl_arfunc"] + #[doc = "Bits 8:22 - u0_pcie_axi4_slvl_arfunc"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slvl_arfunc(&self) -> U0_PLDA_PCIE_AXI4_SLVL_ARFUNC_R { - U0_PLDA_PCIE_AXI4_SLVL_ARFUNC_R::new(((self.bits >> 8) & 0x7fff) as u16) + pub fn u0_pcie_axi4_slvl_arfunc(&self) -> U0_PCIE_AXI4_SLVL_ARFUNC_R { + U0_PCIE_AXI4_SLVL_ARFUNC_R::new(((self.bits >> 8) & 0x7fff) as u16) } } impl W { - #[doc = "Bits 0:7 - u0_plda_pcie_axi4_slv0_wderr"] + #[doc = "Bits 0:7 - u0_pcie_axi4_slv0_wderr"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slv0_wderr( - &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLV0_WDERR_W { - U0_PLDA_PCIE_AXI4_SLV0_WDERR_W::new(self, 0) + pub fn u0_pcie_axi4_slv0_wderr(&mut self) -> U0_PCIE_AXI4_SLV0_WDERR_W { + U0_PCIE_AXI4_SLV0_WDERR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_49.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_49.rs index 1fca0f7..0f45130 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_49.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_49.rs @@ -2,92 +2,90 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_49` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_axi4_slvl_awfunc` reader - u0_plda_pcie_axi4_slvl_awfunc"] -pub type U0_PLDA_PCIE_AXI4_SLVL_AWFUNC_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_axi4_slvl_awfunc` writer - u0_plda_pcie_axi4_slvl_awfunc"] -pub type U0_PLDA_PCIE_AXI4_SLVL_AWFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; -#[doc = "Field `u0_plda_pcie_bus_width_o` reader - u0_plda_pcie_bus_width_o"] -pub type U0_PLDA_PCIE_BUS_WIDTH_O_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_bypass_codec` reader - u0_plda_pcie_bypass_codec"] -pub type U0_PLDA_PCIE_BYPASS_CODEC_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_bypass_codec` writer - u0_plda_pcie_bypass_codec"] -pub type U0_PLDA_PCIE_BYPASS_CODEC_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_ckref_src` reader - u0_plda_pcie_ckref_src"] -pub type U0_PLDA_PCIE_CKREF_SRC_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_ckref_src` writer - u0_plda_pcie_ckref_src"] -pub type U0_PLDA_PCIE_CKREF_SRC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_plda_pcie_clk_sel` reader - u0_plda_pcie_clk_sel"] -pub type U0_PLDA_PCIE_CLK_SEL_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_clk_sel` writer - u0_plda_pcie_clk_sel"] -pub type U0_PLDA_PCIE_CLK_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_plda_pcie_clkreq` reader - u0_plda_pcie_clkreq"] -pub type U0_PLDA_PCIE_CLKREQ_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_clkreq` writer - u0_plda_pcie_clkreq"] -pub type U0_PLDA_PCIE_CLKREQ_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_axi4_slvl_awfunc` reader - u0_pcie_axi4_slvl_awfunc"] +pub type U0_PCIE_AXI4_SLVL_AWFUNC_R = crate::FieldReader; +#[doc = "Field `u0_pcie_axi4_slvl_awfunc` writer - u0_pcie_axi4_slvl_awfunc"] +pub type U0_PCIE_AXI4_SLVL_AWFUNC_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +#[doc = "Field `u0_pcie_bus_width_o` reader - u0_pcie_bus_width_o"] +pub type U0_PCIE_BUS_WIDTH_O_R = crate::FieldReader; +#[doc = "Field `u0_pcie_bypass_codec` reader - u0_pcie_bypass_codec"] +pub type U0_PCIE_BYPASS_CODEC_R = crate::BitReader; +#[doc = "Field `u0_pcie_bypass_codec` writer - u0_pcie_bypass_codec"] +pub type U0_PCIE_BYPASS_CODEC_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_ckref_src` reader - u0_pcie_ckref_src"] +pub type U0_PCIE_CKREF_SRC_R = crate::FieldReader; +#[doc = "Field `u0_pcie_ckref_src` writer - u0_pcie_ckref_src"] +pub type U0_PCIE_CKREF_SRC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_pcie_clk_sel` reader - u0_pcie_clk_sel"] +pub type U0_PCIE_CLK_SEL_R = crate::FieldReader; +#[doc = "Field `u0_pcie_clk_sel` writer - u0_pcie_clk_sel"] +pub type U0_PCIE_CLK_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_pcie_clkreq` reader - u0_pcie_clkreq"] +pub type U0_PCIE_CLKREQ_R = crate::BitReader; +#[doc = "Field `u0_pcie_clkreq` writer - u0_pcie_clkreq"] +pub type U0_PCIE_CLKREQ_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bits 0:14 - u0_plda_pcie_axi4_slvl_awfunc"] + #[doc = "Bits 0:14 - u0_pcie_axi4_slvl_awfunc"] #[inline(always)] - pub fn u0_plda_pcie_axi4_slvl_awfunc(&self) -> U0_PLDA_PCIE_AXI4_SLVL_AWFUNC_R { - U0_PLDA_PCIE_AXI4_SLVL_AWFUNC_R::new((self.bits & 0x7fff) as u16) + pub fn u0_pcie_axi4_slvl_awfunc(&self) -> U0_PCIE_AXI4_SLVL_AWFUNC_R { + U0_PCIE_AXI4_SLVL_AWFUNC_R::new((self.bits & 0x7fff) as u16) } - #[doc = "Bits 15:16 - u0_plda_pcie_bus_width_o"] + #[doc = "Bits 15:16 - u0_pcie_bus_width_o"] #[inline(always)] - pub fn u0_plda_pcie_bus_width_o(&self) -> U0_PLDA_PCIE_BUS_WIDTH_O_R { - U0_PLDA_PCIE_BUS_WIDTH_O_R::new(((self.bits >> 15) & 3) as u8) + pub fn u0_pcie_bus_width_o(&self) -> U0_PCIE_BUS_WIDTH_O_R { + U0_PCIE_BUS_WIDTH_O_R::new(((self.bits >> 15) & 3) as u8) } - #[doc = "Bit 17 - u0_plda_pcie_bypass_codec"] + #[doc = "Bit 17 - u0_pcie_bypass_codec"] #[inline(always)] - pub fn u0_plda_pcie_bypass_codec(&self) -> U0_PLDA_PCIE_BYPASS_CODEC_R { - U0_PLDA_PCIE_BYPASS_CODEC_R::new(((self.bits >> 17) & 1) != 0) + pub fn u0_pcie_bypass_codec(&self) -> U0_PCIE_BYPASS_CODEC_R { + U0_PCIE_BYPASS_CODEC_R::new(((self.bits >> 17) & 1) != 0) } - #[doc = "Bits 18:19 - u0_plda_pcie_ckref_src"] + #[doc = "Bits 18:19 - u0_pcie_ckref_src"] #[inline(always)] - pub fn u0_plda_pcie_ckref_src(&self) -> U0_PLDA_PCIE_CKREF_SRC_R { - U0_PLDA_PCIE_CKREF_SRC_R::new(((self.bits >> 18) & 3) as u8) + pub fn u0_pcie_ckref_src(&self) -> U0_PCIE_CKREF_SRC_R { + U0_PCIE_CKREF_SRC_R::new(((self.bits >> 18) & 3) as u8) } - #[doc = "Bits 20:21 - u0_plda_pcie_clk_sel"] + #[doc = "Bits 20:21 - u0_pcie_clk_sel"] #[inline(always)] - pub fn u0_plda_pcie_clk_sel(&self) -> U0_PLDA_PCIE_CLK_SEL_R { - U0_PLDA_PCIE_CLK_SEL_R::new(((self.bits >> 20) & 3) as u8) + pub fn u0_pcie_clk_sel(&self) -> U0_PCIE_CLK_SEL_R { + U0_PCIE_CLK_SEL_R::new(((self.bits >> 20) & 3) as u8) } - #[doc = "Bit 22 - u0_plda_pcie_clkreq"] + #[doc = "Bit 22 - u0_pcie_clkreq"] #[inline(always)] - pub fn u0_plda_pcie_clkreq(&self) -> U0_PLDA_PCIE_CLKREQ_R { - U0_PLDA_PCIE_CLKREQ_R::new(((self.bits >> 22) & 1) != 0) + pub fn u0_pcie_clkreq(&self) -> U0_PCIE_CLKREQ_R { + U0_PCIE_CLKREQ_R::new(((self.bits >> 22) & 1) != 0) } } impl W { - #[doc = "Bits 0:14 - u0_plda_pcie_axi4_slvl_awfunc"] + #[doc = "Bits 0:14 - u0_pcie_axi4_slvl_awfunc"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_axi4_slvl_awfunc( - &mut self, - ) -> U0_PLDA_PCIE_AXI4_SLVL_AWFUNC_W { - U0_PLDA_PCIE_AXI4_SLVL_AWFUNC_W::new(self, 0) + pub fn u0_pcie_axi4_slvl_awfunc(&mut self) -> U0_PCIE_AXI4_SLVL_AWFUNC_W { + U0_PCIE_AXI4_SLVL_AWFUNC_W::new(self, 0) } - #[doc = "Bit 17 - u0_plda_pcie_bypass_codec"] + #[doc = "Bit 17 - u0_pcie_bypass_codec"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_bypass_codec(&mut self) -> U0_PLDA_PCIE_BYPASS_CODEC_W { - U0_PLDA_PCIE_BYPASS_CODEC_W::new(self, 17) + pub fn u0_pcie_bypass_codec(&mut self) -> U0_PCIE_BYPASS_CODEC_W { + U0_PCIE_BYPASS_CODEC_W::new(self, 17) } - #[doc = "Bits 18:19 - u0_plda_pcie_ckref_src"] + #[doc = "Bits 18:19 - u0_pcie_ckref_src"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_ckref_src(&mut self) -> U0_PLDA_PCIE_CKREF_SRC_W { - U0_PLDA_PCIE_CKREF_SRC_W::new(self, 18) + pub fn u0_pcie_ckref_src(&mut self) -> U0_PCIE_CKREF_SRC_W { + U0_PCIE_CKREF_SRC_W::new(self, 18) } - #[doc = "Bits 20:21 - u0_plda_pcie_clk_sel"] + #[doc = "Bits 20:21 - u0_pcie_clk_sel"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_clk_sel(&mut self) -> U0_PLDA_PCIE_CLK_SEL_W { - U0_PLDA_PCIE_CLK_SEL_W::new(self, 20) + pub fn u0_pcie_clk_sel(&mut self) -> U0_PCIE_CLK_SEL_W { + U0_PCIE_CLK_SEL_W::new(self, 20) } - #[doc = "Bit 22 - u0_plda_pcie_clkreq"] + #[doc = "Bit 22 - u0_pcie_clkreq"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_clkreq(&mut self) -> U0_PLDA_PCIE_CLKREQ_W { - U0_PLDA_PCIE_CLKREQ_W::new(self, 22) + pub fn u0_pcie_clkreq(&mut self) -> U0_PCIE_CLKREQ_W { + U0_PCIE_CLKREQ_W::new(self, 22) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_5.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_5.rs index e99ee02..57c2be6 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_5.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_5.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_5` writer"] pub type W = crate::W; -#[doc = "Field `u0_cdn_usb_xhci_debug_link_state` reader - u0_cdn_usb_xhci_debug_link_state"] -pub type U0_CDN_USB_XHCI_DEBUG_LINK_STATE_R = crate::FieldReader; +#[doc = "Field `u0_usb_xhci_debug_link_state` reader - u0_usb_xhci_debug_link_state"] +pub type U0_USB_XHCI_DEBUG_LINK_STATE_R = crate::FieldReader; impl R { - #[doc = "Bits 0:30 - u0_cdn_usb_xhci_debug_link_state"] + #[doc = "Bits 0:30 - u0_usb_xhci_debug_link_state"] #[inline(always)] - pub fn u0_cdn_usb_xhci_debug_link_state(&self) -> U0_CDN_USB_XHCI_DEBUG_LINK_STATE_R { - U0_CDN_USB_XHCI_DEBUG_LINK_STATE_R::new(self.bits & 0x7fff_ffff) + pub fn u0_usb_xhci_debug_link_state(&self) -> U0_USB_XHCI_DEBUG_LINK_STATE_R { + U0_USB_XHCI_DEBUG_LINK_STATE_R::new(self.bits & 0x7fff_ffff) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_50.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_50.rs index 2608d25..6374097 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_50.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_50.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_50` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_31_0` reader - u0_plda_pcie_k_phyparam_31_0"] -pub type U0_PLDA_PCIE_K_PHYPARAM_31_0_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_31_0` writer - u0_plda_pcie_k_phyparam_31_0"] -pub type U0_PLDA_PCIE_K_PHYPARAM_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_31_0` reader - u0_pcie_k_phyparam_31_0"] +pub type U0_PCIE_K_PHYPARAM_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_31_0` writer - u0_pcie_k_phyparam_31_0"] +pub type U0_PCIE_K_PHYPARAM_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_31_0"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_31_0"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_31_0(&self) -> U0_PLDA_PCIE_K_PHYPARAM_31_0_R { - U0_PLDA_PCIE_K_PHYPARAM_31_0_R::new(self.bits) + pub fn u0_pcie_k_phyparam_31_0(&self) -> U0_PCIE_K_PHYPARAM_31_0_R { + U0_PCIE_K_PHYPARAM_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_31_0"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_31_0"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_31_0( - &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_31_0_W { - U0_PLDA_PCIE_K_PHYPARAM_31_0_W::new(self, 0) + pub fn u0_pcie_k_phyparam_31_0(&mut self) -> U0_PCIE_K_PHYPARAM_31_0_W { + U0_PCIE_K_PHYPARAM_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_51.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_51.rs index 74d922d..2745749 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_51.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_51.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_51` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_63_32` reader - u0_plda_pcie_k_phyparam_63_32"] -pub type U0_PLDA_PCIE_K_PHYPARAM_63_32_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_63_32` writer - u0_plda_pcie_k_phyparam_63_32"] -pub type U0_PLDA_PCIE_K_PHYPARAM_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_63_32` reader - u0_pcie_k_phyparam_63_32"] +pub type U0_PCIE_K_PHYPARAM_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_63_32` writer - u0_pcie_k_phyparam_63_32"] +pub type U0_PCIE_K_PHYPARAM_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_63_32"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_63_32"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_63_32(&self) -> U0_PLDA_PCIE_K_PHYPARAM_63_32_R { - U0_PLDA_PCIE_K_PHYPARAM_63_32_R::new(self.bits) + pub fn u0_pcie_k_phyparam_63_32(&self) -> U0_PCIE_K_PHYPARAM_63_32_R { + U0_PCIE_K_PHYPARAM_63_32_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_63_32"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_63_32"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_63_32( - &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_63_32_W { - U0_PLDA_PCIE_K_PHYPARAM_63_32_W::new(self, 0) + pub fn u0_pcie_k_phyparam_63_32(&mut self) -> U0_PCIE_K_PHYPARAM_63_32_W { + U0_PCIE_K_PHYPARAM_63_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_52.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_52.rs index 8af6f8c..4f28838 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_52.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_52.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_52` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_95_64` reader - u0_plda_pcie_k_phyparam_95_64"] -pub type U0_PLDA_PCIE_K_PHYPARAM_95_64_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_95_64` writer - u0_plda_pcie_k_phyparam_95_64"] -pub type U0_PLDA_PCIE_K_PHYPARAM_95_64_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_95_64` reader - u0_pcie_k_phyparam_95_64"] +pub type U0_PCIE_K_PHYPARAM_95_64_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_95_64` writer - u0_pcie_k_phyparam_95_64"] +pub type U0_PCIE_K_PHYPARAM_95_64_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_95_64"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_95_64"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_95_64(&self) -> U0_PLDA_PCIE_K_PHYPARAM_95_64_R { - U0_PLDA_PCIE_K_PHYPARAM_95_64_R::new(self.bits) + pub fn u0_pcie_k_phyparam_95_64(&self) -> U0_PCIE_K_PHYPARAM_95_64_R { + U0_PCIE_K_PHYPARAM_95_64_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_95_64"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_95_64"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_95_64( - &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_95_64_W { - U0_PLDA_PCIE_K_PHYPARAM_95_64_W::new(self, 0) + pub fn u0_pcie_k_phyparam_95_64(&mut self) -> U0_PCIE_K_PHYPARAM_95_64_W { + U0_PCIE_K_PHYPARAM_95_64_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_53.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_53.rs index ffb1705..2b6eb36 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_53.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_53.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_53` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_127_96` reader - u0_plda_pcie_k_phyparam_127_96"] -pub type U0_PLDA_PCIE_K_PHYPARAM_127_96_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_127_96` writer - u0_plda_pcie_k_phyparam_127_96"] -pub type U0_PLDA_PCIE_K_PHYPARAM_127_96_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_127_96` reader - u0_pcie_k_phyparam_127_96"] +pub type U0_PCIE_K_PHYPARAM_127_96_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_127_96` writer - u0_pcie_k_phyparam_127_96"] +pub type U0_PCIE_K_PHYPARAM_127_96_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_127_96"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_127_96"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_127_96(&self) -> U0_PLDA_PCIE_K_PHYPARAM_127_96_R { - U0_PLDA_PCIE_K_PHYPARAM_127_96_R::new(self.bits) + pub fn u0_pcie_k_phyparam_127_96(&self) -> U0_PCIE_K_PHYPARAM_127_96_R { + U0_PCIE_K_PHYPARAM_127_96_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_127_96"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_127_96"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_127_96( - &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_127_96_W { - U0_PLDA_PCIE_K_PHYPARAM_127_96_W::new(self, 0) + pub fn u0_pcie_k_phyparam_127_96(&mut self) -> U0_PCIE_K_PHYPARAM_127_96_W { + U0_PCIE_K_PHYPARAM_127_96_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_54.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_54.rs index ebd732f..40466da 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_54.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_54.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_54` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_159_128` reader - u0_plda_pcie_k_phyparam_159_128"] -pub type U0_PLDA_PCIE_K_PHYPARAM_159_128_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_159_128` writer - u0_plda_pcie_k_phyparam_159_128"] -pub type U0_PLDA_PCIE_K_PHYPARAM_159_128_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_159_128` reader - u0_pcie_k_phyparam_159_128"] +pub type U0_PCIE_K_PHYPARAM_159_128_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_159_128` writer - u0_pcie_k_phyparam_159_128"] +pub type U0_PCIE_K_PHYPARAM_159_128_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_159_128"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_159_128"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_159_128(&self) -> U0_PLDA_PCIE_K_PHYPARAM_159_128_R { - U0_PLDA_PCIE_K_PHYPARAM_159_128_R::new(self.bits) + pub fn u0_pcie_k_phyparam_159_128(&self) -> U0_PCIE_K_PHYPARAM_159_128_R { + U0_PCIE_K_PHYPARAM_159_128_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_159_128"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_159_128"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_159_128( + pub fn u0_pcie_k_phyparam_159_128( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_159_128_W { - U0_PLDA_PCIE_K_PHYPARAM_159_128_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_159_128_W { + U0_PCIE_K_PHYPARAM_159_128_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_55.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_55.rs index 5a7811c..61ac2c0 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_55.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_55.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_55` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_191_160` reader - u0_plda_pcie_k_phyparam_191_160"] -pub type U0_PLDA_PCIE_K_PHYPARAM_191_160_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_191_160` writer - u0_plda_pcie_k_phyparam_191_160"] -pub type U0_PLDA_PCIE_K_PHYPARAM_191_160_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_191_160` reader - u0_pcie_k_phyparam_191_160"] +pub type U0_PCIE_K_PHYPARAM_191_160_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_191_160` writer - u0_pcie_k_phyparam_191_160"] +pub type U0_PCIE_K_PHYPARAM_191_160_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_191_160"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_191_160"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_191_160(&self) -> U0_PLDA_PCIE_K_PHYPARAM_191_160_R { - U0_PLDA_PCIE_K_PHYPARAM_191_160_R::new(self.bits) + pub fn u0_pcie_k_phyparam_191_160(&self) -> U0_PCIE_K_PHYPARAM_191_160_R { + U0_PCIE_K_PHYPARAM_191_160_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_191_160"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_191_160"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_191_160( + pub fn u0_pcie_k_phyparam_191_160( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_191_160_W { - U0_PLDA_PCIE_K_PHYPARAM_191_160_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_191_160_W { + U0_PCIE_K_PHYPARAM_191_160_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_56.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_56.rs index 3fc7a95..08e5aef 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_56.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_56.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_56` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_223_192` reader - u0_plda_pcie_k_phyparam_223_192"] -pub type U0_PLDA_PCIE_K_PHYPARAM_223_192_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_223_192` writer - u0_plda_pcie_k_phyparam_223_192"] -pub type U0_PLDA_PCIE_K_PHYPARAM_223_192_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_223_192` reader - u0_pcie_k_phyparam_223_192"] +pub type U0_PCIE_K_PHYPARAM_223_192_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_223_192` writer - u0_pcie_k_phyparam_223_192"] +pub type U0_PCIE_K_PHYPARAM_223_192_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_223_192"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_223_192"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_223_192(&self) -> U0_PLDA_PCIE_K_PHYPARAM_223_192_R { - U0_PLDA_PCIE_K_PHYPARAM_223_192_R::new(self.bits) + pub fn u0_pcie_k_phyparam_223_192(&self) -> U0_PCIE_K_PHYPARAM_223_192_R { + U0_PCIE_K_PHYPARAM_223_192_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_223_192"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_223_192"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_223_192( + pub fn u0_pcie_k_phyparam_223_192( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_223_192_W { - U0_PLDA_PCIE_K_PHYPARAM_223_192_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_223_192_W { + U0_PCIE_K_PHYPARAM_223_192_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_57.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_57.rs index 5e7c4c7..e6dd0e1 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_57.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_57.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_57` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_255_224` reader - u0_plda_pcie_k_phyparam_255_224"] -pub type U0_PLDA_PCIE_K_PHYPARAM_255_224_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_255_224` writer - u0_plda_pcie_k_phyparam_255_224"] -pub type U0_PLDA_PCIE_K_PHYPARAM_255_224_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_255_224` reader - u0_pcie_k_phyparam_255_224"] +pub type U0_PCIE_K_PHYPARAM_255_224_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_255_224` writer - u0_pcie_k_phyparam_255_224"] +pub type U0_PCIE_K_PHYPARAM_255_224_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_255_224"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_255_224"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_255_224(&self) -> U0_PLDA_PCIE_K_PHYPARAM_255_224_R { - U0_PLDA_PCIE_K_PHYPARAM_255_224_R::new(self.bits) + pub fn u0_pcie_k_phyparam_255_224(&self) -> U0_PCIE_K_PHYPARAM_255_224_R { + U0_PCIE_K_PHYPARAM_255_224_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_255_224"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_255_224"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_255_224( + pub fn u0_pcie_k_phyparam_255_224( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_255_224_W { - U0_PLDA_PCIE_K_PHYPARAM_255_224_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_255_224_W { + U0_PCIE_K_PHYPARAM_255_224_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_58.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_58.rs index 3fcb836..fe4626f 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_58.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_58.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_58` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_287_256` reader - u0_plda_pcie_k_phyparam_287_256"] -pub type U0_PLDA_PCIE_K_PHYPARAM_287_256_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_287_256` writer - u0_plda_pcie_k_phyparam_287_256"] -pub type U0_PLDA_PCIE_K_PHYPARAM_287_256_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_287_256` reader - u0_pcie_k_phyparam_287_256"] +pub type U0_PCIE_K_PHYPARAM_287_256_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_287_256` writer - u0_pcie_k_phyparam_287_256"] +pub type U0_PCIE_K_PHYPARAM_287_256_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_287_256"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_287_256"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_287_256(&self) -> U0_PLDA_PCIE_K_PHYPARAM_287_256_R { - U0_PLDA_PCIE_K_PHYPARAM_287_256_R::new(self.bits) + pub fn u0_pcie_k_phyparam_287_256(&self) -> U0_PCIE_K_PHYPARAM_287_256_R { + U0_PCIE_K_PHYPARAM_287_256_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_287_256"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_287_256"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_287_256( + pub fn u0_pcie_k_phyparam_287_256( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_287_256_W { - U0_PLDA_PCIE_K_PHYPARAM_287_256_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_287_256_W { + U0_PCIE_K_PHYPARAM_287_256_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_59.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_59.rs index bface34..8ed0943 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_59.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_59.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_59` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_319_288` reader - u0_plda_pcie_k_phyparam_319_288"] -pub type U0_PLDA_PCIE_K_PHYPARAM_319_288_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_319_288` writer - u0_plda_pcie_k_phyparam_319_288"] -pub type U0_PLDA_PCIE_K_PHYPARAM_319_288_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_319_288` reader - u0_pcie_k_phyparam_319_288"] +pub type U0_PCIE_K_PHYPARAM_319_288_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_319_288` writer - u0_pcie_k_phyparam_319_288"] +pub type U0_PCIE_K_PHYPARAM_319_288_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_319_288"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_319_288"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_319_288(&self) -> U0_PLDA_PCIE_K_PHYPARAM_319_288_R { - U0_PLDA_PCIE_K_PHYPARAM_319_288_R::new(self.bits) + pub fn u0_pcie_k_phyparam_319_288(&self) -> U0_PCIE_K_PHYPARAM_319_288_R { + U0_PCIE_K_PHYPARAM_319_288_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_319_288"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_319_288"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_319_288( + pub fn u0_pcie_k_phyparam_319_288( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_319_288_W { - U0_PLDA_PCIE_K_PHYPARAM_319_288_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_319_288_W { + U0_PCIE_K_PHYPARAM_319_288_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_6.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_6.rs index e2f8660..4dfd27e 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_6.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_6.rs @@ -2,161 +2,159 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_6` writer"] pub type W = crate::W; -#[doc = "Field `u0_cdn_usb_xhci_debug_sel` reader - u0_cdn_usb_xhci_debug_sel"] -pub type U0_CDN_USB_XHCI_DEBUG_SEL_R = crate::FieldReader; -#[doc = "Field `u0_cdn_usb_xhci_debug_sel` writer - u0_cdn_usb_xhci_debug_sel"] -pub type U0_CDN_USB_XHCI_DEBUG_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; -#[doc = "Field `u0_cdn_usb_xhci_main_power_off_ack` reader - u0_cdn_usb_xhci_main_power_off_ack"] -pub type U0_CDN_USB_XHCI_MAIN_POWER_OFF_ACK_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_main_power_off_req` reader - u0_cdn_usb_xhci_main_power_off_req"] -pub type U0_CDN_USB_XHCI_MAIN_POWER_OFF_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_main_power_on_ready` reader - u0_cdn_usb_xhci_main_power_on_ready"] -pub type U0_CDN_USB_XHCI_MAIN_POWER_ON_READY_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_main_power_on_ready` writer - u0_cdn_usb_xhci_main_power_on_ready"] -pub type U0_CDN_USB_XHCI_MAIN_POWER_ON_READY_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_xhci_main_power_on_req` reader - u0_cdn_usb_xhci_main_power_on_req"] -pub type U0_CDN_USB_XHCI_MAIN_POWER_ON_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_main_power_on_valid` reader - u0_cdn_usb_xhci_main_power_on_valid"] -pub type U0_CDN_USB_XHCI_MAIN_POWER_ON_VALID_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_main_power_on_valid` writer - u0_cdn_usb_xhci_main_power_on_valid"] -pub type U0_CDN_USB_XHCI_MAIN_POWER_ON_VALID_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_xhci_power_off_ack` reader - u0_cdn_usb_xhci_power_off_ack"] -pub type U0_CDN_USB_XHCI_POWER_OFF_ACK_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_power_off_ready` reader - u0_cdn_usb_xhci_power_off_ready"] -pub type U0_CDN_USB_XHCI_POWER_OFF_READY_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_power_off_req` reader - u0_cdn_usb_xhci_power_off_req"] -pub type U0_CDN_USB_XHCI_POWER_OFF_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_power_off_req` writer - u0_cdn_usb_xhci_power_off_req"] -pub type U0_CDN_USB_XHCI_POWER_OFF_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_cdn_usb_xhci_power_on_ready` reader - u0_cdn_usb_xhci_power_on_ready"] -pub type U0_CDN_USB_XHCI_POWER_ON_READY_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_power_on_req` reader - u0_cdn_usb_xhci_power_on_req"] -pub type U0_CDN_USB_XHCI_POWER_ON_REQ_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_power_on_valid` reader - u0_cdn_usb_xhci_power_on_valid"] -pub type U0_CDN_USB_XHCI_POWER_ON_VALID_R = crate::BitReader; -#[doc = "Field `u0_cdn_usb_xhci_power_on_valid` writer - u0_cdn_usb_xhci_power_on_valid"] -pub type U0_CDN_USB_XHCI_POWER_ON_VALID_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_e2_sft7110_cease_from_tile_0` reader - u0_e2_sft7110_cease_from_tile_0"] -pub type U0_E2_SFT7110_CEASE_FROM_TILE_0_R = crate::BitReader; -#[doc = "Field `u0_e2_sft7110_debug_from_tile_0` reader - u0_e2_sft7110_debug_from_tile_0"] -pub type U0_E2_SFT7110_DEBUG_FROM_TILE_0_R = crate::BitReader; -#[doc = "Field `u0_e2_sft7110_halt_from_tile_0` reader - u0_e2_sft7110_halt_from_tile_0"] -pub type U0_E2_SFT7110_HALT_FROM_TILE_0_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_debug_sel` reader - u0_usb_xhci_debug_sel"] +pub type U0_USB_XHCI_DEBUG_SEL_R = crate::FieldReader; +#[doc = "Field `u0_usb_xhci_debug_sel` writer - u0_usb_xhci_debug_sel"] +pub type U0_USB_XHCI_DEBUG_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +#[doc = "Field `u0_usb_xhci_main_power_off_ack` reader - u0_usb_xhci_main_power_off_ack"] +pub type U0_USB_XHCI_MAIN_POWER_OFF_ACK_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_main_power_off_req` reader - u0_usb_xhci_main_power_off_req"] +pub type U0_USB_XHCI_MAIN_POWER_OFF_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_main_power_on_ready` reader - u0_usb_xhci_main_power_on_ready"] +pub type U0_USB_XHCI_MAIN_POWER_ON_READY_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_main_power_on_ready` writer - u0_usb_xhci_main_power_on_ready"] +pub type U0_USB_XHCI_MAIN_POWER_ON_READY_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_xhci_main_power_on_req` reader - u0_usb_xhci_main_power_on_req"] +pub type U0_USB_XHCI_MAIN_POWER_ON_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_main_power_on_valid` reader - u0_usb_xhci_main_power_on_valid"] +pub type U0_USB_XHCI_MAIN_POWER_ON_VALID_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_main_power_on_valid` writer - u0_usb_xhci_main_power_on_valid"] +pub type U0_USB_XHCI_MAIN_POWER_ON_VALID_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_xhci_power_off_ack` reader - u0_usb_xhci_power_off_ack"] +pub type U0_USB_XHCI_POWER_OFF_ACK_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_power_off_ready` reader - u0_usb_xhci_power_off_ready"] +pub type U0_USB_XHCI_POWER_OFF_READY_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_power_off_req` reader - u0_usb_xhci_power_off_req"] +pub type U0_USB_XHCI_POWER_OFF_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_power_off_req` writer - u0_usb_xhci_power_off_req"] +pub type U0_USB_XHCI_POWER_OFF_REQ_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_usb_xhci_power_on_ready` reader - u0_usb_xhci_power_on_ready"] +pub type U0_USB_XHCI_POWER_ON_READY_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_power_on_req` reader - u0_usb_xhci_power_on_req"] +pub type U0_USB_XHCI_POWER_ON_REQ_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_power_on_valid` reader - u0_usb_xhci_power_on_valid"] +pub type U0_USB_XHCI_POWER_ON_VALID_R = crate::BitReader; +#[doc = "Field `u0_usb_xhci_power_on_valid` writer - u0_usb_xhci_power_on_valid"] +pub type U0_USB_XHCI_POWER_ON_VALID_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_e2_cease_from_tile_0` reader - u0_e2_cease_from_tile_0"] +pub type U0_E2_CEASE_FROM_TILE_0_R = crate::BitReader; +#[doc = "Field `u0_e2_debug_from_tile_0` reader - u0_e2_debug_from_tile_0"] +pub type U0_E2_DEBUG_FROM_TILE_0_R = crate::BitReader; +#[doc = "Field `u0_e2_halt_from_tile_0` reader - u0_e2_halt_from_tile_0"] +pub type U0_E2_HALT_FROM_TILE_0_R = crate::BitReader; impl R { - #[doc = "Bits 0:4 - u0_cdn_usb_xhci_debug_sel"] + #[doc = "Bits 0:4 - u0_usb_xhci_debug_sel"] #[inline(always)] - pub fn u0_cdn_usb_xhci_debug_sel(&self) -> U0_CDN_USB_XHCI_DEBUG_SEL_R { - U0_CDN_USB_XHCI_DEBUG_SEL_R::new((self.bits & 0x1f) as u8) + pub fn u0_usb_xhci_debug_sel(&self) -> U0_USB_XHCI_DEBUG_SEL_R { + U0_USB_XHCI_DEBUG_SEL_R::new((self.bits & 0x1f) as u8) } - #[doc = "Bit 5 - u0_cdn_usb_xhci_main_power_off_ack"] + #[doc = "Bit 5 - u0_usb_xhci_main_power_off_ack"] #[inline(always)] - pub fn u0_cdn_usb_xhci_main_power_off_ack(&self) -> U0_CDN_USB_XHCI_MAIN_POWER_OFF_ACK_R { - U0_CDN_USB_XHCI_MAIN_POWER_OFF_ACK_R::new(((self.bits >> 5) & 1) != 0) + pub fn u0_usb_xhci_main_power_off_ack(&self) -> U0_USB_XHCI_MAIN_POWER_OFF_ACK_R { + U0_USB_XHCI_MAIN_POWER_OFF_ACK_R::new(((self.bits >> 5) & 1) != 0) } - #[doc = "Bit 6 - u0_cdn_usb_xhci_main_power_off_req"] + #[doc = "Bit 6 - u0_usb_xhci_main_power_off_req"] #[inline(always)] - pub fn u0_cdn_usb_xhci_main_power_off_req(&self) -> U0_CDN_USB_XHCI_MAIN_POWER_OFF_REQ_R { - U0_CDN_USB_XHCI_MAIN_POWER_OFF_REQ_R::new(((self.bits >> 6) & 1) != 0) + pub fn u0_usb_xhci_main_power_off_req(&self) -> U0_USB_XHCI_MAIN_POWER_OFF_REQ_R { + U0_USB_XHCI_MAIN_POWER_OFF_REQ_R::new(((self.bits >> 6) & 1) != 0) } - #[doc = "Bit 7 - u0_cdn_usb_xhci_main_power_on_ready"] + #[doc = "Bit 7 - u0_usb_xhci_main_power_on_ready"] #[inline(always)] - pub fn u0_cdn_usb_xhci_main_power_on_ready(&self) -> U0_CDN_USB_XHCI_MAIN_POWER_ON_READY_R { - U0_CDN_USB_XHCI_MAIN_POWER_ON_READY_R::new(((self.bits >> 7) & 1) != 0) + pub fn u0_usb_xhci_main_power_on_ready(&self) -> U0_USB_XHCI_MAIN_POWER_ON_READY_R { + U0_USB_XHCI_MAIN_POWER_ON_READY_R::new(((self.bits >> 7) & 1) != 0) } - #[doc = "Bit 8 - u0_cdn_usb_xhci_main_power_on_req"] + #[doc = "Bit 8 - u0_usb_xhci_main_power_on_req"] #[inline(always)] - pub fn u0_cdn_usb_xhci_main_power_on_req(&self) -> U0_CDN_USB_XHCI_MAIN_POWER_ON_REQ_R { - U0_CDN_USB_XHCI_MAIN_POWER_ON_REQ_R::new(((self.bits >> 8) & 1) != 0) + pub fn u0_usb_xhci_main_power_on_req(&self) -> U0_USB_XHCI_MAIN_POWER_ON_REQ_R { + U0_USB_XHCI_MAIN_POWER_ON_REQ_R::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 9 - u0_cdn_usb_xhci_main_power_on_valid"] + #[doc = "Bit 9 - u0_usb_xhci_main_power_on_valid"] #[inline(always)] - pub fn u0_cdn_usb_xhci_main_power_on_valid(&self) -> U0_CDN_USB_XHCI_MAIN_POWER_ON_VALID_R { - U0_CDN_USB_XHCI_MAIN_POWER_ON_VALID_R::new(((self.bits >> 9) & 1) != 0) + pub fn u0_usb_xhci_main_power_on_valid(&self) -> U0_USB_XHCI_MAIN_POWER_ON_VALID_R { + U0_USB_XHCI_MAIN_POWER_ON_VALID_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 10 - u0_cdn_usb_xhci_power_off_ack"] + #[doc = "Bit 10 - u0_usb_xhci_power_off_ack"] #[inline(always)] - pub fn u0_cdn_usb_xhci_power_off_ack(&self) -> U0_CDN_USB_XHCI_POWER_OFF_ACK_R { - U0_CDN_USB_XHCI_POWER_OFF_ACK_R::new(((self.bits >> 10) & 1) != 0) + pub fn u0_usb_xhci_power_off_ack(&self) -> U0_USB_XHCI_POWER_OFF_ACK_R { + U0_USB_XHCI_POWER_OFF_ACK_R::new(((self.bits >> 10) & 1) != 0) } - #[doc = "Bit 11 - u0_cdn_usb_xhci_power_off_ready"] + #[doc = "Bit 11 - u0_usb_xhci_power_off_ready"] #[inline(always)] - pub fn u0_cdn_usb_xhci_power_off_ready(&self) -> U0_CDN_USB_XHCI_POWER_OFF_READY_R { - U0_CDN_USB_XHCI_POWER_OFF_READY_R::new(((self.bits >> 11) & 1) != 0) + pub fn u0_usb_xhci_power_off_ready(&self) -> U0_USB_XHCI_POWER_OFF_READY_R { + U0_USB_XHCI_POWER_OFF_READY_R::new(((self.bits >> 11) & 1) != 0) } - #[doc = "Bit 12 - u0_cdn_usb_xhci_power_off_req"] + #[doc = "Bit 12 - u0_usb_xhci_power_off_req"] #[inline(always)] - pub fn u0_cdn_usb_xhci_power_off_req(&self) -> U0_CDN_USB_XHCI_POWER_OFF_REQ_R { - U0_CDN_USB_XHCI_POWER_OFF_REQ_R::new(((self.bits >> 12) & 1) != 0) + pub fn u0_usb_xhci_power_off_req(&self) -> U0_USB_XHCI_POWER_OFF_REQ_R { + U0_USB_XHCI_POWER_OFF_REQ_R::new(((self.bits >> 12) & 1) != 0) } - #[doc = "Bit 13 - u0_cdn_usb_xhci_power_on_ready"] + #[doc = "Bit 13 - u0_usb_xhci_power_on_ready"] #[inline(always)] - pub fn u0_cdn_usb_xhci_power_on_ready(&self) -> U0_CDN_USB_XHCI_POWER_ON_READY_R { - U0_CDN_USB_XHCI_POWER_ON_READY_R::new(((self.bits >> 13) & 1) != 0) + pub fn u0_usb_xhci_power_on_ready(&self) -> U0_USB_XHCI_POWER_ON_READY_R { + U0_USB_XHCI_POWER_ON_READY_R::new(((self.bits >> 13) & 1) != 0) } - #[doc = "Bit 14 - u0_cdn_usb_xhci_power_on_req"] + #[doc = "Bit 14 - u0_usb_xhci_power_on_req"] #[inline(always)] - pub fn u0_cdn_usb_xhci_power_on_req(&self) -> U0_CDN_USB_XHCI_POWER_ON_REQ_R { - U0_CDN_USB_XHCI_POWER_ON_REQ_R::new(((self.bits >> 14) & 1) != 0) + pub fn u0_usb_xhci_power_on_req(&self) -> U0_USB_XHCI_POWER_ON_REQ_R { + U0_USB_XHCI_POWER_ON_REQ_R::new(((self.bits >> 14) & 1) != 0) } - #[doc = "Bit 15 - u0_cdn_usb_xhci_power_on_valid"] + #[doc = "Bit 15 - u0_usb_xhci_power_on_valid"] #[inline(always)] - pub fn u0_cdn_usb_xhci_power_on_valid(&self) -> U0_CDN_USB_XHCI_POWER_ON_VALID_R { - U0_CDN_USB_XHCI_POWER_ON_VALID_R::new(((self.bits >> 15) & 1) != 0) + pub fn u0_usb_xhci_power_on_valid(&self) -> U0_USB_XHCI_POWER_ON_VALID_R { + U0_USB_XHCI_POWER_ON_VALID_R::new(((self.bits >> 15) & 1) != 0) } - #[doc = "Bit 16 - u0_e2_sft7110_cease_from_tile_0"] + #[doc = "Bit 16 - u0_e2_cease_from_tile_0"] #[inline(always)] - pub fn u0_e2_sft7110_cease_from_tile_0(&self) -> U0_E2_SFT7110_CEASE_FROM_TILE_0_R { - U0_E2_SFT7110_CEASE_FROM_TILE_0_R::new(((self.bits >> 16) & 1) != 0) + pub fn u0_e2_cease_from_tile_0(&self) -> U0_E2_CEASE_FROM_TILE_0_R { + U0_E2_CEASE_FROM_TILE_0_R::new(((self.bits >> 16) & 1) != 0) } - #[doc = "Bit 17 - u0_e2_sft7110_debug_from_tile_0"] + #[doc = "Bit 17 - u0_e2_debug_from_tile_0"] #[inline(always)] - pub fn u0_e2_sft7110_debug_from_tile_0(&self) -> U0_E2_SFT7110_DEBUG_FROM_TILE_0_R { - U0_E2_SFT7110_DEBUG_FROM_TILE_0_R::new(((self.bits >> 17) & 1) != 0) + pub fn u0_e2_debug_from_tile_0(&self) -> U0_E2_DEBUG_FROM_TILE_0_R { + U0_E2_DEBUG_FROM_TILE_0_R::new(((self.bits >> 17) & 1) != 0) } - #[doc = "Bit 18 - u0_e2_sft7110_halt_from_tile_0"] + #[doc = "Bit 18 - u0_e2_halt_from_tile_0"] #[inline(always)] - pub fn u0_e2_sft7110_halt_from_tile_0(&self) -> U0_E2_SFT7110_HALT_FROM_TILE_0_R { - U0_E2_SFT7110_HALT_FROM_TILE_0_R::new(((self.bits >> 18) & 1) != 0) + pub fn u0_e2_halt_from_tile_0(&self) -> U0_E2_HALT_FROM_TILE_0_R { + U0_E2_HALT_FROM_TILE_0_R::new(((self.bits >> 18) & 1) != 0) } } impl W { - #[doc = "Bits 0:4 - u0_cdn_usb_xhci_debug_sel"] + #[doc = "Bits 0:4 - u0_usb_xhci_debug_sel"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_xhci_debug_sel(&mut self) -> U0_CDN_USB_XHCI_DEBUG_SEL_W { - U0_CDN_USB_XHCI_DEBUG_SEL_W::new(self, 0) + pub fn u0_usb_xhci_debug_sel(&mut self) -> U0_USB_XHCI_DEBUG_SEL_W { + U0_USB_XHCI_DEBUG_SEL_W::new(self, 0) } - #[doc = "Bit 7 - u0_cdn_usb_xhci_main_power_on_ready"] + #[doc = "Bit 7 - u0_usb_xhci_main_power_on_ready"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_xhci_main_power_on_ready( + pub fn u0_usb_xhci_main_power_on_ready( &mut self, - ) -> U0_CDN_USB_XHCI_MAIN_POWER_ON_READY_W { - U0_CDN_USB_XHCI_MAIN_POWER_ON_READY_W::new(self, 7) + ) -> U0_USB_XHCI_MAIN_POWER_ON_READY_W { + U0_USB_XHCI_MAIN_POWER_ON_READY_W::new(self, 7) } - #[doc = "Bit 9 - u0_cdn_usb_xhci_main_power_on_valid"] + #[doc = "Bit 9 - u0_usb_xhci_main_power_on_valid"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_xhci_main_power_on_valid( + pub fn u0_usb_xhci_main_power_on_valid( &mut self, - ) -> U0_CDN_USB_XHCI_MAIN_POWER_ON_VALID_W { - U0_CDN_USB_XHCI_MAIN_POWER_ON_VALID_W::new(self, 9) + ) -> U0_USB_XHCI_MAIN_POWER_ON_VALID_W { + U0_USB_XHCI_MAIN_POWER_ON_VALID_W::new(self, 9) } - #[doc = "Bit 12 - u0_cdn_usb_xhci_power_off_req"] + #[doc = "Bit 12 - u0_usb_xhci_power_off_req"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_xhci_power_off_req( - &mut self, - ) -> U0_CDN_USB_XHCI_POWER_OFF_REQ_W { - U0_CDN_USB_XHCI_POWER_OFF_REQ_W::new(self, 12) + pub fn u0_usb_xhci_power_off_req(&mut self) -> U0_USB_XHCI_POWER_OFF_REQ_W { + U0_USB_XHCI_POWER_OFF_REQ_W::new(self, 12) } - #[doc = "Bit 15 - u0_cdn_usb_xhci_power_on_valid"] + #[doc = "Bit 15 - u0_usb_xhci_power_on_valid"] #[inline(always)] #[must_use] - pub fn u0_cdn_usb_xhci_power_on_valid( + pub fn u0_usb_xhci_power_on_valid( &mut self, - ) -> U0_CDN_USB_XHCI_POWER_ON_VALID_W { - U0_CDN_USB_XHCI_POWER_ON_VALID_W::new(self, 15) + ) -> U0_USB_XHCI_POWER_ON_VALID_W { + U0_USB_XHCI_POWER_ON_VALID_W::new(self, 15) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_60.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_60.rs index 8ee91dc..ce50eba 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_60.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_60.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_60` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_351_320` reader - u0_plda_pcie_k_phyparam_351_320"] -pub type U0_PLDA_PCIE_K_PHYPARAM_351_320_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_351_320` writer - u0_plda_pcie_k_phyparam_351_320"] -pub type U0_PLDA_PCIE_K_PHYPARAM_351_320_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_351_320` reader - u0_pcie_k_phyparam_351_320"] +pub type U0_PCIE_K_PHYPARAM_351_320_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_351_320` writer - u0_pcie_k_phyparam_351_320"] +pub type U0_PCIE_K_PHYPARAM_351_320_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_351_320"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_351_320"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_351_320(&self) -> U0_PLDA_PCIE_K_PHYPARAM_351_320_R { - U0_PLDA_PCIE_K_PHYPARAM_351_320_R::new(self.bits) + pub fn u0_pcie_k_phyparam_351_320(&self) -> U0_PCIE_K_PHYPARAM_351_320_R { + U0_PCIE_K_PHYPARAM_351_320_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_351_320"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_351_320"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_351_320( + pub fn u0_pcie_k_phyparam_351_320( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_351_320_W { - U0_PLDA_PCIE_K_PHYPARAM_351_320_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_351_320_W { + U0_PCIE_K_PHYPARAM_351_320_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_61.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_61.rs index 73cd2f0..01c6593 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_61.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_61.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_61` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_383_352` reader - u0_plda_pcie_k_phyparam_383_352"] -pub type U0_PLDA_PCIE_K_PHYPARAM_383_352_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_383_352` writer - u0_plda_pcie_k_phyparam_383_352"] -pub type U0_PLDA_PCIE_K_PHYPARAM_383_352_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_383_352` reader - u0_pcie_k_phyparam_383_352"] +pub type U0_PCIE_K_PHYPARAM_383_352_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_383_352` writer - u0_pcie_k_phyparam_383_352"] +pub type U0_PCIE_K_PHYPARAM_383_352_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_383_352"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_383_352"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_383_352(&self) -> U0_PLDA_PCIE_K_PHYPARAM_383_352_R { - U0_PLDA_PCIE_K_PHYPARAM_383_352_R::new(self.bits) + pub fn u0_pcie_k_phyparam_383_352(&self) -> U0_PCIE_K_PHYPARAM_383_352_R { + U0_PCIE_K_PHYPARAM_383_352_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_383_352"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_383_352"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_383_352( + pub fn u0_pcie_k_phyparam_383_352( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_383_352_W { - U0_PLDA_PCIE_K_PHYPARAM_383_352_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_383_352_W { + U0_PCIE_K_PHYPARAM_383_352_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_62.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_62.rs index c31b2f3..2965218 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_62.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_62.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_62` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_415_384` reader - u0_plda_pcie_k_phyparam_415_384"] -pub type U0_PLDA_PCIE_K_PHYPARAM_415_384_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_415_384` writer - u0_plda_pcie_k_phyparam_415_384"] -pub type U0_PLDA_PCIE_K_PHYPARAM_415_384_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_415_384` reader - u0_pcie_k_phyparam_415_384"] +pub type U0_PCIE_K_PHYPARAM_415_384_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_415_384` writer - u0_pcie_k_phyparam_415_384"] +pub type U0_PCIE_K_PHYPARAM_415_384_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_415_384"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_415_384"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_415_384(&self) -> U0_PLDA_PCIE_K_PHYPARAM_415_384_R { - U0_PLDA_PCIE_K_PHYPARAM_415_384_R::new(self.bits) + pub fn u0_pcie_k_phyparam_415_384(&self) -> U0_PCIE_K_PHYPARAM_415_384_R { + U0_PCIE_K_PHYPARAM_415_384_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_415_384"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_415_384"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_415_384( + pub fn u0_pcie_k_phyparam_415_384( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_415_384_W { - U0_PLDA_PCIE_K_PHYPARAM_415_384_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_415_384_W { + U0_PCIE_K_PHYPARAM_415_384_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_63.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_63.rs index 27f1942..853c252 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_63.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_63.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_63` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_447_416` reader - u0_plda_pcie_k_phyparam_447_416"] -pub type U0_PLDA_PCIE_K_PHYPARAM_447_416_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_447_416` writer - u0_plda_pcie_k_phyparam_447_416"] -pub type U0_PLDA_PCIE_K_PHYPARAM_447_416_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_447_416` reader - u0_pcie_k_phyparam_447_416"] +pub type U0_PCIE_K_PHYPARAM_447_416_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_447_416` writer - u0_pcie_k_phyparam_447_416"] +pub type U0_PCIE_K_PHYPARAM_447_416_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_447_416"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_447_416"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_447_416(&self) -> U0_PLDA_PCIE_K_PHYPARAM_447_416_R { - U0_PLDA_PCIE_K_PHYPARAM_447_416_R::new(self.bits) + pub fn u0_pcie_k_phyparam_447_416(&self) -> U0_PCIE_K_PHYPARAM_447_416_R { + U0_PCIE_K_PHYPARAM_447_416_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_447_416"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_447_416"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_447_416( + pub fn u0_pcie_k_phyparam_447_416( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_447_416_W { - U0_PLDA_PCIE_K_PHYPARAM_447_416_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_447_416_W { + U0_PCIE_K_PHYPARAM_447_416_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_64.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_64.rs index 800b68b..345eee9 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_64.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_64.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_64` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_479_448` reader - u0_plda_pcie_k_phyparam_479_448"] -pub type U0_PLDA_PCIE_K_PHYPARAM_479_448_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_479_448` writer - u0_plda_pcie_k_phyparam_479_448"] -pub type U0_PLDA_PCIE_K_PHYPARAM_479_448_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_479_448` reader - u0_pcie_k_phyparam_479_448"] +pub type U0_PCIE_K_PHYPARAM_479_448_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_479_448` writer - u0_pcie_k_phyparam_479_448"] +pub type U0_PCIE_K_PHYPARAM_479_448_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_479_448"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_479_448"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_479_448(&self) -> U0_PLDA_PCIE_K_PHYPARAM_479_448_R { - U0_PLDA_PCIE_K_PHYPARAM_479_448_R::new(self.bits) + pub fn u0_pcie_k_phyparam_479_448(&self) -> U0_PCIE_K_PHYPARAM_479_448_R { + U0_PCIE_K_PHYPARAM_479_448_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_479_448"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_479_448"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_479_448( + pub fn u0_pcie_k_phyparam_479_448( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_479_448_W { - U0_PLDA_PCIE_K_PHYPARAM_479_448_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_479_448_W { + U0_PCIE_K_PHYPARAM_479_448_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_65.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_65.rs index ce31a0e..c3ba1e7 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_65.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_65.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_65` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_511_480` reader - u0_plda_pcie_k_phyparam_511_480"] -pub type U0_PLDA_PCIE_K_PHYPARAM_511_480_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_511_480` writer - u0_plda_pcie_k_phyparam_511_480"] -pub type U0_PLDA_PCIE_K_PHYPARAM_511_480_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_511_480` reader - u0_pcie_k_phyparam_511_480"] +pub type U0_PCIE_K_PHYPARAM_511_480_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_511_480` writer - u0_pcie_k_phyparam_511_480"] +pub type U0_PCIE_K_PHYPARAM_511_480_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_511_480"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_511_480"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_511_480(&self) -> U0_PLDA_PCIE_K_PHYPARAM_511_480_R { - U0_PLDA_PCIE_K_PHYPARAM_511_480_R::new(self.bits) + pub fn u0_pcie_k_phyparam_511_480(&self) -> U0_PCIE_K_PHYPARAM_511_480_R { + U0_PCIE_K_PHYPARAM_511_480_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_511_480"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_511_480"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_511_480( + pub fn u0_pcie_k_phyparam_511_480( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_511_480_W { - U0_PLDA_PCIE_K_PHYPARAM_511_480_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_511_480_W { + U0_PCIE_K_PHYPARAM_511_480_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_66.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_66.rs index aac5ec5..c5d6415 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_66.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_66.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_66` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_543_512` reader - u0_plda_pcie_k_phyparam_543_512"] -pub type U0_PLDA_PCIE_K_PHYPARAM_543_512_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_543_512` writer - u0_plda_pcie_k_phyparam_543_512"] -pub type U0_PLDA_PCIE_K_PHYPARAM_543_512_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_543_512` reader - u0_pcie_k_phyparam_543_512"] +pub type U0_PCIE_K_PHYPARAM_543_512_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_543_512` writer - u0_pcie_k_phyparam_543_512"] +pub type U0_PCIE_K_PHYPARAM_543_512_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_543_512"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_543_512"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_543_512(&self) -> U0_PLDA_PCIE_K_PHYPARAM_543_512_R { - U0_PLDA_PCIE_K_PHYPARAM_543_512_R::new(self.bits) + pub fn u0_pcie_k_phyparam_543_512(&self) -> U0_PCIE_K_PHYPARAM_543_512_R { + U0_PCIE_K_PHYPARAM_543_512_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_543_512"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_543_512"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_543_512( + pub fn u0_pcie_k_phyparam_543_512( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_543_512_W { - U0_PLDA_PCIE_K_PHYPARAM_543_512_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_543_512_W { + U0_PCIE_K_PHYPARAM_543_512_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_67.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_67.rs index 34d86ce..f760769 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_67.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_67.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_67` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_575_544` reader - u0_plda_pcie_k_phyparam_575_544"] -pub type U0_PLDA_PCIE_K_PHYPARAM_575_544_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_575_544` writer - u0_plda_pcie_k_phyparam_575_544"] -pub type U0_PLDA_PCIE_K_PHYPARAM_575_544_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_575_544` reader - u0_pcie_k_phyparam_575_544"] +pub type U0_PCIE_K_PHYPARAM_575_544_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_575_544` writer - u0_pcie_k_phyparam_575_544"] +pub type U0_PCIE_K_PHYPARAM_575_544_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_575_544"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_575_544"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_575_544(&self) -> U0_PLDA_PCIE_K_PHYPARAM_575_544_R { - U0_PLDA_PCIE_K_PHYPARAM_575_544_R::new(self.bits) + pub fn u0_pcie_k_phyparam_575_544(&self) -> U0_PCIE_K_PHYPARAM_575_544_R { + U0_PCIE_K_PHYPARAM_575_544_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_575_544"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_575_544"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_575_544( + pub fn u0_pcie_k_phyparam_575_544( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_575_544_W { - U0_PLDA_PCIE_K_PHYPARAM_575_544_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_575_544_W { + U0_PCIE_K_PHYPARAM_575_544_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_68.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_68.rs index f1cff6f..4634393 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_68.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_68.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_68` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_607_576` reader - u0_plda_pcie_k_phyparam_607_576"] -pub type U0_PLDA_PCIE_K_PHYPARAM_607_576_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_607_576` writer - u0_plda_pcie_k_phyparam_607_576"] -pub type U0_PLDA_PCIE_K_PHYPARAM_607_576_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_607_576` reader - u0_pcie_k_phyparam_607_576"] +pub type U0_PCIE_K_PHYPARAM_607_576_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_607_576` writer - u0_pcie_k_phyparam_607_576"] +pub type U0_PCIE_K_PHYPARAM_607_576_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_607_576"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_607_576"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_607_576(&self) -> U0_PLDA_PCIE_K_PHYPARAM_607_576_R { - U0_PLDA_PCIE_K_PHYPARAM_607_576_R::new(self.bits) + pub fn u0_pcie_k_phyparam_607_576(&self) -> U0_PCIE_K_PHYPARAM_607_576_R { + U0_PCIE_K_PHYPARAM_607_576_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_607_576"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_607_576"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_607_576( + pub fn u0_pcie_k_phyparam_607_576( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_607_576_W { - U0_PLDA_PCIE_K_PHYPARAM_607_576_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_607_576_W { + U0_PCIE_K_PHYPARAM_607_576_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_69.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_69.rs index b2fb7e4..272b598 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_69.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_69.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_69` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_639_608` reader - u0_plda_pcie_k_phyparam_639_608"] -pub type U0_PLDA_PCIE_K_PHYPARAM_639_608_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_639_608` writer - u0_plda_pcie_k_phyparam_639_608"] -pub type U0_PLDA_PCIE_K_PHYPARAM_639_608_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_639_608` reader - u0_pcie_k_phyparam_639_608"] +pub type U0_PCIE_K_PHYPARAM_639_608_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_639_608` writer - u0_pcie_k_phyparam_639_608"] +pub type U0_PCIE_K_PHYPARAM_639_608_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_639_608"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_639_608"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_639_608(&self) -> U0_PLDA_PCIE_K_PHYPARAM_639_608_R { - U0_PLDA_PCIE_K_PHYPARAM_639_608_R::new(self.bits) + pub fn u0_pcie_k_phyparam_639_608(&self) -> U0_PCIE_K_PHYPARAM_639_608_R { + U0_PCIE_K_PHYPARAM_639_608_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_639_608"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_639_608"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_639_608( + pub fn u0_pcie_k_phyparam_639_608( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_639_608_W { - U0_PLDA_PCIE_K_PHYPARAM_639_608_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_639_608_W { + U0_PCIE_K_PHYPARAM_639_608_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_7.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_7.rs index 9380f1d..e8dab01 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_7.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_7.rs @@ -2,28 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_7` writer"] pub type W = crate::W; -#[doc = "Field `u0_e2_sft7110_nmi_0_rnmi_exception_vector` reader - u0_e2_sft7110_nmi_0_rnmi_exception_vector"] -pub type U0_E2_SFT7110_NMI_0_RNMI_EXCEPTION_VECTOR_R = crate::FieldReader; -#[doc = "Field `u0_e2_sft7110_nmi_0_rnmi_exception_vector` writer - u0_e2_sft7110_nmi_0_rnmi_exception_vector"] -pub type U0_E2_SFT7110_NMI_0_RNMI_EXCEPTION_VECTOR_W<'a, REG> = - crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_e2_nmi_exception_vector` reader - u0_e2_nmi_exception_vector"] +pub type U0_E2_NMI_EXCEPTION_VECTOR_R = crate::FieldReader; +#[doc = "Field `u0_e2_nmi_exception_vector` writer - u0_e2_nmi_exception_vector"] +pub type U0_E2_NMI_EXCEPTION_VECTOR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_e2_sft7110_nmi_0_rnmi_exception_vector"] + #[doc = "Bits 0:31 - u0_e2_nmi_exception_vector"] #[inline(always)] - pub fn u0_e2_sft7110_nmi_0_rnmi_exception_vector( - &self, - ) -> U0_E2_SFT7110_NMI_0_RNMI_EXCEPTION_VECTOR_R { - U0_E2_SFT7110_NMI_0_RNMI_EXCEPTION_VECTOR_R::new(self.bits) + pub fn u0_e2_nmi_exception_vector(&self) -> U0_E2_NMI_EXCEPTION_VECTOR_R { + U0_E2_NMI_EXCEPTION_VECTOR_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_e2_sft7110_nmi_0_rnmi_exception_vector"] + #[doc = "Bits 0:31 - u0_e2_nmi_exception_vector"] #[inline(always)] #[must_use] - pub fn u0_e2_sft7110_nmi_0_rnmi_exception_vector( + pub fn u0_e2_nmi_exception_vector( &mut self, - ) -> U0_E2_SFT7110_NMI_0_RNMI_EXCEPTION_VECTOR_W { - U0_E2_SFT7110_NMI_0_RNMI_EXCEPTION_VECTOR_W::new(self, 0) + ) -> U0_E2_NMI_EXCEPTION_VECTOR_W { + U0_E2_NMI_EXCEPTION_VECTOR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_70.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_70.rs index 23acb07..4c9fa69 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_70.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_70.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_70` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_671_640` reader - u0_plda_pcie_k_phyparam_671_640"] -pub type U0_PLDA_PCIE_K_PHYPARAM_671_640_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_671_640` writer - u0_plda_pcie_k_phyparam_671_640"] -pub type U0_PLDA_PCIE_K_PHYPARAM_671_640_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_671_640` reader - u0_pcie_k_phyparam_671_640"] +pub type U0_PCIE_K_PHYPARAM_671_640_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_671_640` writer - u0_pcie_k_phyparam_671_640"] +pub type U0_PCIE_K_PHYPARAM_671_640_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_671_640"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_671_640"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_671_640(&self) -> U0_PLDA_PCIE_K_PHYPARAM_671_640_R { - U0_PLDA_PCIE_K_PHYPARAM_671_640_R::new(self.bits) + pub fn u0_pcie_k_phyparam_671_640(&self) -> U0_PCIE_K_PHYPARAM_671_640_R { + U0_PCIE_K_PHYPARAM_671_640_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_671_640"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_671_640"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_671_640( + pub fn u0_pcie_k_phyparam_671_640( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_671_640_W { - U0_PLDA_PCIE_K_PHYPARAM_671_640_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_671_640_W { + U0_PCIE_K_PHYPARAM_671_640_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_71.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_71.rs index c8e319f..09891d4 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_71.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_71.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_71` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_703_672` reader - u0_plda_pcie_k_phyparam_703_672"] -pub type U0_PLDA_PCIE_K_PHYPARAM_703_672_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_703_672` writer - u0_plda_pcie_k_phyparam_703_672"] -pub type U0_PLDA_PCIE_K_PHYPARAM_703_672_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_703_672` reader - u0_pcie_k_phyparam_703_672"] +pub type U0_PCIE_K_PHYPARAM_703_672_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_703_672` writer - u0_pcie_k_phyparam_703_672"] +pub type U0_PCIE_K_PHYPARAM_703_672_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_703_672"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_703_672"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_703_672(&self) -> U0_PLDA_PCIE_K_PHYPARAM_703_672_R { - U0_PLDA_PCIE_K_PHYPARAM_703_672_R::new(self.bits) + pub fn u0_pcie_k_phyparam_703_672(&self) -> U0_PCIE_K_PHYPARAM_703_672_R { + U0_PCIE_K_PHYPARAM_703_672_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_703_672"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_703_672"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_703_672( + pub fn u0_pcie_k_phyparam_703_672( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_703_672_W { - U0_PLDA_PCIE_K_PHYPARAM_703_672_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_703_672_W { + U0_PCIE_K_PHYPARAM_703_672_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_72.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_72.rs index e7a3ba7..16501cc 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_72.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_72.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_72` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_735_704` reader - u0_plda_pcie_k_phyparam_735_704"] -pub type U0_PLDA_PCIE_K_PHYPARAM_735_704_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_735_704` writer - u0_plda_pcie_k_phyparam_735_704"] -pub type U0_PLDA_PCIE_K_PHYPARAM_735_704_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_735_704` reader - u0_pcie_k_phyparam_735_704"] +pub type U0_PCIE_K_PHYPARAM_735_704_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_735_704` writer - u0_pcie_k_phyparam_735_704"] +pub type U0_PCIE_K_PHYPARAM_735_704_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_735_704"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_735_704"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_735_704(&self) -> U0_PLDA_PCIE_K_PHYPARAM_735_704_R { - U0_PLDA_PCIE_K_PHYPARAM_735_704_R::new(self.bits) + pub fn u0_pcie_k_phyparam_735_704(&self) -> U0_PCIE_K_PHYPARAM_735_704_R { + U0_PCIE_K_PHYPARAM_735_704_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_735_704"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_735_704"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_735_704( + pub fn u0_pcie_k_phyparam_735_704( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_735_704_W { - U0_PLDA_PCIE_K_PHYPARAM_735_704_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_735_704_W { + U0_PCIE_K_PHYPARAM_735_704_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_73.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_73.rs index d5c31c3..a2599c5 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_73.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_73.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_73` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_767_736` reader - u0_plda_pcie_k_phyparam_767_736"] -pub type U0_PLDA_PCIE_K_PHYPARAM_767_736_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_767_736` writer - u0_plda_pcie_k_phyparam_767_736"] -pub type U0_PLDA_PCIE_K_PHYPARAM_767_736_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_767_736` reader - u0_pcie_k_phyparam_767_736"] +pub type U0_PCIE_K_PHYPARAM_767_736_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_767_736` writer - u0_pcie_k_phyparam_767_736"] +pub type U0_PCIE_K_PHYPARAM_767_736_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_767_736"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_767_736"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_767_736(&self) -> U0_PLDA_PCIE_K_PHYPARAM_767_736_R { - U0_PLDA_PCIE_K_PHYPARAM_767_736_R::new(self.bits) + pub fn u0_pcie_k_phyparam_767_736(&self) -> U0_PCIE_K_PHYPARAM_767_736_R { + U0_PCIE_K_PHYPARAM_767_736_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_767_736"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_767_736"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_767_736( + pub fn u0_pcie_k_phyparam_767_736( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_767_736_W { - U0_PLDA_PCIE_K_PHYPARAM_767_736_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_767_736_W { + U0_PCIE_K_PHYPARAM_767_736_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_74.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_74.rs index 60242f5..754a5c2 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_74.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_74.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_74` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_799_768` reader - u0_plda_pcie_k_phyparam_799_768"] -pub type U0_PLDA_PCIE_K_PHYPARAM_799_768_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_799_768` writer - u0_plda_pcie_k_phyparam_799_768"] -pub type U0_PLDA_PCIE_K_PHYPARAM_799_768_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_799_768` reader - u0_pcie_k_phyparam_799_768"] +pub type U0_PCIE_K_PHYPARAM_799_768_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_799_768` writer - u0_pcie_k_phyparam_799_768"] +pub type U0_PCIE_K_PHYPARAM_799_768_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_799_768"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_799_768"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_799_768(&self) -> U0_PLDA_PCIE_K_PHYPARAM_799_768_R { - U0_PLDA_PCIE_K_PHYPARAM_799_768_R::new(self.bits) + pub fn u0_pcie_k_phyparam_799_768(&self) -> U0_PCIE_K_PHYPARAM_799_768_R { + U0_PCIE_K_PHYPARAM_799_768_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_799_768"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_799_768"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_799_768( + pub fn u0_pcie_k_phyparam_799_768( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_799_768_W { - U0_PLDA_PCIE_K_PHYPARAM_799_768_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_799_768_W { + U0_PCIE_K_PHYPARAM_799_768_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_75.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_75.rs index 6ca96be..03acd82 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_75.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_75.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_75` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_831_800` reader - u0_plda_pcie_k_phyparam_831_800"] -pub type U0_PLDA_PCIE_K_PHYPARAM_831_800_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_831_800` writer - u0_plda_pcie_k_phyparam_831_800"] -pub type U0_PLDA_PCIE_K_PHYPARAM_831_800_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_k_phyparam_831_800` reader - u0_pcie_k_phyparam_831_800"] +pub type U0_PCIE_K_PHYPARAM_831_800_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_831_800` writer - u0_pcie_k_phyparam_831_800"] +pub type U0_PCIE_K_PHYPARAM_831_800_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_831_800"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_831_800"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_831_800(&self) -> U0_PLDA_PCIE_K_PHYPARAM_831_800_R { - U0_PLDA_PCIE_K_PHYPARAM_831_800_R::new(self.bits) + pub fn u0_pcie_k_phyparam_831_800(&self) -> U0_PCIE_K_PHYPARAM_831_800_R { + U0_PCIE_K_PHYPARAM_831_800_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_k_phyparam_831_800"] + #[doc = "Bits 0:31 - u0_pcie_k_phyparam_831_800"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_831_800( + pub fn u0_pcie_k_phyparam_831_800( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_831_800_W { - U0_PLDA_PCIE_K_PHYPARAM_831_800_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_831_800_W { + U0_PCIE_K_PHYPARAM_831_800_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_76.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_76.rs index 5f3b3b1..4ae9d2e 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_76.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_76.rs @@ -2,62 +2,62 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_76` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_k_phyparam_839_832` reader - u0_plda_pcie_k_phyparam_839_832"] -pub type U0_PLDA_PCIE_K_PHYPARAM_839_832_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_k_phyparam_839_832` writer - u0_plda_pcie_k_phyparam_839_832"] -pub type U0_PLDA_PCIE_K_PHYPARAM_839_832_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `u0_plda_pcie_k_rp_nep` reader - u0_plda_pcie_k_rp_nep"] -pub type U0_PLDA_PCIE_K_RP_NEP_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_k_rp_nep` writer - u0_plda_pcie_k_rp_nep"] -pub type U0_PLDA_PCIE_K_RP_NEP_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_l1sub_entack` reader - u0_plda_pcie_l1sub_entack"] -pub type U0_PLDA_PCIE_L1SUB_ENTACK_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_l1sub_entreq` reader - u0_plda_pcie_l1sub_entreq"] -pub type U0_PLDA_PCIE_L1SUB_ENTREQ_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_l1sub_entreq` writer - u0_plda_pcie_l1sub_entreq"] -pub type U0_PLDA_PCIE_L1SUB_ENTREQ_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_k_phyparam_839_832` reader - u0_pcie_k_phyparam_839_832"] +pub type U0_PCIE_K_PHYPARAM_839_832_R = crate::FieldReader; +#[doc = "Field `u0_pcie_k_phyparam_839_832` writer - u0_pcie_k_phyparam_839_832"] +pub type U0_PCIE_K_PHYPARAM_839_832_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +#[doc = "Field `u0_pcie_k_rp_nep` reader - u0_pcie_k_rp_nep"] +pub type U0_PCIE_K_RP_NEP_R = crate::BitReader; +#[doc = "Field `u0_pcie_k_rp_nep` writer - u0_pcie_k_rp_nep"] +pub type U0_PCIE_K_RP_NEP_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_l1sub_entack` reader - u0_pcie_l1sub_entack"] +pub type U0_PCIE_L1SUB_ENTACK_R = crate::BitReader; +#[doc = "Field `u0_pcie_l1sub_entreq` reader - u0_pcie_l1sub_entreq"] +pub type U0_PCIE_L1SUB_ENTREQ_R = crate::BitReader; +#[doc = "Field `u0_pcie_l1sub_entreq` writer - u0_pcie_l1sub_entreq"] +pub type U0_PCIE_L1SUB_ENTREQ_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bits 0:7 - u0_plda_pcie_k_phyparam_839_832"] + #[doc = "Bits 0:7 - u0_pcie_k_phyparam_839_832"] #[inline(always)] - pub fn u0_plda_pcie_k_phyparam_839_832(&self) -> U0_PLDA_PCIE_K_PHYPARAM_839_832_R { - U0_PLDA_PCIE_K_PHYPARAM_839_832_R::new((self.bits & 0xff) as u8) + pub fn u0_pcie_k_phyparam_839_832(&self) -> U0_PCIE_K_PHYPARAM_839_832_R { + U0_PCIE_K_PHYPARAM_839_832_R::new((self.bits & 0xff) as u8) } - #[doc = "Bit 8 - u0_plda_pcie_k_rp_nep"] + #[doc = "Bit 8 - u0_pcie_k_rp_nep"] #[inline(always)] - pub fn u0_plda_pcie_k_rp_nep(&self) -> U0_PLDA_PCIE_K_RP_NEP_R { - U0_PLDA_PCIE_K_RP_NEP_R::new(((self.bits >> 8) & 1) != 0) + pub fn u0_pcie_k_rp_nep(&self) -> U0_PCIE_K_RP_NEP_R { + U0_PCIE_K_RP_NEP_R::new(((self.bits >> 8) & 1) != 0) } - #[doc = "Bit 9 - u0_plda_pcie_l1sub_entack"] + #[doc = "Bit 9 - u0_pcie_l1sub_entack"] #[inline(always)] - pub fn u0_plda_pcie_l1sub_entack(&self) -> U0_PLDA_PCIE_L1SUB_ENTACK_R { - U0_PLDA_PCIE_L1SUB_ENTACK_R::new(((self.bits >> 9) & 1) != 0) + pub fn u0_pcie_l1sub_entack(&self) -> U0_PCIE_L1SUB_ENTACK_R { + U0_PCIE_L1SUB_ENTACK_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bit 10 - u0_plda_pcie_l1sub_entreq"] + #[doc = "Bit 10 - u0_pcie_l1sub_entreq"] #[inline(always)] - pub fn u0_plda_pcie_l1sub_entreq(&self) -> U0_PLDA_PCIE_L1SUB_ENTREQ_R { - U0_PLDA_PCIE_L1SUB_ENTREQ_R::new(((self.bits >> 10) & 1) != 0) + pub fn u0_pcie_l1sub_entreq(&self) -> U0_PCIE_L1SUB_ENTREQ_R { + U0_PCIE_L1SUB_ENTREQ_R::new(((self.bits >> 10) & 1) != 0) } } impl W { - #[doc = "Bits 0:7 - u0_plda_pcie_k_phyparam_839_832"] + #[doc = "Bits 0:7 - u0_pcie_k_phyparam_839_832"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_phyparam_839_832( + pub fn u0_pcie_k_phyparam_839_832( &mut self, - ) -> U0_PLDA_PCIE_K_PHYPARAM_839_832_W { - U0_PLDA_PCIE_K_PHYPARAM_839_832_W::new(self, 0) + ) -> U0_PCIE_K_PHYPARAM_839_832_W { + U0_PCIE_K_PHYPARAM_839_832_W::new(self, 0) } - #[doc = "Bit 8 - u0_plda_pcie_k_rp_nep"] + #[doc = "Bit 8 - u0_pcie_k_rp_nep"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_k_rp_nep(&mut self) -> U0_PLDA_PCIE_K_RP_NEP_W { - U0_PLDA_PCIE_K_RP_NEP_W::new(self, 8) + pub fn u0_pcie_k_rp_nep(&mut self) -> U0_PCIE_K_RP_NEP_W { + U0_PCIE_K_RP_NEP_W::new(self, 8) } - #[doc = "Bit 10 - u0_plda_pcie_l1sub_entreq"] + #[doc = "Bit 10 - u0_pcie_l1sub_entreq"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_l1sub_entreq(&mut self) -> U0_PLDA_PCIE_L1SUB_ENTREQ_W { - U0_PLDA_PCIE_L1SUB_ENTREQ_W::new(self, 10) + pub fn u0_pcie_l1sub_entreq(&mut self) -> U0_PCIE_L1SUB_ENTREQ_W { + U0_PCIE_L1SUB_ENTREQ_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_77.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_77.rs index 4f996d8..b0d471c 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_77.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_77.rs @@ -2,25 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_77` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_local_interrupt_in` reader - u0_plda_pcie_local_interrupt_in"] -pub type U0_PLDA_PCIE_LOCAL_INTERRUPT_IN_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_local_interrupt_in` writer - u0_plda_pcie_local_interrupt_in"] -pub type U0_PLDA_PCIE_LOCAL_INTERRUPT_IN_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_local_interrupt_in` reader - u0_pcie_local_interrupt_in"] +pub type U0_PCIE_LOCAL_INTERRUPT_IN_R = crate::FieldReader; +#[doc = "Field `u0_pcie_local_interrupt_in` writer - u0_pcie_local_interrupt_in"] +pub type U0_PCIE_LOCAL_INTERRUPT_IN_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_local_interrupt_in"] + #[doc = "Bits 0:31 - u0_pcie_local_interrupt_in"] #[inline(always)] - pub fn u0_plda_pcie_local_interrupt_in(&self) -> U0_PLDA_PCIE_LOCAL_INTERRUPT_IN_R { - U0_PLDA_PCIE_LOCAL_INTERRUPT_IN_R::new(self.bits) + pub fn u0_pcie_local_interrupt_in(&self) -> U0_PCIE_LOCAL_INTERRUPT_IN_R { + U0_PCIE_LOCAL_INTERRUPT_IN_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_local_interrupt_in"] + #[doc = "Bits 0:31 - u0_pcie_local_interrupt_in"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_local_interrupt_in( + pub fn u0_pcie_local_interrupt_in( &mut self, - ) -> U0_PLDA_PCIE_LOCAL_INTERRUPT_IN_W { - U0_PLDA_PCIE_LOCAL_INTERRUPT_IN_W::new(self, 0) + ) -> U0_PCIE_LOCAL_INTERRUPT_IN_W { + U0_PCIE_LOCAL_INTERRUPT_IN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_78.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_78.rs index 791c478..cd2e6aa 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_78.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_78.rs @@ -2,108 +2,100 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_78` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_mperstn` reader - u0_plda_pcie_mperstn"] -pub type U0_PLDA_PCIE_MPERSTN_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_mperstn` writer - u0_plda_pcie_mperstn"] -pub type U0_PLDA_PCIE_MPERSTN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_pcie_ebuf_mode` reader - u0_plda_pcie_pcie_ebuf_mode"] -pub type U0_PLDA_PCIE_PCIE_EBUF_MODE_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_pcie_ebuf_mode` writer - u0_plda_pcie_pcie_ebuf_mode"] -pub type U0_PLDA_PCIE_PCIE_EBUF_MODE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_pcie_phy_test_cfg` reader - u0_plda_pcie_pcie_phy_test_cfg"] -pub type U0_PLDA_PCIE_PCIE_PHY_TEST_CFG_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_pcie_phy_test_cfg` writer - u0_plda_pcie_pcie_phy_test_cfg"] -pub type U0_PLDA_PCIE_PCIE_PHY_TEST_CFG_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; -#[doc = "Field `u0_plda_pcie_pcie_rx_eq_training` reader - u0_plda_pcie_pcie_rx_eq_training"] -pub type U0_PLDA_PCIE_PCIE_RX_EQ_TRAINING_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_pcie_rx_eq_training` writer - u0_plda_pcie_pcie_rx_eq_training"] -pub type U0_PLDA_PCIE_PCIE_RX_EQ_TRAINING_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_pcie_rxterm_en` reader - u0_plda_pcie_pcie_rxterm_en"] -pub type U0_PLDA_PCIE_PCIE_RXTERM_EN_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_pcie_rxterm_en` writer - u0_plda_pcie_pcie_rxterm_en"] -pub type U0_PLDA_PCIE_PCIE_RXTERM_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_pcie_tx_onezeros` reader - u0_plda_pcie_pcie_tx_onezeros"] -pub type U0_PLDA_PCIE_PCIE_TX_ONEZEROS_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_pcie_tx_onezeros` writer - u0_plda_pcie_pcie_tx_onezeros"] -pub type U0_PLDA_PCIE_PCIE_TX_ONEZEROS_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_mperstn` reader - u0_pcie_mperstn"] +pub type U0_PCIE_MPERSTN_R = crate::BitReader; +#[doc = "Field `u0_pcie_mperstn` writer - u0_pcie_mperstn"] +pub type U0_PCIE_MPERSTN_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_pcie_ebuf_mode` reader - u0_pcie_pcie_ebuf_mode"] +pub type U0_PCIE_PCIE_EBUF_MODE_R = crate::BitReader; +#[doc = "Field `u0_pcie_pcie_ebuf_mode` writer - u0_pcie_pcie_ebuf_mode"] +pub type U0_PCIE_PCIE_EBUF_MODE_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_pcie_phy_test_cfg` reader - u0_pcie_pcie_phy_test_cfg"] +pub type U0_PCIE_PCIE_PHY_TEST_CFG_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pcie_phy_test_cfg` writer - u0_pcie_pcie_phy_test_cfg"] +pub type U0_PCIE_PCIE_PHY_TEST_CFG_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; +#[doc = "Field `u0_pcie_pcie_rx_eq_training` reader - u0_pcie_pcie_rx_eq_training"] +pub type U0_PCIE_PCIE_RX_EQ_TRAINING_R = crate::BitReader; +#[doc = "Field `u0_pcie_pcie_rx_eq_training` writer - u0_pcie_pcie_rx_eq_training"] +pub type U0_PCIE_PCIE_RX_EQ_TRAINING_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_pcie_rxterm_en` reader - u0_pcie_pcie_rxterm_en"] +pub type U0_PCIE_PCIE_RXTERM_EN_R = crate::BitReader; +#[doc = "Field `u0_pcie_pcie_rxterm_en` writer - u0_pcie_pcie_rxterm_en"] +pub type U0_PCIE_PCIE_RXTERM_EN_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_pcie_tx_onezeros` reader - u0_pcie_pcie_tx_onezeros"] +pub type U0_PCIE_PCIE_TX_ONEZEROS_R = crate::BitReader; +#[doc = "Field `u0_pcie_pcie_tx_onezeros` writer - u0_pcie_pcie_tx_onezeros"] +pub type U0_PCIE_PCIE_TX_ONEZEROS_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { - #[doc = "Bit 0 - u0_plda_pcie_mperstn"] + #[doc = "Bit 0 - u0_pcie_mperstn"] #[inline(always)] - pub fn u0_plda_pcie_mperstn(&self) -> U0_PLDA_PCIE_MPERSTN_R { - U0_PLDA_PCIE_MPERSTN_R::new((self.bits & 1) != 0) + pub fn u0_pcie_mperstn(&self) -> U0_PCIE_MPERSTN_R { + U0_PCIE_MPERSTN_R::new((self.bits & 1) != 0) } - #[doc = "Bit 1 - u0_plda_pcie_pcie_ebuf_mode"] + #[doc = "Bit 1 - u0_pcie_pcie_ebuf_mode"] #[inline(always)] - pub fn u0_plda_pcie_pcie_ebuf_mode(&self) -> U0_PLDA_PCIE_PCIE_EBUF_MODE_R { - U0_PLDA_PCIE_PCIE_EBUF_MODE_R::new(((self.bits >> 1) & 1) != 0) + pub fn u0_pcie_pcie_ebuf_mode(&self) -> U0_PCIE_PCIE_EBUF_MODE_R { + U0_PCIE_PCIE_EBUF_MODE_R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bits 2:24 - u0_plda_pcie_pcie_phy_test_cfg"] + #[doc = "Bits 2:24 - u0_pcie_pcie_phy_test_cfg"] #[inline(always)] - pub fn u0_plda_pcie_pcie_phy_test_cfg(&self) -> U0_PLDA_PCIE_PCIE_PHY_TEST_CFG_R { - U0_PLDA_PCIE_PCIE_PHY_TEST_CFG_R::new((self.bits >> 2) & 0x007f_ffff) + pub fn u0_pcie_pcie_phy_test_cfg(&self) -> U0_PCIE_PCIE_PHY_TEST_CFG_R { + U0_PCIE_PCIE_PHY_TEST_CFG_R::new((self.bits >> 2) & 0x007f_ffff) } - #[doc = "Bit 25 - u0_plda_pcie_pcie_rx_eq_training"] + #[doc = "Bit 25 - u0_pcie_pcie_rx_eq_training"] #[inline(always)] - pub fn u0_plda_pcie_pcie_rx_eq_training(&self) -> U0_PLDA_PCIE_PCIE_RX_EQ_TRAINING_R { - U0_PLDA_PCIE_PCIE_RX_EQ_TRAINING_R::new(((self.bits >> 25) & 1) != 0) + pub fn u0_pcie_pcie_rx_eq_training(&self) -> U0_PCIE_PCIE_RX_EQ_TRAINING_R { + U0_PCIE_PCIE_RX_EQ_TRAINING_R::new(((self.bits >> 25) & 1) != 0) } - #[doc = "Bit 26 - u0_plda_pcie_pcie_rxterm_en"] + #[doc = "Bit 26 - u0_pcie_pcie_rxterm_en"] #[inline(always)] - pub fn u0_plda_pcie_pcie_rxterm_en(&self) -> U0_PLDA_PCIE_PCIE_RXTERM_EN_R { - U0_PLDA_PCIE_PCIE_RXTERM_EN_R::new(((self.bits >> 26) & 1) != 0) + pub fn u0_pcie_pcie_rxterm_en(&self) -> U0_PCIE_PCIE_RXTERM_EN_R { + U0_PCIE_PCIE_RXTERM_EN_R::new(((self.bits >> 26) & 1) != 0) } - #[doc = "Bit 27 - u0_plda_pcie_pcie_tx_onezeros"] + #[doc = "Bit 27 - u0_pcie_pcie_tx_onezeros"] #[inline(always)] - pub fn u0_plda_pcie_pcie_tx_onezeros(&self) -> U0_PLDA_PCIE_PCIE_TX_ONEZEROS_R { - U0_PLDA_PCIE_PCIE_TX_ONEZEROS_R::new(((self.bits >> 27) & 1) != 0) + pub fn u0_pcie_pcie_tx_onezeros(&self) -> U0_PCIE_PCIE_TX_ONEZEROS_R { + U0_PCIE_PCIE_TX_ONEZEROS_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bit 0 - u0_plda_pcie_mperstn"] + #[doc = "Bit 0 - u0_pcie_mperstn"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_mperstn(&mut self) -> U0_PLDA_PCIE_MPERSTN_W { - U0_PLDA_PCIE_MPERSTN_W::new(self, 0) + pub fn u0_pcie_mperstn(&mut self) -> U0_PCIE_MPERSTN_W { + U0_PCIE_MPERSTN_W::new(self, 0) } - #[doc = "Bit 1 - u0_plda_pcie_pcie_ebuf_mode"] + #[doc = "Bit 1 - u0_pcie_pcie_ebuf_mode"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pcie_ebuf_mode( - &mut self, - ) -> U0_PLDA_PCIE_PCIE_EBUF_MODE_W { - U0_PLDA_PCIE_PCIE_EBUF_MODE_W::new(self, 1) + pub fn u0_pcie_pcie_ebuf_mode(&mut self) -> U0_PCIE_PCIE_EBUF_MODE_W { + U0_PCIE_PCIE_EBUF_MODE_W::new(self, 1) } - #[doc = "Bits 2:24 - u0_plda_pcie_pcie_phy_test_cfg"] + #[doc = "Bits 2:24 - u0_pcie_pcie_phy_test_cfg"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pcie_phy_test_cfg( - &mut self, - ) -> U0_PLDA_PCIE_PCIE_PHY_TEST_CFG_W { - U0_PLDA_PCIE_PCIE_PHY_TEST_CFG_W::new(self, 2) + pub fn u0_pcie_pcie_phy_test_cfg(&mut self) -> U0_PCIE_PCIE_PHY_TEST_CFG_W { + U0_PCIE_PCIE_PHY_TEST_CFG_W::new(self, 2) } - #[doc = "Bit 25 - u0_plda_pcie_pcie_rx_eq_training"] + #[doc = "Bit 25 - u0_pcie_pcie_rx_eq_training"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pcie_rx_eq_training( + pub fn u0_pcie_pcie_rx_eq_training( &mut self, - ) -> U0_PLDA_PCIE_PCIE_RX_EQ_TRAINING_W { - U0_PLDA_PCIE_PCIE_RX_EQ_TRAINING_W::new(self, 25) + ) -> U0_PCIE_PCIE_RX_EQ_TRAINING_W { + U0_PCIE_PCIE_RX_EQ_TRAINING_W::new(self, 25) } - #[doc = "Bit 26 - u0_plda_pcie_pcie_rxterm_en"] + #[doc = "Bit 26 - u0_pcie_pcie_rxterm_en"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pcie_rxterm_en( - &mut self, - ) -> U0_PLDA_PCIE_PCIE_RXTERM_EN_W { - U0_PLDA_PCIE_PCIE_RXTERM_EN_W::new(self, 26) + pub fn u0_pcie_pcie_rxterm_en(&mut self) -> U0_PCIE_PCIE_RXTERM_EN_W { + U0_PCIE_PCIE_RXTERM_EN_W::new(self, 26) } - #[doc = "Bit 27 - u0_plda_pcie_pcie_tx_onezeros"] + #[doc = "Bit 27 - u0_pcie_pcie_tx_onezeros"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pcie_tx_onezeros( - &mut self, - ) -> U0_PLDA_PCIE_PCIE_TX_ONEZEROS_W { - U0_PLDA_PCIE_PCIE_TX_ONEZEROS_W::new(self, 27) + pub fn u0_pcie_pcie_tx_onezeros(&mut self) -> U0_PCIE_PCIE_TX_ONEZEROS_W { + U0_PCIE_PCIE_TX_ONEZEROS_W::new(self, 27) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_79.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_79.rs index b41d34c..2cab867 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_79.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_79.rs @@ -2,23 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_79` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pf0_offset` reader - u0_plda_pcie_pf0_offset"] -pub type U0_PLDA_PCIE_PF0_OFFSET_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_pf0_offset` writer - u0_plda_pcie_pf0_offset"] -pub type U0_PLDA_PCIE_PF0_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `u0_pcie_pf0_offset` reader - u0_pcie_pf0_offset"] +pub type U0_PCIE_PF0_OFFSET_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pf0_offset` writer - u0_pcie_pf0_offset"] +pub type U0_PCIE_PF0_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { - #[doc = "Bits 0:19 - u0_plda_pcie_pf0_offset"] + #[doc = "Bits 0:19 - u0_pcie_pf0_offset"] #[inline(always)] - pub fn u0_plda_pcie_pf0_offset(&self) -> U0_PLDA_PCIE_PF0_OFFSET_R { - U0_PLDA_PCIE_PF0_OFFSET_R::new(self.bits & 0x000f_ffff) + pub fn u0_pcie_pf0_offset(&self) -> U0_PCIE_PF0_OFFSET_R { + U0_PCIE_PF0_OFFSET_R::new(self.bits & 0x000f_ffff) } } impl W { - #[doc = "Bits 0:19 - u0_plda_pcie_pf0_offset"] + #[doc = "Bits 0:19 - u0_pcie_pf0_offset"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pf0_offset(&mut self) -> U0_PLDA_PCIE_PF0_OFFSET_W { - U0_PLDA_PCIE_PF0_OFFSET_W::new(self, 0) + pub fn u0_pcie_pf0_offset(&mut self) -> U0_PCIE_PF0_OFFSET_W { + U0_PCIE_PF0_OFFSET_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_8.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_8.rs index 8cea2bd..eed2480 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_8.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_8.rs @@ -2,28 +2,25 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_8` writer"] pub type W = crate::W; -#[doc = "Field `u0_e2_sft7110_nmi_0_rnmi_interrupt_vector` reader - u0_e2_sft7110_nmi_0_rnmi_interrupt_vector"] -pub type U0_E2_SFT7110_NMI_0_RNMI_INTERRUPT_VECTOR_R = crate::FieldReader; -#[doc = "Field `u0_e2_sft7110_nmi_0_rnmi_interrupt_vector` writer - u0_e2_sft7110_nmi_0_rnmi_interrupt_vector"] -pub type U0_E2_SFT7110_NMI_0_RNMI_INTERRUPT_VECTOR_W<'a, REG> = - crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_e2_nmi_interrupt_vector` reader - u0_e2_nmi_interrupt_vector"] +pub type U0_E2_NMI_INTERRUPT_VECTOR_R = crate::FieldReader; +#[doc = "Field `u0_e2_nmi_interrupt_vector` writer - u0_e2_nmi_interrupt_vector"] +pub type U0_E2_NMI_INTERRUPT_VECTOR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_e2_sft7110_nmi_0_rnmi_interrupt_vector"] + #[doc = "Bits 0:31 - u0_e2_nmi_interrupt_vector"] #[inline(always)] - pub fn u0_e2_sft7110_nmi_0_rnmi_interrupt_vector( - &self, - ) -> U0_E2_SFT7110_NMI_0_RNMI_INTERRUPT_VECTOR_R { - U0_E2_SFT7110_NMI_0_RNMI_INTERRUPT_VECTOR_R::new(self.bits) + pub fn u0_e2_nmi_interrupt_vector(&self) -> U0_E2_NMI_INTERRUPT_VECTOR_R { + U0_E2_NMI_INTERRUPT_VECTOR_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_e2_sft7110_nmi_0_rnmi_interrupt_vector"] + #[doc = "Bits 0:31 - u0_e2_nmi_interrupt_vector"] #[inline(always)] #[must_use] - pub fn u0_e2_sft7110_nmi_0_rnmi_interrupt_vector( + pub fn u0_e2_nmi_interrupt_vector( &mut self, - ) -> U0_E2_SFT7110_NMI_0_RNMI_INTERRUPT_VECTOR_W { - U0_E2_SFT7110_NMI_0_RNMI_INTERRUPT_VECTOR_W::new(self, 0) + ) -> U0_E2_NMI_INTERRUPT_VECTOR_W { + U0_E2_NMI_INTERRUPT_VECTOR_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_80.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_80.rs index c3516ff..a2ef156 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_80.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_80.rs @@ -2,23 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_80` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pf1_offset` reader - u0_plda_pcie_pf1_offset"] -pub type U0_PLDA_PCIE_PF1_OFFSET_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_pf1_offset` writer - u0_plda_pcie_pf1_offset"] -pub type U0_PLDA_PCIE_PF1_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `u0_pcie_pf1_offset` reader - u0_pcie_pf1_offset"] +pub type U0_PCIE_PF1_OFFSET_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pf1_offset` writer - u0_pcie_pf1_offset"] +pub type U0_PCIE_PF1_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { - #[doc = "Bits 0:19 - u0_plda_pcie_pf1_offset"] + #[doc = "Bits 0:19 - u0_pcie_pf1_offset"] #[inline(always)] - pub fn u0_plda_pcie_pf1_offset(&self) -> U0_PLDA_PCIE_PF1_OFFSET_R { - U0_PLDA_PCIE_PF1_OFFSET_R::new(self.bits & 0x000f_ffff) + pub fn u0_pcie_pf1_offset(&self) -> U0_PCIE_PF1_OFFSET_R { + U0_PCIE_PF1_OFFSET_R::new(self.bits & 0x000f_ffff) } } impl W { - #[doc = "Bits 0:19 - u0_plda_pcie_pf1_offset"] + #[doc = "Bits 0:19 - u0_pcie_pf1_offset"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pf1_offset(&mut self) -> U0_PLDA_PCIE_PF1_OFFSET_W { - U0_PLDA_PCIE_PF1_OFFSET_W::new(self, 0) + pub fn u0_pcie_pf1_offset(&mut self) -> U0_PCIE_PF1_OFFSET_W { + U0_PCIE_PF1_OFFSET_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_81.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_81.rs index 0ab94b9..075d34b 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_81.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_81.rs @@ -2,23 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_81` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pf2_offset` reader - u0_plda_pcie_pf2_offset"] -pub type U0_PLDA_PCIE_PF2_OFFSET_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_pf2_offset` writer - u0_plda_pcie_pf2_offset"] -pub type U0_PLDA_PCIE_PF2_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `u0_pcie_pf2_offset` reader - u0_pcie_pf2_offset"] +pub type U0_PCIE_PF2_OFFSET_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pf2_offset` writer - u0_pcie_pf2_offset"] +pub type U0_PCIE_PF2_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; impl R { - #[doc = "Bits 0:19 - u0_plda_pcie_pf2_offset"] + #[doc = "Bits 0:19 - u0_pcie_pf2_offset"] #[inline(always)] - pub fn u0_plda_pcie_pf2_offset(&self) -> U0_PLDA_PCIE_PF2_OFFSET_R { - U0_PLDA_PCIE_PF2_OFFSET_R::new(self.bits & 0x000f_ffff) + pub fn u0_pcie_pf2_offset(&self) -> U0_PCIE_PF2_OFFSET_R { + U0_PCIE_PF2_OFFSET_R::new(self.bits & 0x000f_ffff) } } impl W { - #[doc = "Bits 0:19 - u0_plda_pcie_pf2_offset"] + #[doc = "Bits 0:19 - u0_pcie_pf2_offset"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pf2_offset(&mut self) -> U0_PLDA_PCIE_PF2_OFFSET_W { - U0_PLDA_PCIE_PF2_OFFSET_W::new(self, 0) + pub fn u0_pcie_pf2_offset(&mut self) -> U0_PCIE_PF2_OFFSET_W { + U0_PCIE_PF2_OFFSET_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_82.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_82.rs index 2da6c50..b100bd7 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_82.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_82.rs @@ -2,76 +2,74 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_82` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pf3_offset` reader - u0_plda_pcie_pf3_offset"] -pub type U0_PLDA_PCIE_PF3_OFFSET_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_pf3_offset` writer - u0_plda_pcie_pf3_offset"] -pub type U0_PLDA_PCIE_PF3_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; -#[doc = "Field `u0_plda_pcie_phy_mode` reader - u0_plda_pcie_phy_mode"] -pub type U0_PLDA_PCIE_PHY_MODE_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_phy_mode` writer - u0_plda_pcie_phy_mode"] -pub type U0_PLDA_PCIE_PHY_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `u0_plda_pcie_pl_clkrem_allow` reader - u0_plda_pcie_pl_clkrem_allow"] -pub type U0_PLDA_PCIE_PL_CLKREM_ALLOW_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_pl_clkrem_allow` writer - u0_plda_pcie_pl_clkrem_allow"] -pub type U0_PLDA_PCIE_PL_CLKREM_ALLOW_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_pl_clkreq_oen` reader - u0_plda_pcie_pl_clkreq_oen"] -pub type U0_PLDA_PCIE_PL_CLKREQ_OEN_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_pl_equ_phase` reader - u0_plda_pcie_pl_equ_phase"] -pub type U0_PLDA_PCIE_PL_EQU_PHASE_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_pl_ltssm` reader - u0_plda_pcie_pl_ltssm"] -pub type U0_PLDA_PCIE_PL_LTSSM_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pf3_offset` reader - u0_pcie_pf3_offset"] +pub type U0_PCIE_PF3_OFFSET_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pf3_offset` writer - u0_pcie_pf3_offset"] +pub type U0_PCIE_PF3_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +#[doc = "Field `u0_pcie_phy_mode` reader - u0_pcie_phy_mode"] +pub type U0_PCIE_PHY_MODE_R = crate::FieldReader; +#[doc = "Field `u0_pcie_phy_mode` writer - u0_pcie_phy_mode"] +pub type U0_PCIE_PHY_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +#[doc = "Field `u0_pcie_pl_clkrem_allow` reader - u0_pcie_pl_clkrem_allow"] +pub type U0_PCIE_PL_CLKREM_ALLOW_R = crate::BitReader; +#[doc = "Field `u0_pcie_pl_clkrem_allow` writer - u0_pcie_pl_clkrem_allow"] +pub type U0_PCIE_PL_CLKREM_ALLOW_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_pl_clkreq_oen` reader - u0_pcie_pl_clkreq_oen"] +pub type U0_PCIE_PL_CLKREQ_OEN_R = crate::BitReader; +#[doc = "Field `u0_pcie_pl_equ_phase` reader - u0_pcie_pl_equ_phase"] +pub type U0_PCIE_PL_EQU_PHASE_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pl_ltssm` reader - u0_pcie_pl_ltssm"] +pub type U0_PCIE_PL_LTSSM_R = crate::FieldReader; impl R { - #[doc = "Bits 0:19 - u0_plda_pcie_pf3_offset"] + #[doc = "Bits 0:19 - u0_pcie_pf3_offset"] #[inline(always)] - pub fn u0_plda_pcie_pf3_offset(&self) -> U0_PLDA_PCIE_PF3_OFFSET_R { - U0_PLDA_PCIE_PF3_OFFSET_R::new(self.bits & 0x000f_ffff) + pub fn u0_pcie_pf3_offset(&self) -> U0_PCIE_PF3_OFFSET_R { + U0_PCIE_PF3_OFFSET_R::new(self.bits & 0x000f_ffff) } - #[doc = "Bits 20:21 - u0_plda_pcie_phy_mode"] + #[doc = "Bits 20:21 - u0_pcie_phy_mode"] #[inline(always)] - pub fn u0_plda_pcie_phy_mode(&self) -> U0_PLDA_PCIE_PHY_MODE_R { - U0_PLDA_PCIE_PHY_MODE_R::new(((self.bits >> 20) & 3) as u8) + pub fn u0_pcie_phy_mode(&self) -> U0_PCIE_PHY_MODE_R { + U0_PCIE_PHY_MODE_R::new(((self.bits >> 20) & 3) as u8) } - #[doc = "Bit 22 - u0_plda_pcie_pl_clkrem_allow"] + #[doc = "Bit 22 - u0_pcie_pl_clkrem_allow"] #[inline(always)] - pub fn u0_plda_pcie_pl_clkrem_allow(&self) -> U0_PLDA_PCIE_PL_CLKREM_ALLOW_R { - U0_PLDA_PCIE_PL_CLKREM_ALLOW_R::new(((self.bits >> 22) & 1) != 0) + pub fn u0_pcie_pl_clkrem_allow(&self) -> U0_PCIE_PL_CLKREM_ALLOW_R { + U0_PCIE_PL_CLKREM_ALLOW_R::new(((self.bits >> 22) & 1) != 0) } - #[doc = "Bit 23 - u0_plda_pcie_pl_clkreq_oen"] + #[doc = "Bit 23 - u0_pcie_pl_clkreq_oen"] #[inline(always)] - pub fn u0_plda_pcie_pl_clkreq_oen(&self) -> U0_PLDA_PCIE_PL_CLKREQ_OEN_R { - U0_PLDA_PCIE_PL_CLKREQ_OEN_R::new(((self.bits >> 23) & 1) != 0) + pub fn u0_pcie_pl_clkreq_oen(&self) -> U0_PCIE_PL_CLKREQ_OEN_R { + U0_PCIE_PL_CLKREQ_OEN_R::new(((self.bits >> 23) & 1) != 0) } - #[doc = "Bits 24:25 - u0_plda_pcie_pl_equ_phase"] + #[doc = "Bits 24:25 - u0_pcie_pl_equ_phase"] #[inline(always)] - pub fn u0_plda_pcie_pl_equ_phase(&self) -> U0_PLDA_PCIE_PL_EQU_PHASE_R { - U0_PLDA_PCIE_PL_EQU_PHASE_R::new(((self.bits >> 24) & 3) as u8) + pub fn u0_pcie_pl_equ_phase(&self) -> U0_PCIE_PL_EQU_PHASE_R { + U0_PCIE_PL_EQU_PHASE_R::new(((self.bits >> 24) & 3) as u8) } - #[doc = "Bits 26:30 - u0_plda_pcie_pl_ltssm"] + #[doc = "Bits 26:30 - u0_pcie_pl_ltssm"] #[inline(always)] - pub fn u0_plda_pcie_pl_ltssm(&self) -> U0_PLDA_PCIE_PL_LTSSM_R { - U0_PLDA_PCIE_PL_LTSSM_R::new(((self.bits >> 26) & 0x1f) as u8) + pub fn u0_pcie_pl_ltssm(&self) -> U0_PCIE_PL_LTSSM_R { + U0_PCIE_PL_LTSSM_R::new(((self.bits >> 26) & 0x1f) as u8) } } impl W { - #[doc = "Bits 0:19 - u0_plda_pcie_pf3_offset"] + #[doc = "Bits 0:19 - u0_pcie_pf3_offset"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pf3_offset(&mut self) -> U0_PLDA_PCIE_PF3_OFFSET_W { - U0_PLDA_PCIE_PF3_OFFSET_W::new(self, 0) + pub fn u0_pcie_pf3_offset(&mut self) -> U0_PCIE_PF3_OFFSET_W { + U0_PCIE_PF3_OFFSET_W::new(self, 0) } - #[doc = "Bits 20:21 - u0_plda_pcie_phy_mode"] + #[doc = "Bits 20:21 - u0_pcie_phy_mode"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_phy_mode(&mut self) -> U0_PLDA_PCIE_PHY_MODE_W { - U0_PLDA_PCIE_PHY_MODE_W::new(self, 20) + pub fn u0_pcie_phy_mode(&mut self) -> U0_PCIE_PHY_MODE_W { + U0_PCIE_PHY_MODE_W::new(self, 20) } - #[doc = "Bit 22 - u0_plda_pcie_pl_clkrem_allow"] + #[doc = "Bit 22 - u0_pcie_pl_clkrem_allow"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pl_clkrem_allow( - &mut self, - ) -> U0_PLDA_PCIE_PL_CLKREM_ALLOW_W { - U0_PLDA_PCIE_PL_CLKREM_ALLOW_W::new(self, 22) + pub fn u0_pcie_pl_clkrem_allow(&mut self) -> U0_PCIE_PL_CLKREM_ALLOW_W { + U0_PCIE_PL_CLKREM_ALLOW_W::new(self, 22) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_83.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_83.rs index 0c3fb93..9f6952a 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_83.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_83.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_83` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pl_pclk_rate` reader - u0_plda_pcie_pl_pclk_rate"] -pub type U0_PLDA_PCIE_PL_PCLK_RATE_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pl_pclk_rate` reader - u0_pcie_pl_pclk_rate"] +pub type U0_PCIE_PL_PCLK_RATE_R = crate::FieldReader; impl R { - #[doc = "Bits 0:4 - u0_plda_pcie_pl_pclk_rate"] + #[doc = "Bits 0:4 - u0_pcie_pl_pclk_rate"] #[inline(always)] - pub fn u0_plda_pcie_pl_pclk_rate(&self) -> U0_PLDA_PCIE_PL_PCLK_RATE_R { - U0_PLDA_PCIE_PL_PCLK_RATE_R::new((self.bits & 0x1f) as u8) + pub fn u0_pcie_pl_pclk_rate(&self) -> U0_PCIE_PL_PCLK_RATE_R { + U0_PCIE_PL_PCLK_RATE_R::new((self.bits & 0x1f) as u8) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_84.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_84.rs index 52331d1..4915615 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_84.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_84.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_84` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pl_sideband_in_31_0` reader - u0_plda_pcie_pl_sideband_in_31_0"] -pub type U0_PLDA_PCIE_PL_SIDEBAND_IN_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pl_sideband_in_31_0` reader - u0_pcie_pl_sideband_in_31_0"] +pub type U0_PCIE_PL_SIDEBAND_IN_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_pl_sideband_in_31_0"] + #[doc = "Bits 0:31 - u0_pcie_pl_sideband_in_31_0"] #[inline(always)] - pub fn u0_plda_pcie_pl_sideband_in_31_0(&self) -> U0_PLDA_PCIE_PL_SIDEBAND_IN_31_0_R { - U0_PLDA_PCIE_PL_SIDEBAND_IN_31_0_R::new(self.bits) + pub fn u0_pcie_pl_sideband_in_31_0(&self) -> U0_PCIE_PL_SIDEBAND_IN_31_0_R { + U0_PCIE_PL_SIDEBAND_IN_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_85.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_85.rs index be24550..29645ac 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_85.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_85.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_85` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pl_sideband_in_63_32` reader - u0_plda_pcie_pl_sideband_in_63_32"] -pub type U0_PLDA_PCIE_PL_SIDEBAND_IN_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pl_sideband_in_63_32` reader - u0_pcie_pl_sideband_in_63_32"] +pub type U0_PCIE_PL_SIDEBAND_IN_63_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_pl_sideband_in_63_32"] + #[doc = "Bits 0:31 - u0_pcie_pl_sideband_in_63_32"] #[inline(always)] - pub fn u0_plda_pcie_pl_sideband_in_63_32(&self) -> U0_PLDA_PCIE_PL_SIDEBAND_IN_63_32_R { - U0_PLDA_PCIE_PL_SIDEBAND_IN_63_32_R::new(self.bits) + pub fn u0_pcie_pl_sideband_in_63_32(&self) -> U0_PCIE_PL_SIDEBAND_IN_63_32_R { + U0_PCIE_PL_SIDEBAND_IN_63_32_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_86.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_86.rs index f593457..440a82c 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_86.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_86.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_86` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pl_sideband_out_31_0` reader - u0_plda_pcie_pl_sideband_out_31_0"] -pub type U0_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pl_sideband_out_31_0` reader - u0_pcie_pl_sideband_out_31_0"] +pub type U0_PCIE_PL_SIDEBAND_OUT_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_pl_sideband_out_31_0"] + #[doc = "Bits 0:31 - u0_pcie_pl_sideband_out_31_0"] #[inline(always)] - pub fn u0_plda_pcie_pl_sideband_out_31_0(&self) -> U0_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_R { - U0_PLDA_PCIE_PL_SIDEBAND_OUT_31_0_R::new(self.bits) + pub fn u0_pcie_pl_sideband_out_31_0(&self) -> U0_PCIE_PL_SIDEBAND_OUT_31_0_R { + U0_PCIE_PL_SIDEBAND_OUT_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_87.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_87.rs index 85fb73d..4cae490 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_87.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_87.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_87` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pl_sideband_out_63_32` reader - u0_plda_pcie_pl_sideband_out_63_32"] -pub type U0_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_pl_sideband_out_63_32` reader - u0_pcie_pl_sideband_out_63_32"] +pub type U0_PCIE_PL_SIDEBAND_OUT_63_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_pl_sideband_out_63_32"] + #[doc = "Bits 0:31 - u0_pcie_pl_sideband_out_63_32"] #[inline(always)] - pub fn u0_plda_pcie_pl_sideband_out_63_32(&self) -> U0_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_R { - U0_PLDA_PCIE_PL_SIDEBAND_OUT_63_32_R::new(self.bits) + pub fn u0_pcie_pl_sideband_out_63_32(&self) -> U0_PCIE_PL_SIDEBAND_OUT_63_32_R { + U0_PCIE_PL_SIDEBAND_OUT_63_32_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_88.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_88.rs index 00f0070..054656e 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_88.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_88.rs @@ -2,37 +2,37 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_88` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_pl_wake_in` reader - u0_plda_pcie_pl_wake_in"] -pub type U0_PLDA_PCIE_PL_WAKE_IN_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_pl_wake_in` writer - u0_plda_pcie_pl_wake_in"] -pub type U0_PLDA_PCIE_PL_WAKE_IN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `u0_plda_pcie_pl_wake_oen` reader - u0_plda_pcie_pl_wake_oen"] -pub type U0_PLDA_PCIE_PL_WAKE_OEN_R = crate::BitReader; -#[doc = "Field `u0_plda_pcie_rx_standby_0` reader - u0_plda_pcie_rx_standby_0"] -pub type U0_PLDA_PCIE_RX_STANDBY_0_R = crate::BitReader; +#[doc = "Field `u0_pcie_pl_wake_in` reader - u0_pcie_pl_wake_in"] +pub type U0_PCIE_PL_WAKE_IN_R = crate::BitReader; +#[doc = "Field `u0_pcie_pl_wake_in` writer - u0_pcie_pl_wake_in"] +pub type U0_PCIE_PL_WAKE_IN_W<'a, REG> = crate::BitWriter<'a, REG>; +#[doc = "Field `u0_pcie_pl_wake_oen` reader - u0_pcie_pl_wake_oen"] +pub type U0_PCIE_PL_WAKE_OEN_R = crate::BitReader; +#[doc = "Field `u0_pcie_rx_standby_0` reader - u0_pcie_rx_standby_0"] +pub type U0_PCIE_RX_STANDBY_0_R = crate::BitReader; impl R { - #[doc = "Bit 0 - u0_plda_pcie_pl_wake_in"] + #[doc = "Bit 0 - u0_pcie_pl_wake_in"] #[inline(always)] - pub fn u0_plda_pcie_pl_wake_in(&self) -> U0_PLDA_PCIE_PL_WAKE_IN_R { - U0_PLDA_PCIE_PL_WAKE_IN_R::new((self.bits & 1) != 0) + pub fn u0_pcie_pl_wake_in(&self) -> U0_PCIE_PL_WAKE_IN_R { + U0_PCIE_PL_WAKE_IN_R::new((self.bits & 1) != 0) } - #[doc = "Bit 1 - u0_plda_pcie_pl_wake_oen"] + #[doc = "Bit 1 - u0_pcie_pl_wake_oen"] #[inline(always)] - pub fn u0_plda_pcie_pl_wake_oen(&self) -> U0_PLDA_PCIE_PL_WAKE_OEN_R { - U0_PLDA_PCIE_PL_WAKE_OEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn u0_pcie_pl_wake_oen(&self) -> U0_PCIE_PL_WAKE_OEN_R { + U0_PCIE_PL_WAKE_OEN_R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 2 - u0_plda_pcie_rx_standby_0"] + #[doc = "Bit 2 - u0_pcie_rx_standby_0"] #[inline(always)] - pub fn u0_plda_pcie_rx_standby_0(&self) -> U0_PLDA_PCIE_RX_STANDBY_0_R { - U0_PLDA_PCIE_RX_STANDBY_0_R::new(((self.bits >> 2) & 1) != 0) + pub fn u0_pcie_rx_standby_0(&self) -> U0_PCIE_RX_STANDBY_0_R { + U0_PCIE_RX_STANDBY_0_R::new(((self.bits >> 2) & 1) != 0) } } impl W { - #[doc = "Bit 0 - u0_plda_pcie_pl_wake_in"] + #[doc = "Bit 0 - u0_pcie_pl_wake_in"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_pl_wake_in(&mut self) -> U0_PLDA_PCIE_PL_WAKE_IN_W { - U0_PLDA_PCIE_PL_WAKE_IN_W::new(self, 0) + pub fn u0_pcie_pl_wake_in(&mut self) -> U0_PCIE_PL_WAKE_IN_W { + U0_PCIE_PL_WAKE_IN_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_89.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_89.rs index 26354ef..996e267 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_89.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_89.rs @@ -2,23 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_89` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_in_31_0` reader - u0_plda_pcie_test_in_31_0"] -pub type U0_PLDA_PCIE_TEST_IN_31_0_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_test_in_31_0` writer - u0_plda_pcie_test_in_31_0"] -pub type U0_PLDA_PCIE_TEST_IN_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_test_in_31_0` reader - u0_pcie_test_in_31_0"] +pub type U0_PCIE_TEST_IN_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_in_31_0` writer - u0_pcie_test_in_31_0"] +pub type U0_PCIE_TEST_IN_31_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_in_31_0"] + #[doc = "Bits 0:31 - u0_pcie_test_in_31_0"] #[inline(always)] - pub fn u0_plda_pcie_test_in_31_0(&self) -> U0_PLDA_PCIE_TEST_IN_31_0_R { - U0_PLDA_PCIE_TEST_IN_31_0_R::new(self.bits) + pub fn u0_pcie_test_in_31_0(&self) -> U0_PCIE_TEST_IN_31_0_R { + U0_PCIE_TEST_IN_31_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_test_in_31_0"] + #[doc = "Bits 0:31 - u0_pcie_test_in_31_0"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_test_in_31_0(&mut self) -> U0_PLDA_PCIE_TEST_IN_31_0_W { - U0_PLDA_PCIE_TEST_IN_31_0_W::new(self, 0) + pub fn u0_pcie_test_in_31_0(&mut self) -> U0_PCIE_TEST_IN_31_0_W { + U0_PCIE_TEST_IN_31_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_9.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_9.rs index 33fe5c3..e0676a3 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_9.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_9.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_9` writer"] pub type W = crate::W; -#[doc = "Field `u0_e2_sft7110_reset_vector_0` reader - u0_e2_sft7110_reset_vector_0"] -pub type U0_E2_SFT7110_RESET_VECTOR_0_R = crate::FieldReader; -#[doc = "Field `u0_e2_sft7110_reset_vector_0` writer - u0_e2_sft7110_reset_vector_0"] -pub type U0_E2_SFT7110_RESET_VECTOR_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_e2_reset_vector_0` reader - u0_e2_reset_vector_0"] +pub type U0_E2_RESET_VECTOR_0_R = crate::FieldReader; +#[doc = "Field `u0_e2_reset_vector_0` writer - u0_e2_reset_vector_0"] +pub type U0_E2_RESET_VECTOR_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_e2_sft7110_reset_vector_0"] + #[doc = "Bits 0:31 - u0_e2_reset_vector_0"] #[inline(always)] - pub fn u0_e2_sft7110_reset_vector_0(&self) -> U0_E2_SFT7110_RESET_VECTOR_0_R { - U0_E2_SFT7110_RESET_VECTOR_0_R::new(self.bits) + pub fn u0_e2_reset_vector_0(&self) -> U0_E2_RESET_VECTOR_0_R { + U0_E2_RESET_VECTOR_0_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_e2_sft7110_reset_vector_0"] + #[doc = "Bits 0:31 - u0_e2_reset_vector_0"] #[inline(always)] #[must_use] - pub fn u0_e2_sft7110_reset_vector_0( - &mut self, - ) -> U0_E2_SFT7110_RESET_VECTOR_0_W { - U0_E2_SFT7110_RESET_VECTOR_0_W::new(self, 0) + pub fn u0_e2_reset_vector_0(&mut self) -> U0_E2_RESET_VECTOR_0_W { + U0_E2_RESET_VECTOR_0_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_90.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_90.rs index 7c8598d..e23918d 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_90.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_90.rs @@ -2,25 +2,23 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_90` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_in_63_32` reader - u0_plda_pcie_test_in_63_32"] -pub type U0_PLDA_PCIE_TEST_IN_63_32_R = crate::FieldReader; -#[doc = "Field `u0_plda_pcie_test_in_63_32` writer - u0_plda_pcie_test_in_63_32"] -pub type U0_PLDA_PCIE_TEST_IN_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +#[doc = "Field `u0_pcie_test_in_63_32` reader - u0_pcie_test_in_63_32"] +pub type U0_PCIE_TEST_IN_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_in_63_32` writer - u0_pcie_test_in_63_32"] +pub type U0_PCIE_TEST_IN_63_32_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_in_63_32"] + #[doc = "Bits 0:31 - u0_pcie_test_in_63_32"] #[inline(always)] - pub fn u0_plda_pcie_test_in_63_32(&self) -> U0_PLDA_PCIE_TEST_IN_63_32_R { - U0_PLDA_PCIE_TEST_IN_63_32_R::new(self.bits) + pub fn u0_pcie_test_in_63_32(&self) -> U0_PCIE_TEST_IN_63_32_R { + U0_PCIE_TEST_IN_63_32_R::new(self.bits) } } impl W { - #[doc = "Bits 0:31 - u0_plda_pcie_test_in_63_32"] + #[doc = "Bits 0:31 - u0_pcie_test_in_63_32"] #[inline(always)] #[must_use] - pub fn u0_plda_pcie_test_in_63_32( - &mut self, - ) -> U0_PLDA_PCIE_TEST_IN_63_32_W { - U0_PLDA_PCIE_TEST_IN_63_32_W::new(self, 0) + pub fn u0_pcie_test_in_63_32(&mut self) -> U0_PCIE_TEST_IN_63_32_W { + U0_PCIE_TEST_IN_63_32_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] #[doc = r""] diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_91.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_91.rs index ae524da..7667120 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_91.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_91.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_91` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_31_0` reader - u0_plda_pcie_test_out_bridge_31_0"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_31_0` reader - u0_pcie_test_out_bridge_31_0"] +pub type U0_PCIE_TEST_OUT_BRIDGE_31_0_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_31_0"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_31_0"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_31_0(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_31_0_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_31_0(&self) -> U0_PCIE_TEST_OUT_BRIDGE_31_0_R { + U0_PCIE_TEST_OUT_BRIDGE_31_0_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_92.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_92.rs index 05aa15e..0b1ded8 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_92.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_92.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_92` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_63_32` reader - u0_plda_pcie_test_out_bridge_63_32"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_63_32` reader - u0_pcie_test_out_bridge_63_32"] +pub type U0_PCIE_TEST_OUT_BRIDGE_63_32_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_63_32"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_63_32"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_63_32(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_63_32_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_63_32(&self) -> U0_PCIE_TEST_OUT_BRIDGE_63_32_R { + U0_PCIE_TEST_OUT_BRIDGE_63_32_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_93.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_93.rs index fee9ad9..d836f0d 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_93.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_93.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_93` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_95_64` reader - u0_plda_pcie_test_out_bridge_95_64"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_95_64` reader - u0_pcie_test_out_bridge_95_64"] +pub type U0_PCIE_TEST_OUT_BRIDGE_95_64_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_95_64"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_95_64"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_95_64(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_95_64_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_95_64(&self) -> U0_PCIE_TEST_OUT_BRIDGE_95_64_R { + U0_PCIE_TEST_OUT_BRIDGE_95_64_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_94.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_94.rs index 715a3eb..1a75e62 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_94.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_94.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_94` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_127_96` reader - u0_plda_pcie_test_out_bridge_127_96"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_127_96` reader - u0_pcie_test_out_bridge_127_96"] +pub type U0_PCIE_TEST_OUT_BRIDGE_127_96_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_127_96"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_127_96"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_127_96(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_127_96_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_127_96(&self) -> U0_PCIE_TEST_OUT_BRIDGE_127_96_R { + U0_PCIE_TEST_OUT_BRIDGE_127_96_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_95.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_95.rs index 4107b69..b8d9ceb 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_95.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_95.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_95` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_159_128` reader - u0_plda_pcie_test_out_bridge_159_128"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_159_128` reader - u0_pcie_test_out_bridge_159_128"] +pub type U0_PCIE_TEST_OUT_BRIDGE_159_128_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_159_128"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_159_128"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_159_128(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_159_128_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_159_128(&self) -> U0_PCIE_TEST_OUT_BRIDGE_159_128_R { + U0_PCIE_TEST_OUT_BRIDGE_159_128_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_96.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_96.rs index c42f0b8..853325c 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_96.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_96.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_96` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_191_160` reader - u0_plda_pcie_test_out_bridge_191_160"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_191_160` reader - u0_pcie_test_out_bridge_191_160"] +pub type U0_PCIE_TEST_OUT_BRIDGE_191_160_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_191_160"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_191_160"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_191_160(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_191_160_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_191_160(&self) -> U0_PCIE_TEST_OUT_BRIDGE_191_160_R { + U0_PCIE_TEST_OUT_BRIDGE_191_160_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_97.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_97.rs index 3d5d731..8c3983a 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_97.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_97.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_97` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_223_192` reader - u0_plda_pcie_test_out_bridge_223_192"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_223_192` reader - u0_pcie_test_out_bridge_223_192"] +pub type U0_PCIE_TEST_OUT_BRIDGE_223_192_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_223_192"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_223_192"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_223_192(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_223_192_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_223_192(&self) -> U0_PCIE_TEST_OUT_BRIDGE_223_192_R { + U0_PCIE_TEST_OUT_BRIDGE_223_192_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_98.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_98.rs index d1ea3b7..e280f79 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_98.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_98.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_98` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_255_224` reader - u0_plda_pcie_test_out_bridge_255_224"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_255_224` reader - u0_pcie_test_out_bridge_255_224"] +pub type U0_PCIE_TEST_OUT_BRIDGE_255_224_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_255_224"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_255_224"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_255_224(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_255_224_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_255_224(&self) -> U0_PCIE_TEST_OUT_BRIDGE_255_224_R { + U0_PCIE_TEST_OUT_BRIDGE_255_224_R::new(self.bits) } } impl W { diff --git a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_99.rs b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_99.rs index a29630d..6f48646 100644 --- a/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_99.rs +++ b/jh7110-vf2-13b-pac/src/stg_syscon/stg_syscfg_99.rs @@ -2,13 +2,13 @@ pub type R = crate::R; #[doc = "Register `stg_syscfg_99` writer"] pub type W = crate::W; -#[doc = "Field `u0_plda_pcie_test_out_bridge_287_256` reader - u0_plda_pcie_test_out_bridge_287_256"] -pub type U0_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_R = crate::FieldReader; +#[doc = "Field `u0_pcie_test_out_bridge_287_256` reader - u0_pcie_test_out_bridge_287_256"] +pub type U0_PCIE_TEST_OUT_BRIDGE_287_256_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - u0_plda_pcie_test_out_bridge_287_256"] + #[doc = "Bits 0:31 - u0_pcie_test_out_bridge_287_256"] #[inline(always)] - pub fn u0_plda_pcie_test_out_bridge_287_256(&self) -> U0_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_R { - U0_PLDA_PCIE_TEST_OUT_BRIDGE_287_256_R::new(self.bits) + pub fn u0_pcie_test_out_bridge_287_256(&self) -> U0_PCIE_TEST_OUT_BRIDGE_287_256_R { + U0_PCIE_TEST_OUT_BRIDGE_287_256_R::new(self.bits) } } impl W {