From 737b80801accf1d61c795c23e2c0cef7cb9fcb15 Mon Sep 17 00:00:00 2001 From: Christian Rendina Date: Sat, 23 Sep 2023 11:51:07 +0200 Subject: [PATCH 1/2] Add missing base relocations + add sh3e, ppcbe, loongarch and fix mips and alpha code --- .../include/pe-parse/nt-headers.h | 22 ++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/pe-parser-library/include/pe-parse/nt-headers.h b/pe-parser-library/include/pe-parse/nt-headers.h index b30c8b7..14504ed 100644 --- a/pe-parser-library/include/pe-parse/nt-headers.h +++ b/pe-parser-library/include/pe-parse/nt-headers.h @@ -47,7 +47,7 @@ constexpr std::uint16_t SYMTAB_RECORD_LEN = 18; #ifndef _PEPARSE_WINDOWS_CONFLICTS // Machine Types constexpr std::uint16_t IMAGE_FILE_MACHINE_UNKNOWN = 0x0; -constexpr std::uint16_t IMAGE_FILE_MACHINE_ALPHA = 0x1d3; // Alpha_AXP +constexpr std::uint16_t IMAGE_FILE_MACHINE_ALPHA = 0x184; // Alpha_AXP constexpr std::uint16_t IMAGE_FILE_MACHINE_ALPHA64 = 0x284; // ALPHA64 constexpr std::uint16_t IMAGE_FILE_MACHINE_AM33 = 0x1d3; // Matsushita AM33 constexpr std::uint16_t IMAGE_FILE_MACHINE_AMD64 = 0x8664; // x64 @@ -60,20 +60,24 @@ constexpr std::uint16_t IMAGE_FILE_MACHINE_CEF = 0xcef; constexpr std::uint16_t IMAGE_FILE_MACHINE_EBC = 0xebc; // EFI byte code constexpr std::uint16_t IMAGE_FILE_MACHINE_I386 = 0x14c; // Intel 386 or later processors and compatible processors constexpr std::uint16_t IMAGE_FILE_MACHINE_IA64 = 0x200; // Intel Itanium processor family +constexpr std::uint16_t IMAGE_FILE_MACHINE_LOONGARCH32 = 0x6232; // LoongArch 32-bit address space +constexpr std::uint16_t IMAGE_FILE_MACHINE_LOONGARCH64 = 0x6264; // LoongArch 64-bit address space constexpr std::uint16_t IMAGE_FILE_MACHINE_M32R = 0x9041; // Mitsubishi M32R little endian constexpr std::uint16_t IMAGE_FILE_MACHINE_MIPS16 = 0x266; // MIPS16 constexpr std::uint16_t IMAGE_FILE_MACHINE_MIPSFPU = 0x366; // MIPS with FPU constexpr std::uint16_t IMAGE_FILE_MACHINE_MIPSFPU16 = 0x466; // MIPS16 with FPU constexpr std::uint16_t IMAGE_FILE_MACHINE_POWERPC = 0x1f0; // Power PC little endian constexpr std::uint16_t IMAGE_FILE_MACHINE_POWERPCFP = 0x1f1; // Power PC with floating point support -constexpr std::uint16_t IMAGE_FILE_MACHINE_R3000 = 0x166; // MIPS little endian, 0x160 big-endian +constexpr std::uint16_t IMAGE_FILE_MACHINE_POWERPCBE = 0x1f2; // Power PC big endian +constexpr std::uint16_t IMAGE_FILE_MACHINE_R3000 = 0x162; // MIPS little endian, 0x160 big-endian constexpr std::uint16_t IMAGE_FILE_MACHINE_R4000 = 0x166; // MIPS little endian -constexpr std::uint16_t IMAGE_FILE_MACHINE_R10000 = 0x166; // MIPS little endian +constexpr std::uint16_t IMAGE_FILE_MACHINE_R10000 = 0x168; // MIPS little endian constexpr std::uint16_t IMAGE_FILE_MACHINE_RISCV32 = 0x5032; // RISC-V 32-bit address space constexpr std::uint16_t IMAGE_FILE_MACHINE_RISCV64 = 0x5064; // RISC-V 64-bit address space constexpr std::uint16_t IMAGE_FILE_MACHINE_RISCV128 = 0x5128; // RISC-V 128-bit address space constexpr std::uint16_t IMAGE_FILE_MACHINE_SH3 = 0x1a2; // Hitachi SH3 constexpr std::uint16_t IMAGE_FILE_MACHINE_SH3DSP = 0x1a3; // Hitachi SH3 DSP +constexpr std::uint16_t IMAGE_FILE_MACHINE_SH3E = 0x1a4; // Hitachi SH3E constexpr std::uint16_t IMAGE_FILE_MACHINE_SH4 = 0x1a6; // Hitachi SH4 constexpr std::uint16_t IMAGE_FILE_MACHINE_SH5 = 0x1a8; // Hitachi SH5 constexpr std::uint16_t IMAGE_FILE_MACHINE_THUMB = 0x1c2; // Thumb @@ -472,8 +476,16 @@ enum reloc_type { RELOC_LOW = 2, RELOC_HIGHLOW = 3, RELOC_HIGHADJ = 4, - RELOC_MIPS_JMPADDR = 5, - RELOC_MIPS_JMPADDR16 = 9, + RELOC_MIPS_JMPADDR = 5, // only valid on MIPS + RELOC_ARM_MOV32 = 5, // only valid on ARM/Thumb + RELOC_RISCV_HIGH20 = 5, // only valid on RISC-V + RELOC_RESERVED = 6, + RELOC_THUMB_MOV32 = 7, // only valid on Thumb + RELOC_RISCV_LOW32I = 7, // only valid on RISC-V + RELOC_RISCV_LOW12S = 8, // only valid on RISC-V + RELOC_LOONGARCH32_MARK_LA = 8, // only valid on LoongArch 32 + RELOC_LOONGARCH64_MARK_LA = 8, // only valid on LoongArch 64 + RELOC_MIPS_JMPADDR16 = 9, // only valid on MIPS RELOC_IA64_IMM64 = 9, RELOC_DIR64 = 10 }; From 3a9a6e9a52d7e791ec28c13b65f53e8f885b4abd Mon Sep 17 00:00:00 2001 From: Christian Rendina Date: Tue, 26 Sep 2023 00:34:32 +0200 Subject: [PATCH 2/2] Fix formatting --- pe-parser-library/include/pe-parse/nt-headers.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/pe-parser-library/include/pe-parse/nt-headers.h b/pe-parser-library/include/pe-parse/nt-headers.h index 14504ed..a0d3cdd 100644 --- a/pe-parser-library/include/pe-parse/nt-headers.h +++ b/pe-parser-library/include/pe-parse/nt-headers.h @@ -477,15 +477,15 @@ enum reloc_type { RELOC_HIGHLOW = 3, RELOC_HIGHADJ = 4, RELOC_MIPS_JMPADDR = 5, // only valid on MIPS - RELOC_ARM_MOV32 = 5, // only valid on ARM/Thumb + RELOC_ARM_MOV32 = 5, // only valid on ARM/Thumb RELOC_RISCV_HIGH20 = 5, // only valid on RISC-V RELOC_RESERVED = 6, - RELOC_THUMB_MOV32 = 7, // only valid on Thumb - RELOC_RISCV_LOW32I = 7, // only valid on RISC-V - RELOC_RISCV_LOW12S = 8, // only valid on RISC-V + RELOC_THUMB_MOV32 = 7, // only valid on Thumb + RELOC_RISCV_LOW32I = 7, // only valid on RISC-V + RELOC_RISCV_LOW12S = 8, // only valid on RISC-V RELOC_LOONGARCH32_MARK_LA = 8, // only valid on LoongArch 32 RELOC_LOONGARCH64_MARK_LA = 8, // only valid on LoongArch 64 - RELOC_MIPS_JMPADDR16 = 9, // only valid on MIPS + RELOC_MIPS_JMPADDR16 = 9, // only valid on MIPS RELOC_IA64_IMM64 = 9, RELOC_DIR64 = 10 };