From 59a7e8cfb9913524bf125fafad5eb05197185a57 Mon Sep 17 00:00:00 2001 From: TaixiLu Date: Sat, 10 Aug 2024 18:17:58 +1000 Subject: [PATCH 1/4] Add and rename the Config files for IVY VESCs --- hwconf/IVY_Esk8/80_110/hw_IVY_80_110.c | 270 +++++++++++++++ hwconf/IVY_Esk8/80_110/hw_IVY_80_110.h | 312 ++++++++++++++++++ .../IVY_Esk8/80_110/hw_IVY_80_110_no_limits.h | 27 ++ hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.c | 270 +++++++++++++++ hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.h | 312 ++++++++++++++++++ .../IVY_100V_HP/hw_IVY_100V_HP_no_limits.h | 27 ++ .../IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.c | 270 +++++++++++++++ .../IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.h | 312 ++++++++++++++++++ .../hw_IVY_100V_MINI_no_limits.h | 27 ++ hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP.c | 270 +++++++++++++++ hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP.h | 312 ++++++++++++++++++ .../IVY_80V_HP/hw_IVY_80V_HP_no_limits.h | 27 ++ .../IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.c | 270 +++++++++++++++ .../IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.h | 312 ++++++++++++++++++ .../IVY_80V_MINI/hw_IVY_80V_MINI_no_limits.h | 27 ++ 15 files changed, 3045 insertions(+) create mode 100644 hwconf/IVY_Esk8/80_110/hw_IVY_80_110.c create mode 100644 hwconf/IVY_Esk8/80_110/hw_IVY_80_110.h create mode 100644 hwconf/IVY_Esk8/80_110/hw_IVY_80_110_no_limits.h create mode 100644 hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.c create mode 100644 hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.h create mode 100644 hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP_no_limits.h create mode 100644 hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.c create mode 100644 hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.h create mode 100644 hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI_no_limits.h create mode 100644 hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP.c create mode 100644 hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP.h create mode 100644 hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP_no_limits.h create mode 100644 hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.c create mode 100644 hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.h create mode 100644 hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI_no_limits.h diff --git a/hwconf/IVY_Esk8/80_110/hw_IVY_80_110.c b/hwconf/IVY_Esk8/80_110/hw_IVY_80_110.c new file mode 100644 index 000000000..b10331aea --- /dev/null +++ b/hwconf/IVY_Esk8/80_110/hw_IVY_80_110.c @@ -0,0 +1,270 @@ +/* + Copyright 2018 Benjamin Vedder benjamin@vedder.se + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + You should have received a copy of the GNU General Public License + along with this program. If not, see . + */ + +// V2 + +#include "hw.h" +#include "hw_IVY_80_110.h" + +#include "ch.h" +#include "hal.h" +#include "stm32f4xx_conf.h" +#include "utils.h" +#include +#include "mc_interface.h" + +// Variables +static volatile bool i2c_running = false; +static mutex_t shutdown_mutex; +static float bt_diff = 0.0; + +// I2C configuration +static const I2CConfig i2cfg = { + OPMODE_I2C, + 100000, + STD_DUTY_CYCLE}; + +void hw_init_gpio(void) +{ + chMtxObjectInit(&shutdown_mutex); + // GPIO clock enable + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); + + // LEDs + palSetPadMode(LED_GREEN_GPIO, LED_GREEN_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(LED_RED_GPIO, LED_RED_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + + // GPIOA Configuration: Channel 1 to 3 as alternate function push-pull + palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + + palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + + // Hall sensors + palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP); + +#ifdef HW_HAS_PHASE_FILTERS + // Phase filters + palSetPadMode(PHASE_FILTER_GPIO, PHASE_FILTER_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + PHASE_FILTER_OFF(); +#endif + +#ifdef HW_HAS_CURR_FILTERS + // Current filter + palSetPadMode(GPIOD, 2, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + + CURRENT_FILTER_OFF(); +#endif + + // AUX pin + // AUX_OFF(); + // palSetPadMode(AUX_GPIO, AUX_PIN, + // PAL_MODE_OUTPUT_PUSHPULL | + // PAL_STM32_OSPEED_HIGHEST); + + // ADC Pins + palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG); + + palSetPadMode(GPIOB, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG); + + palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG); +} + +void hw_setup_adc_channels(void) +{ + // ADC1 regular channels + ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_Vrefint, 5, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_8, 6, ADC_SampleTime_15Cycles); + + // ADC2 regular channels + ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_0, 5, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_9, 6, ADC_SampleTime_15Cycles); + + // ADC3 regular channels + ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_1, 5, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 6, ADC_SampleTime_15Cycles); + + // Injected channels + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 3, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 3, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 3, ADC_SampleTime_15Cycles); +} + +void hw_start_i2c(void) +{ + i2cAcquireBus(&HW_I2C_DEV); + + if (!i2c_running) + { + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + i2cStart(&HW_I2C_DEV, &i2cfg); + i2c_running = true; + } + + i2cReleaseBus(&HW_I2C_DEV); +} + +void hw_stop_i2c(void) +{ + i2cAcquireBus(&HW_I2C_DEV); + + if (i2c_running) + { + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT); + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT); + + i2cStop(&HW_I2C_DEV); + i2c_running = false; + } + + i2cReleaseBus(&HW_I2C_DEV); +} + +/** + * Try to restore the i2c bus + */ +void hw_try_restore_i2c(void) +{ + if (i2c_running) + { + i2cAcquireBus(&HW_I2C_DEV); + + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + + chThdSleep(1); + + for (int i = 0; i < 16; i++) + { + palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + } + + // Generate start then stop condition + palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + chThdSleep(1); + palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + HW_I2C_DEV.state = I2C_STOP; + i2cStart(&HW_I2C_DEV, &i2cfg); + + i2cReleaseBus(&HW_I2C_DEV); + } +} + +bool hw_sample_shutdown_button(void) +{ + chMtxLock(&shutdown_mutex); + + bt_diff = 0.0; + + for (int i = 0; i < 3; i++) + { + palSetPadMode(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN, PAL_MODE_INPUT_ANALOG); + chThdSleep(5); + float val1 = ADC_VOLTS(ADC_IND_SHUTDOWN); + chThdSleepMilliseconds(1); + float val2 = ADC_VOLTS(ADC_IND_SHUTDOWN); + palSetPadMode(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN, PAL_MODE_OUTPUT_PUSHPULL); + chThdSleepMilliseconds(1); + + bt_diff += (val1 - val2); + } + + chMtxUnlock(&shutdown_mutex); + + return (bt_diff > 0.12); +} diff --git a/hwconf/IVY_Esk8/80_110/hw_IVY_80_110.h b/hwconf/IVY_Esk8/80_110/hw_IVY_80_110.h new file mode 100644 index 000000000..e2d2449ee --- /dev/null +++ b/hwconf/IVY_Esk8/80_110/hw_IVY_80_110.h @@ -0,0 +1,312 @@ +/* + Copyright 2018 Benjamin Vedder benjamin@vedder.se + + This file is part of the VESC firmware. + + The VESC firmware is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + The VESC firmware is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef HW_IVY_80_110_H_ + +#define HW_IVY_80_110_H_ + +#define HW_NAME "IVY_80_110" + +// Default setting overrides +#define APPCONF_APP_TO_USE APP_NONE +// #define APPCONF_CONTROLLER_ID 2 +#define APPCONF_TIMEOUT_MSEC 500 +#define APPCONF_TIMEOUT_BRAKE_CURRENT 0 +#define APPCONF_PERMANENT_UART_ENABLED false +#define APPCONF_SHUTDOWN_MODE SHUTDOWN_MODE_ALWAYS_ON +#define APPCONF_CAN_BAUD_RATE CAN_BAUD_1M +#define APPCONF_CAN_STATUS_RATE_1 100 +#define APPCONF_CAN_STATUS_RATE_2 5 +#define APPCONF_CAN_STATUS_MSGS_R1 0x09 +#define APPCONF_CAN_STATUS_MSGS_R2 0x10 +// Common PID-parameters +#define MCCONF_SP_PID_LOOP_RATE PID_RATE_5000_HZ // PID loop rate +// Speed PID parameters +#define MCCONF_S_PID_KP 0.003 // Proportional gain +#define MCCONF_S_PID_KI 0.009 // Integral gain +#define MCCONF_S_PID_KD 0.00002 // Derivative gain +#define MCCONF_S_PID_KD_FILTER 0.2 // Derivative filter +#define MCCONF_S_PID_MIN_RPM 300.0 // Minimum allowed RPM +#define MCCONF_S_PID_ALLOW_BRAKING true // Allow braking in speed control mode +#define MCCONF_S_PID_RAMP_ERPMS_S 2000.0 // Speed input ramping, in ERPM/s +#define MCCONF_S_PID_SPEED_SOURCE S_PID_SPEED_SRC_PLL +// Position PID parameters +#define MCCONF_P_PID_KP 0.03 // Proportional gain +#define MCCONF_P_PID_KI 0.0 // Integral gain +#define MCCONF_P_PID_KD 0.00000 // Derivative gain +#define MCCONF_P_PID_KD_PROC 0.00035 // Derivative gain process +#define MCCONF_P_PID_KD_FILTER 0.2 // Derivative filter +#define MCCONF_P_PID_ANG_DIV 10.0 // Divide angle by this value +#define MCCONF_P_PID_GAIN_DEC_ANGLE 500.0 // Decrease PID-gains when the error is below this value +#define MCCONF_P_PID_OFFSET 0.0 // Angle offset + +#ifndef MCCONF_L_MIN_VOLTAGE +#define MCCONF_L_MIN_VOLTAGE 20.0 // Minimum input voltage +#endif +#ifndef MCCONF_L_MAX_VOLTAGE +#define MCCONF_L_MAX_VOLTAGE 70.0 // Maximum input voltage +#endif +#endif +#ifndef MCCONF_DEFAULT_MOTOR_TYPE +#define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC +#endif +#ifndef MCCONF_FOC_F_ZV +#define MCCONF_FOC_F_ZV 30000.0 +#endif +#ifndef MCCONF_L_MAX_ABS_CURRENT +#define MCCONF_L_MAX_ABS_CURRENT 160.0 // The maximum absolute current above which a fault is generated +#endif +#ifndef MCCONF_FOC_SAMPLE_V0_V7 +#define MCCONF_FOC_SAMPLE_V0_V7 false // Run control loop in both v0 and v7 (requires phase shunts) +#endif +#ifndef MCCONF_L_IN_CURRENT_MAX +#define MCCONF_L_IN_CURRENT_MAX 110.0 // Input current limit in Amperes (Upper) +#ifndef MCCONF_L_IN_CURRENT_MIN +#define MCCONF_L_IN_CURRENT_MIN -110.0 // Input current limit in Amperes (Lower) +#endif + +// Override dead time. See the stm32f4 reference manual for calculating this value. +#define HW_DEAD_TIME_NSEC 500.0 + +// HW properties +#define HW_HAS_3_SHUNTS +// #define HW_HAS_PHASE_SHUNTS +// #define HW_HAS_PHASE_FILTERS +// #define HW_HAS_CURR_FILTERS + +// Macros +#define LED_GREEN_GPIO GPIOB +#define LED_GREEN_PIN 5 +#define LED_RED_GPIO GPIOB +#define LED_RED_PIN 7 + +#define LED_GREEN_ON() palSetPad(LED_GREEN_GPIO, LED_GREEN_PIN) +#define LED_GREEN_OFF() palClearPad(LED_GREEN_GPIO, LED_GREEN_PIN) +#define LED_RED_ON() palSetPad(LED_RED_GPIO, LED_RED_PIN) +#define LED_RED_OFF() palClearPad(LED_RED_GPIO, LED_RED_PIN) + +#ifdef HW_HAS_PHASE_FILTERS +#define PHASE_FILTER_GPIO GPIOC +#define PHASE_FILTER_PIN 9 +#define PHASE_FILTER_ON() palSetPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN) +#define PHASE_FILTER_OFF() palClearPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN) +#endif + +// Shutdown pin +#define HW_SHUTDOWN_GPIO GPIOC +#define HW_SHUTDOWN_PIN 5 +#define HW_SHUTDOWN_HOLD_ON() palSetPad(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN) +#define HW_SHUTDOWN_HOLD_OFF() palClearPad(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN) +#define HW_SAMPLE_SHUTDOWN() hw_sample_shutdown_button() + +// Hold shutdown pin early to wake up on short pulses +#define HW_EARLY_INIT() \ + palSetPadMode(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN, PAL_MODE_OUTPUT_PUSHPULL); \ + HW_SHUTDOWN_HOLD_ON(); + +#ifdef HW_HAS_CURR_FILTERS +#define CURRENT_FILTER_ON() palSetPad(GPIOD, 2) +#define CURRENT_FILTER_OFF() palClearPad(GPIOD, 2) +#endif + +/* + * ADC Vector + * + * 0 (1): IN0 SENS1 + * 1 (2): IN1 SENS2 + * 2 (3): IN2 SENS3 + * 3 (1): IN10 CURR1 + * 4 (2): IN11 CURR2 + * 5 (3): IN12 CURR3 + * 6 (1): IN5 ADC_EXT1 + * 7 (2): IN6 ADC_EXT2 + * 8 (3): IN3 TEMP_MOS + * 9 (1): IN14 TEMP_MOTOR + * 10 (2): IN15 SHUTDOWN + * 11 (3): IN13 AN_IN + * 12 (1): Vrefint + * 13 (2): IN0 SENS1 + * 14 (3): IN1 SENS2 + * 15 (1): IN8 TEMP_MOS_2 + * 16 (2): IN9 TEMP_MOS_3 + * 17 (3): IN3 SENS3 + */ + +#define HW_ADC_CHANNELS 18 +#define HW_ADC_INJ_CHANNELS 3 +#define HW_ADC_NBR_CONV 6 + +// ADC Indexes +#define ADC_IND_SENS1 0 +#define ADC_IND_SENS2 1 +#define ADC_IND_SENS3 2 +#define ADC_IND_CURR1 3 +#define ADC_IND_CURR2 4 +#define ADC_IND_CURR3 5 +#define ADC_IND_VIN_SENS 11 +#define ADC_IND_EXT 6 +#define ADC_IND_EXT2 7 +#define ADC_IND_SHUTDOWN 10 +#define ADC_IND_TEMP_MOS 8 +#define ADC_IND_TEMP_MOTOR 9 +#define ADC_IND_VREFINT 12 + +// ADC macros and settings + +// Component parameters (can be overridden) +#ifndef V_REG +#define V_REG 3.30 +#endif + +// The voltage dividing acquisition circuit on the Makerbase VESC motherboard is 560K and 21.5K resistors. +#ifndef VIN_R1 +#define VIN_R1 560000.0 +#endif +#ifndef VIN_R2 +#define VIN_R2 22000.0 +#endif + +#ifndef CURRENT_AMP_GAIN +#define CURRENT_AMP_GAIN (-20.0) +#endif +#ifndef CURRENT_SHUNT_RES +#define CURRENT_SHUNT_RES (0.0005) +#endif + +// Input voltage +#define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2)) + +// NTC Termistors +// #define NTC_RES(adc_val) ((4095.0 * 10000.0) / adc_val - 10000.0) +#define NTC_RES(adc_val) ((4095.0 * 10000.0) / adc_val - 10000.0) +#define NTC_TEMP(adc_ind) (1.0 / ((logf(NTC_RES(ADC_Value[adc_ind]) / 10000.0) / 3435.0) + (1.0 / 298.15)) - 273.15) + +#define NTC_RES_MOTOR(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side +#define NTC_TEMP_MOTOR(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_TEMP_MOTOR]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15) + +// Voltage on ADC channel +#define ADC_VOLTS(ch) ((float)ADC_Value[ch] / 4096.0 * V_REG) + +// Double samples in beginning and end for positive current measurement. +// Useful when the shunt sense traces have noise that causes offset. +#ifndef CURR1_DOUBLE_SAMPLE +#define CURR1_DOUBLE_SAMPLE 0 +#endif +#ifndef CURR2_DOUBLE_SAMPLE +#define CURR2_DOUBLE_SAMPLE 0 +#endif +#ifndef CURR3_DOUBLE_SAMPLE +#define CURR3_DOUBLE_SAMPLE 0 +#endif + +// COMM-port ADC GPIOs +#define HW_ADC_EXT_GPIO GPIOA +#define HW_ADC_EXT_PIN 5 +#define HW_ADC_EXT2_GPIO GPIOA +#define HW_ADC_EXT2_PIN 6 + +// UART Peripheral +#define HW_UART_DEV SD3 +#define HW_UART_GPIO_AF GPIO_AF_USART3 +#define HW_UART_TX_PORT GPIOB +#define HW_UART_TX_PIN 10 +#define HW_UART_RX_PORT GPIOB +#define HW_UART_RX_PIN 11 + +// Permanent UART Peripheral (for NRF51) +#define HW_UART_P_BAUD 115200 +#define HW_UART_P_DEV SD4 +#define HW_UART_P_GPIO_AF GPIO_AF_UART4 +#define HW_UART_P_TX_PORT GPIOC +#define HW_UART_P_TX_PIN 10 +#define HW_UART_P_RX_PORT GPIOC +#define HW_UART_P_RX_PIN 11 + +// ICU Peripheral for servo decoding +#define HW_USE_SERVO_TIM4 +#define HW_ICU_TIMER TIM4 +#define HW_ICU_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE) +#define HW_ICU_DEV ICUD4 +#define HW_ICU_CHANNEL ICU_CHANNEL_1 +#define HW_ICU_GPIO_AF GPIO_AF_TIM4 +#define HW_ICU_GPIO GPIOB +#define HW_ICU_PIN 6 + +// I2C Peripheral +#define HW_I2C_DEV I2CD2 +#define HW_I2C_GPIO_AF GPIO_AF_I2C2 +#define HW_I2C_SCL_PORT GPIOB +#define HW_I2C_SCL_PIN 10 +#define HW_I2C_SDA_PORT GPIOB +#define HW_I2C_SDA_PIN 11 + +// Hall/encoder pins +#define HW_HALL_ENC_GPIO1 GPIOC +#define HW_HALL_ENC_PIN1 6 +#define HW_HALL_ENC_GPIO2 GPIOC +#define HW_HALL_ENC_PIN2 7 +#define HW_HALL_ENC_GPIO3 GPIOC +#define HW_HALL_ENC_PIN3 8 +#define HW_ENC_TIM TIM3 +#define HW_ENC_TIM_AF GPIO_AF_TIM3 +#define HW_ENC_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE) +#define HW_ENC_EXTI_PORTSRC EXTI_PortSourceGPIOC +#define HW_ENC_EXTI_PINSRC EXTI_PinSource8 +#define HW_ENC_EXTI_CH EXTI9_5_IRQn +#define HW_ENC_EXTI_LINE EXTI_Line8 +#define HW_ENC_EXTI_ISR_VEC EXTI9_5_IRQHandler +#define HW_ENC_TIM_ISR_CH TIM3_IRQn +#define HW_ENC_TIM_ISR_VEC TIM3_IRQHandler + +// SPI pins +#define HW_SPI_DEV SPID1 +#define HW_SPI_GPIO_AF GPIO_AF_SPI1 +#define HW_SPI_PORT_NSS GPIOA +#define HW_SPI_PIN_NSS 4 +#define HW_SPI_PORT_SCK GPIOA +#define HW_SPI_PIN_SCK 5 +#define HW_SPI_PORT_MOSI GPIOA +#define HW_SPI_PIN_MOSI 7 +#define HW_SPI_PORT_MISO GPIOA +#define HW_SPI_PIN_MISO 6 + +// Measurement macros +#define ADC_V_L1 ADC_Value[ADC_IND_SENS1] +#define ADC_V_L2 ADC_Value[ADC_IND_SENS2] +#define ADC_V_L3 ADC_Value[ADC_IND_SENS3] +#define ADC_V_ZERO (ADC_Value[ADC_IND_VIN_SENS] / 2) + +// Macros +#define READ_HALL1() palReadPad(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1) +#define READ_HALL2() palReadPad(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2) +#define READ_HALL3() palReadPad(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3) + +// Setting limits +#define HW_LIM_CURRENT -110.0, 110.0 +#define HW_LIM_CURRENT_IN -100.0, 100.0 +#define HW_LIM_CURRENT_ABS 0.0, 160 +#define HW_LIM_VIN 12.0, 75.0 +#define HW_LIM_ERPM -200e3, 200e3 +#define HW_LIM_DUTY_MIN 0.0, 0.1 +#define HW_LIM_DUTY_MAX 0.0, 0.99 +#define HW_LIM_TEMP_FET -40.0, 110.0 + +// HW-specific functions +bool hw_sample_shutdown_button(void); +#endif /* HW_IVY_80_110_H_ */ diff --git a/hwconf/IVY_Esk8/80_110/hw_IVY_80_110_no_limits.h b/hwconf/IVY_Esk8/80_110/hw_IVY_80_110_no_limits.h new file mode 100644 index 000000000..cef84defa --- /dev/null +++ b/hwconf/IVY_Esk8/80_110/hw_IVY_80_110_no_limits.h @@ -0,0 +1,27 @@ +/* + Copyright 2018 Benjamin Vedder benjamin@vedder.se + + This file is part of the VESC firmware. + + The VESC firmware is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + The VESC firmware is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef HW_IVY_80_110_NO_LIMITS_H_ +#define HW_IVY_80_110_NO_LIMITS_H_ + +#define DISABLE_HW_LIMITS + +#include "hw_IVY_80_110.h" + +#endif /* HW_IVY_80_110_NO_LIMITS_H_ */ diff --git a/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.c b/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.c new file mode 100644 index 000000000..703b3aa3c --- /dev/null +++ b/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.c @@ -0,0 +1,270 @@ +/* + Copyright 2018 Benjamin Vedder benjamin@vedder.se + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + You should have received a copy of the GNU General Public License + along with this program. If not, see . + */ + +// V2 + +#include "hw.h" +#include "hw_IVY_100V_HP.h" + +#include "ch.h" +#include "hal.h" +#include "stm32f4xx_conf.h" +#include "utils.h" +#include +#include "mc_interface.h" + +// Variables +static volatile bool i2c_running = false; +static mutex_t shutdown_mutex; +static float bt_diff = 0.0; + +// I2C configuration +static const I2CConfig i2cfg = { + OPMODE_I2C, + 100000, + STD_DUTY_CYCLE}; + +void hw_init_gpio(void) +{ + chMtxObjectInit(&shutdown_mutex); + // GPIO clock enable + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); + + // LEDs + palSetPadMode(LED_GREEN_GPIO, LED_GREEN_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(LED_RED_GPIO, LED_RED_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + + // GPIOA Configuration: Channel 1 to 3 as alternate function push-pull + palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + + palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + + // Hall sensors + palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP); + +#ifdef HW_HAS_PHASE_FILTERS + // Phase filters + palSetPadMode(PHASE_FILTER_GPIO, PHASE_FILTER_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + PHASE_FILTER_OFF(); +#endif + +#ifdef HW_HAS_CURR_FILTERS + // Current filter + palSetPadMode(GPIOD, 2, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + + CURRENT_FILTER_OFF(); +#endif + + // AUX pin + // AUX_OFF(); + // palSetPadMode(AUX_GPIO, AUX_PIN, + // PAL_MODE_OUTPUT_PUSHPULL | + // PAL_STM32_OSPEED_HIGHEST); + + // ADC Pins + palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG); + + palSetPadMode(GPIOB, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG); + + palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG); +} + +void hw_setup_adc_channels(void) +{ + // ADC1 regular channels + ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_Vrefint, 5, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_8, 6, ADC_SampleTime_15Cycles); + + // ADC2 regular channels + ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_0, 5, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_9, 6, ADC_SampleTime_15Cycles); + + // ADC3 regular channels + ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_1, 5, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 6, ADC_SampleTime_15Cycles); + + // Injected channels + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 3, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 3, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 3, ADC_SampleTime_15Cycles); +} + +void hw_start_i2c(void) +{ + i2cAcquireBus(&HW_I2C_DEV); + + if (!i2c_running) + { + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + i2cStart(&HW_I2C_DEV, &i2cfg); + i2c_running = true; + } + + i2cReleaseBus(&HW_I2C_DEV); +} + +void hw_stop_i2c(void) +{ + i2cAcquireBus(&HW_I2C_DEV); + + if (i2c_running) + { + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT); + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT); + + i2cStop(&HW_I2C_DEV); + i2c_running = false; + } + + i2cReleaseBus(&HW_I2C_DEV); +} + +/** + * Try to restore the i2c bus + */ +void hw_try_restore_i2c(void) +{ + if (i2c_running) + { + i2cAcquireBus(&HW_I2C_DEV); + + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + + chThdSleep(1); + + for (int i = 0; i < 16; i++) + { + palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + } + + // Generate start then stop condition + palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + chThdSleep(1); + palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + HW_I2C_DEV.state = I2C_STOP; + i2cStart(&HW_I2C_DEV, &i2cfg); + + i2cReleaseBus(&HW_I2C_DEV); + } +} + +bool hw_sample_shutdown_button(void) +{ + chMtxLock(&shutdown_mutex); + + bt_diff = 0.0; + + for (int i = 0; i < 3; i++) + { + palSetPadMode(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN, PAL_MODE_INPUT_ANALOG); + chThdSleep(5); + float val1 = ADC_VOLTS(ADC_IND_SHUTDOWN); + chThdSleepMilliseconds(1); + float val2 = ADC_VOLTS(ADC_IND_SHUTDOWN); + palSetPadMode(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN, PAL_MODE_OUTPUT_PUSHPULL); + chThdSleepMilliseconds(1); + + bt_diff += (val1 - val2); + } + + chMtxUnlock(&shutdown_mutex); + + return (bt_diff > 0.12); +} diff --git a/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.h b/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.h new file mode 100644 index 000000000..fb397c629 --- /dev/null +++ b/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.h @@ -0,0 +1,312 @@ +/* + Copyright 2018 Benjamin Vedder benjamin@vedder.se + + This file is part of the VESC firmware. + + The VESC firmware is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + The VESC firmware is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef HW_IVY_100V_HP_H_ + +#define HW_IVY_100V_HP_H_ + +#define HW_NAME "IVY_100V_HP" + +// Default setting overrides +#define APPCONF_APP_TO_USE APP_NONE +// #define APPCONF_CONTROLLER_ID 2 +#define APPCONF_TIMEOUT_MSEC 500 +#define APPCONF_TIMEOUT_BRAKE_CURRENT 0 +#define APPCONF_PERMANENT_UART_ENABLED false +#define APPCONF_SHUTDOWN_MODE SHUTDOWN_MODE_ALWAYS_ON +#define APPCONF_CAN_BAUD_RATE CAN_BAUD_1M +#define APPCONF_CAN_STATUS_RATE_1 100 +#define APPCONF_CAN_STATUS_RATE_2 5 +#define APPCONF_CAN_STATUS_MSGS_R1 0x09 +#define APPCONF_CAN_STATUS_MSGS_R2 0x10 +// Common PID-parameters +#define MCCONF_SP_PID_LOOP_RATE PID_RATE_5000_HZ // PID loop rate +// Speed PID parameters +#define MCCONF_S_PID_KP 0.003 // Proportional gain +#define MCCONF_S_PID_KI 0.009 // Integral gain +#define MCCONF_S_PID_KD 0.00002 // Derivative gain +#define MCCONF_S_PID_KD_FILTER 0.2 // Derivative filter +#define MCCONF_S_PID_MIN_RPM 300.0 // Minimum allowed RPM +#define MCCONF_S_PID_ALLOW_BRAKING true // Allow braking in speed control mode +#define MCCONF_S_PID_RAMP_ERPMS_S 2000.0 // Speed input ramping, in ERPM/s +#define MCCONF_S_PID_SPEED_SOURCE S_PID_SPEED_SRC_PLL +// Position PID parameters +#define MCCONF_P_PID_KP 0.03 // Proportional gain +#define MCCONF_P_PID_KI 0.0 // Integral gain +#define MCCONF_P_PID_KD 0.00000 // Derivative gain +#define MCCONF_P_PID_KD_PROC 0.00035 // Derivative gain process +#define MCCONF_P_PID_KD_FILTER 0.2 // Derivative filter +#define MCCONF_P_PID_ANG_DIV 10.0 // Divide angle by this value +#define MCCONF_P_PID_GAIN_DEC_ANGLE 500.0 // Decrease PID-gains when the error is below this value +#define MCCONF_P_PID_OFFSET 0.0 // Angle offset + +#ifndef MCCONF_L_MIN_VOLTAGE +#define MCCONF_L_MIN_VOLTAGE 20.0 // Minimum input voltage +#endif +#ifndef MCCONF_L_MAX_VOLTAGE +#define MCCONF_L_MAX_VOLTAGE 75.0 // Maximum input voltage +#endif +#endif +#ifndef MCCONF_DEFAULT_MOTOR_TYPE +#define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC +#endif +#ifndef MCCONF_FOC_F_ZV +#define MCCONF_FOC_F_ZV 30000.0 +#endif +#ifndef MCCONF_L_MAX_ABS_CURRENT +#define MCCONF_L_MAX_ABS_CURRENT 320.0 // The maximum absolute current above which a fault is generated +#endif +#ifndef MCCONF_FOC_SAMPLE_V0_V7 +#define MCCONF_FOC_SAMPLE_V0_V7 false // Run control loop in both v0 and v7 (requires phase shunts) +#endif +#ifndef MCCONF_L_IN_CURRENT_MAX +#define MCCONF_L_IN_CURRENT_MAX 200.0 // Input current limit in Amperes (Upper) +#ifndef MCCONF_L_IN_CURRENT_MIN +#define MCCONF_L_IN_CURRENT_MIN -200.0 // Input current limit in Amperes (Lower) +#endif + +// Override dead time. See the stm32f4 reference manual for calculating this value. +#define HW_DEAD_TIME_NSEC 500.0 + +// HW properties +#define HW_HAS_3_SHUNTS +#define HW_HAS_PHASE_SHUNTS +#define HW_HAS_PHASE_FILTERS +#define HW_HAS_CURR_FILTERS + +// Macros +#define LED_GREEN_GPIO GPIOB +#define LED_GREEN_PIN 5 +#define LED_RED_GPIO GPIOB +#define LED_RED_PIN 7 + +#define LED_GREEN_ON() palSetPad(LED_GREEN_GPIO, LED_GREEN_PIN) +#define LED_GREEN_OFF() palClearPad(LED_GREEN_GPIO, LED_GREEN_PIN) +#define LED_RED_ON() palSetPad(LED_RED_GPIO, LED_RED_PIN) +#define LED_RED_OFF() palClearPad(LED_RED_GPIO, LED_RED_PIN) + +#ifdef HW_HAS_PHASE_FILTERS +#define PHASE_FILTER_GPIO GPIOC +#define PHASE_FILTER_PIN 9 +#define PHASE_FILTER_ON() palSetPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN) +#define PHASE_FILTER_OFF() palClearPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN) +#endif + +// Shutdown pin +#define HW_SHUTDOWN_GPIO GPIOC +#define HW_SHUTDOWN_PIN 5 +#define HW_SHUTDOWN_HOLD_ON() palSetPad(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN) +#define HW_SHUTDOWN_HOLD_OFF() palClearPad(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN) +#define HW_SAMPLE_SHUTDOWN() hw_sample_shutdown_button() + +// Hold shutdown pin early to wake up on short pulses +#define HW_EARLY_INIT() \ + palSetPadMode(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN, PAL_MODE_OUTPUT_PUSHPULL); \ + HW_SHUTDOWN_HOLD_ON(); + +#ifdef HW_HAS_CURR_FILTERS +#define CURRENT_FILTER_ON() palSetPad(GPIOD, 2) +#define CURRENT_FILTER_OFF() palClearPad(GPIOD, 2) +#endif + +/* + * ADC Vector + * + * 0 (1): IN0 SENS1 + * 1 (2): IN1 SENS2 + * 2 (3): IN2 SENS3 + * 3 (1): IN10 CURR1 + * 4 (2): IN11 CURR2 + * 5 (3): IN12 CURR3 + * 6 (1): IN5 ADC_EXT1 + * 7 (2): IN6 ADC_EXT2 + * 8 (3): IN3 TEMP_MOS + * 9 (1): IN14 TEMP_MOTOR + * 10 (2): IN15 SHUTDOWN + * 11 (3): IN13 AN_IN + * 12 (1): Vrefint + * 13 (2): IN0 SENS1 + * 14 (3): IN1 SENS2 + * 15 (1): IN8 TEMP_MOS_2 + * 16 (2): IN9 TEMP_MOS_3 + * 17 (3): IN3 SENS3 + */ + +#define HW_ADC_CHANNELS 18 +#define HW_ADC_INJ_CHANNELS 3 +#define HW_ADC_NBR_CONV 6 + +// ADC Indexes +#define ADC_IND_SENS1 0 +#define ADC_IND_SENS2 1 +#define ADC_IND_SENS3 2 +#define ADC_IND_CURR1 3 +#define ADC_IND_CURR2 4 +#define ADC_IND_CURR3 5 +#define ADC_IND_VIN_SENS 11 +#define ADC_IND_EXT 6 +#define ADC_IND_EXT2 7 +#define ADC_IND_SHUTDOWN 10 +#define ADC_IND_TEMP_MOS 8 +#define ADC_IND_TEMP_MOTOR 9 +#define ADC_IND_VREFINT 12 + +// ADC macros and settings + +// Component parameters (can be overridden) +#ifndef V_REG +#define V_REG 3.30 +#endif + +// The voltage dividing acquisition circuit on the Makerbase VESC motherboard is 560K and 21.5K resistors. +#ifndef VIN_R1 +#define VIN_R1 560000.0 +#endif +#ifndef VIN_R2 +#define VIN_R2 22000.0 +#endif + +#ifndef CURRENT_AMP_GAIN +#define CURRENT_AMP_GAIN 20.0 +#endif +#ifndef CURRENT_SHUNT_RES +#define CURRENT_SHUNT_RES (0.0005 / 2.0) +#endif + +// Input voltage +#define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2)) + +// NTC Termistors +// #define NTC_RES(adc_val) ((4095.0 * 10000.0) / adc_val - 10000.0) +#define NTC_RES(adc_val) ((4095.0 * 10000.0) / adc_val - 10000.0) +#define NTC_TEMP(adc_ind) (1.0 / ((logf(NTC_RES(ADC_Value[adc_ind]) / 10000.0) / 3435.0) + (1.0 / 298.15)) - 273.15) + +#define NTC_RES_MOTOR(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side +#define NTC_TEMP_MOTOR(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_TEMP_MOTOR]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15) + +// Voltage on ADC channel +#define ADC_VOLTS(ch) ((float)ADC_Value[ch] / 4096.0 * V_REG) + +// Double samples in beginning and end for positive current measurement. +// Useful when the shunt sense traces have noise that causes offset. +#ifndef CURR1_DOUBLE_SAMPLE +#define CURR1_DOUBLE_SAMPLE 0 +#endif +#ifndef CURR2_DOUBLE_SAMPLE +#define CURR2_DOUBLE_SAMPLE 0 +#endif +#ifndef CURR3_DOUBLE_SAMPLE +#define CURR3_DOUBLE_SAMPLE 0 +#endif + +// COMM-port ADC GPIOs +#define HW_ADC_EXT_GPIO GPIOA +#define HW_ADC_EXT_PIN 5 +#define HW_ADC_EXT2_GPIO GPIOA +#define HW_ADC_EXT2_PIN 6 + +// UART Peripheral +#define HW_UART_DEV SD3 +#define HW_UART_GPIO_AF GPIO_AF_USART3 +#define HW_UART_TX_PORT GPIOB +#define HW_UART_TX_PIN 10 +#define HW_UART_RX_PORT GPIOB +#define HW_UART_RX_PIN 11 + +// Permanent UART Peripheral (for NRF51) +#define HW_UART_P_BAUD 115200 +#define HW_UART_P_DEV SD4 +#define HW_UART_P_GPIO_AF GPIO_AF_UART4 +#define HW_UART_P_TX_PORT GPIOC +#define HW_UART_P_TX_PIN 10 +#define HW_UART_P_RX_PORT GPIOC +#define HW_UART_P_RX_PIN 11 + +// ICU Peripheral for servo decoding +#define HW_USE_SERVO_TIM4 +#define HW_ICU_TIMER TIM4 +#define HW_ICU_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE) +#define HW_ICU_DEV ICUD4 +#define HW_ICU_CHANNEL ICU_CHANNEL_1 +#define HW_ICU_GPIO_AF GPIO_AF_TIM4 +#define HW_ICU_GPIO GPIOB +#define HW_ICU_PIN 6 + +// I2C Peripheral +#define HW_I2C_DEV I2CD2 +#define HW_I2C_GPIO_AF GPIO_AF_I2C2 +#define HW_I2C_SCL_PORT GPIOB +#define HW_I2C_SCL_PIN 10 +#define HW_I2C_SDA_PORT GPIOB +#define HW_I2C_SDA_PIN 11 + +// Hall/encoder pins +#define HW_HALL_ENC_GPIO1 GPIOC +#define HW_HALL_ENC_PIN1 6 +#define HW_HALL_ENC_GPIO2 GPIOC +#define HW_HALL_ENC_PIN2 7 +#define HW_HALL_ENC_GPIO3 GPIOC +#define HW_HALL_ENC_PIN3 8 +#define HW_ENC_TIM TIM3 +#define HW_ENC_TIM_AF GPIO_AF_TIM3 +#define HW_ENC_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE) +#define HW_ENC_EXTI_PORTSRC EXTI_PortSourceGPIOC +#define HW_ENC_EXTI_PINSRC EXTI_PinSource8 +#define HW_ENC_EXTI_CH EXTI9_5_IRQn +#define HW_ENC_EXTI_LINE EXTI_Line8 +#define HW_ENC_EXTI_ISR_VEC EXTI9_5_IRQHandler +#define HW_ENC_TIM_ISR_CH TIM3_IRQn +#define HW_ENC_TIM_ISR_VEC TIM3_IRQHandler + +// SPI pins +#define HW_SPI_DEV SPID1 +#define HW_SPI_GPIO_AF GPIO_AF_SPI1 +#define HW_SPI_PORT_NSS GPIOA +#define HW_SPI_PIN_NSS 4 +#define HW_SPI_PORT_SCK GPIOA +#define HW_SPI_PIN_SCK 5 +#define HW_SPI_PORT_MOSI GPIOA +#define HW_SPI_PIN_MOSI 7 +#define HW_SPI_PORT_MISO GPIOA +#define HW_SPI_PIN_MISO 6 + +// Measurement macros +#define ADC_V_L1 ADC_Value[ADC_IND_SENS1] +#define ADC_V_L2 ADC_Value[ADC_IND_SENS2] +#define ADC_V_L3 ADC_Value[ADC_IND_SENS3] +#define ADC_V_ZERO (ADC_Value[ADC_IND_VIN_SENS] / 2) + +// Macros +#define READ_HALL1() palReadPad(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1) +#define READ_HALL2() palReadPad(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2) +#define READ_HALL3() palReadPad(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3) + +// Setting limits +#define HW_LIM_CURRENT -300.0, 300.0 +#define HW_LIM_CURRENT_IN -280.0, 280.0 +#define HW_LIM_CURRENT_ABS 0.0, 320 +#define HW_LIM_VIN 12.0, 90.0 +#define HW_LIM_ERPM -200e3, 200e3 +#define HW_LIM_DUTY_MIN 0.0, 0.1 +#define HW_LIM_DUTY_MAX 0.0, 0.99 +#define HW_LIM_TEMP_FET -40.0, 110.0 + +// HW-specific functions +bool hw_sample_shutdown_button(void); +#endif /* HW_IVY_100V_HP_H_ */ diff --git a/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP_no_limits.h b/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP_no_limits.h new file mode 100644 index 000000000..d242df06d --- /dev/null +++ b/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP_no_limits.h @@ -0,0 +1,27 @@ +/* + Copyright 2018 Benjamin Vedder benjamin@vedder.se + + This file is part of the VESC firmware. + + The VESC firmware is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + The VESC firmware is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef HW_IVY_100V_HP_NO_LIMITS_H_ +#define HW_IVY_100V_HP_NO_LIMITS_H_ + +#define DISABLE_HW_LIMITS + +#include "hw_IVY_100V_HP.h" + +#endif /* HW_IVY_100V_HP_NO_LIMITS_H_ */ diff --git a/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.c b/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.c new file mode 100644 index 000000000..238d3a2e2 --- /dev/null +++ b/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.c @@ -0,0 +1,270 @@ +/* + Copyright 2018 Benjamin Vedder benjamin@vedder.se + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + You should have received a copy of the GNU General Public License + along with this program. If not, see . + */ + +// V2 + +#include "hw.h" +#include "hw_IVY_100V_MINI.h" + +#include "ch.h" +#include "hal.h" +#include "stm32f4xx_conf.h" +#include "utils.h" +#include +#include "mc_interface.h" + +// Variables +static volatile bool i2c_running = false; +static mutex_t shutdown_mutex; +static float bt_diff = 0.0; + +// I2C configuration +static const I2CConfig i2cfg = { + OPMODE_I2C, + 100000, + STD_DUTY_CYCLE}; + +void hw_init_gpio(void) +{ + chMtxObjectInit(&shutdown_mutex); + // GPIO clock enable + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); + + // LEDs + palSetPadMode(LED_GREEN_GPIO, LED_GREEN_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(LED_RED_GPIO, LED_RED_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + + // GPIOA Configuration: Channel 1 to 3 as alternate function push-pull + palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + + palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + + // Hall sensors + palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP); + +#ifdef HW_HAS_PHASE_FILTERS + // Phase filters + palSetPadMode(PHASE_FILTER_GPIO, PHASE_FILTER_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + PHASE_FILTER_OFF(); +#endif + +#ifdef HW_HAS_CURR_FILTERS + // Current filter + palSetPadMode(GPIOD, 2, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + + CURRENT_FILTER_OFF(); +#endif + + // AUX pin + // AUX_OFF(); + // palSetPadMode(AUX_GPIO, AUX_PIN, + // PAL_MODE_OUTPUT_PUSHPULL | + // PAL_STM32_OSPEED_HIGHEST); + + // ADC Pins + palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG); + + palSetPadMode(GPIOB, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG); + + palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG); +} + +void hw_setup_adc_channels(void) +{ + // ADC1 regular channels + ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_Vrefint, 5, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_8, 6, ADC_SampleTime_15Cycles); + + // ADC2 regular channels + ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_0, 5, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_9, 6, ADC_SampleTime_15Cycles); + + // ADC3 regular channels + ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_1, 5, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 6, ADC_SampleTime_15Cycles); + + // Injected channels + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 3, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 3, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 3, ADC_SampleTime_15Cycles); +} + +void hw_start_i2c(void) +{ + i2cAcquireBus(&HW_I2C_DEV); + + if (!i2c_running) + { + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + i2cStart(&HW_I2C_DEV, &i2cfg); + i2c_running = true; + } + + i2cReleaseBus(&HW_I2C_DEV); +} + +void hw_stop_i2c(void) +{ + i2cAcquireBus(&HW_I2C_DEV); + + if (i2c_running) + { + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT); + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT); + + i2cStop(&HW_I2C_DEV); + i2c_running = false; + } + + i2cReleaseBus(&HW_I2C_DEV); +} + +/** + * Try to restore the i2c bus + */ +void hw_try_restore_i2c(void) +{ + if (i2c_running) + { + i2cAcquireBus(&HW_I2C_DEV); + + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + + chThdSleep(1); + + for (int i = 0; i < 16; i++) + { + palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + } + + // Generate start then stop condition + palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + chThdSleep(1); + palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + HW_I2C_DEV.state = I2C_STOP; + i2cStart(&HW_I2C_DEV, &i2cfg); + + i2cReleaseBus(&HW_I2C_DEV); + } +} + +bool hw_sample_shutdown_button(void) +{ + chMtxLock(&shutdown_mutex); + + bt_diff = 0.0; + + for (int i = 0; i < 3; i++) + { + palSetPadMode(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN, PAL_MODE_INPUT_ANALOG); + chThdSleep(5); + float val1 = ADC_VOLTS(ADC_IND_SHUTDOWN); + chThdSleepMilliseconds(1); + float val2 = ADC_VOLTS(ADC_IND_SHUTDOWN); + palSetPadMode(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN, PAL_MODE_OUTPUT_PUSHPULL); + chThdSleepMilliseconds(1); + + bt_diff += (val1 - val2); + } + + chMtxUnlock(&shutdown_mutex); + + return (bt_diff > 0.12); +} diff --git a/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.h b/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.h new file mode 100644 index 000000000..d5982c0a5 --- /dev/null +++ b/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.h @@ -0,0 +1,312 @@ +/* + Copyright 2018 Benjamin Vedder benjamin@vedder.se + + This file is part of the VESC firmware. + + The VESC firmware is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + The VESC firmware is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef HW_IVY_100V_MINI_H_ + +#define HW_IVY_100V_MINI_H_ + +#define HW_NAME "hw_IVY_100V_MINI" + +// Default setting overrides +#define APPCONF_APP_TO_USE APP_NONE +// #define APPCONF_CONTROLLER_ID 2 +#define APPCONF_TIMEOUT_MSEC 500 +#define APPCONF_TIMEOUT_BRAKE_CURRENT 0 +#define APPCONF_PERMANENT_UART_ENABLED false +#define APPCONF_SHUTDOWN_MODE SHUTDOWN_MODE_ALWAYS_ON +#define APPCONF_CAN_BAUD_RATE CAN_BAUD_1M +#define APPCONF_CAN_STATUS_RATE_1 100 +#define APPCONF_CAN_STATUS_RATE_2 5 +#define APPCONF_CAN_STATUS_MSGS_R1 0x09 +#define APPCONF_CAN_STATUS_MSGS_R2 0x10 +// Common PID-parameters +#define MCCONF_SP_PID_LOOP_RATE PID_RATE_5000_HZ // PID loop rate +// Speed PID parameters +#define MCCONF_S_PID_KP 0.003 // Proportional gain +#define MCCONF_S_PID_KI 0.009 // Integral gain +#define MCCONF_S_PID_KD 0.00002 // Derivative gain +#define MCCONF_S_PID_KD_FILTER 0.2 // Derivative filter +#define MCCONF_S_PID_MIN_RPM 300.0 // Minimum allowed RPM +#define MCCONF_S_PID_ALLOW_BRAKING true // Allow braking in speed control mode +#define MCCONF_S_PID_RAMP_ERPMS_S 2000.0 // Speed input ramping, in ERPM/s +#define MCCONF_S_PID_SPEED_SOURCE S_PID_SPEED_SRC_PLL +// Position PID parameters +#define MCCONF_P_PID_KP 0.03 // Proportional gain +#define MCCONF_P_PID_KI 0.0 // Integral gain +#define MCCONF_P_PID_KD 0.00000 // Derivative gain +#define MCCONF_P_PID_KD_PROC 0.00035 // Derivative gain process +#define MCCONF_P_PID_KD_FILTER 0.2 // Derivative filter +#define MCCONF_P_PID_ANG_DIV 10.0 // Divide angle by this value +#define MCCONF_P_PID_GAIN_DEC_ANGLE 500.0 // Decrease PID-gains when the error is below this value +#define MCCONF_P_PID_OFFSET 0.0 // Angle offset + +#ifndef MCCONF_L_MIN_VOLTAGE +#define MCCONF_L_MIN_VOLTAGE 20.0 // Minimum input voltage +#endif +#ifndef MCCONF_L_MAX_VOLTAGE +#define MCCONF_L_MAX_VOLTAGE 90.0 // Maximum input voltage +#endif +#endif +#ifndef MCCONF_DEFAULT_MOTOR_TYPE +#define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC +#endif +#ifndef MCCONF_FOC_F_ZV +#define MCCONF_FOC_F_ZV 30000.0 +#endif +#ifndef MCCONF_L_MAX_ABS_CURRENT +#define MCCONF_L_MAX_ABS_CURRENT 160.0 // The maximum absolute current above which a fault is generated +#endif +#ifndef MCCONF_FOC_SAMPLE_V0_V7 +#define MCCONF_FOC_SAMPLE_V0_V7 false // Run control loop in both v0 and v7 (requires phase shunts) +#endif +#ifndef MCCONF_L_IN_CURRENT_MAX +#define MCCONF_L_IN_CURRENT_MAX 110.0 // Input current limit in Amperes (Upper) +#ifndef MCCONF_L_IN_CURRENT_MIN +#define MCCONF_L_IN_CURRENT_MIN -110.0 // Input current limit in Amperes (Lower) +#endif + +// Override dead time. See the stm32f4 reference manual for calculating this value. +#define HW_DEAD_TIME_NSEC 500.0 + +// HW properties +#define HW_HAS_3_SHUNTS +// #define HW_HAS_PHASE_SHUNTS +// #define HW_HAS_PHASE_FILTERS +// #define HW_HAS_CURR_FILTERS + +// Macros +#define LED_GREEN_GPIO GPIOB +#define LED_GREEN_PIN 5 +#define LED_RED_GPIO GPIOB +#define LED_RED_PIN 7 + +#define LED_GREEN_ON() palSetPad(LED_GREEN_GPIO, LED_GREEN_PIN) +#define LED_GREEN_OFF() palClearPad(LED_GREEN_GPIO, LED_GREEN_PIN) +#define LED_RED_ON() palSetPad(LED_RED_GPIO, LED_RED_PIN) +#define LED_RED_OFF() palClearPad(LED_RED_GPIO, LED_RED_PIN) + +#ifdef HW_HAS_PHASE_FILTERS +#define PHASE_FILTER_GPIO GPIOC +#define PHASE_FILTER_PIN 9 +#define PHASE_FILTER_ON() palSetPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN) +#define PHASE_FILTER_OFF() palClearPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN) +#endif + +// Shutdown pin +#define HW_SHUTDOWN_GPIO GPIOC +#define HW_SHUTDOWN_PIN 5 +#define HW_SHUTDOWN_HOLD_ON() palSetPad(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN) +#define HW_SHUTDOWN_HOLD_OFF() palClearPad(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN) +#define HW_SAMPLE_SHUTDOWN() hw_sample_shutdown_button() + +// Hold shutdown pin early to wake up on short pulses +#define HW_EARLY_INIT() \ + palSetPadMode(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN, PAL_MODE_OUTPUT_PUSHPULL); \ + HW_SHUTDOWN_HOLD_ON(); + +#ifdef HW_HAS_CURR_FILTERS +#define CURRENT_FILTER_ON() palSetPad(GPIOD, 2) +#define CURRENT_FILTER_OFF() palClearPad(GPIOD, 2) +#endif + +/* + * ADC Vector + * + * 0 (1): IN0 SENS1 + * 1 (2): IN1 SENS2 + * 2 (3): IN2 SENS3 + * 3 (1): IN10 CURR1 + * 4 (2): IN11 CURR2 + * 5 (3): IN12 CURR3 + * 6 (1): IN5 ADC_EXT1 + * 7 (2): IN6 ADC_EXT2 + * 8 (3): IN3 TEMP_MOS + * 9 (1): IN14 TEMP_MOTOR + * 10 (2): IN15 SHUTDOWN + * 11 (3): IN13 AN_IN + * 12 (1): Vrefint + * 13 (2): IN0 SENS1 + * 14 (3): IN1 SENS2 + * 15 (1): IN8 TEMP_MOS_2 + * 16 (2): IN9 TEMP_MOS_3 + * 17 (3): IN3 SENS3 + */ + +#define HW_ADC_CHANNELS 18 +#define HW_ADC_INJ_CHANNELS 3 +#define HW_ADC_NBR_CONV 6 + +// ADC Indexes +#define ADC_IND_SENS1 0 +#define ADC_IND_SENS2 1 +#define ADC_IND_SENS3 2 +#define ADC_IND_CURR1 3 +#define ADC_IND_CURR2 4 +#define ADC_IND_CURR3 5 +#define ADC_IND_VIN_SENS 11 +#define ADC_IND_EXT 6 +#define ADC_IND_EXT2 7 +#define ADC_IND_SHUTDOWN 10 +#define ADC_IND_TEMP_MOS 8 +#define ADC_IND_TEMP_MOTOR 9 +#define ADC_IND_VREFINT 12 + +// ADC macros and settings + +// Component parameters (can be overridden) +#ifndef V_REG +#define V_REG 3.30 +#endif + +// The voltage dividing acquisition circuit on the Makerbase VESC motherboard is 560K and 21.5K resistors. +#ifndef VIN_R1 +#define VIN_R1 560000.0 +#endif +#ifndef VIN_R2 +#define VIN_R2 22000.0 +#endif + +#ifndef CURRENT_AMP_GAIN +#define CURRENT_AMP_GAIN (-20.0) +#endif +#ifndef CURRENT_SHUNT_RES +#define CURRENT_SHUNT_RES (0.0005) +#endif + +// Input voltage +#define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2)) + +// NTC Termistors +// #define NTC_RES(adc_val) ((4095.0 * 10000.0) / adc_val - 10000.0) +#define NTC_RES(adc_val) ((4095.0 * 10000.0) / adc_val - 10000.0) +#define NTC_TEMP(adc_ind) (1.0 / ((logf(NTC_RES(ADC_Value[adc_ind]) / 10000.0) / 3435.0) + (1.0 / 298.15)) - 273.15) + +#define NTC_RES_MOTOR(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side +#define NTC_TEMP_MOTOR(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_TEMP_MOTOR]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15) + +// Voltage on ADC channel +#define ADC_VOLTS(ch) ((float)ADC_Value[ch] / 4096.0 * V_REG) + +// Double samples in beginning and end for positive current measurement. +// Useful when the shunt sense traces have noise that causes offset. +#ifndef CURR1_DOUBLE_SAMPLE +#define CURR1_DOUBLE_SAMPLE 0 +#endif +#ifndef CURR2_DOUBLE_SAMPLE +#define CURR2_DOUBLE_SAMPLE 0 +#endif +#ifndef CURR3_DOUBLE_SAMPLE +#define CURR3_DOUBLE_SAMPLE 0 +#endif + +// COMM-port ADC GPIOs +#define HW_ADC_EXT_GPIO GPIOA +#define HW_ADC_EXT_PIN 5 +#define HW_ADC_EXT2_GPIO GPIOA +#define HW_ADC_EXT2_PIN 6 + +// UART Peripheral +#define HW_UART_DEV SD3 +#define HW_UART_GPIO_AF GPIO_AF_USART3 +#define HW_UART_TX_PORT GPIOB +#define HW_UART_TX_PIN 10 +#define HW_UART_RX_PORT GPIOB +#define HW_UART_RX_PIN 11 + +// Permanent UART Peripheral (for NRF51) +#define HW_UART_P_BAUD 115200 +#define HW_UART_P_DEV SD4 +#define HW_UART_P_GPIO_AF GPIO_AF_UART4 +#define HW_UART_P_TX_PORT GPIOC +#define HW_UART_P_TX_PIN 10 +#define HW_UART_P_RX_PORT GPIOC +#define HW_UART_P_RX_PIN 11 + +// ICU Peripheral for servo decoding +#define HW_USE_SERVO_TIM4 +#define HW_ICU_TIMER TIM4 +#define HW_ICU_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE) +#define HW_ICU_DEV ICUD4 +#define HW_ICU_CHANNEL ICU_CHANNEL_1 +#define HW_ICU_GPIO_AF GPIO_AF_TIM4 +#define HW_ICU_GPIO GPIOB +#define HW_ICU_PIN 6 + +// I2C Peripheral +#define HW_I2C_DEV I2CD2 +#define HW_I2C_GPIO_AF GPIO_AF_I2C2 +#define HW_I2C_SCL_PORT GPIOB +#define HW_I2C_SCL_PIN 10 +#define HW_I2C_SDA_PORT GPIOB +#define HW_I2C_SDA_PIN 11 + +// Hall/encoder pins +#define HW_HALL_ENC_GPIO1 GPIOC +#define HW_HALL_ENC_PIN1 6 +#define HW_HALL_ENC_GPIO2 GPIOC +#define HW_HALL_ENC_PIN2 7 +#define HW_HALL_ENC_GPIO3 GPIOC +#define HW_HALL_ENC_PIN3 8 +#define HW_ENC_TIM TIM3 +#define HW_ENC_TIM_AF GPIO_AF_TIM3 +#define HW_ENC_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE) +#define HW_ENC_EXTI_PORTSRC EXTI_PortSourceGPIOC +#define HW_ENC_EXTI_PINSRC EXTI_PinSource8 +#define HW_ENC_EXTI_CH EXTI9_5_IRQn +#define HW_ENC_EXTI_LINE EXTI_Line8 +#define HW_ENC_EXTI_ISR_VEC EXTI9_5_IRQHandler +#define HW_ENC_TIM_ISR_CH TIM3_IRQn +#define HW_ENC_TIM_ISR_VEC TIM3_IRQHandler + +// SPI pins +#define HW_SPI_DEV SPID1 +#define HW_SPI_GPIO_AF GPIO_AF_SPI1 +#define HW_SPI_PORT_NSS GPIOA +#define HW_SPI_PIN_NSS 4 +#define HW_SPI_PORT_SCK GPIOA +#define HW_SPI_PIN_SCK 5 +#define HW_SPI_PORT_MOSI GPIOA +#define HW_SPI_PIN_MOSI 7 +#define HW_SPI_PORT_MISO GPIOA +#define HW_SPI_PIN_MISO 6 + +// Measurement macros +#define ADC_V_L1 ADC_Value[ADC_IND_SENS1] +#define ADC_V_L2 ADC_Value[ADC_IND_SENS2] +#define ADC_V_L3 ADC_Value[ADC_IND_SENS3] +#define ADC_V_ZERO (ADC_Value[ADC_IND_VIN_SENS] / 2) + +// Macros +#define READ_HALL1() palReadPad(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1) +#define READ_HALL2() palReadPad(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2) +#define READ_HALL3() palReadPad(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3) + +// Setting limits +#define HW_LIM_CURRENT -110.0, 110.0 +#define HW_LIM_CURRENT_IN -100.0, 100.0 +#define HW_LIM_CURRENT_ABS 0.0, 160 +#define HW_LIM_VIN 12.0, 95.0 +#define HW_LIM_ERPM -200e3, 200e3 +#define HW_LIM_DUTY_MIN 0.0, 0.1 +#define HW_LIM_DUTY_MAX 0.0, 0.99 +#define HW_LIM_TEMP_FET -40.0, 110.0 + +// HW-specific functions +bool hw_sample_shutdown_button(void); +#endif /* HW_IVY_100V_MINI_H_ */ diff --git a/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI_no_limits.h b/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI_no_limits.h new file mode 100644 index 000000000..9366c95bd --- /dev/null +++ b/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI_no_limits.h @@ -0,0 +1,27 @@ +/* + Copyright 2018 Benjamin Vedder benjamin@vedder.se + + This file is part of the VESC firmware. + + The VESC firmware is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + The VESC firmware is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef HW_IVY_100V_MINI_NO_LIMITS_H_ +#define HW_IVY_100V_MINI_NO_LIMITS_H_ + +#define DISABLE_HW_LIMITS + +#include "hw_IVY_100V_MINI.h" + +#endif /* HW_IVY_100V_MINI_NO_LIMITS_H_ */ diff --git a/hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP.c b/hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP.c new file mode 100644 index 000000000..dcf08d1d6 --- /dev/null +++ b/hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP.c @@ -0,0 +1,270 @@ +/* + Copyright 2018 Benjamin Vedder benjamin@vedder.se + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + You should have received a copy of the GNU General Public License + along with this program. If not, see . + */ + +// V2 + +#include "hw.h" +#include "hw_IVY_80V_HP.h" + +#include "ch.h" +#include "hal.h" +#include "stm32f4xx_conf.h" +#include "utils.h" +#include +#include "mc_interface.h" + +// Variables +static volatile bool i2c_running = false; +static mutex_t shutdown_mutex; +static float bt_diff = 0.0; + +// I2C configuration +static const I2CConfig i2cfg = { + OPMODE_I2C, + 100000, + STD_DUTY_CYCLE}; + +void hw_init_gpio(void) +{ + chMtxObjectInit(&shutdown_mutex); + // GPIO clock enable + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); + + // LEDs + palSetPadMode(LED_GREEN_GPIO, LED_GREEN_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(LED_RED_GPIO, LED_RED_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + + // GPIOA Configuration: Channel 1 to 3 as alternate function push-pull + palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + + palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + + // Hall sensors + palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP); + +#ifdef HW_HAS_PHASE_FILTERS + // Phase filters + palSetPadMode(PHASE_FILTER_GPIO, PHASE_FILTER_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + PHASE_FILTER_OFF(); +#endif + +#ifdef HW_HAS_CURR_FILTERS + // Current filter + palSetPadMode(GPIOD, 2, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + + CURRENT_FILTER_OFF(); +#endif + + // AUX pin + // AUX_OFF(); + // palSetPadMode(AUX_GPIO, AUX_PIN, + // PAL_MODE_OUTPUT_PUSHPULL | + // PAL_STM32_OSPEED_HIGHEST); + + // ADC Pins + palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG); + + palSetPadMode(GPIOB, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG); + + palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG); +} + +void hw_setup_adc_channels(void) +{ + // ADC1 regular channels + ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_Vrefint, 5, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_8, 6, ADC_SampleTime_15Cycles); + + // ADC2 regular channels + ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_0, 5, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_9, 6, ADC_SampleTime_15Cycles); + + // ADC3 regular channels + ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_1, 5, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 6, ADC_SampleTime_15Cycles); + + // Injected channels + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 3, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 3, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 3, ADC_SampleTime_15Cycles); +} + +void hw_start_i2c(void) +{ + i2cAcquireBus(&HW_I2C_DEV); + + if (!i2c_running) + { + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + i2cStart(&HW_I2C_DEV, &i2cfg); + i2c_running = true; + } + + i2cReleaseBus(&HW_I2C_DEV); +} + +void hw_stop_i2c(void) +{ + i2cAcquireBus(&HW_I2C_DEV); + + if (i2c_running) + { + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT); + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT); + + i2cStop(&HW_I2C_DEV); + i2c_running = false; + } + + i2cReleaseBus(&HW_I2C_DEV); +} + +/** + * Try to restore the i2c bus + */ +void hw_try_restore_i2c(void) +{ + if (i2c_running) + { + i2cAcquireBus(&HW_I2C_DEV); + + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + + chThdSleep(1); + + for (int i = 0; i < 16; i++) + { + palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + } + + // Generate start then stop condition + palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + chThdSleep(1); + palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + HW_I2C_DEV.state = I2C_STOP; + i2cStart(&HW_I2C_DEV, &i2cfg); + + i2cReleaseBus(&HW_I2C_DEV); + } +} + +bool hw_sample_shutdown_button(void) +{ + chMtxLock(&shutdown_mutex); + + bt_diff = 0.0; + + for (int i = 0; i < 3; i++) + { + palSetPadMode(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN, PAL_MODE_INPUT_ANALOG); + chThdSleep(5); + float val1 = ADC_VOLTS(ADC_IND_SHUTDOWN); + chThdSleepMilliseconds(1); + float val2 = ADC_VOLTS(ADC_IND_SHUTDOWN); + palSetPadMode(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN, PAL_MODE_OUTPUT_PUSHPULL); + chThdSleepMilliseconds(1); + + bt_diff += (val1 - val2); + } + + chMtxUnlock(&shutdown_mutex); + + return (bt_diff > 0.12); +} diff --git a/hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP.h b/hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP.h new file mode 100644 index 000000000..2e8f1373e --- /dev/null +++ b/hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP.h @@ -0,0 +1,312 @@ +/* + Copyright 2018 Benjamin Vedder benjamin@vedder.se + + This file is part of the VESC firmware. + + The VESC firmware is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + The VESC firmware is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef HW_IVY_80V_HP_H_ + +#define HW_IVY_80V_HP_H_ + +#define HW_NAME "IVY_80V_HP" + +// Default setting overrides +#define APPCONF_APP_TO_USE APP_NONE +// #define APPCONF_CONTROLLER_ID 2 +#define APPCONF_TIMEOUT_MSEC 500 +#define APPCONF_TIMEOUT_BRAKE_CURRENT 0 +#define APPCONF_PERMANENT_UART_ENABLED false +#define APPCONF_SHUTDOWN_MODE SHUTDOWN_MODE_ALWAYS_ON +#define APPCONF_CAN_BAUD_RATE CAN_BAUD_1M +#define APPCONF_CAN_STATUS_RATE_1 100 +#define APPCONF_CAN_STATUS_RATE_2 5 +#define APPCONF_CAN_STATUS_MSGS_R1 0x09 +#define APPCONF_CAN_STATUS_MSGS_R2 0x10 +// Common PID-parameters +#define MCCONF_SP_PID_LOOP_RATE PID_RATE_5000_HZ // PID loop rate +// Speed PID parameters +#define MCCONF_S_PID_KP 0.003 // Proportional gain +#define MCCONF_S_PID_KI 0.009 // Integral gain +#define MCCONF_S_PID_KD 0.00002 // Derivative gain +#define MCCONF_S_PID_KD_FILTER 0.2 // Derivative filter +#define MCCONF_S_PID_MIN_RPM 300.0 // Minimum allowed RPM +#define MCCONF_S_PID_ALLOW_BRAKING true // Allow braking in speed control mode +#define MCCONF_S_PID_RAMP_ERPMS_S 2000.0 // Speed input ramping, in ERPM/s +#define MCCONF_S_PID_SPEED_SOURCE S_PID_SPEED_SRC_PLL +// Position PID parameters +#define MCCONF_P_PID_KP 0.03 // Proportional gain +#define MCCONF_P_PID_KI 0.0 // Integral gain +#define MCCONF_P_PID_KD 0.00000 // Derivative gain +#define MCCONF_P_PID_KD_PROC 0.00035 // Derivative gain process +#define MCCONF_P_PID_KD_FILTER 0.2 // Derivative filter +#define MCCONF_P_PID_ANG_DIV 10.0 // Divide angle by this value +#define MCCONF_P_PID_GAIN_DEC_ANGLE 500.0 // Decrease PID-gains when the error is below this value +#define MCCONF_P_PID_OFFSET 0.0 // Angle offset + +#ifndef MCCONF_L_MIN_VOLTAGE +#define MCCONF_L_MIN_VOLTAGE 20.0 // Minimum input voltage +#endif +#ifndef MCCONF_L_MAX_VOLTAGE +#define MCCONF_L_MAX_VOLTAGE 75.0 // Maximum input voltage +#endif +#endif +#ifndef MCCONF_DEFAULT_MOTOR_TYPE +#define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC +#endif +#ifndef MCCONF_FOC_F_ZV +#define MCCONF_FOC_F_ZV 30000.0 +#endif +#ifndef MCCONF_L_MAX_ABS_CURRENT +#define MCCONF_L_MAX_ABS_CURRENT 320.0 // The maximum absolute current above which a fault is generated +#endif +#ifndef MCCONF_FOC_SAMPLE_V0_V7 +#define MCCONF_FOC_SAMPLE_V0_V7 false // Run control loop in both v0 and v7 (requires phase shunts) +#endif +#ifndef MCCONF_L_IN_CURRENT_MAX +#define MCCONF_L_IN_CURRENT_MAX 200.0 // Input current limit in Amperes (Upper) +#ifndef MCCONF_L_IN_CURRENT_MIN +#define MCCONF_L_IN_CURRENT_MIN -200.0 // Input current limit in Amperes (Lower) +#endif + +// Override dead time. See the stm32f4 reference manual for calculating this value. +#define HW_DEAD_TIME_NSEC 500.0 + +// HW properties +#define HW_HAS_3_SHUNTS +#define HW_HAS_PHASE_SHUNTS +#define HW_HAS_PHASE_FILTERS +#define HW_HAS_CURR_FILTERS + +// Macros +#define LED_GREEN_GPIO GPIOB +#define LED_GREEN_PIN 5 +#define LED_RED_GPIO GPIOB +#define LED_RED_PIN 7 + +#define LED_GREEN_ON() palSetPad(LED_GREEN_GPIO, LED_GREEN_PIN) +#define LED_GREEN_OFF() palClearPad(LED_GREEN_GPIO, LED_GREEN_PIN) +#define LED_RED_ON() palSetPad(LED_RED_GPIO, LED_RED_PIN) +#define LED_RED_OFF() palClearPad(LED_RED_GPIO, LED_RED_PIN) + +#ifdef HW_HAS_PHASE_FILTERS +#define PHASE_FILTER_GPIO GPIOC +#define PHASE_FILTER_PIN 9 +#define PHASE_FILTER_ON() palSetPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN) +#define PHASE_FILTER_OFF() palClearPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN) +#endif + +// Shutdown pin +#define HW_SHUTDOWN_GPIO GPIOC +#define HW_SHUTDOWN_PIN 5 +#define HW_SHUTDOWN_HOLD_ON() palSetPad(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN) +#define HW_SHUTDOWN_HOLD_OFF() palClearPad(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN) +#define HW_SAMPLE_SHUTDOWN() hw_sample_shutdown_button() + +// Hold shutdown pin early to wake up on short pulses +#define HW_EARLY_INIT() \ + palSetPadMode(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN, PAL_MODE_OUTPUT_PUSHPULL); \ + HW_SHUTDOWN_HOLD_ON(); + +#ifdef HW_HAS_CURR_FILTERS +#define CURRENT_FILTER_ON() palSetPad(GPIOD, 2) +#define CURRENT_FILTER_OFF() palClearPad(GPIOD, 2) +#endif + +/* + * ADC Vector + * + * 0 (1): IN0 SENS1 + * 1 (2): IN1 SENS2 + * 2 (3): IN2 SENS3 + * 3 (1): IN10 CURR1 + * 4 (2): IN11 CURR2 + * 5 (3): IN12 CURR3 + * 6 (1): IN5 ADC_EXT1 + * 7 (2): IN6 ADC_EXT2 + * 8 (3): IN3 TEMP_MOS + * 9 (1): IN14 TEMP_MOTOR + * 10 (2): IN15 SHUTDOWN + * 11 (3): IN13 AN_IN + * 12 (1): Vrefint + * 13 (2): IN0 SENS1 + * 14 (3): IN1 SENS2 + * 15 (1): IN8 TEMP_MOS_2 + * 16 (2): IN9 TEMP_MOS_3 + * 17 (3): IN3 SENS3 + */ + +#define HW_ADC_CHANNELS 18 +#define HW_ADC_INJ_CHANNELS 3 +#define HW_ADC_NBR_CONV 6 + +// ADC Indexes +#define ADC_IND_SENS1 0 +#define ADC_IND_SENS2 1 +#define ADC_IND_SENS3 2 +#define ADC_IND_CURR1 3 +#define ADC_IND_CURR2 4 +#define ADC_IND_CURR3 5 +#define ADC_IND_VIN_SENS 11 +#define ADC_IND_EXT 6 +#define ADC_IND_EXT2 7 +#define ADC_IND_SHUTDOWN 10 +#define ADC_IND_TEMP_MOS 8 +#define ADC_IND_TEMP_MOTOR 9 +#define ADC_IND_VREFINT 12 + +// ADC macros and settings + +// Component parameters (can be overridden) +#ifndef V_REG +#define V_REG 3.30 +#endif + +// The voltage dividing acquisition circuit on the Makerbase VESC motherboard is 560K and 21.5K resistors. +#ifndef VIN_R1 +#define VIN_R1 560000.0 +#endif +#ifndef VIN_R2 +#define VIN_R2 22000.0 +#endif + +#ifndef CURRENT_AMP_GAIN +#define CURRENT_AMP_GAIN 20.0 +#endif +#ifndef CURRENT_SHUNT_RES +#define CURRENT_SHUNT_RES (0.0005 / 2.0) +#endif + +// Input voltage +#define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2)) + +// NTC Termistors +// #define NTC_RES(adc_val) ((4095.0 * 10000.0) / adc_val - 10000.0) +#define NTC_RES(adc_val) ((4095.0 * 10000.0) / adc_val - 10000.0) +#define NTC_TEMP(adc_ind) (1.0 / ((logf(NTC_RES(ADC_Value[adc_ind]) / 10000.0) / 3435.0) + (1.0 / 298.15)) - 273.15) + +#define NTC_RES_MOTOR(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side +#define NTC_TEMP_MOTOR(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_TEMP_MOTOR]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15) + +// Voltage on ADC channel +#define ADC_VOLTS(ch) ((float)ADC_Value[ch] / 4096.0 * V_REG) + +// Double samples in beginning and end for positive current measurement. +// Useful when the shunt sense traces have noise that causes offset. +#ifndef CURR1_DOUBLE_SAMPLE +#define CURR1_DOUBLE_SAMPLE 0 +#endif +#ifndef CURR2_DOUBLE_SAMPLE +#define CURR2_DOUBLE_SAMPLE 0 +#endif +#ifndef CURR3_DOUBLE_SAMPLE +#define CURR3_DOUBLE_SAMPLE 0 +#endif + +// COMM-port ADC GPIOs +#define HW_ADC_EXT_GPIO GPIOA +#define HW_ADC_EXT_PIN 5 +#define HW_ADC_EXT2_GPIO GPIOA +#define HW_ADC_EXT2_PIN 6 + +// UART Peripheral +#define HW_UART_DEV SD3 +#define HW_UART_GPIO_AF GPIO_AF_USART3 +#define HW_UART_TX_PORT GPIOB +#define HW_UART_TX_PIN 10 +#define HW_UART_RX_PORT GPIOB +#define HW_UART_RX_PIN 11 + +// Permanent UART Peripheral (for NRF51) +#define HW_UART_P_BAUD 115200 +#define HW_UART_P_DEV SD4 +#define HW_UART_P_GPIO_AF GPIO_AF_UART4 +#define HW_UART_P_TX_PORT GPIOC +#define HW_UART_P_TX_PIN 10 +#define HW_UART_P_RX_PORT GPIOC +#define HW_UART_P_RX_PIN 11 + +// ICU Peripheral for servo decoding +#define HW_USE_SERVO_TIM4 +#define HW_ICU_TIMER TIM4 +#define HW_ICU_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE) +#define HW_ICU_DEV ICUD4 +#define HW_ICU_CHANNEL ICU_CHANNEL_1 +#define HW_ICU_GPIO_AF GPIO_AF_TIM4 +#define HW_ICU_GPIO GPIOB +#define HW_ICU_PIN 6 + +// I2C Peripheral +#define HW_I2C_DEV I2CD2 +#define HW_I2C_GPIO_AF GPIO_AF_I2C2 +#define HW_I2C_SCL_PORT GPIOB +#define HW_I2C_SCL_PIN 10 +#define HW_I2C_SDA_PORT GPIOB +#define HW_I2C_SDA_PIN 11 + +// Hall/encoder pins +#define HW_HALL_ENC_GPIO1 GPIOC +#define HW_HALL_ENC_PIN1 6 +#define HW_HALL_ENC_GPIO2 GPIOC +#define HW_HALL_ENC_PIN2 7 +#define HW_HALL_ENC_GPIO3 GPIOC +#define HW_HALL_ENC_PIN3 8 +#define HW_ENC_TIM TIM3 +#define HW_ENC_TIM_AF GPIO_AF_TIM3 +#define HW_ENC_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE) +#define HW_ENC_EXTI_PORTSRC EXTI_PortSourceGPIOC +#define HW_ENC_EXTI_PINSRC EXTI_PinSource8 +#define HW_ENC_EXTI_CH EXTI9_5_IRQn +#define HW_ENC_EXTI_LINE EXTI_Line8 +#define HW_ENC_EXTI_ISR_VEC EXTI9_5_IRQHandler +#define HW_ENC_TIM_ISR_CH TIM3_IRQn +#define HW_ENC_TIM_ISR_VEC TIM3_IRQHandler + +// SPI pins +#define HW_SPI_DEV SPID1 +#define HW_SPI_GPIO_AF GPIO_AF_SPI1 +#define HW_SPI_PORT_NSS GPIOA +#define HW_SPI_PIN_NSS 4 +#define HW_SPI_PORT_SCK GPIOA +#define HW_SPI_PIN_SCK 5 +#define HW_SPI_PORT_MOSI GPIOA +#define HW_SPI_PIN_MOSI 7 +#define HW_SPI_PORT_MISO GPIOA +#define HW_SPI_PIN_MISO 6 + +// Measurement macros +#define ADC_V_L1 ADC_Value[ADC_IND_SENS1] +#define ADC_V_L2 ADC_Value[ADC_IND_SENS2] +#define ADC_V_L3 ADC_Value[ADC_IND_SENS3] +#define ADC_V_ZERO (ADC_Value[ADC_IND_VIN_SENS] / 2) + +// Macros +#define READ_HALL1() palReadPad(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1) +#define READ_HALL2() palReadPad(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2) +#define READ_HALL3() palReadPad(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3) + +// Setting limits +#define HW_LIM_CURRENT -300.0, 300.0 +#define HW_LIM_CURRENT_IN -280.0, 280.0 +#define HW_LIM_CURRENT_ABS 0.0, 320 +#define HW_LIM_VIN 12.0, 75.0 +#define HW_LIM_ERPM -200e3, 200e3 +#define HW_LIM_DUTY_MIN 0.0, 0.1 +#define HW_LIM_DUTY_MAX 0.0, 0.99 +#define HW_LIM_TEMP_FET -40.0, 110.0 + +// HW-specific functions +bool hw_sample_shutdown_button(void); +#endif /* HW_IVY_80V_HP_H_ */ diff --git a/hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP_no_limits.h b/hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP_no_limits.h new file mode 100644 index 000000000..bad3b6423 --- /dev/null +++ b/hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP_no_limits.h @@ -0,0 +1,27 @@ +/* + Copyright 2018 Benjamin Vedder benjamin@vedder.se + + This file is part of the VESC firmware. + + The VESC firmware is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + The VESC firmware is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef HW_IVY_80V_HP_NO_LIMITS_H_ +#define HW_IVY_80V_HP_NO_LIMITS_H_ + +#define DISABLE_HW_LIMITS + +#include "hw_IVY_80V_HP.h" + +#endif /* HW_IVY_80V_HP_NO_LIMITS_H_ */ diff --git a/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.c b/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.c new file mode 100644 index 000000000..2e07dc028 --- /dev/null +++ b/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.c @@ -0,0 +1,270 @@ +/* + Copyright 2018 Benjamin Vedder benjamin@vedder.se + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + You should have received a copy of the GNU General Public License + along with this program. If not, see . + */ + +// V2 + +#include "hw.h" +#include "hw_IVY_80V_MINI.h" + +#include "ch.h" +#include "hal.h" +#include "stm32f4xx_conf.h" +#include "utils.h" +#include +#include "mc_interface.h" + +// Variables +static volatile bool i2c_running = false; +static mutex_t shutdown_mutex; +static float bt_diff = 0.0; + +// I2C configuration +static const I2CConfig i2cfg = { + OPMODE_I2C, + 100000, + STD_DUTY_CYCLE}; + +void hw_init_gpio(void) +{ + chMtxObjectInit(&shutdown_mutex); + // GPIO clock enable + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); + + // LEDs + palSetPadMode(LED_GREEN_GPIO, LED_GREEN_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(LED_RED_GPIO, LED_RED_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + + // GPIOA Configuration: Channel 1 to 3 as alternate function push-pull + palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + + palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUDR_FLOATING); + + // Hall sensors + palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP); + +#ifdef HW_HAS_PHASE_FILTERS + // Phase filters + palSetPadMode(PHASE_FILTER_GPIO, PHASE_FILTER_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + PHASE_FILTER_OFF(); +#endif + +#ifdef HW_HAS_CURR_FILTERS + // Current filter + palSetPadMode(GPIOD, 2, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + + CURRENT_FILTER_OFF(); +#endif + + // AUX pin + // AUX_OFF(); + // palSetPadMode(AUX_GPIO, AUX_PIN, + // PAL_MODE_OUTPUT_PUSHPULL | + // PAL_STM32_OSPEED_HIGHEST); + + // ADC Pins + palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG); + + palSetPadMode(GPIOB, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG); + + palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG); +} + +void hw_setup_adc_channels(void) +{ + // ADC1 regular channels + ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_Vrefint, 5, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_8, 6, ADC_SampleTime_15Cycles); + + // ADC2 regular channels + ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_0, 5, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_9, 6, ADC_SampleTime_15Cycles); + + // ADC3 regular channels + ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_1, 5, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 6, ADC_SampleTime_15Cycles); + + // Injected channels + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 3, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 3, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 3, ADC_SampleTime_15Cycles); +} + +void hw_start_i2c(void) +{ + i2cAcquireBus(&HW_I2C_DEV); + + if (!i2c_running) + { + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + i2cStart(&HW_I2C_DEV, &i2cfg); + i2c_running = true; + } + + i2cReleaseBus(&HW_I2C_DEV); +} + +void hw_stop_i2c(void) +{ + i2cAcquireBus(&HW_I2C_DEV); + + if (i2c_running) + { + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT); + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT); + + i2cStop(&HW_I2C_DEV); + i2c_running = false; + } + + i2cReleaseBus(&HW_I2C_DEV); +} + +/** + * Try to restore the i2c bus + */ +void hw_try_restore_i2c(void) +{ + if (i2c_running) + { + i2cAcquireBus(&HW_I2C_DEV); + + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + + chThdSleep(1); + + for (int i = 0; i < 16; i++) + { + palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + } + + // Generate start then stop condition + palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + chThdSleep(1); + palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + HW_I2C_DEV.state = I2C_STOP; + i2cStart(&HW_I2C_DEV, &i2cfg); + + i2cReleaseBus(&HW_I2C_DEV); + } +} + +bool hw_sample_shutdown_button(void) +{ + chMtxLock(&shutdown_mutex); + + bt_diff = 0.0; + + for (int i = 0; i < 3; i++) + { + palSetPadMode(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN, PAL_MODE_INPUT_ANALOG); + chThdSleep(5); + float val1 = ADC_VOLTS(ADC_IND_SHUTDOWN); + chThdSleepMilliseconds(1); + float val2 = ADC_VOLTS(ADC_IND_SHUTDOWN); + palSetPadMode(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN, PAL_MODE_OUTPUT_PUSHPULL); + chThdSleepMilliseconds(1); + + bt_diff += (val1 - val2); + } + + chMtxUnlock(&shutdown_mutex); + + return (bt_diff > 0.12); +} diff --git a/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.h b/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.h new file mode 100644 index 000000000..2a6151bb5 --- /dev/null +++ b/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.h @@ -0,0 +1,312 @@ +/* + Copyright 2018 Benjamin Vedder benjamin@vedder.se + + This file is part of the VESC firmware. + + The VESC firmware is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + The VESC firmware is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef HW_IVY_80V_MINI_H_ + +#define HW_IVY_80V_MINI_H_ + +#define HW_NAME "IVY_80V_MINI" + +// Default setting overrides +#define APPCONF_APP_TO_USE APP_NONE +// #define APPCONF_CONTROLLER_ID 2 +#define APPCONF_TIMEOUT_MSEC 500 +#define APPCONF_TIMEOUT_BRAKE_CURRENT 0 +#define APPCONF_PERMANENT_UART_ENABLED false +#define APPCONF_SHUTDOWN_MODE SHUTDOWN_MODE_ALWAYS_ON +#define APPCONF_CAN_BAUD_RATE CAN_BAUD_1M +#define APPCONF_CAN_STATUS_RATE_1 100 +#define APPCONF_CAN_STATUS_RATE_2 5 +#define APPCONF_CAN_STATUS_MSGS_R1 0x09 +#define APPCONF_CAN_STATUS_MSGS_R2 0x10 +// Common PID-parameters +#define MCCONF_SP_PID_LOOP_RATE PID_RATE_5000_HZ // PID loop rate +// Speed PID parameters +#define MCCONF_S_PID_KP 0.003 // Proportional gain +#define MCCONF_S_PID_KI 0.009 // Integral gain +#define MCCONF_S_PID_KD 0.00002 // Derivative gain +#define MCCONF_S_PID_KD_FILTER 0.2 // Derivative filter +#define MCCONF_S_PID_MIN_RPM 300.0 // Minimum allowed RPM +#define MCCONF_S_PID_ALLOW_BRAKING true // Allow braking in speed control mode +#define MCCONF_S_PID_RAMP_ERPMS_S 2000.0 // Speed input ramping, in ERPM/s +#define MCCONF_S_PID_SPEED_SOURCE S_PID_SPEED_SRC_PLL +// Position PID parameters +#define MCCONF_P_PID_KP 0.03 // Proportional gain +#define MCCONF_P_PID_KI 0.0 // Integral gain +#define MCCONF_P_PID_KD 0.00000 // Derivative gain +#define MCCONF_P_PID_KD_PROC 0.00035 // Derivative gain process +#define MCCONF_P_PID_KD_FILTER 0.2 // Derivative filter +#define MCCONF_P_PID_ANG_DIV 10.0 // Divide angle by this value +#define MCCONF_P_PID_GAIN_DEC_ANGLE 500.0 // Decrease PID-gains when the error is below this value +#define MCCONF_P_PID_OFFSET 0.0 // Angle offset + +#ifndef MCCONF_L_MIN_VOLTAGE +#define MCCONF_L_MIN_VOLTAGE 20.0 // Minimum input voltage +#endif +#ifndef MCCONF_L_MAX_VOLTAGE +#define MCCONF_L_MAX_VOLTAGE 70.0 // Maximum input voltage +#endif +#endif +#ifndef MCCONF_DEFAULT_MOTOR_TYPE +#define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC +#endif +#ifndef MCCONF_FOC_F_ZV +#define MCCONF_FOC_F_ZV 30000.0 +#endif +#ifndef MCCONF_L_MAX_ABS_CURRENT +#define MCCONF_L_MAX_ABS_CURRENT 160.0 // The maximum absolute current above which a fault is generated +#endif +#ifndef MCCONF_FOC_SAMPLE_V0_V7 +#define MCCONF_FOC_SAMPLE_V0_V7 false // Run control loop in both v0 and v7 (requires phase shunts) +#endif +#ifndef MCCONF_L_IN_CURRENT_MAX +#define MCCONF_L_IN_CURRENT_MAX 110.0 // Input current limit in Amperes (Upper) +#ifndef MCCONF_L_IN_CURRENT_MIN +#define MCCONF_L_IN_CURRENT_MIN -110.0 // Input current limit in Amperes (Lower) +#endif + +// Override dead time. See the stm32f4 reference manual for calculating this value. +#define HW_DEAD_TIME_NSEC 500.0 + +// HW properties +#define HW_HAS_3_SHUNTS +// #define HW_HAS_PHASE_SHUNTS +// #define HW_HAS_PHASE_FILTERS +// #define HW_HAS_CURR_FILTERS + +// Macros +#define LED_GREEN_GPIO GPIOB +#define LED_GREEN_PIN 5 +#define LED_RED_GPIO GPIOB +#define LED_RED_PIN 7 + +#define LED_GREEN_ON() palSetPad(LED_GREEN_GPIO, LED_GREEN_PIN) +#define LED_GREEN_OFF() palClearPad(LED_GREEN_GPIO, LED_GREEN_PIN) +#define LED_RED_ON() palSetPad(LED_RED_GPIO, LED_RED_PIN) +#define LED_RED_OFF() palClearPad(LED_RED_GPIO, LED_RED_PIN) + +#ifdef HW_HAS_PHASE_FILTERS +#define PHASE_FILTER_GPIO GPIOC +#define PHASE_FILTER_PIN 9 +#define PHASE_FILTER_ON() palSetPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN) +#define PHASE_FILTER_OFF() palClearPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN) +#endif + +// Shutdown pin +#define HW_SHUTDOWN_GPIO GPIOC +#define HW_SHUTDOWN_PIN 5 +#define HW_SHUTDOWN_HOLD_ON() palSetPad(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN) +#define HW_SHUTDOWN_HOLD_OFF() palClearPad(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN) +#define HW_SAMPLE_SHUTDOWN() hw_sample_shutdown_button() + +// Hold shutdown pin early to wake up on short pulses +#define HW_EARLY_INIT() \ + palSetPadMode(HW_SHUTDOWN_GPIO, HW_SHUTDOWN_PIN, PAL_MODE_OUTPUT_PUSHPULL); \ + HW_SHUTDOWN_HOLD_ON(); + +#ifdef HW_HAS_CURR_FILTERS +#define CURRENT_FILTER_ON() palSetPad(GPIOD, 2) +#define CURRENT_FILTER_OFF() palClearPad(GPIOD, 2) +#endif + +/* + * ADC Vector + * + * 0 (1): IN0 SENS1 + * 1 (2): IN1 SENS2 + * 2 (3): IN2 SENS3 + * 3 (1): IN10 CURR1 + * 4 (2): IN11 CURR2 + * 5 (3): IN12 CURR3 + * 6 (1): IN5 ADC_EXT1 + * 7 (2): IN6 ADC_EXT2 + * 8 (3): IN3 TEMP_MOS + * 9 (1): IN14 TEMP_MOTOR + * 10 (2): IN15 SHUTDOWN + * 11 (3): IN13 AN_IN + * 12 (1): Vrefint + * 13 (2): IN0 SENS1 + * 14 (3): IN1 SENS2 + * 15 (1): IN8 TEMP_MOS_2 + * 16 (2): IN9 TEMP_MOS_3 + * 17 (3): IN3 SENS3 + */ + +#define HW_ADC_CHANNELS 18 +#define HW_ADC_INJ_CHANNELS 3 +#define HW_ADC_NBR_CONV 6 + +// ADC Indexes +#define ADC_IND_SENS1 0 +#define ADC_IND_SENS2 1 +#define ADC_IND_SENS3 2 +#define ADC_IND_CURR1 3 +#define ADC_IND_CURR2 4 +#define ADC_IND_CURR3 5 +#define ADC_IND_VIN_SENS 11 +#define ADC_IND_EXT 6 +#define ADC_IND_EXT2 7 +#define ADC_IND_SHUTDOWN 10 +#define ADC_IND_TEMP_MOS 8 +#define ADC_IND_TEMP_MOTOR 9 +#define ADC_IND_VREFINT 12 + +// ADC macros and settings + +// Component parameters (can be overridden) +#ifndef V_REG +#define V_REG 3.30 +#endif + +// The voltage dividing acquisition circuit on the Makerbase VESC motherboard is 560K and 21.5K resistors. +#ifndef VIN_R1 +#define VIN_R1 560000.0 +#endif +#ifndef VIN_R2 +#define VIN_R2 22000.0 +#endif + +#ifndef CURRENT_AMP_GAIN +#define CURRENT_AMP_GAIN (-20.0) +#endif +#ifndef CURRENT_SHUNT_RES +#define CURRENT_SHUNT_RES (0.0005) +#endif + +// Input voltage +#define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2)) + +// NTC Termistors +// #define NTC_RES(adc_val) ((4095.0 * 10000.0) / adc_val - 10000.0) +#define NTC_RES(adc_val) ((4095.0 * 10000.0) / adc_val - 10000.0) +#define NTC_TEMP(adc_ind) (1.0 / ((logf(NTC_RES(ADC_Value[adc_ind]) / 10000.0) / 3435.0) + (1.0 / 298.15)) - 273.15) + +#define NTC_RES_MOTOR(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side +#define NTC_TEMP_MOTOR(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_TEMP_MOTOR]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15) + +// Voltage on ADC channel +#define ADC_VOLTS(ch) ((float)ADC_Value[ch] / 4096.0 * V_REG) + +// Double samples in beginning and end for positive current measurement. +// Useful when the shunt sense traces have noise that causes offset. +#ifndef CURR1_DOUBLE_SAMPLE +#define CURR1_DOUBLE_SAMPLE 0 +#endif +#ifndef CURR2_DOUBLE_SAMPLE +#define CURR2_DOUBLE_SAMPLE 0 +#endif +#ifndef CURR3_DOUBLE_SAMPLE +#define CURR3_DOUBLE_SAMPLE 0 +#endif + +// COMM-port ADC GPIOs +#define HW_ADC_EXT_GPIO GPIOA +#define HW_ADC_EXT_PIN 5 +#define HW_ADC_EXT2_GPIO GPIOA +#define HW_ADC_EXT2_PIN 6 + +// UART Peripheral +#define HW_UART_DEV SD3 +#define HW_UART_GPIO_AF GPIO_AF_USART3 +#define HW_UART_TX_PORT GPIOB +#define HW_UART_TX_PIN 10 +#define HW_UART_RX_PORT GPIOB +#define HW_UART_RX_PIN 11 + +// Permanent UART Peripheral (for NRF51) +#define HW_UART_P_BAUD 115200 +#define HW_UART_P_DEV SD4 +#define HW_UART_P_GPIO_AF GPIO_AF_UART4 +#define HW_UART_P_TX_PORT GPIOC +#define HW_UART_P_TX_PIN 10 +#define HW_UART_P_RX_PORT GPIOC +#define HW_UART_P_RX_PIN 11 + +// ICU Peripheral for servo decoding +#define HW_USE_SERVO_TIM4 +#define HW_ICU_TIMER TIM4 +#define HW_ICU_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE) +#define HW_ICU_DEV ICUD4 +#define HW_ICU_CHANNEL ICU_CHANNEL_1 +#define HW_ICU_GPIO_AF GPIO_AF_TIM4 +#define HW_ICU_GPIO GPIOB +#define HW_ICU_PIN 6 + +// I2C Peripheral +#define HW_I2C_DEV I2CD2 +#define HW_I2C_GPIO_AF GPIO_AF_I2C2 +#define HW_I2C_SCL_PORT GPIOB +#define HW_I2C_SCL_PIN 10 +#define HW_I2C_SDA_PORT GPIOB +#define HW_I2C_SDA_PIN 11 + +// Hall/encoder pins +#define HW_HALL_ENC_GPIO1 GPIOC +#define HW_HALL_ENC_PIN1 6 +#define HW_HALL_ENC_GPIO2 GPIOC +#define HW_HALL_ENC_PIN2 7 +#define HW_HALL_ENC_GPIO3 GPIOC +#define HW_HALL_ENC_PIN3 8 +#define HW_ENC_TIM TIM3 +#define HW_ENC_TIM_AF GPIO_AF_TIM3 +#define HW_ENC_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE) +#define HW_ENC_EXTI_PORTSRC EXTI_PortSourceGPIOC +#define HW_ENC_EXTI_PINSRC EXTI_PinSource8 +#define HW_ENC_EXTI_CH EXTI9_5_IRQn +#define HW_ENC_EXTI_LINE EXTI_Line8 +#define HW_ENC_EXTI_ISR_VEC EXTI9_5_IRQHandler +#define HW_ENC_TIM_ISR_CH TIM3_IRQn +#define HW_ENC_TIM_ISR_VEC TIM3_IRQHandler + +// SPI pins +#define HW_SPI_DEV SPID1 +#define HW_SPI_GPIO_AF GPIO_AF_SPI1 +#define HW_SPI_PORT_NSS GPIOA +#define HW_SPI_PIN_NSS 4 +#define HW_SPI_PORT_SCK GPIOA +#define HW_SPI_PIN_SCK 5 +#define HW_SPI_PORT_MOSI GPIOA +#define HW_SPI_PIN_MOSI 7 +#define HW_SPI_PORT_MISO GPIOA +#define HW_SPI_PIN_MISO 6 + +// Measurement macros +#define ADC_V_L1 ADC_Value[ADC_IND_SENS1] +#define ADC_V_L2 ADC_Value[ADC_IND_SENS2] +#define ADC_V_L3 ADC_Value[ADC_IND_SENS3] +#define ADC_V_ZERO (ADC_Value[ADC_IND_VIN_SENS] / 2) + +// Macros +#define READ_HALL1() palReadPad(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1) +#define READ_HALL2() palReadPad(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2) +#define READ_HALL3() palReadPad(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3) + +// Setting limits +#define HW_LIM_CURRENT -110.0, 110.0 +#define HW_LIM_CURRENT_IN -100.0, 100.0 +#define HW_LIM_CURRENT_ABS 0.0, 160 +#define HW_LIM_VIN 12.0, 75.0 +#define HW_LIM_ERPM -200e3, 200e3 +#define HW_LIM_DUTY_MIN 0.0, 0.1 +#define HW_LIM_DUTY_MAX 0.0, 0.99 +#define HW_LIM_TEMP_FET -40.0, 110.0 + +// HW-specific functions +bool hw_sample_shutdown_button(void); +#endif /* HW_IVY_80V_MINI_H_ */ diff --git a/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI_no_limits.h b/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI_no_limits.h new file mode 100644 index 000000000..69174aa3c --- /dev/null +++ b/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI_no_limits.h @@ -0,0 +1,27 @@ +/* + Copyright 2018 Benjamin Vedder benjamin@vedder.se + + This file is part of the VESC firmware. + + The VESC firmware is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + The VESC firmware is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef HW_IVY_80V_MINI_NO_LIMITS_H_ +#define HW_IVY_80V_MINI_NO_LIMITS_H_ + +#define DISABLE_HW_LIMITS + +#include "hw_IVY_80V_MINI.h" + +#endif /* HW_IVY_80V_MINI_NO_LIMITS_H_ */ From 458fddb7c05661f9f585c03dc72b06553b365b0d Mon Sep 17 00:00:00 2001 From: TaixiLu Date: Sat, 10 Aug 2024 18:18:45 +1000 Subject: [PATCH 2/4] Edit the VIN in resister value of 100V versions --- hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.h | 2 +- hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.h b/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.h index fb397c629..3444d62af 100644 --- a/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.h +++ b/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.h @@ -176,7 +176,7 @@ // The voltage dividing acquisition circuit on the Makerbase VESC motherboard is 560K and 21.5K resistors. #ifndef VIN_R1 -#define VIN_R1 560000.0 +#define VIN_R1 750000.0 #endif #ifndef VIN_R2 #define VIN_R2 22000.0 diff --git a/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.h b/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.h index d5982c0a5..deccd965e 100644 --- a/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.h +++ b/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.h @@ -176,7 +176,7 @@ // The voltage dividing acquisition circuit on the Makerbase VESC motherboard is 560K and 21.5K resistors. #ifndef VIN_R1 -#define VIN_R1 560000.0 +#define VIN_R1 750000.0 #endif #ifndef VIN_R2 #define VIN_R2 22000.0 From 706e054c99961cffbf20daa18a45c7345cbe273c Mon Sep 17 00:00:00 2001 From: TaixiLu Date: Tue, 27 Aug 2024 15:14:22 +1000 Subject: [PATCH 3/4] modified hw_IVY_80V_MINI.h --- hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.h b/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.h index 2a6151bb5..d29776b73 100644 --- a/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.h +++ b/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.h @@ -53,7 +53,7 @@ #define MCCONF_P_PID_KD_PROC 0.00035 // Derivative gain process #define MCCONF_P_PID_KD_FILTER 0.2 // Derivative filter #define MCCONF_P_PID_ANG_DIV 10.0 // Divide angle by this value -#define MCCONF_P_PID_GAIN_DEC_ANGLE 500.0 // Decrease PID-gains when the error is below this value +#define MCCONF_P_PID_GAIN_DEC_ANGLE 550.0 // Decrease PID-gains when the error is below this value #define MCCONF_P_PID_OFFSET 0.0 // Angle offset #ifndef MCCONF_L_MIN_VOLTAGE From 6a5f670380dca01ec59443510d654ae944fb1ebf Mon Sep 17 00:00:00 2001 From: TaixiLu Date: Tue, 10 Sep 2024 00:23:11 +1000 Subject: [PATCH 4/4] Remove unnecessary Preprocessor commands --- hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.h | 46 ++++--------------- .../IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.h | 42 +++-------------- hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP.h | 45 ++++-------------- .../IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.h | 44 +++--------------- 4 files changed, 29 insertions(+), 148 deletions(-) diff --git a/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.h b/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.h index 3444d62af..c9a4b744c 100644 --- a/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.h +++ b/hwconf/IVY_Esk8/IVY_100V_HP/hw_IVY_100V_HP.h @@ -18,7 +18,6 @@ */ #ifndef HW_IVY_100V_HP_H_ - #define HW_IVY_100V_HP_H_ #define HW_NAME "IVY_100V_HP" @@ -56,30 +55,17 @@ #define MCCONF_P_PID_GAIN_DEC_ANGLE 500.0 // Decrease PID-gains when the error is below this value #define MCCONF_P_PID_OFFSET 0.0 // Angle offset -#ifndef MCCONF_L_MIN_VOLTAGE #define MCCONF_L_MIN_VOLTAGE 20.0 // Minimum input voltage -#endif -#ifndef MCCONF_L_MAX_VOLTAGE -#define MCCONF_L_MAX_VOLTAGE 75.0 // Maximum input voltage -#endif -#endif -#ifndef MCCONF_DEFAULT_MOTOR_TYPE +#define MCCONF_L_MAX_VOLTAGE 95.0 // Maximum input voltage #define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC -#endif -#ifndef MCCONF_FOC_F_ZV -#define MCCONF_FOC_F_ZV 30000.0 -#endif -#ifndef MCCONF_L_MAX_ABS_CURRENT + #define MCCONF_L_MAX_ABS_CURRENT 320.0 // The maximum absolute current above which a fault is generated -#endif -#ifndef MCCONF_FOC_SAMPLE_V0_V7 -#define MCCONF_FOC_SAMPLE_V0_V7 false // Run control loop in both v0 and v7 (requires phase shunts) -#endif -#ifndef MCCONF_L_IN_CURRENT_MAX -#define MCCONF_L_IN_CURRENT_MAX 200.0 // Input current limit in Amperes (Upper) -#ifndef MCCONF_L_IN_CURRENT_MIN +#define MCCONF_L_IN_CURRENT_MAX 200.0 // Input current limit in Amperes (Upper) #define MCCONF_L_IN_CURRENT_MIN -200.0 // Input current limit in Amperes (Lower) -#endif + +#define MCCONF_FOC_F_ZV 15000.0 +#define MCCONF_FOC_CONTROL_SAMPLE_MODE FOC_CONTROL_SAMPLE_MODE_V0_V7 +#define MCCONF_FOC_SAMPLE_V0_V7 true // Run control loop in both v0 and v7 (requires phase shunts) // Override dead time. See the stm32f4 reference manual for calculating this value. #define HW_DEAD_TIME_NSEC 500.0 @@ -169,25 +155,15 @@ // ADC macros and settings -// Component parameters (can be overridden) -#ifndef V_REG +// Component parameters #define V_REG 3.30 -#endif // The voltage dividing acquisition circuit on the Makerbase VESC motherboard is 560K and 21.5K resistors. -#ifndef VIN_R1 #define VIN_R1 750000.0 -#endif -#ifndef VIN_R2 #define VIN_R2 22000.0 -#endif -#ifndef CURRENT_AMP_GAIN #define CURRENT_AMP_GAIN 20.0 -#endif -#ifndef CURRENT_SHUNT_RES #define CURRENT_SHUNT_RES (0.0005 / 2.0) -#endif // Input voltage #define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2)) @@ -205,15 +181,9 @@ // Double samples in beginning and end for positive current measurement. // Useful when the shunt sense traces have noise that causes offset. -#ifndef CURR1_DOUBLE_SAMPLE #define CURR1_DOUBLE_SAMPLE 0 -#endif -#ifndef CURR2_DOUBLE_SAMPLE #define CURR2_DOUBLE_SAMPLE 0 -#endif -#ifndef CURR3_DOUBLE_SAMPLE #define CURR3_DOUBLE_SAMPLE 0 -#endif // COMM-port ADC GPIOs #define HW_ADC_EXT_GPIO GPIOA diff --git a/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.h b/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.h index deccd965e..af7ef9eee 100644 --- a/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.h +++ b/hwconf/IVY_Esk8/IVY_100V_MINI/hw_IVY_100V_MINI.h @@ -18,7 +18,6 @@ */ #ifndef HW_IVY_100V_MINI_H_ - #define HW_IVY_100V_MINI_H_ #define HW_NAME "hw_IVY_100V_MINI" @@ -56,30 +55,17 @@ #define MCCONF_P_PID_GAIN_DEC_ANGLE 500.0 // Decrease PID-gains when the error is below this value #define MCCONF_P_PID_OFFSET 0.0 // Angle offset -#ifndef MCCONF_L_MIN_VOLTAGE #define MCCONF_L_MIN_VOLTAGE 20.0 // Minimum input voltage -#endif -#ifndef MCCONF_L_MAX_VOLTAGE #define MCCONF_L_MAX_VOLTAGE 90.0 // Maximum input voltage -#endif -#endif -#ifndef MCCONF_DEFAULT_MOTOR_TYPE #define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC -#endif -#ifndef MCCONF_FOC_F_ZV -#define MCCONF_FOC_F_ZV 30000.0 -#endif -#ifndef MCCONF_L_MAX_ABS_CURRENT + #define MCCONF_L_MAX_ABS_CURRENT 160.0 // The maximum absolute current above which a fault is generated -#endif -#ifndef MCCONF_FOC_SAMPLE_V0_V7 -#define MCCONF_FOC_SAMPLE_V0_V7 false // Run control loop in both v0 and v7 (requires phase shunts) -#endif -#ifndef MCCONF_L_IN_CURRENT_MAX -#define MCCONF_L_IN_CURRENT_MAX 110.0 // Input current limit in Amperes (Upper) -#ifndef MCCONF_L_IN_CURRENT_MIN +#define MCCONF_L_IN_CURRENT_MAX 110.0 // Input current limit in Amperes (Upper) #define MCCONF_L_IN_CURRENT_MIN -110.0 // Input current limit in Amperes (Lower) -#endif + +#define MCCONF_FOC_F_ZV 15000.0 +#define MCCONF_FOC_CONTROL_SAMPLE_MODE FOC_CONTROL_SAMPLE_MODE_V0_V7 +#define MCCONF_FOC_SAMPLE_V0_V7 true // Run control loop in both v0 and v7 (requires phase shunts) // Override dead time. See the stm32f4 reference manual for calculating this value. #define HW_DEAD_TIME_NSEC 500.0 @@ -170,24 +156,14 @@ // ADC macros and settings // Component parameters (can be overridden) -#ifndef V_REG #define V_REG 3.30 -#endif // The voltage dividing acquisition circuit on the Makerbase VESC motherboard is 560K and 21.5K resistors. -#ifndef VIN_R1 #define VIN_R1 750000.0 -#endif -#ifndef VIN_R2 #define VIN_R2 22000.0 -#endif -#ifndef CURRENT_AMP_GAIN #define CURRENT_AMP_GAIN (-20.0) -#endif -#ifndef CURRENT_SHUNT_RES #define CURRENT_SHUNT_RES (0.0005) -#endif // Input voltage #define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2)) @@ -205,15 +181,9 @@ // Double samples in beginning and end for positive current measurement. // Useful when the shunt sense traces have noise that causes offset. -#ifndef CURR1_DOUBLE_SAMPLE #define CURR1_DOUBLE_SAMPLE 0 -#endif -#ifndef CURR2_DOUBLE_SAMPLE #define CURR2_DOUBLE_SAMPLE 0 -#endif -#ifndef CURR3_DOUBLE_SAMPLE #define CURR3_DOUBLE_SAMPLE 0 -#endif // COMM-port ADC GPIOs #define HW_ADC_EXT_GPIO GPIOA diff --git a/hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP.h b/hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP.h index 2e8f1373e..94b1a1d27 100644 --- a/hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP.h +++ b/hwconf/IVY_Esk8/IVY_80V_HP/hw_IVY_80V_HP.h @@ -56,37 +56,24 @@ #define MCCONF_P_PID_GAIN_DEC_ANGLE 500.0 // Decrease PID-gains when the error is below this value #define MCCONF_P_PID_OFFSET 0.0 // Angle offset -#ifndef MCCONF_L_MIN_VOLTAGE #define MCCONF_L_MIN_VOLTAGE 20.0 // Minimum input voltage -#endif -#ifndef MCCONF_L_MAX_VOLTAGE -#define MCCONF_L_MAX_VOLTAGE 75.0 // Maximum input voltage -#endif -#endif -#ifndef MCCONF_DEFAULT_MOTOR_TYPE +#define MCCONF_L_MAX_VOLTAGE 70.0 // Maximum input voltage #define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC -#endif -#ifndef MCCONF_FOC_F_ZV -#define MCCONF_FOC_F_ZV 30000.0 -#endif -#ifndef MCCONF_L_MAX_ABS_CURRENT + #define MCCONF_L_MAX_ABS_CURRENT 320.0 // The maximum absolute current above which a fault is generated -#endif -#ifndef MCCONF_FOC_SAMPLE_V0_V7 -#define MCCONF_FOC_SAMPLE_V0_V7 false // Run control loop in both v0 and v7 (requires phase shunts) -#endif -#ifndef MCCONF_L_IN_CURRENT_MAX -#define MCCONF_L_IN_CURRENT_MAX 200.0 // Input current limit in Amperes (Upper) -#ifndef MCCONF_L_IN_CURRENT_MIN +#define MCCONF_L_IN_CURRENT_MAX 200.0 // Input current limit in Amperes (Upper) #define MCCONF_L_IN_CURRENT_MIN -200.0 // Input current limit in Amperes (Lower) -#endif + +#define MCCONF_FOC_F_ZV 30000.0 +#define MCCONF_FOC_CONTROL_SAMPLE_MODE FOC_CONTROL_SAMPLE_MODE_V0 +#define MCCONF_FOC_SAMPLE_V0_V7 false // Run control loop in both v0 and v7 (requires phase shunts) // Override dead time. See the stm32f4 reference manual for calculating this value. #define HW_DEAD_TIME_NSEC 500.0 // HW properties #define HW_HAS_3_SHUNTS -#define HW_HAS_PHASE_SHUNTS +// #define HW_HAS_PHASE_SHUNTS #define HW_HAS_PHASE_FILTERS #define HW_HAS_CURR_FILTERS @@ -170,24 +157,14 @@ // ADC macros and settings // Component parameters (can be overridden) -#ifndef V_REG #define V_REG 3.30 -#endif // The voltage dividing acquisition circuit on the Makerbase VESC motherboard is 560K and 21.5K resistors. -#ifndef VIN_R1 #define VIN_R1 560000.0 -#endif -#ifndef VIN_R2 #define VIN_R2 22000.0 -#endif -#ifndef CURRENT_AMP_GAIN #define CURRENT_AMP_GAIN 20.0 -#endif -#ifndef CURRENT_SHUNT_RES #define CURRENT_SHUNT_RES (0.0005 / 2.0) -#endif // Input voltage #define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2)) @@ -205,15 +182,9 @@ // Double samples in beginning and end for positive current measurement. // Useful when the shunt sense traces have noise that causes offset. -#ifndef CURR1_DOUBLE_SAMPLE #define CURR1_DOUBLE_SAMPLE 0 -#endif -#ifndef CURR2_DOUBLE_SAMPLE #define CURR2_DOUBLE_SAMPLE 0 -#endif -#ifndef CURR3_DOUBLE_SAMPLE #define CURR3_DOUBLE_SAMPLE 0 -#endif // COMM-port ADC GPIOs #define HW_ADC_EXT_GPIO GPIOA diff --git a/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.h b/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.h index d29776b73..5a8e7dbe9 100644 --- a/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.h +++ b/hwconf/IVY_Esk8/IVY_80V_MINI/hw_IVY_80V_MINI.h @@ -18,7 +18,6 @@ */ #ifndef HW_IVY_80V_MINI_H_ - #define HW_IVY_80V_MINI_H_ #define HW_NAME "IVY_80V_MINI" @@ -49,37 +48,24 @@ // Position PID parameters #define MCCONF_P_PID_KP 0.03 // Proportional gain #define MCCONF_P_PID_KI 0.0 // Integral gain -#define MCCONF_P_PID_KD 0.00000 // Derivative gain +#define MCCONF_P_PID_KD 0.0 // Derivative gain #define MCCONF_P_PID_KD_PROC 0.00035 // Derivative gain process #define MCCONF_P_PID_KD_FILTER 0.2 // Derivative filter #define MCCONF_P_PID_ANG_DIV 10.0 // Divide angle by this value #define MCCONF_P_PID_GAIN_DEC_ANGLE 550.0 // Decrease PID-gains when the error is below this value #define MCCONF_P_PID_OFFSET 0.0 // Angle offset -#ifndef MCCONF_L_MIN_VOLTAGE #define MCCONF_L_MIN_VOLTAGE 20.0 // Minimum input voltage -#endif -#ifndef MCCONF_L_MAX_VOLTAGE #define MCCONF_L_MAX_VOLTAGE 70.0 // Maximum input voltage -#endif -#endif -#ifndef MCCONF_DEFAULT_MOTOR_TYPE #define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC -#endif -#ifndef MCCONF_FOC_F_ZV -#define MCCONF_FOC_F_ZV 30000.0 -#endif -#ifndef MCCONF_L_MAX_ABS_CURRENT + #define MCCONF_L_MAX_ABS_CURRENT 160.0 // The maximum absolute current above which a fault is generated -#endif -#ifndef MCCONF_FOC_SAMPLE_V0_V7 -#define MCCONF_FOC_SAMPLE_V0_V7 false // Run control loop in both v0 and v7 (requires phase shunts) -#endif -#ifndef MCCONF_L_IN_CURRENT_MAX -#define MCCONF_L_IN_CURRENT_MAX 110.0 // Input current limit in Amperes (Upper) -#ifndef MCCONF_L_IN_CURRENT_MIN +#define MCCONF_L_IN_CURRENT_MAX 110.0 // Input current limit in Amperes (Upper) #define MCCONF_L_IN_CURRENT_MIN -110.0 // Input current limit in Amperes (Lower) -#endif + +#define MCCONF_FOC_F_ZV 30000.0 +#define MCCONF_FOC_CONTROL_SAMPLE_MODE FOC_CONTROL_SAMPLE_MODE_V0 +#define MCCONF_FOC_SAMPLE_V0_V7 false // Run control loop in both v0 and v7 (requires phase shunts) // Override dead time. See the stm32f4 reference manual for calculating this value. #define HW_DEAD_TIME_NSEC 500.0 @@ -170,24 +156,14 @@ // ADC macros and settings // Component parameters (can be overridden) -#ifndef V_REG #define V_REG 3.30 -#endif // The voltage dividing acquisition circuit on the Makerbase VESC motherboard is 560K and 21.5K resistors. -#ifndef VIN_R1 #define VIN_R1 560000.0 -#endif -#ifndef VIN_R2 #define VIN_R2 22000.0 -#endif -#ifndef CURRENT_AMP_GAIN #define CURRENT_AMP_GAIN (-20.0) -#endif -#ifndef CURRENT_SHUNT_RES #define CURRENT_SHUNT_RES (0.0005) -#endif // Input voltage #define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2)) @@ -205,15 +181,9 @@ // Double samples in beginning and end for positive current measurement. // Useful when the shunt sense traces have noise that causes offset. -#ifndef CURR1_DOUBLE_SAMPLE #define CURR1_DOUBLE_SAMPLE 0 -#endif -#ifndef CURR2_DOUBLE_SAMPLE #define CURR2_DOUBLE_SAMPLE 0 -#endif -#ifndef CURR3_DOUBLE_SAMPLE #define CURR3_DOUBLE_SAMPLE 0 -#endif // COMM-port ADC GPIOs #define HW_ADC_EXT_GPIO GPIOA