Skip to content

Commit

Permalink
soc/power9/: change log levels in istep files
Browse files Browse the repository at this point in the history 
Change-Id: Ibe35da73ebf116f6a1821df758c13b054d57a96a
Signed-off-by: Kacper Stojek <[email protected]>
Signed-off-by: Sergii Dmytruk <[email protected]>
  • Loading branch information
@Stojak139808 @SergiiDmytruk
Stojak139808 authored and SergiiDmytruk committed Aug 24, 2022
1 parent b78758c commit d9dfc5d
Show file tree
Hide file tree
Showing 7 changed files with 33 additions and 26 deletions.
18 changes: 9 additions & 9 deletions src/soc/ibm/power9/homer.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -926,7 +926,7 @@ static void psu_command(uint8_t flags, long time)
die("MBOX to SBE busy, this should not happen\n");

if (read_scom(0, 0x000D0063) & PPC_BIT(0)) {
printk(BIOS_ERR, "SBE to Host doorbell already active, clearing it\n");
printk(BIOS_WARNING, "SBE to Host doorbell already active, clearing it\n");
write_scom(0, 0x000D0064, ~PPC_BIT(0));
}

Expand Down Expand Up @@ -1076,7 +1076,7 @@ static void istep_16_1(int this_core)
* This will request SBE to wake us up after we enter STOP 15. Hopefully
* we will come back to the place where we were before.
*/
printk(BIOS_ERR, "XIVE configured, entering dead man loop\n");
printk(BIOS_DEBUG, "XIVE configured, entering dead man loop\n");
psu_command(DEADMAN_LOOP_START, time);

block_wakeup_int(this_core, 1);
Expand Down Expand Up @@ -1328,7 +1328,7 @@ static void pstate_gpe_init(uint8_t chip, struct homer_st *homer, uint64_t cores
/* OCCFLG2_PGPE_HCODE_FIT_ERR_INJ | OCCFLG2_PGPE_HCODE_PSTATE_REQ_ERR_INJ */
write_scom(chip, PU_OCB_OCI_OCCFLG2_CLEAR, 0x1100000000);

printk(BIOS_ERR, "Attempting PGPE activation...\n");
printk(BIOS_DEBUG, "Attempting PGPE activation...\n");

write_scom(chip, PU_GPE2_PPE_XIXCR, PPC_PLACE(HARD_RESET, 1, 3));
write_scom(chip, PU_GPE2_PPE_XIXCR, PPC_PLACE(TOGGLE_XSR_TRH, 1, 3));
Expand All @@ -1339,7 +1339,7 @@ static void pstate_gpe_init(uint8_t chip, struct homer_st *homer, uint64_t cores
(read_scom(chip, PU_GPE2_PPE_XIDBGPRO) & PPC_BIT(HALTED_STATE)));

if (read_scom(chip, PU_OCB_OCI_OCCS2_SCOM) & PPC_BIT(PGPE_ACTIVE))
printk(BIOS_ERR, "PGPE was activated successfully\n");
printk(BIOS_DEBUG, "PGPE was activated successfully\n");
else
die("Failed to activate PGPE\n");

Expand Down Expand Up @@ -1529,16 +1529,16 @@ static void istep_21_1(uint8_t chips, struct homer_st *homers, const uint64_t *c
load_pm_complex(chip, &homers[chip]);
}

printk(BIOS_ERR, "Starting PM complex...\n");
printk(BIOS_DEBUG, "Starting PM complex...\n");
for (uint8_t chip = 0; chip < MAX_CHIPS; chip++) {
if (chips & (1 << chip))
start_pm_complex(chip, &homers[chip], cores[chip]);
}
printk(BIOS_ERR, "Done starting PM complex\n");
printk(BIOS_DEBUG, "Done starting PM complex\n");

printk(BIOS_ERR, "Activating OCC...\n");
printk(BIOS_DEBUG, "Activating OCC...\n");
activate_occ(chips, homers);
printk(BIOS_ERR, "Done activating OCC\n");
printk(BIOS_DEBUG, "Done activating OCC\n");
}

/* Extracts rings for a specific Programmable PowerPC-lite Engine */
Expand Down Expand Up @@ -2571,7 +2571,7 @@ void build_homer_image(void *homer_bar, void *common_occ_area, uint64_t nominal_
if (this_core == -1)
die("Couldn't found active core\n");

printk(BIOS_ERR, "DD%2.2x, boot core: %d\n", dd, this_core);
printk(BIOS_DEBUG, "DD%2.2x, boot core: %d\n", dd, this_core);

/* HOMER must be aligned to 4M because CME HRMOR has bit for 2M set */
if (!IS_ALIGNED((uint64_t) homer_bar, 4 * MiB))
Expand Down
2 changes: 1 addition & 1 deletion src/soc/ibm/power9/istep_13_11.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -144,7 +144,7 @@ static void dump_cal_errors(uint8_t chip, int mcs_i, int mca_i)
printk(BIOS_ERR, "DP %d\n", dp);
printk(BIOS_ERR, "\t%#16.16llx - RD_VREF_CAL_ERROR\n",
dp_mca_read(chip, id, dp, mca_i, DDRPHY_DP16_RD_VREF_CAL_ERROR_P0_0));
printk(BIOS_ERR, "\t%#16.16llx - DQ_BIT_DISABLE_RP0\n",
printk(RAM_DEBUG, "\t%#16.16llx - DQ_BIT_DISABLE_RP0\n",
dp_mca_read(chip, id, dp, mca_i, DDRPHY_DP16_DQ_BIT_DISABLE_RP0_P0_0));
printk(BIOS_ERR, "\t%#16.16llx - DQS_BIT_DISABLE_RP0\n",
dp_mca_read(chip, id, dp, mca_i, DDRPHY_DP16_DQS_BIT_DISABLE_RP0_P0_0));
Expand Down
2 changes: 1 addition & 1 deletion src/soc/ibm/power9/istep_13_3.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -115,7 +115,7 @@ static void mem_pll_initf(uint8_t chip)

/* This may depend on the requested frequency, but for current setup in our
* lab this is ~3ms both for coreboot and Hostboot. */
printk(BIOS_EMERG, "putRing took %ld ms\n", time);
printk(RAM_DEBUG, "putRing took %ld ms\n", time);

// Clear SBE->host doorbell
// TP.TPCHIP.PIB.PSU.PSU_HOST_DOORBELL_REG_AND
Expand Down
4 changes: 2 additions & 2 deletions src/soc/ibm/power9/istep_14_3.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -51,7 +51,7 @@ static void init_pecs(uint8_t chip, const uint8_t *iovalid_enable)
for (pec = 0; pec < MAX_PEC_PER_PROC; ++pec) {
uint64_t val = 0;

printk(BIOS_EMERG, "Initializing PEC%d...\n", pec);
printk(BIOS_INFO, "Initializing PEC%d...\n", pec);

/*
* ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID = 0
Expand Down Expand Up @@ -318,7 +318,7 @@ static void init_phbs(uint8_t chip, uint8_t phb_active_mask, const uint8_t *iova
if (!(phb_active_mask & (PHB0_MASK >> phb)))
continue;

printk(BIOS_EMERG, "Initializing PHB%d...\n", phb);
printk(BIOS_INFO, "Initializing PHB%d...\n", phb);

/*
* Phase2 init step 12_a (yes, out of order)
Expand Down
2 changes: 1 addition & 1 deletion src/soc/ibm/power9/istep_8_4.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -66,7 +66,7 @@ static bool sbe_run_extract_msg_reg(uint8_t chip)
break;

if ((i * SBE_WAIT_SLEEP_MS) % 1000 == 0)
printk(BIOS_EMERG, "SBE for chip #%d is booting...\n", chip);
printk(BIOS_NOTICE, "SBE for chip #%d is booting...\n", chip);

/* Hostboot resets watchdog before sleeping, we might want to
do it too or just increase timer after experimenting */
Expand Down
25 changes: 16 additions & 9 deletions src/soc/ibm/power9/occ.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -485,9 +485,11 @@ static bool write_occ_cmd(uint8_t chip, struct homer_st *homer, uint8_t occ_cmd,
occ_cmd);
}

printk(BIOS_WARNING, "Received OCC response:\n");
hexdump(response, *response_len);
printk(BIOS_WARNING, "Failed to parse OCC response\n");
if (console_log_level(BIOS_WARNING)) {
printk(BIOS_WARNING, "Received OCC response:\n");
hexdump(response, *response_len);
printk(BIOS_WARNING, "Failed to parse OCC response\n");
}
return false;
}

Expand All @@ -514,7 +516,7 @@ static void send_occ_cmd(uint8_t chip, struct homer_st *homer, uint8_t occ_cmd,
break;

if (i < MAX_TRIES - 1)
printk(BIOS_WARNING, "Retrying running OCC command 0x%02x\n", occ_cmd);
printk(BIOS_DEBUG, "Retrying running OCC command 0x%02x\n", occ_cmd);
}

if (i == MAX_TRIES)
Expand Down Expand Up @@ -545,8 +547,10 @@ static void handle_occ_error(uint8_t chip, struct homer_st *homer,

read_occ_sram(chip, response->error_address, (uint64_t *)error_log_buf, error_length);

printk(BIOS_WARNING, "OCC error log:\n");
hexdump(error_log_buf, error_length);
if (console_log_level(BIOS_WARNING)) {
printk(BIOS_WARNING, "OCC error log:\n");
hexdump(error_log_buf, error_length);
}

/* Confirm to OCC that we've read the log */
send_occ_cmd(chip, homer, OCC_CMD_CLEAR_ERROR_LOG,
Expand Down Expand Up @@ -580,8 +584,10 @@ static void poll_occ(uint8_t chip, struct homer_st *homer, bool flush_all_errors

--max_more_errors;
if (max_more_errors == 0) {
printk(BIOS_WARNING, "Last OCC poll response:\n");
hexdump(response, response_len);
if (console_log_level(BIOS_WARNING)) {
printk(BIOS_WARNING, "Last OCC poll response:\n");
hexdump(response, response_len);
}
die("Hit too many errors on polling OCC\n");
}
}
Expand Down Expand Up @@ -1159,7 +1165,8 @@ static void set_occ_state(uint8_t chip, struct homer_st *homer, uint8_t state)
poll_occ(chip, homer, /*flush_all_errors=*/true, &poll_response);

if (poll_response.state != state)
die("State of OCC is 0x%02x instead of 0x%02x.\n", poll_response.state, state);
die("State of OCC is 0x%02x instead of 0x%02x.\n",
poll_response.state, state);
}

static void set_occ_active_state(uint8_t chip, struct homer_st *homer)
Expand Down
6 changes: 3 additions & 3 deletions src/soc/ibm/power9/romstage.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -352,7 +352,7 @@ static void build_mvpds(uint8_t chips)
{
uint8_t chip;

printk(BIOS_EMERG, "Building MVPDs...\n");
printk(BIOS_NOTICE, "Building MVPDs...\n");

/* Calling mvpd_get_available_cores() triggers building and caching of MVPD */
for (chip = 0; chip < MAX_CHIPS; ++chip) {
Expand Down Expand Up @@ -383,10 +383,10 @@ void main(void)
*/
(void)ipmi_init_and_start_bmc_wdt(CONFIG_BMC_BT_BASE, 120, TIMEOUT_HARD_RESET);

printk(BIOS_EMERG, "Initializing FSI...\n");
printk(BIOS_DEBUG, "Initializing FSI...\n");
fsi_init();
chips = fsi_get_present_chips();
printk(BIOS_EMERG, "Initialized FSI (chips mask: 0x%02X)\n", chips);
printk(BIOS_DEBUG, "Initialized FSI (chips mask: 0x%02X)\n", chips);

build_mvpds(chips);

Expand Down

0 comments on commit d9dfc5d

Please sign in to comment.