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Devipriya1921/README.md

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Hi there👋 I am Devipriya..!!

  • 🔭 I have undergone training in Physical Design from VLSI System Design (VSD) and Semiconductor Fabless Accelerator Lab (SFAL), Bangalore.
  • Currently working as an Applications Engineer at Synopsys, Bangalore.
  • 📫 You can connect with me on LinkedIn

Ikarthikmb

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  1. VSDBabySoC_ICC2 VSDBabySoC_ICC2 Public

    Verilog 8 2

  2. Physical-Verification-using-synopsys-40nm Physical-Verification-using-synopsys-40nm Public

    6

  3. vsdserializer_v1 vsdserializer_v1 Public

    Verilog 10 4

  4. avsddac28nm avsddac28nm Public

    HTML

  5. Physical_Design_Using_OpenLANE_Sky130 Physical_Design_Using_OpenLANE_Sky130 Public

    Verilog 8 4