Add JLCPCB production number text

ceoloide · Oct 12, 2023 · 917e309 · 917e309
1 parent 91b88f8
commit 917e309
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diff --git a/ergogen/config.yaml b/ergogen/config.yaml
@@ -959,4 +959,12 @@ pcbs:
           net: DAT
         adjust:
           shift: [0.5 ks +19.61, 0.375 kp -50.31]
-          rotate: -90
+          rotate: -90
+
+      jlcpcb_order_number_text:
+        what: infused-kim/text
+        where: matrix_inner_top
+        params:
+          text: JLCJLCJLCJLC
+        adjust:
+          shift: [19.5,4]
diff --git a/ergogen/output/gerbers/backplate.zip b/ergogen/output/gerbers/backplate.zip
diff --git a/ergogen/output/gerbers/controller_overlay.zip b/ergogen/output/gerbers/controller_overlay.zip
diff --git a/ergogen/output/gerbers/corney_island.zip b/ergogen/output/gerbers/corney_island.zip
diff --git a/ergogen/output/gerbers/corney_island_manually_routed.zip b/ergogen/output/gerbers/corney_island_manually_routed.zip
diff --git a/ergogen/output/gerbers/frontplate.zip b/ergogen/output/gerbers/frontplate.zip
diff --git a/ergogen/output/images/corney_island-top.png b/ergogen/output/images/corney_island-top.png
diff --git a/ergogen/output/images/corney_island_manually_routed-top.png b/ergogen/output/images/corney_island_manually_routed-top.png
diff --git a/ergogen/output/pcbs/corney_island.kicad_pcb b/ergogen/output/pcbs/corney_island.kicad_pcb
@@ -8955,6 +8955,11 @@
 (segment (start 213.91 98.21) (end 213.91 102.81) (width 0.25) (layer B.Cu) (net 66))
 (segment (start 212.81 98.21) (end 212.81 102.81) (width 0.25) (layer B.Cu) (net 66))
 
+
+      (gr_text "JLCJLCJLCJLC" (at 214.5 55.625 0) (layer F.SilkS)
+        (effects (font (size 1 1) (thickness 0.15)))
+      )
+
             (gr_line (start 91.08198222285509 108.74001780012622) (end 91.08001777794281 53.49000464193523) (angle 90) (layer Edge.Cuts) (width 0.15))
 (gr_line (start 91.58000462794281 52.98998684198348) (end 128.58001314999998 52.98901315754868) (angle 90) (layer Edge.Cuts) (width 0.15))
 (gr_line (start 129.08 52.48901315754736) (end 129.08 48.74) (angle 90) (layer Edge.Cuts) (width 0.15))

diff --git a/ergogen/output/pcbs/corney_island_manually_routed.kicad_pcb b/ergogen/output/pcbs/corney_island_manually_routed.kicad_pcb
@@ -9011,6 +9011,9 @@
     (stroke (width 0.15) (type solid)) (layer "Edge.Cuts") (tstamp ee23f903-1b97-4605-8f60-d2bba0d30d85))
   (gr_arc (start 151.818892 49.918053) (mid 151.965339 49.564498) (end 152.318893 49.418054)
     (stroke (width 0.15) (type solid)) (layer "Edge.Cuts") (tstamp f154f835-3d3a-4411-8fd0-88e4ec3ed784))
+  (gr_text "JLCJLCJLCJLC" (at 213.22 59.64) (layer "F.SilkS") (tstamp 7fca1d2f-2ed9-4fdb-a3cb-dd63eaf431af)
+    (effects (font (size 1 1) (thickness 0.153)) (justify left bottom))
+  )
 
   (segment (start 219.658895 94.880053) (end 219.658893 96.690054) (width 0.2) (layer "F.Cu") (net 0) (tstamp 0865a329-d409-458e-b5a6-06ac5fed22c2))
   (segment (start 222.198892 94.88005) (end 222.198894 96.690054) (width 0.2) (layer "F.Cu") (net 0) (tstamp 156c19a0-8a9a-4184-aeb8-d8eb9999fe31))

diff --git a/ergogen/output/pcbs/test.kicad_pcb b/ergogen/output/pcbs/test.kicad_pcb
@@ -0,0 +1,262 @@
+
+
+(kicad_pcb (version 20171130) (host pcbnew 5.1.6)
+
+  (page A3)
+  (title_block
+    (title test)
+    (rev 0.1)
+    (company ceoloide)
+  )
+
+  (general
+    (thickness 1.6)
+  )
+
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.25)
+    (trace_clearance 0.2)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (via_size 0.8)
+    (via_drill 0.4)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (edge_width 0.05)
+    (segment_width 0.2)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.12)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0.05)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x010fc_ffffffff)
+      (usegerberextensions false)
+      (usegerberattributes true)
+      (usegerberadvancedattributes true)
+      (creategerberjobfile true)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15.000000)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 1)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+            (net 0 "")
+(net 1 "VCC")
+(net 2 "DOUT")
+(net 3 "GND")
+(net 4 "DIN")
+
+  (net_class Default "This is the default net class."
+    (clearance 0.2)
+    (trace_width 0.25)
+    (via_dia 0.8)
+    (via_drill 0.4)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net "")
+(add_net "VCC")
+(add_net "DOUT")
+(add_net "GND")
+(add_net "DIN")
+  )
+
+
+      (module "ceoloide:YS-SK6812MINI-E (underglow)" (layer B.Cu) (tedit 5F70BC98)
+        (at 0 0 0)
+
+        (fp_text reference "LED1" (at -4.75 0 90) (layer B.SilkS) hide
+          (effects (font (size 1 1) (thickness 0.153)))
+        )
+
+        (fp_line (start -1.6 -1.4) (end 1.6 -1.4) (layer Dwgs.User) (width 0.12))
+        (fp_line (start -1.6 1.4) (end 1.6 1.4) (layer Dwgs.User) (width 0.12))
+        (fp_line (start -1.6 -1.4) (end -1.6 1.4) (layer Dwgs.User) (width 0.12))
+        (fp_line (start 1.6 -1.4) (end 1.6 1.4) (layer Dwgs.User) (width 0.12))
+        (fp_line (start -1.6 -1.05) (end -2.94 -1.05) (layer Dwgs.User) (width 0.12))
+        (fp_line (start -2.94 -1.05) (end -2.94 -0.37) (layer Dwgs.User) (width 0.12))
+        (fp_line (start -2.94 -0.37) (end -1.6 -0.37) (layer Dwgs.User) (width 0.12))
+        (fp_line (start -1.6 0.35) (end -2.94 0.35) (layer Dwgs.User) (width 0.12))
+        (fp_line (start -2.94 1.03) (end -1.6 1.03) (layer Dwgs.User) (width 0.12))
+        (fp_line (start -2.94 0.35) (end -2.94 1.03) (layer Dwgs.User) (width 0.12))
+        (fp_line (start 1.6 1.03) (end 2.94 1.03) (layer Dwgs.User) (width 0.12))
+        (fp_line (start 2.94 0.35) (end 1.6 0.35) (layer Dwgs.User) (width 0.12))
+        (fp_line (start 2.94 1.03) (end 2.94 0.35) (layer Dwgs.User) (width 0.12))
+        (fp_line (start 1.6 -0.37) (end 2.94 -0.37) (layer Dwgs.User) (width 0.12))
+        (fp_line (start 2.94 -1.05) (end 1.6 -1.05) (layer Dwgs.User) (width 0.12))
+        (fp_line (start 2.94 -0.37) (end 2.94 -1.05) (layer Dwgs.User) (width 0.12))
+
+    (fp_line (start -1.6 -0.7) (end -0.8 -1.4) (layer Dwgs.User) (width 0.12))
+
+
+        (fp_line (start -3.8 -1.6) (end -2.2 -1.6) (layer F.SilkS) (width 0.12))
+        (fp_line (start -3.8 0) (end -3.8 -1.6) (layer F.SilkS) (width 0.12))
+        (pad 4 smd rect (at -2.70 0.7 0) (size 1.4 1) (layers F.Cu F.Paste F.Mask) (net 4 "DIN"))
+        (pad 3 smd rect (at -2.70 -0.7 0) (size 1.4 1) (layers F.Cu F.Paste F.Mask) (net 3 "GND"))
+        (pad 1 smd rect (at 2.70 0.7 0) (size 1.4 1) (layers F.Cu F.Paste F.Mask) (net 1 "VCC"))
+        (pad 2 smd rect (at 2.70 -0.7 0) (size 1.4 1) (layers F.Cu F.Paste F.Mask) (net 2 "DOUT"))
+
+        (fp_poly
+          (pts
+            (xy 1.6 -1.05)
+            (xy 2.94 -1.05)
+            (xy 2.94 -0.37)
+            (xy 1.6 -0.37)
+            (xy 1.6 0.35)
+            (xy 2.94 0.35)
+            (xy 2.94 1.03)
+            (xy 1.6 1.03)
+            (xy 1.6 1.4)
+            (xy -1.6 1.4)
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+            (xy -1.6 0.35)
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+            (xy -2.94 -0.37)
+            (xy -2.94 -1.05)
+            (xy -1.6 -1.05)
+            (xy -1.6 -1.4)
+            (xy 1.6 -1.4)
+          )
+          (width 0.1) (fill none) (layer "B.CrtYd"))
+
+    (fp_line (start -1.6 -0.7) (end -0.8 -1.4) (layer Dwgs.User) (width 0.12))
+
+
+        (fp_line (start -3.8 1.6) (end -2.2 1.6) (layer B.SilkS) (width 0.12))
+        (fp_line (start -3.8 0) (end -3.8 1.6) (layer B.SilkS) (width 0.12))
+        (pad 2 smd rect (at 2.70 0.7 0) (size 1.4 1) (layers B.Cu B.Paste B.Mask) (net 2 "DOUT"))
+        (pad 1 smd rect (at 2.70 -0.7 0) (size 1.4 1) (layers B.Cu B.Paste B.Mask) (net 1 "VCC"))
+        (pad 3 smd rect (at -2.70 0.7 0) (size 1.4 1) (layers B.Cu B.Paste B.Mask) (net 3 "GND"))
+        (pad 4 smd rect (at -2.70 -0.7 0) (size 1.4 1) (layers B.Cu B.Paste B.Mask) (net 4 "DIN"))
+
+        (fp_poly
+          (pts
+            (xy 1.6 -1.05)
+            (xy 2.94 -1.05)
+            (xy 2.94 -0.37)
+            (xy 1.6 -0.37)
+            (xy 1.6 0.35)
+            (xy 2.94 0.35)
+            (xy 2.94 1.03)
+            (xy 1.6 1.03)
+            (xy 1.6 1.4)
+            (xy -1.6 1.4)
+            (xy -1.6 1.03)
+            (xy -2.94 1.03)
+            (xy -2.94 0.35)
+            (xy -1.6 0.35)
+            (xy -1.6 -0.37)
+            (xy -2.94 -0.37)
+            (xy -2.94 -1.05)
+            (xy -1.6 -1.05)
+            (xy -1.6 -1.4)
+            (xy 1.6 -1.4)
+          )
+          (width 0.1) (fill none) (layer "B.CrtYd"))
+
+        (fp_line (start -1.8 -1.55) (end -1.8 1.55) (layer Edge.Cuts) (width 0.12))
+        (fp_line (start -1.8 1.55) (end 1.8 1.55) (layer Edge.Cuts) (width 0.12))
+        (fp_line (start 1.8 1.55) (end 1.8 -1.55) (layer Edge.Cuts) (width 0.12))
+        (fp_line (start 1.8 -1.55) (end -1.8 -1.55) (layer Edge.Cuts) (width 0.12))
+      )
+
+      (zone (net 0) (net_name "") (layers "F&B.Cu") (hatch edge 0.3)
+        (connect_pads (clearance 0))
+        (min_thickness 0.25)
+        (keepout (tracks not_allowed) (vias not_allowed) (copperpour not_allowed))
+        (fill (thermal_gap 0.5) (thermal_bridge_width 0.5))
+        (polygon
+          (pts
+            (xy -2.00 -1.85)
+            (xy 2.00 -1.85)
+            (xy 2.00 1.85)
+            (xy -2.00 1.85)
+          )
+        )
+      )
+
+
+    (segment (start 3.40 -0.70) (end 4.06 -0.11) (width 0.8) (layer "B.Cu") (net 1))
+    (segment (start 4.06 -0.11) (end 4.06 0.70) (width 0.8) (layer "B.Cu") (net 1))
+    (segment (start 2.70 -0.70) (end 3.40 -0.70) (width 0.8) (layer "B.Cu") (net 1))
+    (via (at 4.06 0.70) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 1))
+    (segment (start 2.70 0.70) (end 4.06 0.70) (width 0.8) (layer "F.Cu") (net 1))
+
+    (segment (start 4.95 -0.70) (end 2.70 -0.70) (width 0.254) (layer "F.Cu") (net 2))
+    (via (at 4.95 -0.70) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 2))
+    (segment (start 2.70 0.70) (end 3.48 1.49) (width 0.254) (layer "B.Cu") (net 2))
+    (segment (start 3.48 1.49) (end 4.53 1.49) (width 0.254) (layer "B.Cu") (net 2))
+    (segment (start 4.95 1.06) (end 4.95 -0.70) (width 0.254) (layer "B.Cu") (net 2))
+    (segment (start 4.53 1.49) (end 4.95 1.06) (width 0.254) (layer "B.Cu") (net 2))
+
+    (segment (start -3.40 -0.70) (end -4.06 -0.11) (width 0.8) (layer "F.Cu") (net 3))
+    (segment (start -4.06 -0.11) (end -4.06 0.70) (width 0.8) (layer "F.Cu") (net 3))
+    (segment (start -2.70 -0.70) (end -3.40 -0.70) (width 0.8) (layer "F.Cu") (net 3))
+    (via (at -4.06 0.70) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 3))
+    (segment (start -2.70 0.70) (end -4.06 0.70) (width 0.8) (layer "B.Cu") (net 3))
+
+    (segment (start -4.95 -0.70) (end -2.70 -0.70) (width 0.254) (layer "B.Cu") (net 4))
+    (via (at -4.95 -0.70) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 4))
+    (segment (start -2.70 0.70) (end -3.48 1.49) (width 0.254) (layer "F.Cu") (net 4))
+    (segment (start -3.48 1.49) (end -4.53 1.49) (width 0.254) (layer "F.Cu") (net 4))
+    (segment (start -4.95 1.06) (end -4.95 -0.70) (width 0.254) (layer "F.Cu") (net 4))
+    (segment (start -4.53 1.49) (end -4.95 1.06) (width 0.254) (layer "F.Cu") (net 4))
+
+
+
+)
+
+