Merge pull request #3692 from chipsalliance/vset-trap #1044

Job	Run time
riscv-arch-test	0s
riscv-tests (DefaultConfig)	19m 59s
emulator (DefaultSmallConfig)	15m 20s
riscv-tests (DefaultBufferlessConfig)	19m 37s
jtag-dtm-test (freechips.rocketchip.system.WithJtagDTMSystem_freechips.rocketchip.system.DefaultC...	22m 4s
emulator (DualBankConfig)	13m 16s
riscv-tests (DefaultRV32Config)	18m 58s
emulator (DualChannelConfig)	13m 37s
jtag-dtm-test (freechips.rocketchip.system.WithJtagDTMSystem_freechips.rocketchip.system.DefaultR...	20m 16s
riscv-tests (TinyConfig)	13m 50s
emulator (DualChannelDualBankConfig)	13m 49s
jtag-dtm-test (freechips.rocketchip.system.WithJtagDTMSystem_freechips.rocketchip.system.WithDebu...	18m 35s
riscv-tests (DefaultFP16Config)	14m 24s
jtag-dtm-test (freechips.rocketchip.system.WithJtagDTMSystem_freechips.rocketchip.system.WithDebu...	17m 46s
riscv-tests (DefaultBConfig)	14m 2s
emulator (RoccExampleConfig)	13m 16s
emulator (Edge128BitConfig)	13m 45s
riscv-tests (DefaultRV32BConfig)	13m 51s
emulator (Edge32BitConfig)	13m 9s
emulator (QuadChannelBenchmarkConfig)	13m 28s
emulator (EightChannelConfig)	13m 52s
emulator (DualCoreConfig)	13m 27s
emulator (MemPortOnlyConfig)	13m 39s
emulator (MMIOPortOnlyConfig)	13m 12s
emulator (CloneTileConfig)	14m 51s
emulator (HypervisorConfig)	13m 23s
	6h 25m 26s

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