Skip to content
wirelength_analyzer

[pull] master from Xilinx:master #139

Sign in to view logs

[pull] master from Xilinx:master

[pull] master from Xilinx:master #139

Triggered via pull request March 1, 2024 21:14
@pullpull[bot]
opened #25
Xilinx:master
Status Success
Total duration 4m 7s
Artifacts –

wirelength_analyzer.yml

on: pull_request
unittests
3m 52s
unittests
Fit to window
Zoom out
Zoom in