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add missing signal to sha3 testbench #481

add missing signal to sha3 testbench

add missing signal to sha3 testbench #481

Workflow file for this run

name: Bug Fix Unittests
on:
push:
pull_request:
jobs:
test-scala:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v3
- name: Install Tabby OSS Cad Suite (from YosysHQ)
uses: YosysHQ/setup-oss-cad-suite@v2
with:
version: '2022-06-22'
- name: Install OptiMathSAT
run: |
wget -q https://optimathsat.disi.unitn.it/releases/optimathsat-1.7.3/optimathsat-1.7.3-linux-64-bit.tar.gz
tar -xf optimathsat-1.7.3-linux-64-bit.tar.gz
echo "${PWD}/optimathsat-1.7.3-linux-64-bit/bin" >> $GITHUB_PATH
- name: Install CVC4
run: sudo apt-get install -y cvc4
- name: Print Solver Versions
run: |
z3 -version
optimathsat -version
cvc4 --version
verilator -version
- name: Run Scala Unittests
timeout-minutes: 5
working-directory: synthesizer
run: sbt test
test-python:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v3
- name: Install Tabby OSS Cad Suite (from YosysHQ)
uses: YosysHQ/setup-oss-cad-suite@v2
with:
version: '2022-06-22'
- name: Install OptiMathSAT
run: |
wget -q https://optimathsat.disi.unitn.it/releases/optimathsat-1.7.3/optimathsat-1.7.3-linux-64-bit.tar.gz
tar -xf optimathsat-1.7.3-linux-64-bit.tar.gz
echo "${PWD}/optimathsat-1.7.3-linux-64-bit/bin" >> $GITHUB_PATH
- name: Install CVC4
run: sudo apt-get install -y cvc4
- name: Print Solver Versions
run: |
z3 -version
optimathsat -version
cvc4 --version
verilator -version
- name: Compile Synthesizer to JAR
working-directory: synthesizer
run: sbt assembly
- name: Set up Python
uses: actions/setup-python@v4
with:
python-version: "3.10"
- name: Create Virtual Environment and Install Requirements
run: |
python3 -m venv venv
source venv/bin/activate
pip install -r requirements.txt
- name: Run Python Unittests
timeout-minutes: 15
run: |
source venv/bin/activate
./test.py
test-benchmarks:
name: Common Benchmark Tests
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v3
- name: Install Icarus Verilog
run: sudo apt-get install -y iverilog
- name: Set up Python
uses: actions/setup-python@v3
with:
python-version: "3.10"
- name: Create Virtual Environment and Install Requirements
run: |
python3 -m venv venv
source venv/bin/activate
pip install -r requirements.txt
- name: Check Benchmark Configuration Data
run: |
source venv/bin/activate
./scripts/load_all_benchmarks.py
test-repair-check:
name: Check Repairs Tests
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v3
- name: Install Icarus Verilog
run: sudo apt-get install -y iverilog
- name: Set up Python
uses: actions/setup-python@v3
with:
python-version: "3.10"
- name: Install Tabby OSS Cad Suite (from YosysHQ)
uses: YosysHQ/setup-oss-cad-suite@v2
with:
version: '2022-06-22'
- name: Create Virtual Environment and Install Requirements
run: |
python3 -m venv venv
source venv/bin/activate
pip install -r requirements.txt
- name: Check Repairs found by CirFix for the mux_4_1 benchmark
run: |
source venv/bin/activate
./scripts/check_repairs.py --working-dir=tmp --results=results/test-results --sim=iverilog
cat tmp/mux_4_1_wadden_buggy1_oracle-full_repair_2021-07-20-23:50:05.log
test-cirfix:
name: Test CirFix Quick Repairs
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v3
- name: Install Icarus Verilog
run: sudo apt-get install -y iverilog
- name: Set up Python
uses: actions/setup-python@v3
with:
python-version: "3.10"
- name: Create Virtual Environment and Install Requirements
run: |
cd cirfix
./make_venv.sh
- name: Repair first_counter_overflow_wadden_buggy1
timeout-minutes: 3
run: |
cd cirfix
source venv/bin/activate
cd prototype
python3 repair.py --project=../../benchmarks/cirfix/first_counter_overflow --bug=wadden_buggy1 --log --working-dir=first_counter_overflow_wadden_buggy1 --seed="repair_2020-09-23-11:24:14" --simulator=iverilog
- name: Repair padder_ssscrazy_buggy1
timeout-minutes: 3
run: |
cd cirfix
source venv/bin/activate
cd prototype
python3 repair.py --project=../../benchmarks/cirfix/opencores/sha3/low_throughput_core/padder.toml --bug=ssscrazy_buggy1 --log --working-dir=padder_ssscrazy_buggy1 --seed="repair_2020-09-24-15:16:49" --simulator=iverilog
- name: Repair first_counter_overflow_wadden_buggy1 using the run.py script
timeout-minutes: 3
run: |
cd cirfix
source venv/bin/activate
./run.py --working-dir=counter-wadden1 --experiment=first-counter-wadden-1 --threads=2 --simulator=iverilog