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fix script
Bug Fix Unittests #687: Commit d3347ad pushed by ekiwi
March 8, 2024 14:03 6m 55s main
March 8, 2024 14:03 6m 55s
check repairs: do not genrate VCDs by default
Bug Fix Unittests #686: Commit bd7780a pushed by ekiwi
March 8, 2024 13:40 6m 53s main
March 8, 2024 13:40 6m 53s
readme: more instructions
Bug Fix Unittests #685: Commit e3b8ecb pushed by ekiwi
March 8, 2024 02:09 7m 19s main
March 8, 2024 02:09 7m 19s
remove old Scala based synthesizer
Bug Fix Unittests #684: Commit e4ef68e pushed by ekiwi
March 8, 2024 01:46 6m 47s main
March 8, 2024 01:46 6m 47s
ci: try to avoid race condition in unittests
Bug Fix Unittests #683: Commit e4e0f81 pushed by ekiwi
March 8, 2024 01:43 6m 49s main
March 8, 2024 01:43 6m 49s
cirfix: remove pyverilog import from run script
Bug Fix Unittests #682: Commit a87865e pushed by ekiwi
March 8, 2024 01:42 6m 45s main
March 8, 2024 01:42 6m 45s
cirfix: vendor pyverilog and share virtual env
Bug Fix Unittests #681: Commit 47b8294 pushed by ekiwi
March 8, 2024 01:34 6m 56s main
March 8, 2024 01:34 6m 56s
update readme
Bug Fix Unittests #680: Commit 7b4fced pushed by ekiwi
March 8, 2024 01:29 7m 7s main
March 8, 2024 01:29 7m 7s
update table script
Bug Fix Unittests #679: Commit 2140927 pushed by ekiwi
February 9, 2024 20:51 9m 19s main
February 9, 2024 20:51 9m 19s
check repair: include dir
Bug Fix Unittests #678: Commit 1e2152e pushed by ekiwi
January 19, 2024 18:25 7m 49s main
January 19, 2024 18:25 7m 49s
update scrupts
Bug Fix Unittests #677: Commit 2cb81d6 pushed by ekiwi
January 19, 2024 18:06 8m 56s main
January 19, 2024 18:06 8m 56s
another fix
Bug Fix Unittests #676: Commit 861512c pushed by ekiwi
January 19, 2024 03:39 8m 33s main
January 19, 2024 03:39 8m 33s
fix
Bug Fix Unittests #675: Commit 7103d4c pushed by ekiwi
January 19, 2024 03:36 8m 44s main
January 19, 2024 03:36 8m 44s
script: pick correct testbench
Bug Fix Unittests #674: Commit 5e3907f pushed by ekiwi
January 19, 2024 03:34 8m 47s main
January 19, 2024 03:34 8m 47s
check repair for s3
Bug Fix Unittests #673: Commit ad92906 pushed by ekiwi
January 17, 2024 21:24 9m 7s main
January 17, 2024 21:24 9m 7s
experiments: use zero init and yices for FPGA
Bug Fix Unittests #672: Commit 1a7575e pushed by ekiwi
January 17, 2024 18:01 8m 18s main
January 17, 2024 18:01 8m 18s
benchmarks: indicate which tb for which bug
Bug Fix Unittests #671: Commit 004f0b6 pushed by ekiwi
January 17, 2024 18:01 8m 25s main
January 17, 2024 18:01 8m 25s
add fpga bechmarks to scripts
Bug Fix Unittests #670: Commit 831bcbd pushed by ekiwi
January 17, 2024 17:25 9m 26s main
January 17, 2024 17:25 9m 26s
test: make sure pairing times out without crashing
Bug Fix Unittests #669: Commit c7d2dfb pushed by ekiwi
January 17, 2024 16:26 9m 18s main
January 17, 2024 16:26 9m 18s
pip: upgrade vcdvcd
Bug Fix Unittests #668: Commit f171057 pushed by ekiwi
January 16, 2024 20:32 7m 16s submission0
January 16, 2024 20:32 7m 16s
synth: test sha3 testbench
Bug Fix Unittests #667: Commit 2beeace pushed by ekiwi
January 16, 2024 20:15 3m 28s submission0
January 16, 2024 20:15 3m 28s
add_guard: skip if no width info available
Bug Fix Unittests #666: Commit 5cd53f1 pushed by ekiwi
January 16, 2024 19:52 6m 29s main
January 16, 2024 19:52 6m 29s
ci: use parallel pytest
Bug Fix Unittests #665: Commit 1706e86 pushed by ekiwi
January 16, 2024 19:14 7m 26s main
January 16, 2024 19:14 7m 26s
pyverilog: fix assert syntax error
Bug Fix Unittests #664: Commit a30ee59 pushed by ekiwi
January 16, 2024 19:13 9m 0s main
January 16, 2024 19:13 9m 0s
pyverilog: fix preprocessor output conflicts
Bug Fix Unittests #663: Commit 08d22b3 pushed by ekiwi
January 16, 2024 19:11 10m 17s main
January 16, 2024 19:11 10m 17s