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docs: hierarchy
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Signed-off-by: Unai Martinez-Corral <[email protected]>
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umarcor committed Feb 24, 2022
1 parent a92d3a1 commit 5a41cf4
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16 changes: 0 additions & 16 deletions docs/architecture/index.rst

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15 changes: 0 additions & 15 deletions docs/db_dev_process/index.rst

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18 changes: 16 additions & 2 deletions docs/index.rst
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Expand Up @@ -25,13 +25,27 @@ to develop a free and open Verilog to bitstream toolchain for these devices.
:maxdepth: 2
:caption: Xilinx 7-Series Architecture

architecture/index
architecture/overview
architecture/configuration
architecture/bitstream_format
architecture/interconnect
architecture/dram_configuration
architecture/glossary
architecture/reference
architecture/code_of_conduct
architecture/updating_the_docs

.. toctree::
:maxdepth: 2
:caption: Database Development Process

db_dev_process/index
db_dev_process/readme
db_dev_process/contributing
db_dev_process/new_fuzzer
db_dev_process/fuzzers/index
db_dev_process/minitests/index
db_dev_process/parts
db_dev_process/newpart

.. toctree::
:maxdepth: 2
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