#5 - Ported over the fix for the QASM bugs we've been seeing. This is…

… for a HotFix so it has not had an entire round of testing occur as of yet.

src/pyLIQTR/_version.py

@@ -1 +1 @@
-__version__ = "1.0.0"
+__version__ = "1.0.1"

src/pyLIQTR/circuits/operators/AddMod.py

@@ -55,19 +55,25 @@ def _decompose_with_context_(
             context = cirq.DecompositionContext(cirq.ops.SimpleQubitManager())
         input_bits = qubits[: self.bitsize][::-1]
         output_bits = qubits[self.bitsize :][::-1]
-        ancillas = context.qubit_manager.qalloc(self.bitsize - 1)[::-1]
-        # Start off the addition by anding into the ancilla
-        yield and_gate.And().on(input_bits[0], output_bits[0], ancillas[0])
-        # Left part of Fig.2
-        yield from self._left_building_block(input_bits, output_bits, ancillas, 1)
-        yield cirq.CX(ancillas[-1], output_bits[-1])
-        yield cirq.CX(input_bits[-1], output_bits[-1])
-        # right part of Fig.2
-        yield from self._right_building_block(input_bits, output_bits, ancillas, self.bitsize - 2)
-        yield and_gate.And(adjoint=True).on(input_bits[0], output_bits[0], ancillas[0])
-        yield cirq.CX(input_bits[0], output_bits[0])
-        context.qubit_manager.qfree(ancillas)
-
+        if self.bitsize == 1:
+            assert(len(input_bits) == 1)
+            assert(len(output_bits) == 1)
+            #I dont love this because it drops the carry bit...
+            yield cirq.CX(input_bits[0],output_bits[0])
+        else:
+            ancillas = context.qubit_manager.qalloc(self.bitsize - 1)[::-1]
+            # Start off the addition by anding into the ancilla
+            yield and_gate.And().on(input_bits[0], output_bits[0], ancillas[0])
+            # Left part of Fig.2
+            yield from self._left_building_block(input_bits, output_bits, ancillas, 1)
+            yield cirq.CX(ancillas[-1], output_bits[-1])
+            yield cirq.CX(input_bits[-1], output_bits[-1])
+            # right part of Fig.2
+            yield from self._right_building_block(input_bits, output_bits, ancillas, self.bitsize - 2)
+            yield and_gate.And(adjoint=True).on(input_bits[0], output_bits[0], ancillas[0])
+            yield cirq.CX(input_bits[0], output_bits[0])
+            context.qubit_manager.qfree(ancillas)
+
 
 class AddMod(algos.AddMod):
     def _decompose_with_context_(
@@ -92,7 +98,7 @@ def _decompose_with_context_(
         MSB = 0
 
         #Cirq-ft add_mod is semiclassical (ie adds or subtracts a classical value)
-        assert(np.abs(self.add_val) < 2**(self.bitsize-1))
+        assert(np.abs(self.add_val) <= 2**(self.bitsize-1))
         #Classical value implemented.
         addVal = two_complement(self.add_val,self.bitsize)
         sign = self.add_val >= 0

src/pyLIQTR/circuits/pyLCircuit.py

@@ -31,6 +31,8 @@
 
 from cirq_ft import infra, algos, t_complexity
 
+from src.pyLIQTR.utils.printing import openqasm
+
 # class syntax
 class RESOURCE_ANALYSIS_MODE(Enum):
     Exact = 0
@@ -333,7 +335,8 @@ def resourceAnalyze(self,rotation_gate_precision=1e-8,circuit_precision=None,mod
         return self.resources
 
     def to_openqasm(self,use_rotation_decomp_gates=False):
-        yield from to_openqasm(self,use_rotation_decomp_gates=use_rotation_decomp_gates)
+        # yield from to_openqasm(self,use_rotation_decomp_gates=use_rotation_decomp_gates)
+        yield from openqasm(self, rotation_allowed=use_rotation_decomp_gates)
 
 
 def get_T_counts_from_rotations(num_rotation_gates,gate_precision=1e-8,circuit_precision=None):

src/pyLIQTR/qubitization/qsvt.py

@@ -273,10 +273,11 @@ def _qasm_(
         default: DefaultDict = RaiseTypeErrorIfNotProvided,
     ) -> Union[str, TDefault]:
 
-        args.validate_version('2.0')
-        allQ = [*self.__phs_q, *self.__anc_q, *self.__ctl_q, *self.__tgt_q]
-        allQStr = ",".join([args.format(str(x)) for x in allQ])
-        return "{}({})\n".format(self.__strName,allQStr)
+        # args.validate_version('2.0')
+        # allQ = [*self.__phs_q, *self.__anc_q, *self.__ctl_q, *self.__tgt_q]
+        # allQStr = ",".join([args.format(str(x)) for x in allQ])
+        # return "{}({})\n".format(self.__strName,allQStr)
+        raise NotImplementedError
 
 
 

src/pyLIQTR/utils/printing.py

@@ -18,6 +18,8 @@
 may violate any copyrights that exist in this work.
 """
 
+from typing_extensions import deprecated
+from warnings import warn
 import cirq
 from collections import defaultdict
 from pyLIQTR.gate_decomp.rotation_gates import decomp_mixin
@@ -170,8 +172,9 @@ def openqasm(circuit: cirq.AbstractCircuit,
                     raise e
 
 
-
+@deprecated("Use openqasm() instead.")
 def to_openqasm(circuit_in,use_rotation_decomp_gates=False) -> str:
+    warn('\n\n\n*********************************************************************************************\nThis function is deprecated -- Recommend switching to pyLIQTR.utils.printing.openqasm\n*********************************************************************************************\n\n\n', DeprecationWarning, 2)
     str_out =  '// Generated from Cirq, Openfermion, and MIT LL\n\n'
     str_out += 'OPENQASM 2.0;\n'
     str_out += 'include \"qelib1.inc\";\n\n'