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This project aims to provide an FPGA based NoC emulator to test and verify different mapping schedulings

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lisher1251/NoC_FPGA_Emulator

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NoC FPGA Emulator

Authors (in alphabetic order):

  • Martin Dida
  • Nevin George
  • Vineeth Govind
  • Ranganathan Hariharan
  • Karl Janson
  • Apneet Kaur Sandhu
  • Behrad Niazmand
  • Siavoosh Payandeh Azad
  • René Pihlak
  • Tsotne Putkaradze
  • Jaan Raik
  • Hardi Selg

License: GNU GENERAL PUBLIC LICENSE Version 2

Copyright (C) 2015 as collective work. According to 17 U.S.C. 201(c) each author will retain their full ownership for their contribution.


In case you need something to be implemented please conact: siavoosh[AT]ati[DOT]ttu[DOT]ee maybe we can arrange it.


For ducmentations please refer to wiki!

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This project aims to provide an FPGA based NoC emulator to test and verify different mapping schedulings

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