Fix paths in tests for windows builds (#7185)

* Fix paths in tests for windows builds * Fix patterns that check mlir: backslashes are rendered as double backslashes * Fix fir emitter for output dirs with backslashes * Try fixing patterns, again * FIRLexer: parse escaped backslashes in strings * Fix more patterns with backslashes * This time, for an absolute path
llvm · Jun 15, 2024 · ae1b8f7 · ae1b8f7
1 parent c93ca4e
commit ae1b8f7
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Showing 8 changed files with 30 additions and 26 deletions.
diff --git a/lib/Dialect/FIRRTL/Export/FIREmitter.cpp b/lib/Dialect/FIRRTL/Export/FIREmitter.cpp
@@ -588,8 +588,12 @@ void Emitter::emitDeclaration(LayerOp op) {
   startStatement();
   ps << "layer " << PPExtString(op.getSymName()) << ", "
      << PPExtString(stringifyLayerConvention(op.getConvention()));
-  if (auto outputFile = op->getAttrOfType<hw::OutputFileAttr>("output_file"))
-    ps << ", \"" << PPExtString(outputFile.getFilename().getValue()) << "\"";
+
+  if (auto outputFile = op->getAttrOfType<hw::OutputFileAttr>("output_file")) {
+    ps << ", ";
+    ps.writeQuotedEscaped(outputFile.getFilename().getValue());
+  }
+
   ps << " : ";
   emitLocationAndNewLine(op);
   ps.scopedBox(PP::bbox2, [&]() {

diff --git a/lib/Dialect/FIRRTL/Import/FIRLexer.cpp b/lib/Dialect/FIRRTL/Import/FIRLexer.cpp
@@ -474,7 +474,7 @@ FIRToken FIRLexer::lexString(const char *tokStart, bool isVerbatim) {
       return formToken(FIRToken::verbatim_string, tokStart);
     case '\\':
       // Ignore escaped '\'' or '"'
-      if (*curPtr == '\'' || *curPtr == '"')
+      if (*curPtr == '\'' || *curPtr == '"' || *curPtr == '\\')
         ++curPtr;
       else if (*curPtr == 'u' || *curPtr == 'U')
         return emitError(tokStart, "unicode escape not supported in string");

diff --git a/test/Dialect/FIRRTL/annotations.mlir b/test/Dialect/FIRRTL/annotations.mlir
@@ -1918,7 +1918,7 @@ firrtl.circuit "Top" attributes {
     }]
   } {
   // CHECK-LABEL: firrtl.module @Top
-  // CHECK-SAME:  attributes {output_file = #hw.output_file<"foobarbaz/">}
+  // CHECK-SAME:  attributes {output_file = #hw.output_file<"foobarbaz{{/|\\\\}}">}
   firrtl.module @Top() {}
 }
 
@@ -1934,7 +1934,7 @@ firrtl.circuit "Top" attributes {
     }]
   } {
   // CHECK-LABEL: firrtl.module @Top
-  // CHECK-SAME:  attributes {output_file = #hw.output_file<"foobarbaz/">}
+  // CHECK-SAME:  attributes {output_file = #hw.output_file<"foobarbaz{{/|\\\\}}">}
   firrtl.module @Top() {}
 }
 
@@ -1950,6 +1950,6 @@ firrtl.circuit "Top" attributes {
     }]
   } {
   // CHECK-LABEL: firrtl.module @Top
-  // CHECK-SAME:  attributes {output_file = #hw.output_file<"foobarbaz/qux/">}
+  // CHECK-SAME:  attributes {output_file = #hw.output_file<"foobarbaz{{/|\\\\}}qux{{/|\\\\}}">}
   firrtl.module @Top() {}
 }
diff --git a/test/Dialect/FIRRTL/assign-output-dirs.mlir b/test/Dialect/FIRRTL/assign-output-dirs.mlir
@@ -21,19 +21,19 @@ firrtl.circuit "AssignOutputDirs" {
   firrtl.module private @ByRC() {}
 
   // A -> A
-  // CHECK: firrtl.module private @ByA() attributes {output_file = #hw.output_file<"A/">} {
+  // CHECK: firrtl.module private @ByA() attributes {output_file = #hw.output_file<"A{{/|\\\\}}">} {
   firrtl.module private @ByA() {}
 
   // A & B -> R
   // firrtl.module private @ByAB() {
   firrtl.module private @ByAB() {}
 
   // C & D -> A
-  // CHECK: firrtl.module private @ByCD() attributes {output_file = #hw.output_file<"A/">} {
+  // CHECK: firrtl.module private @ByCD() attributes {output_file = #hw.output_file<"A{{/|\\\\}}">} {
   firrtl.module private @ByCD() {}
 
   // A & C -> A
-  // CHECK: firrtl.module private @ByAC() attributes {output_file = #hw.output_file<"A/">} {
+  // CHECK: firrtl.module private @ByAC() attributes {output_file = #hw.output_file<"A{{/|\\\\}}">} {
   firrtl.module private @ByAC() {}
 
   // B & C -> R
@@ -67,7 +67,7 @@ firrtl.circuit "AssignOutputDirs" {
     firrtl.instance byCD @ByCD()
   }
 
-  // CHECK: firrtl.module private @ByDotDot() attributes {output_file = #hw.output_file<"/path/to/">} {
+  // CHECK: firrtl.module private @ByDotDot() attributes {output_file = #hw.output_file<"{{.*(/|\\\\)}}path{{/|\\\\}}to{{/|\\\\}}">} {
   firrtl.module private @ByDotDot() {}
 
   firrtl.module @InDotDot() attributes {output_file = #hw.output_file<"../">} {
@@ -76,14 +76,14 @@ firrtl.circuit "AssignOutputDirs" {
 
   // Absolute output directory tests
 
-  // CHECK firrtl.module private @ByOutputA() {output_file = #hw.output_file<"A/">} {}
+  // CHECK firrtl.module private @ByOutputA() {output_file = #hw.output_file<"A{{/|\\\\}}">} {}
   firrtl.module private @ByOutputA() {}
 
   firrtl.module @InOutputA() attributes {output_file = #hw.output_file<"/path/to/output/A/foo">} {
     firrtl.instance byOutputA @ByOutputA()
   }
 
-  // CHECK: firrtl.module private @ByYZ() attributes {output_file = #hw.output_file<"/X/">} {
+  // CHECK: firrtl.module private @ByYZ() attributes {output_file = #hw.output_file<"{{.*(/|\\\\)}}X{{/|\\\\}}">} {
   firrtl.module private @ByYZ() {}
 
   firrtl.module @InY() attributes {output_file = #hw.output_file<"/X/Y/">} {

diff --git a/test/Dialect/FIRRTL/emit-basic.mlir b/test/Dialect/FIRRTL/emit-basic.mlir
@@ -676,7 +676,7 @@ firrtl.circuit "Foo" {
   // CHECK-NEXT:      layer GroupD, bind :
   // CHECK-NEXT:        layer GroupE, inline :
   // CHECK-NEXT:    layer GroupF, bind :
-  // CHECK-NEXT:  layer GroupWithOutputDir, bind, "foo/" :
+  // CHECK-NEXT:  layer GroupWithOutputDir, bind, "foo{{/|\\\\}}" :
   firrtl.layer @GroupA bind {
     firrtl.layer @GroupB bind {
       firrtl.layer @GroupC bind {

diff --git a/test/Dialect/FIRRTL/parse-basic.fir b/test/Dialect/FIRRTL/parse-basic.fir
@@ -1508,9 +1508,9 @@ circuit Layers:
     ; CHECK-NEXT:   }
     ; CHECK-NEXT: }
 
-  ; CHECK: firrtl.layer @WithDirectory1 bind attributes {output_file = #hw.output_file<"foo/">}
+  ; CHECK: firrtl.layer @WithDirectory1 bind attributes {output_file = #hw.output_file<"foo{{/|\\\\}}">}
   layer WithDirectory1, bind, "foo":
-  ; CHECK: firrtl.layer @WithDirectory2 bind attributes {output_file = #hw.output_file<"foo/">}
+  ; CHECK: firrtl.layer @WithDirectory2 bind attributes {output_file = #hw.output_file<"foo{{/|\\\\}}">}
   layer WithDirectory2, bind, "foo/":
 
 ;// -----

diff --git a/test/firtool/dedup-modules-with-output-dirs.fir b/test/firtool/dedup-modules-with-output-dirs.fir
@@ -15,13 +15,13 @@ circuit Top: %[[
   {"class": "firrtl.transforms.DontTouchAnnotation", "target": "~Top|A>w"},
   {"class": "firrtl.transforms.DontTouchAnnotation", "target": "~Top|B>w"}
 ]]
-  ; CHECK: FILE "XXX/A.sv"
+  ; CHECK: FILE "XXX{{/|\\}}A.sv"
   ; CHECK: module A
   public module A:
     wire w : UInt<1>
     w is invalid
 
-  ; CHECK: FILE "YYY/B.sv"
+  ; CHECK: FILE "YYY{{/|\\}}B.sv"
   ; CHECK: module B
   public module B:
     wire w : UInt<1>
@@ -45,13 +45,13 @@ circuit Top: %[[
   {"class": "firrtl.transforms.DontTouchAnnotation", "target": "~Top|A>w"},
   {"class": "firrtl.transforms.DontTouchAnnotation", "target": "~Top|B>w"}
 ]]
-  ; CHECK-NOT: FILE "YYY/B.sv"
+  ; CHECK-NOT: FILE "YYY{{/|\\}}B.sv"
   ; CHECK: module A
   public module A:
     wire w : UInt<1>
     w is invalid
 
-  ; CHECK: FILE "YYY/B.sv"
+  ; CHECK: FILE "YYY{{/|\\}}B.sv"
   ; CHECK: module B
   public module B:
     wire w : UInt<1>
@@ -81,7 +81,7 @@ circuit Top: %[[
   {"class": "firrtl.transforms.DontTouchAnnotation", "target": "~Top|CB>w"}
 
 ]]
-  ; CHECK: FILE "ZZZ/CA.sv"
+  ; CHECK: FILE "ZZZ{{/|\\}}CA.sv"
   ; CHECK: module CA
   module CA:
     wire w : UInt<1>
@@ -92,13 +92,13 @@ circuit Top: %[[
     wire w : UInt<1>
     w is invalid
 
-  ; CHECK: FILE "ZZZ/XXX/A.sv"
+  ; CHECK: FILE "ZZZ{{/|\\}}XXX{{/|\\}}A.sv"
   ; CHECK: module A
   public module A:
     ; CHECK: CA c
     inst c of CA
 
-  ; CHECK: FILE "ZZZ/YYY/B.sv"
+  ; CHECK: FILE "ZZZ{{/|\\}}YYY{{/|\\}}B.sv"
   ; CHECK: module B
   public module B:
     ; CHECK: CA c

diff --git a/test/firtool/lower-layers.fir b/test/firtool/lower-layers.fir
@@ -46,24 +46,24 @@ circuit Foo: %[[
   ; CHECK: );
   ; CHECK: endmodule
 
-  ; CHECK: FILE "testbench/layers_Foo_Verification.sv"
+  ; CHECK: FILE "testbench{{[/\]}}layers_Foo_Verification.sv"
   ; CHECK: `ifndef layers_Foo_Verification
   ; CHECK: `define layers_Foo_Verification
   ; CHECK: bind Bar Bar_Verification verification ();
   ; CHECK: `endif // layers_Foo_Verification
 
-  ; CHECK: FILE "testbench/VerificationHelper.sv"
+  ; CHECK: FILE "testbench{{[/\]}}VerificationHelper.sv"
   ; CHECK: module VerificationHelper();
   ; CHECK:   wire w = 1'h0;
   ; CHECK: endmodule
 
-  ; CHECK: FILE "testbench/Bar_Verification.sv"
+  ; CHECK: FILE "testbench{{[/\]}}Bar_Verification.sv"
   ; CHECK: module Bar_Verification();
   ; CHECK:   wire c = 1'h0;
   ; CHECK:   wire c_probe = c;
   ; CHECK: endmodule
 
-  ; CHECK: FILE "testbench/Foo.sv"
+  ; CHECK: FILE "testbench{{[/\]}}Foo.sv"
   ; CHECK: module Foo();
   ; CHECK:  wire d = Foo.bar.verification.c_probe;
   ; CHECK:   Bar bar (