[MooreToCore] LSB and MSB support in moore dialect

[AndreyVV-100]

Hi! I tried using circt-verilog and ran into problems.

module Mod(input clk, input [4:3] a, output logic b);
always_ff @(posedge clk) begin
    b <= a[3];
end
endmodule

module Mod(input [1:0] a, output logic b);
always @(posedge a)
    b <= a[0];
endmodule

In first case lowering fro Moore to Core dialect fails due to there are no information about range ([4:3]) in Moore dialect and out-of-range error occurs. Second case isn't implemented now (see corresponding todo). According to 9.4.2 IEEE 1800-2017, an edge event shall be detected only on the LSB of the expression. For this reason LSB information is needed for this todo.

I would help CIRCT project and implement support for these cases. Is it good idea to add LSB and MSB as attribute? Are there other possible solutions to this problem?

Thank you in advance!