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[ImportVerilog]Dedup module Op #7245
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@fabianschuiki @hailongSun2000 Sorry, last dedup PR was ruined after git rebase, please have a look at this one, thanks. |
hailongSun2000
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fabianschuiki,
uenoku,
maerhart and
hailongSun2000
July 2, 2024 01:38
Co-authored-by: Fabian Schuiki <[email protected]>
fabianschuiki
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Jul 17, 2024
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Very cool! Minor comment regarding the nested test, but besides that this is very nice!
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Dedup module Op while instance generating.