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Add unit test with high-res timer for DeviceSyncer #237
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,103 @@ | ||
/****************************************************************************** | ||
* Copyright (c) 2024 Advanced Micro Devices, Inc. All rights reserved. | ||
* | ||
* Permission is hereby granted, free of charge, to any person obtaining a copy | ||
* of this software and associated documentation files (the "Software"), to | ||
* deal in the Software without restriction, including without limitation the | ||
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or | ||
* sell copies of the Software, and to permit persons to whom the Software is | ||
* furnished to do so, subject to the following conditions: | ||
* | ||
* The above copyright notice and this permission notice shall be included in | ||
* all copies or substantial portions of the Software. | ||
* | ||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | ||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | ||
* IN THE SOFTWARE. | ||
*****************************************************************************/ | ||
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#include "sync_tests.hpp" | ||
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TEST_F(DeviceSyncerTestFixture, execute_1_1) { | ||
execute(1, 1); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1024_1) { | ||
execute(1024, 1); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1_2) { | ||
execute(1, 2); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1024_2) { | ||
execute(1024, 2); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1_4) { | ||
execute(1, 4); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1024_4) { | ||
execute(1024, 4); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1_8) { | ||
execute(1, 8); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1024_8) { | ||
execute(1024, 8); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1_16) { | ||
execute(1, 16); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1024_16) { | ||
execute(1024, 16); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1_32) { | ||
execute(1, 32); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1024_32) { | ||
execute(1024, 32); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1_64) { | ||
execute(1, 64); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1024_64) { | ||
execute(1024, 64); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1_104) { | ||
execute(1, 104); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1024_104) { | ||
execute(1024, 104); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1_128) { | ||
execute(1, 128); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1_256) { | ||
execute(1, 256); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1_512) { | ||
execute(1, 512); | ||
} | ||
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TEST_F(DeviceSyncerTestFixture, execute_1_1024) { | ||
execute(1, 1024); | ||
} |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,130 @@ | ||
/****************************************************************************** | ||
* Copyright (c) 2024 Advanced Micro Devices, Inc. All rights reserved. | ||
* | ||
* Permission is hereby granted, free of charge, to any person obtaining a copy | ||
* of this software and associated documentation files (the "Software"), to | ||
* deal in the Software without restriction, including without limitation the | ||
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or | ||
* sell copies of the Software, and to permit persons to whom the Software is | ||
* furnished to do so, subject to the following conditions: | ||
* | ||
* The above copyright notice and this permission notice shall be included in | ||
* all copies or substantial portions of the Software. | ||
* | ||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | ||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | ||
* IN THE SOFTWARE. | ||
*****************************************************************************/ | ||
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#include <gtest/gtest.h> | ||
#include <mscclpp/concurrency_device.hpp> | ||
#include <mscclpp/gpu.hpp> | ||
#include <mscclpp/gpu_utils.hpp> | ||
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using TYPE = mscclpp::DeviceSyncer; | ||
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MSCCLPP_DEVICE_INLINE void | ||
timestamp(uint64_t& clk) { | ||
asm volatile("s_memrealtime %0\n" | ||
"s_waitcnt lgkmcnt(0)\n" | ||
: "=s" (clk)); | ||
} | ||
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__global__ void synchronize(TYPE *syncer, uint64_t *timer) { | ||
uint64_t start {0}; | ||
uint64_t end {0}; | ||
timestamp(start); | ||
syncer->sync(gridDim.x); | ||
timestamp(end); | ||
if (threadIdx.x == 0) { | ||
timer[blockIdx.x] = end - start; | ||
} | ||
} | ||
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class DeviceSyncerTestFixture : public ::testing::Test { | ||
public: | ||
DeviceSyncerTestFixture() { | ||
MSCCLPP_CUDATHROW(cudaMalloc((void**)&syncer_d, sizeof(TYPE))); | ||
syncer_h = (TYPE*)malloc(sizeof(TYPE)); | ||
MSCCLPP_CUDATHROW(cudaMalloc((void**)&timer_d, sizeof(uint64_t) * MAX_BLOCKS)); | ||
timer_h = (uint64_t*)malloc(sizeof(uint64_t) * MAX_BLOCKS); | ||
} | ||
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~DeviceSyncerTestFixture() { | ||
if (timer_h) { free(timer_h); } | ||
if (timer_d) { (void)cudaFree(timer_d); } | ||
if (syncer_h) { free(syncer_h); } | ||
if (syncer_d) { (void)cudaFree(syncer_d); } | ||
} | ||
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void execute(uint32_t x_block_dim, uint32_t x_grid_dim) { | ||
assert(x_grid_dim <= MAX_BLOCKS); | ||
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const dim3 blocksize(x_block_dim, 1, 1); | ||
const dim3 gridsize(x_grid_dim, 1, 1); | ||
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cudaStream_t stream; | ||
MSCCLPP_CUDATHROW(cudaStreamCreate(&stream)); | ||
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cudaEvent_t start_event; | ||
cudaEvent_t stop_event; | ||
MSCCLPP_CUDATHROW(cudaEventCreate(&start_event)); | ||
MSCCLPP_CUDATHROW(cudaEventCreate(&stop_event)); | ||
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memset(syncer_h, 0, sizeof(TYPE)); | ||
MSCCLPP_CUDATHROW(cudaMemcpyAsync(syncer_d, syncer_h, sizeof(TYPE), cudaMemcpyHostToDevice, stream)); | ||
MSCCLPP_CUDATHROW(cudaEventRecord(start_event, stream)); | ||
synchronize<<<gridsize, blocksize, 0, stream>>>(syncer_d, timer_d); | ||
MSCCLPP_CUDATHROW(cudaEventRecord(stop_event, stream)); | ||
MSCCLPP_CUDATHROW(cudaMemcpyAsync(timer_h, timer_d, sizeof(uint64_t) * MAX_BLOCKS, cudaMemcpyDeviceToHost, stream)); | ||
MSCCLPP_CUDATHROW(cudaStreamSynchronize(stream)); | ||
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float event_time; | ||
MSCCLPP_CUDATHROW(cudaEventElapsedTime(&event_time, start_event, stop_event)); | ||
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MSCCLPP_CUDATHROW(cudaEventDestroy(stop_event)); | ||
MSCCLPP_CUDATHROW(cudaEventDestroy(start_event)); | ||
MSCCLPP_CUDATHROW(cudaStreamDestroy(stream)); | ||
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printf("event time: %f ms\n", event_time); | ||
timer_us(x_grid_dim); | ||
} | ||
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protected: | ||
uint64_t memrealtime_freq_mhz() { | ||
cudaDeviceProp deviceProp{}; | ||
MSCCLPP_CUDATHROW(cudaGetDeviceProperties(&deviceProp, 0)); | ||
#if defined(__HIP_PLATFORM_AMD__) && (__HIP_PLATFORM_AMD__ == 1) | ||
switch (deviceProp.gcnArch) { | ||
case 900: return 27; | ||
case 906: return 25; | ||
case 908: return 25; | ||
case 910: return 25; | ||
default: | ||
assert(false && "clock data unavailable"); | ||
return 0; | ||
} | ||
#endif | ||
} | ||
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double gpu_cycles_to_us(uint64_t cycles) { | ||
double div {(double)cycles / memrealtime_freq_mhz()}; | ||
return div; | ||
} | ||
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void timer_us(uint32_t num_blocks) { | ||
for (uint32_t i{0}; i < num_blocks; i++) { | ||
printf("block %d : latency %f us\n", i, gpu_cycles_to_us(timer_h[i])); | ||
} | ||
} | ||
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const uint32_t MAX_BLOCKS{1024}; | ||
TYPE *syncer_h{nullptr}; | ||
TYPE *syncer_d{nullptr}; | ||
uint64_t *timer_h{nullptr}; | ||
uint64_t *timer_d{nullptr}; | ||
}; |
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@BKP Thank you for contribution! Could you advise me where these numbers are from? 25MHz looks too small as GPU clock frequency.
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The frequency comes from a constant frequency timer.
Information from the instruction can be found in the ISA manual for either MI100 or MI200. (The "27" for GFX900 is not well documented as far as I know, but the "25" from the newer architectures is clearly specified in newer ISA manuals.)
https://gpuopen.com/amd-isa-documentation/
https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/instruction-set-architectures/instinct-mi200-cdna2-instruction-set-architecture.pdf
See "s_memrealtime".