Skip to content

Commit

Permalink
[stm32] Place stack in SRAM by default on H7, add lbuild option
Browse files Browse the repository at this point in the history 
The DTCM is not DMA-capable on H7 devices. An lbuild option is added to
select the stack location between SRAM and DTCM.
  • Loading branch information
@chris-durand
chris-durand committed Dec 13, 2023
1 parent 605aaba commit efb40cc
Show file tree
Hide file tree
Showing 2 changed files with 14 additions and 0 deletions.
4 changes: 4 additions & 0 deletions src/modm/platform/core/stm32/idtcm.ld.in
View file
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,11 @@ SECTIONS
%% set dtcm_section = "DTCM"
%% endif

%% if stack_in_dtcm
{{ linker.section_stack(dtcm_section) }}
%% else
{{ linker.section_stack(cont_ram.cont_name|upper) }}
%% endif

%% if "dtcm" in cont_ram.cont_name
{{ linker.section_ram(cont_ram.cont_name|upper, "FLASH", table_copy, table_zero,
Expand Down
10 changes: 10 additions & 0 deletions src/modm/platform/core/stm32/module.lb
View file
Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,15 @@ def prepare(module, options):
default="rom")
)

if options[":target"].identifier.family == "h7":
module.add_option(
EnumerationOption(
name="main_stack_location",
description="SRAM (default) or DTCM (faster, but not DMA-capable)",
enumeration=["sram", "dtcm"],
default="sram")
)

module.depends(":platform:cortex-m")
return True

Expand Down Expand Up @@ -100,5 +109,6 @@ def post_build(env):
linkerscript = "dccm.ld.in"
elif memory["name"] == "dtcm":
# Executable ITCM and DTCM (Tightly-Coupled Memory)
env.substitutions["stack_in_dtcm"] = env.get(":platform:core:main_stack_location", "dtcm") == "dtcm"
linkerscript = "idtcm.ld.in"
env.template(linkerscript, "linkerscript.ld")

4 comments on commit efb40cc

@eduardobehr
Copy link

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

This change in the file modm/link/linkerscript.ld in my project has been responsible for a hard fault:
image

I believe this might have been caused by this commit.
Any ideas why that would have happened?

I used the lbuild option to bypass this issue, but I wonder if sram being the default wouldn't cause too much problem.

@salkinium
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

cc @chris-durand

@chris-durand
Copy link
Member Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

That's really strange. The default was changed because the DTCM isn't accessible from most DMA instances. I don't see how that could cause a hardfault with the sram being less restrictive regarding what can access it.

@eduardobehr Could you try to figure out what kind of fault you have and what triggers it (https://interrupt.memfault.com/blog/cortex-m-hardfault-debug)?

@eduardobehr
Copy link

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Guess what: I couldn't reproduce the issue this time...
If it happens again, I'll gather more debug info and get back to you.

Please sign in to comment.