Caf Upstream to LA.UM.6.6.r1-09800-89xx.0

"LA.UM.6.6.r1-09800-89xx.0"
mountaser · Sep 29, 2018 · 8e3edec · 8e3edec
2 parents 13eb7ad + ccdf226
commit 8e3edec
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Showing 61 changed files with 3,773 additions and 2,802 deletions.
diff --git a/arch/arm/boot/dts/qcom/apq8009-dragon.dtsi b/arch/arm/boot/dts/qcom/apq8009-dragon.dtsi
@@ -80,6 +80,33 @@
 		status = "disabled";
 	};
 
+	cnss_sdio: qcom,cnss_sdio {
+		compatible = "qcom,cnss_sdio";
+		subsys-name = "AR6320";
+		/**
+		 * There is no vdd-wlan on board and this is not for DSRC.
+		 * IO and XTAL share the same vreg.
+		 */
+		vdd-wlan-io-supply = <&pm8916_l5>;
+		qcom,wlan-ramdump-dynamic = <0x200000>;
+		qcom,msm-bus,name = "msm-cnss";
+		qcom,msm-bus,num-cases = <4>;
+		qcom,msm-bus,num-paths = <1>;
+		qcom,msm-bus,vectors-KBps =
+				<79 512 0 0>,             /* No vote */
+				<79 512 6250 200000>,     /* 50 Mbps */
+				<79 512 25000 200000>,    /* 200 Mbps */
+				<79 512 2048000 4096000>; /* MAX */
+	};
+
+	qcom,wcnss-wlan@a000000 {
+		status = "disabled";
+	};
+
+	qcom,pronto@a21b000 {
+		status = "disabled";
+	};
+
 	bluetooth: bt_qca9379 {
 		compatible = "qca,qca9379";
 		qca,bt-reset-gpio = <&msm_gpio 47 0>; /* BT_EN */
@@ -105,8 +132,62 @@
 	};
 };
 
+&msm_gpio {
+	sdc2_wlan_gpio_on: sdc2_wlan_gpio_on {
+		mux {
+			pins = "gpio43";
+			function = "gpio";
+		};
+		config {
+			pins = "gpio43";
+			drive-strength = <10>;
+			bias-pull-up;
+			output-high;
+		};
+	};
+
+	sdc2_wlan_gpio_off: sdc2_wlan_gpio_off {
+		mux {
+			pins = "gpio43";
+			function = "gpio";
+		};
+		config {
+			pins = "gpio43";
+			drive-strength = <2>;
+			bias-disable;
+			output-low;
+		};
+	};
+};
+
 &sdhc_2 {
-	status = "disabled";
+	/delete-property/cd-gpios;
+	#address-cells = <0>;
+	interrupt-parent = <&sdhc_2>;
+	interrupts = <0 1 2>;
+	#interrupt-cells = <1>;
+	interrupt-map-mask = <0xffffffff>;
+	interrupt-map = <0 &intc 0 125 0>,
+			<1 &intc 0 221 0>,
+			<2 &msm_gpio 40 0x1>;
+	interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq";
+
+	qcom,vdd-voltage-level = <1800000 2950000>;
+	qcom,vdd-current-level = <15000 400000>;
+
+	qcom,vdd-io-voltage-level = <1800000 1800000>;
+	qcom,vdd-io-current-level = <200 50000>;
+	qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
+	qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
+
+	pinctrl-names = "active", "sleep";
+	pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on
+			&sdc2_wlan_gpio_on>;
+	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off
+			&sdc2_wlan_gpio_off>;
+	qcom,nonremovable;
+	qcom,core_3_0v_support;
+	status = "ok";
 };
 
 &usb_otg {
@@ -164,3 +245,10 @@
 	status = "ok";
 	qcom,disable-bms;
 };
+
+&pm8916_chg {
+	status = "ok";
+	qcom,charging-disabled;
+	qcom,use-default-batt-values;
+};
+
diff --git a/arch/arm/boot/dts/qcom/mdm9650-cv2x.dtsi b/arch/arm/boot/dts/qcom/mdm9650-cv2x.dtsi
@@ -56,6 +56,15 @@
 	pps {
 		use-system-time-ts;
 	};
+
+	qcom,ipc_router_external_ap_xprt {
+		compatible = "qcom,ipc-router-mhi-dev-xprt";
+		qcom,out-chan-id = <20>;
+		qcom,in-chan-id = <21>;
+		qcom,xprt-remote = "external-ap";
+		qcom,xprt-linkid = <2>;
+		qcom,xprt-version = <1>;
+	};
 };
 
 &cnss_pcie {
@@ -97,7 +106,7 @@
 		spi-max-frequency = <4800000>;
 		reg = <0>;
 		interrupt-parent = <&tlmm_pinmux>;
-		interrupts = <68 0>;
+		interrupts = <68 IRQ_TYPE_EDGE_RISING>;
 		reset-gpio = <&tlmm_pinmux 89 GPIO_ACTIVE_LOW>;
 		pinctrl-names = "active", "sleep";
 		pinctrl-0 = <&can_rst_on>;
@@ -321,3 +330,18 @@
 		qcom,vadc-thermal-node;
 	};
 };
+
+&pmd9650_pon {
+	interrupts = <0x0 0x8 0x0>, <0x0 0x8 0x1>;
+	interrupt-names = "kpdpwr", "resin";
+	qcom,s3-src = "resin";
+
+	qcom,pon_2 {
+		qcom,pon-type = <1>;
+		qcom,support-reset = <1>;
+		qcom,s1-timer = <0>;
+		qcom,s2-timer = <2000>;
+		qcom,s2-type = <7>;
+		qcom,pull-up = <1>;
+	};
+};
diff --git a/arch/arm/boot/dts/qcom/mdm9650-pcie-ep-ttp.dts b/arch/arm/boot/dts/qcom/mdm9650-pcie-ep-ttp.dts
@@ -13,7 +13,9 @@
 
 /dts-v1/;
 
+#include <dt-bindings/gpio/gpio.h>
 #include "mdm9650-v1.1-mtp.dtsi"
+
 / {
 	model = "Qualcomm Technologies, Inc. MDM 9650 PCIE EP TTP";
 	compatible = "qcom,mdm9650-ttp", "qcom,mdm9650", "qcom,ttp";
@@ -165,7 +167,8 @@
 
 &pcie_ep {
 	status = "ok";
-	mdm2apstatus-gpio = <&tlmm_pinmux 85 0>;
+	mdm2apstatus-gpio = <&tlmm_pinmux 64 GPIO_ACTIVE_LOW>;
+	clkreq-gpio = <&tlmm_pinmux 85 0>;
 };
 
 &pcie0 {
@@ -182,13 +185,40 @@
 
 &pcie0_mdm2apstatus_default {
 	mux {
-		pins = "gpio85";
+		pins = "gpio64";
 		function = "gpio";
 	};
 
+	config {
+		pins = "gpio64";
+		drive-strength = <2>;
+		bias-pull-up;
+	};
+};
+
+&pcie0_clkreq_default {
+	mux {
+		pins = "gpio85";
+		function = "gpio";
+	};
 	config {
 		pins = "gpio85";
 		drive-strength = <2>;
-		bias-pull-down;
+		bias-pull-up;
+	};
+};
+
+&pmd9650_pon {
+	interrupts = <0x0 0x8 0x0>, <0x0 0x8 0x1>;
+	interrupt-names = "kpdpwr", "resin";
+	qcom,s3-src = "resin";
+
+	qcom,pon_2 {
+		qcom,pon-type = <1>;
+		qcom,support-reset = <1>;
+		qcom,s1-timer = <0>;
+		qcom,s2-timer = <2000>;
+		qcom,s2-type = <7>;
+		qcom,pull-up = <1>;
 	};
 };
diff --git a/arch/arm/boot/dts/qcom/msm8953.dtsi b/arch/arm/boot/dts/qcom/msm8953.dtsi
@@ -1,6 +1,5 @@
 /*
- * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
- * Copyright (C) 2018 XiaoMi, Inc.
+ * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -1820,8 +1819,10 @@
 
 	sdhc_1: sdhci@7824900 {
 		compatible = "qcom,sdhci-msm";
-		reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>;
-		reg-names = "hc_mem", "core_mem", "cmdq_mem";
+		reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>,
+				<0x0119d000 0x4>;
+		reg-names = "hc_mem", "core_mem", "cmdq_mem",
+				"tlmm_mem";
 
 		interrupts = <0 123 0>, <0 138 0>;
 		interrupt-names = "hc_irq", "pwr_irq";

diff --git a/arch/arm/boot/dts/qcom/sdx20.dtsi b/arch/arm/boot/dts/qcom/sdx20.dtsi
@@ -42,10 +42,10 @@
 &reserved_mem {
 	linux,cma {
 		compatible = "shared-dma-pool";
-		alloc-ranges = <0 0x00000000 0 0x90000000>;
+		alloc-ranges = <0 0x90000000>;
 		reusable;
-		alignment = <0 0x400000>;
-		size = <0 0xc00000>;
+		alignment = <0x400000>;
+		size = <0xc00000>;
 		linux,cma-default;
 	};
 };

diff --git a/arch/arm/configs/msm8909-perf_defconfig b/arch/arm/configs/msm8909-perf_defconfig
@@ -316,6 +316,7 @@ CONFIG_SERIAL_MSM_HS=y
 CONFIG_SERIAL_MSM_SMD=y
 CONFIG_DIAG_CHAR=y
 CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_MSM_LEGACY=y
 CONFIG_MSM_SMD_PKT=y
 CONFIG_MSM_ADSPRPC=y
 CONFIG_I2C_CHARDEV=y
@@ -484,6 +485,7 @@ CONFIG_MSM_QMI_INTERFACE=y
 CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y
 CONFIG_MSM_EVENT_TIMER=y
 CONFIG_MSM_SUBSYSTEM_RESTART=y
+CONFIG_MSM_SYSMON_COMM=y
 CONFIG_MSM_PIL=y
 CONFIG_MSM_PIL_SSR_GENERIC=y
 CONFIG_MSM_PIL_MSS_QDSP6V5=y

diff --git a/arch/arm/configs/msm8909_defconfig b/arch/arm/configs/msm8909_defconfig
@@ -495,6 +495,7 @@ CONFIG_MSM_QMI_INTERFACE=y
 CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y
 CONFIG_MSM_EVENT_TIMER=y
 CONFIG_MSM_SUBSYSTEM_RESTART=y
+CONFIG_MSM_SYSMON_COMM=y
 CONFIG_MSM_PIL=y
 CONFIG_MSM_PIL_SSR_GENERIC=y
 CONFIG_MSM_PIL_MSS_QDSP6V5=y