[core/simd]: Write package documentation #4545
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| Check if SIMD is emulated on a target platform. | ||
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| This value is `true`, if the compile-time target has the hardware support for | ||
| at 128-bit (or wider) SIMD. If the compile-time target lacks the hardware support |
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| at 128-bit (or wider) SIMD. If the compile-time target lacks the hardware support | |
| at least 128-bit (or wider) SIMD. If the compile-time target lacks the hardware support |
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"at least" implies "or wider" so at least one of these has to go
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You now have has the hardware support for at 128-bit (or wider) where for at doesn't make any sense, so I tried to fix it with that suggestion.
core/simd/simd.odin
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| between all of the lanes in a vector. | ||
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| Inputs: | ||
| - `a`: Vector to reduce |
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| - `a`: Vector to reduce | |
| - `a`: The vector to reduce. |
core/simd/simd.odin
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| reduce_and :: intrinsics.simd_reduce_and | ||
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| /* | ||
| Reduce SIMD vector to a scalar by performing bitwise OR of all of the lanes. |
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| Reduce SIMD vector to a scalar by performing bitwise OR of all of the lanes. | |
| Reduce a vector to a scalar by performing bitwise OR of all of the lanes. |
core/simd/simd.odin
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| /* | ||
| Reduce SIMD vector to a scalar by performing bitwise OR of all of the lanes. | ||
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| This procedure returns a scalar, that is the result of the bitwise OR operation |
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| This procedure returns a scalar, that is the result of the bitwise OR operation | |
| This procedure returns a scalar that is the result of the bitwise OR operation |
core/simd/simd.odin
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| between all of the lanes in a vector. | ||
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| Inputs: | ||
| - `a`: Vector to reduce |
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| - `a`: Vector to reduce | |
| - `a`: The vector to reduce. |
core/simd/simd.odin
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| - `a`: Vector to reduce | ||
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| Result: | ||
| - Bitwise AND of all lanes, as a scalar. |
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| - Bitwise AND of all lanes, as a scalar. | |
| - Bitwise OR of all lanes, as a scalar. |
Co-authored-by: Laytan <[email protected]>
| Check if SIMD is emulated on a target platform. | ||
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| This value is `true`, if the compile-time target has the hardware support for | ||
| at 128-bit (or wider) SIMD. If the compile-time target lacks the hardware support |
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"at least" implies "or wider" so at least one of these has to go
| } | ||
| return res | ||
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| Example: |
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Ah! I should fix this then. I haven't read your comments below, but it should be okay to surround the code block with text that describes what the example achieves, right? Otherwise I feel like the purpose of example is defeated, unless it's explained at least a little bit.
| +-------+-------+-------+-------+ | ||
| res: | ||
| +-------+-------+-------+--------+ | ||
| | 0x44 | 0xaa | 0x06 | 0xfe | |
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Okay this one I have to refuse, I was assuming 1-byte lanes, which I should probably make explicit in the comments.
| /* | ||
| Saturated addition of SIMD vectors. | ||
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| The *saturated sum* is a sum, that upon overflow or underflow, instead of |
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Yes, I should rewrite this.
core/simd/simd.odin
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| res := simd.gather(ptrs, defaults, mask) | ||
| fmt.println(res) | ||
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| The code would print `<2, 127, 10, 127>`. First and the third positions came |
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They are indented with a tab. Thanks for Output: tip!
Co-authored-by: Laytan <[email protected]>
| +------+------+------+------+ | ||
| | 0 | 1 | 0.33 | 0.2 | | ||
| +------+------+------+------+ | ||
| */ |
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1/0 may not result in 0. That's a poor example.
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