Extend Vivado run script to support FPGAs of the Versal family #450
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Excellent! Let's get this merged. Thank you for your contributions. |
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Building bitstreams for the Versal family was not yet supported through the run script for Vivado. This change adds support for Versal FPGA's by the following means:
STEPS.WRITE_BITSTREAM.ARGS.BIN_FILEis only set if it exists. For the Versal family, this step has been replaced bywrite_device_imageand hence the property would not apply, throwing an error.bifinstead of.bit, which made copying the.bitfile throw an error. Now, after completion of the run, either a.bitor.biffile will be copied to the project workroot.The test reference files have been updated accordingly...