fixup: clint: add fields for reset

jh7110-vf2-12a-pac/jh7110-starfive-visionfive-2-v1.2a.svd

@@ -22,62 +22,78 @@
           <name>msip_0</name>
           <description>MSIP Register for hart 0</description>
           <addressOffset>0x0</addressOffset>
+          <size>32</size>
+          <resetValue>0</resetValue>
         </register>
         <register>
           <name>msip_1</name>
           <description>MSIP Register for hart 1</description>
           <addressOffset>0x4</addressOffset>
+          <size>32</size>
+          <resetValue>0</resetValue>
         </register>
         <register>
           <name>msip_2</name>
           <description>MSIP Register for hart 2</description>
           <addressOffset>0x8</addressOffset>
+          <size>32</size>
+          <resetValue>0</resetValue>
         </register>
         <register>
           <name>msip_3</name>
           <description>MSIP Register for hart 3</description>
           <addressOffset>0xC</addressOffset>
+          <size>32</size>
+          <resetValue>0</resetValue>
         </register>
         <register>
           <name>msip_4</name>
           <description>MSIP Register for hart 4</description>
           <addressOffset>0x10</addressOffset>
+          <size>32</size>
+          <resetValue>0</resetValue>
         </register>
         <register>
           <name>mtimecmp_0</name>
           <description>MTIMECMP Register for hart 0</description>
           <addressOffset>0x4000</addressOffset>
           <size>64</size>
+          <resetValue>0</resetValue>
         </register>
         <register>
           <name>mtimecmp_1</name>
           <description>MTIMECMP Register for hart 1</description>
           <addressOffset>0x4008</addressOffset>
           <size>64</size>
+          <resetValue>0</resetValue>
         </register>
         <register>
           <name>mtimecmp_2</name>
           <description>MTIMECMP Register for hart 2</description>
           <addressOffset>0x4010</addressOffset>
           <size>64</size>
+          <resetValue>0</resetValue>
         </register>
         <register>
           <name>mtimecmp_3</name>
           <description>MTIMECMP Register for hart 3</description>
           <addressOffset>0x4018</addressOffset>
           <size>64</size>
+          <resetValue>0</resetValue>
         </register>
         <register>
           <name>mtimecmp_4</name>
           <description>MTIMECMP Register for hart 4</description>
           <addressOffset>0x4020</addressOffset>
           <size>64</size>
+          <resetValue>0</resetValue>
         </register>
         <register>
           <name>mtime</name>
           <description>MTIME Register</description>
           <addressOffset>0xBFF8</addressOffset>
           <size>64</size>
+          <resetValue>0</resetValue>
         </register>
       </registers>
     </peripheral>

jh7110-vf2-12a-pac/src/clint.rs

@@ -72,57 +72,57 @@ impl RegisterBlock {
         &self.mtime
     }
 }
-#[doc = "msip_0 (rw) register accessor: MSIP Register for hart 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_0::R`].  You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msip_0`]
+#[doc = "msip_0 (rw) register accessor: MSIP Register for hart 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msip_0`]
 module"]
 pub type MSIP_0 = crate::Reg<msip_0::MSIP_0_SPEC>;
 #[doc = "MSIP Register for hart 0"]
 pub mod msip_0;
-#[doc = "msip_1 (rw) register accessor: MSIP Register for hart 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_1::R`].  You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msip_1`]
+#[doc = "msip_1 (rw) register accessor: MSIP Register for hart 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msip_1`]
 module"]
 pub type MSIP_1 = crate::Reg<msip_1::MSIP_1_SPEC>;
 #[doc = "MSIP Register for hart 1"]
 pub mod msip_1;
-#[doc = "msip_2 (rw) register accessor: MSIP Register for hart 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_2::R`].  You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msip_2`]
+#[doc = "msip_2 (rw) register accessor: MSIP Register for hart 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msip_2`]
 module"]
 pub type MSIP_2 = crate::Reg<msip_2::MSIP_2_SPEC>;
 #[doc = "MSIP Register for hart 2"]
 pub mod msip_2;
-#[doc = "msip_3 (rw) register accessor: MSIP Register for hart 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_3::R`].  You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msip_3`]
+#[doc = "msip_3 (rw) register accessor: MSIP Register for hart 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msip_3`]
 module"]
 pub type MSIP_3 = crate::Reg<msip_3::MSIP_3_SPEC>;
 #[doc = "MSIP Register for hart 3"]
 pub mod msip_3;
-#[doc = "msip_4 (rw) register accessor: MSIP Register for hart 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_4::R`].  You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msip_4`]
+#[doc = "msip_4 (rw) register accessor: MSIP Register for hart 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msip_4`]
 module"]
 pub type MSIP_4 = crate::Reg<msip_4::MSIP_4_SPEC>;
 #[doc = "MSIP Register for hart 4"]
 pub mod msip_4;
-#[doc = "mtimecmp_0 (rw) register accessor: MTIMECMP Register for hart 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mtimecmp_0::R`].  You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mtimecmp_0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mtimecmp_0`]
+#[doc = "mtimecmp_0 (rw) register accessor: MTIMECMP Register for hart 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mtimecmp_0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mtimecmp_0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mtimecmp_0`]
 module"]
 pub type MTIMECMP_0 = crate::Reg<mtimecmp_0::MTIMECMP_0_SPEC>;
 #[doc = "MTIMECMP Register for hart 0"]
 pub mod mtimecmp_0;
-#[doc = "mtimecmp_1 (rw) register accessor: MTIMECMP Register for hart 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mtimecmp_1::R`].  You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mtimecmp_1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mtimecmp_1`]
+#[doc = "mtimecmp_1 (rw) register accessor: MTIMECMP Register for hart 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mtimecmp_1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mtimecmp_1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mtimecmp_1`]
 module"]
 pub type MTIMECMP_1 = crate::Reg<mtimecmp_1::MTIMECMP_1_SPEC>;
 #[doc = "MTIMECMP Register for hart 1"]
 pub mod mtimecmp_1;
-#[doc = "mtimecmp_2 (rw) register accessor: MTIMECMP Register for hart 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mtimecmp_2::R`].  You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mtimecmp_2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mtimecmp_2`]
+#[doc = "mtimecmp_2 (rw) register accessor: MTIMECMP Register for hart 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mtimecmp_2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mtimecmp_2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mtimecmp_2`]
 module"]
 pub type MTIMECMP_2 = crate::Reg<mtimecmp_2::MTIMECMP_2_SPEC>;
 #[doc = "MTIMECMP Register for hart 2"]
 pub mod mtimecmp_2;
-#[doc = "mtimecmp_3 (rw) register accessor: MTIMECMP Register for hart 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mtimecmp_3::R`].  You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mtimecmp_3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mtimecmp_3`]
+#[doc = "mtimecmp_3 (rw) register accessor: MTIMECMP Register for hart 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mtimecmp_3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mtimecmp_3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mtimecmp_3`]
 module"]
 pub type MTIMECMP_3 = crate::Reg<mtimecmp_3::MTIMECMP_3_SPEC>;
 #[doc = "MTIMECMP Register for hart 3"]
 pub mod mtimecmp_3;
-#[doc = "mtimecmp_4 (rw) register accessor: MTIMECMP Register for hart 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mtimecmp_4::R`].  You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mtimecmp_4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mtimecmp_4`]
+#[doc = "mtimecmp_4 (rw) register accessor: MTIMECMP Register for hart 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mtimecmp_4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mtimecmp_4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mtimecmp_4`]
 module"]
 pub type MTIMECMP_4 = crate::Reg<mtimecmp_4::MTIMECMP_4_SPEC>;
 #[doc = "MTIMECMP Register for hart 4"]
 pub mod mtimecmp_4;
-#[doc = "mtime (rw) register accessor: MTIME Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mtime::R`].  You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mtime::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mtime`]
+#[doc = "mtime (rw) register accessor: MTIME Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mtime::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mtime::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mtime`]
 module"]
 pub type MTIME = crate::Reg<mtime::MTIME_SPEC>;
 #[doc = "MTIME Register"]

jh7110-vf2-12a-pac/src/clint/msip_0.rs

@@ -24,7 +24,7 @@ impl W {
         self
     }
 }
-#[doc = "MSIP Register for hart 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_0::R`](R).  You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MSIP Register for hart 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MSIP_0_SPEC;
 impl crate::RegisterSpec for MSIP_0_SPEC {
     type Ux = u32;
@@ -36,3 +36,7 @@ impl crate::Writable for MSIP_0_SPEC {
     const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
     const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
 }
+#[doc = "`reset()` method sets msip_0 to value 0"]
+impl crate::Resettable for MSIP_0_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

jh7110-vf2-12a-pac/src/clint/msip_1.rs

@@ -24,7 +24,7 @@ impl W {
         self
     }
 }
-#[doc = "MSIP Register for hart 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_1::R`](R).  You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MSIP Register for hart 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MSIP_1_SPEC;
 impl crate::RegisterSpec for MSIP_1_SPEC {
     type Ux = u32;
@@ -36,3 +36,7 @@ impl crate::Writable for MSIP_1_SPEC {
     const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
     const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
 }
+#[doc = "`reset()` method sets msip_1 to value 0"]
+impl crate::Resettable for MSIP_1_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

jh7110-vf2-12a-pac/src/clint/msip_2.rs

@@ -24,7 +24,7 @@ impl W {
         self
     }
 }
-#[doc = "MSIP Register for hart 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_2::R`](R).  You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MSIP Register for hart 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MSIP_2_SPEC;
 impl crate::RegisterSpec for MSIP_2_SPEC {
     type Ux = u32;
@@ -36,3 +36,7 @@ impl crate::Writable for MSIP_2_SPEC {
     const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
     const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
 }
+#[doc = "`reset()` method sets msip_2 to value 0"]
+impl crate::Resettable for MSIP_2_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

jh7110-vf2-12a-pac/src/clint/msip_3.rs

@@ -24,7 +24,7 @@ impl W {
         self
     }
 }
-#[doc = "MSIP Register for hart 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_3::R`](R).  You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+#[doc = "MSIP Register for hart 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msip_3::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msip_3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct MSIP_3_SPEC;
 impl crate::RegisterSpec for MSIP_3_SPEC {
     type Ux = u32;
@@ -36,3 +36,7 @@ impl crate::Writable for MSIP_3_SPEC {
     const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
     const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
 }
+#[doc = "`reset()` method sets msip_3 to value 0"]
+impl crate::Resettable for MSIP_3_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}