Skip to content

Commit

Permalink
Merge pull request #151 from rust-embedded/add-riscv-rt
Browse files Browse the repository at this point in the history
Add riscv-rt to workspace
  • Loading branch information
romancardenas authored Nov 27, 2023
2 parents 8071b55 + 5407f38 commit f8c3923
Show file tree
Hide file tree
Showing 23 changed files with 1,810 additions and 50 deletions.
10 changes: 10 additions & 0 deletions .github/workflows/changelog.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,8 @@ jobs:
filters: |
riscv:
- 'riscv/**'
riscv-rt:
- 'riscv-rt/**'
- name: Check for CHANGELOG.md (riscv)
if: steps.changes.outputs.riscv == 'true'
Expand All @@ -27,3 +29,11 @@ jobs:
changeLogPath: ./riscv/CHANGELOG.md
skipLabels: 'skip changelog'
missingUpdateErrorMessage: 'Please add a changelog entry in the riscv/CHANGELOG.md file.'

- name: Check for CHANGELOG.md (riscv-rt)
if: steps.changes.outputs.riscv-rt == 'true'
uses: dangoslen/changelog-enforcer@v3
with:
changeLogPath: ./riscv-rt/CHANGELOG.md
skipLabels: 'skip changelog'
missingUpdateErrorMessage: 'Please add a changelog entry in the riscv-rt/CHANGELOG.md file.'
32 changes: 25 additions & 7 deletions .github/workflows/clippy.yaml
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
on:
push:
branches: [ staging, trying, master ]
branches: [ master ]
pull_request:
merge_group:

Expand All @@ -14,28 +14,46 @@ jobs:
strategy:
matrix:
toolchain: [ stable, nightly ]
cargo_flags:
- "--no-default-features"
- "--all-features"
include:
# Nightly is only for reference and allowed to fail
- toolchain: nightly
experimental: true
runs-on: ubuntu-latest
continue-on-error: ${{ matrix.experimental || false }}
steps:
- uses: actions/checkout@v3
- uses: actions/checkout@v4
- uses: dtolnay/rust-toolchain@master
with:
toolchain: ${{ matrix.toolchain }}
components: clippy
- name: Run clippy
run: cargo clippy --all ${{ matrix.cargo_flags }} -- -D warnings
- name: Run clippy (no features)
run: cargo clippy --all --no-default-features -- -D warnings
- name: Run clippy (all features)
run: cargo clippy --all --all-features -- -D warnings

# Additonal clippy checks for riscv-rt
clippy-riscv-rt:
strategy:
matrix:
toolchain: [ stable, nightly ]
runs-on: ubuntu-latest
continue-on-error: ${{ matrix.experimental || false }}
steps:
- uses: actions/checkout@v4
- uses: dtolnay/rust-toolchain@master
with:
toolchain: ${{ matrix.toolchain }}
components: clippy
- name: Run clippy (s-mode)
run: cargo clippy --package riscv-rt --all --features=s-mode -- -D warnings
- name: Run clippy (single-hart)
run: cargo clippy --package riscv-rt --all --features=single-hart -- -D warnings

# Job to check that all the lint checks succeeded
clippy-check:
needs:
- clippy
- clippy-riscv-rt
runs-on: ubuntu-latest
if: always()
steps:
Expand Down
17 changes: 17 additions & 0 deletions .github/workflows/label.yaml
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
name: Check Labels

on:
pull_request:
types: [opened, synchronize, reopened, ready_for_review, labeled, unlabeled]

jobs:
label-check:
runs-on: ubuntu-latest
steps:
- uses: mheap/github-action-required-labels@v5
with:
mode: exactly
count: 0
labels: "work in progress, do not merge"
add_comment: true
message: "This PR is being prevented from merging because it presents one of the blocking labels: {{ provided }}."
52 changes: 52 additions & 0 deletions .github/workflows/riscv-rt.yaml
Original file line number Diff line number Diff line change
@@ -0,0 +1,52 @@
on:
push:
branches: [ master ]
pull_request:
merge_group:

name: Build check (riscv-rt)

jobs:
build:
strategy:
matrix:
# All generated code should be running on stable now, MRSV is 1.59.0
toolchain: [ stable, nightly, 1.59.0 ]
target:
- riscv32i-unknown-none-elf
- riscv32imc-unknown-none-elf
- riscv32imac-unknown-none-elf
- riscv64imac-unknown-none-elf
- riscv64gc-unknown-none-elf
example:
- empty
- multi_core
include:
# Nightly is only for reference and allowed to fail
- toolchain: nightly
experimental: true
runs-on: ubuntu-latest
continue-on-error: ${{ matrix.experimental || false }}
steps:
- uses: actions/checkout@v4
- uses: dtolnay/rust-toolchain@master
with:
toolchain: ${{ matrix.toolchain }}
targets: ${{ matrix.target }}
- name: Build (no features)
run: RUSTFLAGS="-C link-arg=-Triscv-rt/examples/device.x" cargo build --package riscv-rt --target ${{ matrix.target }} --example ${{ matrix.example }}
- name : Build example (s-mode)
run: RUSTFLAGS="-C link-arg=-Triscv-rt/examples/device.x" cargo build --package riscv-rt --target ${{ matrix.target }} --example ${{ matrix.example }} --features=s-mode
- name : Build example (single-hart)
run: RUSTFLAGS="-C link-arg=-Triscv-rt/examples/device.x" cargo build --package riscv-rt --target ${{ matrix.target }} --example ${{ matrix.example }} --features=single-hart
- name: Build example (all features)
run: RUSTFLAGS="-C link-arg=-Triscv-rt/examples/device.x" cargo build --package riscv-rt --target ${{ matrix.target }} --example ${{ matrix.example }} --all-features

# Job to check that all the builds succeeded
build-check:
needs:
- build
runs-on: ubuntu-latest
if: always()
steps:
- run: jq --exit-status 'all(.result == "success")' <<< '${{ toJson(needs) }}'
25 changes: 12 additions & 13 deletions .github/workflows/build.yaml → .github/workflows/riscv.yaml
Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
on:
push:
branches: [ staging, trying, master ]
branches: [ master ]
pull_request:
merge_group:

name: Build check
name: Build check (riscv)

jobs:
# We check that the crate builds and links for all the toolchains and targets.
Expand All @@ -19,37 +19,36 @@ jobs:
- riscv32imac-unknown-none-elf
- riscv64imac-unknown-none-elf
- riscv64gc-unknown-none-elf
cargo_flags: [ "--no-default-features", "--all-features" ]
include:
# Nightly is only for reference and allowed to fail
- toolchain: nightly
experimental: true
runs-on: ubuntu-latest
continue-on-error: ${{ matrix.experimental || false }}
steps:
- uses: actions/checkout@v3
- uses: actions/checkout@v4
- uses: dtolnay/rust-toolchain@master
with:
toolchain: ${{ matrix.toolchain }}
targets: ${{ matrix.target }}
- name: Build library
run: cargo build --target ${{ matrix.target }} ${{ matrix.cargo_flags }}
- name: Build (no features)
run: cargo build --package riscv --target ${{ matrix.target }}
- name: Build (all features)
run: cargo build --package riscv --target ${{ matrix.target }} --all-features

# On MacOS, Ubuntu, and Windows, we at least make sure that the crate builds and links.
build-others:
strategy:
matrix:
os:
- macos-latest
- ubuntu-latest
- windows-latest
cargo_flags: [ "--no-default-features", "--all-features" ]
os: [ macos-latest, ubuntu-latest, windows-latest ]
runs-on: ${{ matrix.os }}
steps:
- uses: actions/checkout@v3
- uses: dtolnay/rust-toolchain@stable
- name: Build crate for host OS
run: cargo build ${{ matrix.cargo_flags }}
- name: Build (no features)
run: cargo build --package riscv
- name: Build (all features)
run: cargo build --package riscv --all-features

# Job to check that all the builds succeeded
build-check:
Expand Down
4 changes: 2 additions & 2 deletions .github/workflows/rustfmt.yaml
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
on:
push:
branches: [ staging, trying, master ]
branches: [ master ]
pull_request:
merge_group:

Expand All @@ -10,7 +10,7 @@ jobs:
rustfmt:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v3
- uses: actions/checkout@v4
- uses: dtolnay/rust-toolchain@stable
with:
components: rustfmt
Expand Down
1 change: 1 addition & 0 deletions Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -2,4 +2,5 @@
resolver = "2"
members = [
"riscv",
"riscv-rt",
]
39 changes: 12 additions & 27 deletions README.md
Original file line number Diff line number Diff line change
@@ -1,41 +1,26 @@
[![crates.io](https://img.shields.io/crates/d/riscv.svg)](https://crates.io/crates/riscv)
[![crates.io](https://img.shields.io/crates/v/riscv.svg)](https://crates.io/crates/riscv)
[![Build Status](https://travis-ci.org/rust-embedded/riscv.svg?branch=master)](https://travis-ci.org/rust-embedded/riscv)
# RISC-V crates

# `riscv`
This repository contains various crates useful for writing Rust programs on RISC-V microcontrollers:

> Low level access to RISC-V processors
* [`riscv`]: CPU peripheral access and intrinsics
* [`riscv-rt`]: Startup code and interrupt handling

This project is developed and maintained by the [RISC-V team][team].

## [Documentation](https://docs.rs/crate/riscv)

## Minimum Supported Rust Version (MSRV)

This crate is guaranteed to compile on stable Rust 1.60 and up. It *might*
compile with older versions but that may change in any new patch release.

## License

Copyright 2019-2022 [RISC-V team][team]
This project is developed and maintained by the [RISC-V team][team].

Permission to use, copy, modify, and/or distribute this software for any purpose
with or without fee is hereby granted, provided that the above copyright notice
and this permission notice appear in all copies.
### Contribution

THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND
FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF
THIS SOFTWARE.
Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the
work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any
additional terms or conditions.

## Code of Conduct

Contribution to this crate is organized under the terms of the [Rust Code of
Conduct][CoC], the maintainer of this crate, the [RISC-V team][team], promises
to intervene to uphold that code of conduct.

[CoC]: CODE_OF_CONDUCT.md
[`riscv`]: https://crates.io/crates/riscv
[`riscv-rt`]: https://crates.io/crates/riscv-rt
[team]: https://github.com/rust-embedded/wg#the-risc-v-team
[CoC]: CODE_OF_CONDUCT.md
Loading

0 comments on commit f8c3923

Please sign in to comment.