pwm remap from

CHANGELOG.md

@@ -9,9 +9,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Breaking changes
 
-- Relax pin type generics for `Serial`, `I2c`, `Spi`, `Can`. [#462]
+- Relax pin type generics for `Serial`, `I2c`, `Spi`, `Can`, `Pwm`, `Qei`, `PwmInput`.
   Use enums of pin tuples and `Enum::from<(tuple)>` for pin remap before passing to peripheral.
-  Remove `RemapStruct`s. [#462] [#506] [#509]
+  Remove `RemapStruct`s. [#462] [#506] [#507] [#509] 
 - Use independent `Spi` and `SpiSlave` structures instead of `OP` generic [#462]
 - Take `&Clocks` instead of `Clocks` [#498]
 - Temporary replace `stm32f1` with `stm32f1-staging` [#503]
@@ -56,6 +56,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 [#503]: https://github.com/stm32-rs/stm32f1xx-hal/pull/503
 [#505]: https://github.com/stm32-rs/stm32f1xx-hal/pull/505
 [#506]: https://github.com/stm32-rs/stm32f1xx-hal/pull/506
+[#507]: https://github.com/stm32-rs/stm32f1xx-hal/pull/507
 [#509]: https://github.com/stm32-rs/stm32f1xx-hal/pull/509
 [#511]: https://github.com/stm32-rs/stm32f1xx-hal/pull/511
 

examples/pwm.rs

@@ -9,12 +9,7 @@ use panic_halt as _;
 
 use cortex_m::asm;
 use cortex_m_rt::entry;
-use stm32f1xx_hal::{
-    pac,
-    prelude::*,
-    time::ms,
-    timer::{Channel, Tim2NoRemap},
-};
+use stm32f1xx_hal::{pac, prelude::*, time::ms, timer, timer::Channel};
 
 #[entry]
 fn main() -> ! {
@@ -27,16 +22,16 @@ fn main() -> ! {
 
     let mut afio = p.AFIO.constrain();
 
-    let mut gpioa = p.GPIOA.split();
+    let gpioa = p.GPIOA.split();
     // let mut gpiob = p.GPIOB.split();
 
     // TIM2
-    let c1 = gpioa.pa0.into_alternate_push_pull(&mut gpioa.crl);
-    let c2 = gpioa.pa1.into_alternate_push_pull(&mut gpioa.crl);
-    let c3 = gpioa.pa2.into_alternate_push_pull(&mut gpioa.crl);
+    let c1 = gpioa.pa0;
+    let c2 = gpioa.pa1;
+    let c3 = gpioa.pa2;
     // If you don't want to use all channels, just leave some out
     // let c4 = gpioa.pa3.into_alternate_push_pull(&mut gpioa.crl);
-    let pins = (c1, c2, c3);
+    let pins = (c1, c2, c3, &mut afio.mapr);
 
     // TIM3
     // let c1 = gpioa.pa6.into_alternate_push_pull(&mut gpioa.crl);
@@ -55,7 +50,7 @@ fn main() -> ! {
     // or
     let mut pwm = p
         .TIM2
-        .pwm_hz::<Tim2NoRemap, _, _>(pins, &mut afio.mapr, 1.kHz(), &clocks);
+        .pwm_hz::<timer::tim2::Channels123>(pins, 1.kHz(), &clocks);
 
     // Enable clock on each of the channels
     pwm.enable(Channel::C1);

examples/pwm_custom.rs

@@ -8,7 +8,11 @@
 use panic_halt as _;
 
 use cortex_m::asm;
-use stm32f1xx_hal::{pac, prelude::*, timer::Timer};
+use stm32f1xx_hal::{
+    pac,
+    prelude::*,
+    timer::{self, Timer},
+};
 
 use cortex_m_rt::entry;
 
@@ -30,7 +34,8 @@ fn main() -> ! {
     let p0 = pb4.into_alternate_push_pull(&mut gpiob.crl);
     let p1 = gpiob.pb5.into_alternate_push_pull(&mut gpiob.crl);
 
-    let pwm = Timer::new(p.TIM3, &clocks).pwm_hz((p0, p1), &mut afio.mapr, 1.kHz());
+    let pwm = Timer::new(p.TIM3, &clocks)
+        .pwm_hz::<timer::tim3::Channels12>((p0, p1, &mut afio.mapr), 1.kHz());
 
     let max = pwm.get_max_duty();
 

examples/pwm_input.rs

@@ -7,11 +7,7 @@
 use panic_halt as _;
 
 use cortex_m_rt::entry;
-use stm32f1xx_hal::{
-    pac,
-    prelude::*,
-    timer::{pwm_input::*, Timer},
-};
+use stm32f1xx_hal::{pac, prelude::*, timer::pwm_input::*};
 
 #[entry]
 fn main() -> ! {
@@ -31,11 +27,11 @@ fn main() -> ! {
     let (_pa15, _pb3, pb4) = afio.mapr.disable_jtag(gpioa.pa15, gpiob.pb3, gpiob.pb4);
     let pb5 = gpiob.pb5;
 
-    let pwm_input = Timer::new(p.TIM3, &clocks).pwm_input(
-        (pb4, pb5),
-        &mut afio.mapr,
+    let pwm_input = p.TIM3.pwm_input(
+        (pb4, pb5, &mut afio.mapr),
         &mut dbg,
         Configuration::Frequency(10.kHz()),
+        &clocks,
     );
 
     loop {

examples/qei.rs

@@ -9,7 +9,7 @@ use panic_semihosting as _;
 use cortex_m_semihosting::hprintln;
 
 use cortex_m_rt::entry;
-use stm32f1xx_hal::{pac, prelude::*, qei::QeiOptions, timer::Timer};
+use stm32f1xx_hal::{pac, prelude::*, qei::QeiOptions};
 
 #[entry]
 fn main() -> ! {
@@ -38,7 +38,9 @@ fn main() -> ! {
     let c1 = gpiob.pb6;
     let c2 = gpiob.pb7;
 
-    let qei = Timer::new(dp.TIM4, &clocks).qei((c1, c2), &mut afio.mapr, QeiOptions::default());
+    let qei = dp
+        .TIM4
+        .qei((c1, c2, &mut afio.mapr), QeiOptions::default(), &clocks);
     let mut delay = cp.SYST.delay(&clocks);
 
     loop {

examples/serial-dma-tx.rs

@@ -10,11 +10,7 @@ use panic_halt as _;
 use cortex_m::asm;
 
 use cortex_m_rt::entry;
-use stm32f1xx_hal::{
-    pac,
-    prelude::*,
-    serial::{Config, Serial},
-};
+use stm32f1xx_hal::{pac, prelude::*};
 
 #[entry]
 fn main() -> ! {
@@ -28,31 +24,28 @@ fn main() -> ! {
     let mut afio = p.AFIO.constrain();
     let channels = p.DMA1.split();
 
-    let mut gpioa = p.GPIOA.split();
-    // let mut gpiob = p.GPIOB.split();
+    let gpioa = p.GPIOA.split();
+    // let gpiob = p.GPIOB.split();
 
     // USART1
-    let tx = gpioa.pa9.into_alternate_push_pull(&mut gpioa.crh);
+    let tx = gpioa.pa9;
     let rx = gpioa.pa10;
 
     // USART1
-    // let tx = gpiob.pb6.into_alternate_push_pull(&mut gpiob.crl);
+    // let tx = gpiob.pb6;
     // let rx = gpiob.pb7;
 
     // USART2
-    // let tx = gpioa.pa2.into_alternate_push_pull(&mut gpioa.crl);
+    // let tx = gpioa.pa2;
     // let rx = gpioa.pa3;
 
     // USART3
-    // let tx = gpiob.pb10.into_alternate_push_pull(&mut gpiob.crh);
+    // let tx = gpiob.pb10;
     // let rx = gpiob.pb11;
 
-    let serial = Serial::new(
-        p.USART1,
-        (tx, rx, &mut afio.mapr),
-        Config::default().baudrate(9600.bps()),
-        &clocks,
-    );
+    let serial = p
+        .USART1
+        .serial((tx, rx, &mut afio.mapr), 9600.bps(), &clocks);
 
     let tx = serial.tx.with_dma(channels.4);
 

examples/serial.rs

@@ -14,7 +14,7 @@ use cortex_m::asm;
 use nb::block;
 
 use cortex_m_rt::entry;
-use stm32f1xx_hal::{pac, prelude::*, serial::Config};
+use stm32f1xx_hal::{pac, prelude::*};
 
 #[entry]
 fn main() -> ! {
@@ -34,33 +34,31 @@ fn main() -> ! {
     let mut afio = p.AFIO.constrain();
 
     // Prepare the GPIOB peripheral
-    let mut gpiob = p.GPIOB.split();
+    let gpiob = p.GPIOB.split();
 
     // USART1
-    // let tx = gpioa.pa9.into_alternate_push_pull(&mut gpioa.crh);
+    // let tx = gpioa.pa9;
     // let rx = gpioa.pa10;
 
     // USART1
-    // let tx = gpiob.pb6.into_alternate_push_pull(&mut gpiob.crl);
+    // let tx = gpiob.pb6;
     // let rx = gpiob.pb7;
 
     // USART2
-    // let tx = gpioa.pa2.into_alternate_push_pull(&mut gpioa.crl);
+    // let tx = gpioa.pa2;
     // let rx = gpioa.pa3;
 
     // USART3
     // Configure pb10 as a push_pull output, this will be the tx pin
-    let tx = gpiob.pb10.into_alternate_push_pull(&mut gpiob.crh);
+    let tx = gpiob.pb10;
     // Take ownership over pb11
     let rx = gpiob.pb11;
 
     // Set up the usart device. Take ownership over the USART register and tx/rx pins. The rest of
     // the registers are used to enable and configure the device.
-    let mut serial = p.USART3.serial(
-        (tx, rx, &mut afio.mapr),
-        Config::default().baudrate(9600.bps()),
-        &clocks,
-    );
+    let mut serial = p
+        .USART3
+        .serial((tx, rx, &mut afio.mapr), 9600.bps(), &clocks);
 
     // Loopback test. Write `X` and wait until the write is successful.
     let sent = b'X';

src/can.rs

@@ -46,8 +46,8 @@ pub mod can1 {
 
     remap! {
         pac::CAN1: [
-            PA12, PA11 => 0;
-            PB9, PB8 => 2;
+            Tx: PA12, Rx: PA11 => 0;
+            Tx: PB9,  Rx: PB8  => 2;
         ]
     }
 }
@@ -58,14 +58,14 @@ pub mod can2 {
 
     remap! {
         pac::CAN2: [
-            PB6, PB5 => 0;
-            PB13, PB12 => 1;
+            Tx: PB6,  Rx: PB5  => 0;
+            Tx: PB13, Rx: PB12 => 1;
         ]
     }
 }
 
 macro_rules! remap {
-    ($PER:ty: [$($TX:ident, $RX:ident => $remap:literal;)+]) => {
+    ($PER:ty: [$(Tx: $TX:ident, Rx: $RX:ident => $remap:literal;)+]) => {
         pub enum Tx {
             $(
                 $TX(gpio::$TX<Alternate>),

src/i2c.rs

@@ -105,8 +105,8 @@ pub mod i2c1 {
 
     remap! {
         pac::I2C1: [
-            PB6, PB7 => MAPR: 0;
-            PB8, PB9 => MAPR: 1;
+            Scl: PB6, Sda: PB7 => MAPR: 0;
+            Scl: PB8, Sda: PB9 => MAPR: 1;
         ]
     }
 }
@@ -115,14 +115,14 @@ pub mod i2c2 {
 
     remap! {
         pac::I2C2: [
-            PB10, PB11;
+            Scl: PB10, Sda: PB11;
         ]
     }
 }
 
 macro_rules! remap {
     ($PER:ty: [
-        $($SCL:ident, $SDA:ident $( => $MAPR:ident: $remap:literal)?;)+
+        $(Scl: $SCL:ident, Sda: $SDA:ident $( => $MAPR:ident: $remap:literal)?;)+
     ]) => {
         pub enum Scl {
             $(

src/prelude.rs

@@ -13,10 +13,12 @@ pub use crate::gpio::GpioExt as _stm32_hal_gpio_GpioExt;
 pub use crate::hal_02::adc::OneShot as _embedded_hal_adc_OneShot;
 pub use crate::hal_02::prelude::*;
 pub use crate::i2c::I2cExt as _;
+pub use crate::qei::QeiExt as _;
 pub use crate::rcc::RccExt as _stm32_hal_rcc_RccExt;
 pub use crate::serial::SerialExt as _;
 pub use crate::spi::SpiExt as _;
 pub use crate::time::U32Ext as _stm32_hal_time_U32Ext;
+pub use crate::timer::pwm_input::PwmInputExt as _;
 #[cfg(feature = "rtic")]
 pub use crate::timer::MonoTimerExt as _stm32f4xx_hal_timer_MonoTimerExt;
 pub use crate::timer::PwmExt as _stm32f4xx_hal_timer_PwmExt;