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Could you please help me check my prototype for zcu102? #2109

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Jerryy959
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Related PRs / Issues:

Type of change:

  • Bug fix
  • New feature
  • Other enhancement

Impact:

  • RTL change
  • Software change (RISC-V software)
  • Build system change
  • Other

Contributor Checklist:

  • Did you set main as the base branch?
  • Is this PR's title suitable for inclusion in the changelog and have you added a changelog:<topic> label?
  • Did you state the type-of-change/impact?
  • Did you delete any extraneous prints/debugging code?
  • Did you mark the PR with a changelog: label?
  • (If applicable) Did you update the conda .conda-lock.yml file if you updated the conda requirements file?
  • (If applicable) Did you add documentation for the feature?
  • (If applicable) Did you add a test demonstrating the PR?
  • (If applicable) Did you mark the PR as Please Backport?

CI Help:
Add the following labels to modify the CI for a set of features.
Generally, a label added only affect subsequent changes to the PR (i.e. new commits, force pushing, closing/reopening).
See ci:* for full list of labels:

  • ci:fpga-deploy - Run FPGA-based E2E testing
  • ci:local-fpga-buildbitstream-deploy - Build local FPGA bitstreams for platforms that are released
  • ci:disable - Disable CI

@Jerryy959
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Question 1: I can't use the newest version of FireMarshal to build the fpga prototype for my zcu102 fpga due to some zip package lost. In this issue: firesim/FireMarshal#312
Question 2: I can only boot my porting version to "BOOT", and can't got to the opensbi where located in 0x80000000 address.

I have already try much methods and can't solove it, can u give me some useful ideas?
@jerryz123

@Jerryy959
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Can u just help me check the fpga/src/main/scala/zcu102/HarnessBinders.scala Or IOBinder.scala files about the implement of Memory, or explain how to implement them.
I really need your help, it has lost me too much time.

@Jerryy959 Jerryy959 changed the title Can you help me check my prototype for zcu102? Can you help me check my fpga prototype for zcu102? Nov 4, 2024
@jerryz123
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Thanks, these changes overall look very good, and I'd be happy to accept them.

However, the current state of the PR contains a lot of unnecessary changes and additions, making it difficult to review the critical code. If you could create a new PR that contains only the necessary changes to enable zcu102 and zcu106, I can take a closer look.

@Jerryy959
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Jerryy959 commented Nov 6, 2024

Thanks, these changes overall look very good, and I'd be happy to accept them.

However, the current state of the PR contains a lot of unnecessary changes and additions, making it difficult to review the critical code. If you could create a new PR that contains only the necessary changes to enable zcu102 and zcu106, I can take a closer look.

Okay, I have organized my code and created two new PRs.

I think this pr can be closed and focus on another links.

@Jerryy959 Jerryy959 changed the title Can you help me check my fpga prototype for zcu102? Could you please help me check my prototype for zcu102? Nov 7, 2024
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