Emulator model for the RD53B ASIC in the Atlas detector of the LHC at CERN
The plan is to implement the emulator in on various Xilinx FPGA on different boards.
KC705 - Kintex
VC709 - Virtex
'SLAC board' -also a Kintex
The emulator will generate compressed/encoded data streams and also respond to register write/read commands.