Code

[pull] master from Xilinx:master#18

Code

Merged

pull[bot] merged 8 commits intoeddieh-xlnx:mastereddieh-xlnx/fpga24_routing_contest:masterfrom Xilinx:masterXilinx/fpga24_routing_contest:masterCopy head branch name to clipboardJan 13, 2024

+120-25

Commits

Commits on Jan 10, 2024

• Restore BENCHMARKS_URL

  eddieh-xlnx

  authored
  ec56448

Commits on Jan 11, 2024

• [Docs] Fix boom_med_pb & corundum_25g OOC=false (#68)

  eddieh-xlnx

  authored
  1d4fc44

• Add DiffPhysNetlist utility (#66)

  Show description for fc35343
  eddieh-xlnx

  authored
  fc35343

• [CheckPhysNetlist] Fix NullPointerException (#67)

  Show description for 7bd739f
  eddieh-xlnx

  authored
  7bd739f

• Cleanup Makefile (#70)

  Show description for 3be0597
  eddieh-xlnx

  authored
  3be0597

Commits on Jan 12, 2024

• Add logicnets_jscl and finn_radioml, with fixes (#69)

  Show description for 4cec6f0
  eddieh-xlnx

  authored
  4cec6f0

• [RWRoute] Add --lutRoutethru option (disabled by default) (#71)

  Show description for 5d24bca
  eddieh-xlnx

  authored
  5d24bca

• Restore BENCHMARKS_URL to upstream

  eddieh-xlnx

  authored
  595c70d